From nobody Fri Sep 25 07:22:06 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB8B43C1D6F; Tue, 15 Sep 2026 14:32:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789482749; cv=none; b=sKLNtxFXkpyEjJk6ycVpkoLnsKMowXmG+MLXoaNoOtFq4fCZeFy4jPEEkYf+yzaRLRBfwTI/HMvCL9KtPTKsBHIHmg514cBqwjD94vvWLddriF731LCjS3Z5c7700/7cMsgBe5+3VprxPEhtB6DVCBHQzTHPbDITqzVxcieEPEA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789482749; c=relaxed/simple; bh=KgaXJ/pb3DRKR/CJo1jmUo4ceN84s0N8uAZe35ZJPNM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GoJ/tNynnc8l1HAtqZRcGH9oez0rwx29hYvvobZACiTfL3b5k/TKqg+D3CDSU396GR8CpsyaSFo44q81b8JIuzqXS1tqSVvCQ20iHcgMZ+tusbBZu3mKGP4YMDbI8qOjEi/+TdqkwgYsAUbZQHJYy+EmvHGtUgIYg+cwVkvbTnA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZuqrGNR1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZuqrGNR1" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7C43FC2BCB9; Tue, 15 Sep 2026 14:32:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789482748; bh=KgaXJ/pb3DRKR/CJo1jmUo4ceN84s0N8uAZe35ZJPNM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ZuqrGNR14lj14B4YuML713qY6D79OulPZukIWWjuC7hV1gz1E3z1WLwaCikyadZ/l BQnfp6exgoLDZdhNRpJ8k+w5EhXDDBV+fXrTOA9WqRixvfiiHKGJUtJOAeFxWX4Bai g4pZtcor2Vqtz1OopjVjBbJRSsdYC0uxz8SCc8LGQTwdRxbsV/WHT7xhghGpJz+wMj S/J0O5xJhooIT8V40vohr5w8agBI2APsr/JTo0MyfTATKcWl8Q7oRWXAcSk4rBSjNN fwq0o7/TRwmI1dIXbCoXU5GRF877ftz8J1Kd+GMZoTtFA3GPP17IporfsLqFAY8FJh UCC/P/93ztAYQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E73BC88E7F; Tue, 15 Sep 2026 14:32:28 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Tue, 15 Sep 2026 16:32:24 +0200 Subject: [PATCH v2 1/2] dt-bindings: arm: qcom: Add Xiaomi Mi 8 family compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-dipper-v2-1-cbade54919ee@ixit.cz> References: <20260915-dipper-v2-0-cbade54919ee@ixit.cz> In-Reply-To: <20260915-dipper-v2-0-cbade54919ee@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1258; i=david@ixit.cz; h=from:subject:message-id; bh=E/ElkcIutej9yrswGTSuy+VcChc1d40Fq6rbIpw9sXE=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqqVb6lhA63Dif0jFEcWy4Ko7/7FSaU6eausaci 73W7wdSAl6JAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCaqlW+gAKCRBgAj/E00kg ci5/EACrLyyDxMjkJowF5ja2c+QN5lBpUZlSjXM5NWO4wwBUVH15FuecCU9CKPluHP7CYrOGpJY Q5InBqEhcg7Hcfzuus9ke3e8YLVk/bOyUFZq7P5Jui4hPMyJzJYk60RHIqJ7ipr0i5HXKMqIL58 tvgj25rYMnh3846YPDjuJ5Jl1zcJph/ddcB6+UXes6KoBt6oBhDArrw4Bx4N9aOFy3in8dVafkB m1AQR2NZJ6q04rlUpAymHW97FArIc59hYzegnRUQA71e2wBAyDRLMDght1fJ/QG+fUYP83sM90I u2z5RIH8WB4Cpg5+8cMp4FIRKY8aCJrT14cIIz+A+oakt0QzvfVyMHFvwuzbqT3nBu7gK3iStJ9 +T0qexR2Z5h0H1A3fzmrOANiLpKFlvpf8+7MpEic8H5Wrh85Hm2GrtHnedDEhCqcvx+ALnm2YKa XExCR+52sXiiSoxTeffMs1zktpkYxar2/eEE1GbtAAsSrbLPlyTliKa+BBCkXXzDWv+j/eVoA7D HWUPPMY1Mald1Yi/mQ7j/0J4J+aBFKEhHlTLKpg/YwLCpthIXa7OPm/Fim1Zntsxh2E5zHyVKMn iZxmQSRfAiQDx88ytkXuBSXdMx+rVlnYoGBPQHoAjT/g8UVZLG71iTNTy9AamdxjjbVuy68ZMRs gIxAxrHGKCXCz/A== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg This smartphone codenamed dipper is now supported by this series, variants such as ursa and equuleus just documented. Signed-off-by: David Heidelberg --- Documentation/devicetree/bindings/arm/qcom.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index ff8a35df7862d..c3491630e56d1 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -945,16 +945,25 @@ properties: - const: qcom,sdm670 =20 - items: - enum: - google,bonito-tianma - const: google,bonito - const: qcom,sdm670 =20 + - description: Xiaomi Mi 8 family + items: + - enum: + - xiaomi,dipper + - xiaomi,equuleus + - xiaomi,ursa + - const: xiaomi,dipper-common + - const: qcom,sdm845 + - description: Xiaomi Poco F1 items: - enum: - xiaomi,beryllium-ebbg - xiaomi,beryllium-tianma - const: xiaomi,beryllium - const: qcom,sdm845 =20 --=20 2.55.0 From nobody Fri Sep 25 07:22:06 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E78CC3C1D6E; Tue, 15 Sep 2026 14:32:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789482749; cv=none; b=N8h5erBrs3/89AyjL8jOF04FMKGc26A9WRje7ABJTwRlgMMf80RoqosUwZesVadE1qc43mbBifN3fsrvVotCBqdke7Jumlh1nHGXQbWUcm0JSaIrWvoYa+CbFhqE+MdZKistBg+KZmgBhZA7FVX5Lvw7u67eQBt3Pwg8dHQFulU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789482749; c=relaxed/simple; bh=X7Q3c+ZSN+QOLfScJ8eSM4UWwZCRFILJ0fLlwlE4AZE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=M5NdJMj58OZRUOsi8c4BNDoGrnMLTRQhCQ7j9HK269HgvrU0KKaKllATKJ2sPW19Jr7zjgSst6j2dDryz/qDiJrDYtN3lwMTlaxj62z32dB32e0zgkl79I2WKQXA447nJwp2Uc0ZkirKeINVZ36uqVQNOnW7PWSfTvtAuX4K7+s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=m87q9dAh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="m87q9dAh" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8E309C2BCFB; Tue, 15 Sep 2026 14:32:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789482748; bh=X7Q3c+ZSN+QOLfScJ8eSM4UWwZCRFILJ0fLlwlE4AZE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=m87q9dAhQzwlBgOGkxhu/PwCUalqQKHQJCr+IVMnwffLaU6Qkbvf4NO7v1EyVxEUR n5pMDyNHMc6YJJrejop5ouDyomOM/SGEAQlqs3xuCgEi9BBV+8eOzip+ALoV6T8X6U X6TTEvNXfVD/j639z9WDK6O7KOjPrB5aXU2BYGq3wPR7YaVYRsFxw7ddH7mqr0in22 QJCSCs4JkAxbeH4/7tTHi9r9DZgPMUlvuNjXXBLxwN2pUvvXDAp1VIWdEPM4yxqxU8 tR3Tv25l2x6uayr5vsHy7heo6P9C5oqQ9wazyFhz1PzHln2m9DXcCw5IPhrEuA5Z1/ 1NPQmVIphO6dg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6ECA5C982C3; Tue, 15 Sep 2026 14:32:28 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Tue, 15 Sep 2026 16:32:25 +0200 Subject: [PATCH v2 2/2] arm64: dts: qcom: add Xiaomi Mi 8 (dipper) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-dipper-v2-2-cbade54919ee@ixit.cz> References: <20260915-dipper-v2-0-cbade54919ee@ixit.cz> In-Reply-To: <20260915-dipper-v2-0-cbade54919ee@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=17116; i=david@ixit.cz; h=from:subject:message-id; bh=n9jwcsyr4Nk3pbkjLDxXbjXxJBdnsWTux9XZ+JhkE6o=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqqVb606KthIO8B7xOJvrk+qNtdKQRq9VO8s/uV IbpyEShIeGJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCaqlW+gAKCRBgAj/E00kg ctKCD/4jEJKN3QzJtxFfiSRJb85yQy8i1/3KRPa2UvtLu/ZZULV2erak97RliZeX1/jPwvOKYnV qTfORr/UciR1CLSMaf7kR9I4/zOycmKSoH0XcqStRBjZpgGVYaVOxq4xYrJ/bjwEmfSa/4z4vir TNSoyAWJBUKETeNN9931/CVBxeM+9MGLNjMZhEC+iFE78jUk0n2hmPi4eAQT1YB4FtPk0a2qj8l kiqMK3v9pn+02GQPUNX6msbBypGahLIIkOrftvi31IfeKwjs4s1EK/1+9Ss+snNSVVNwdSohVSL X+6Tj2ivLIQNJhS/pjufNvsRrK2X7SmJVvh8RYSsxSoFVDb0nPa+Vka+D6PfrEtrLH7yv7tGY8q DHCSKWzdQj1QKs53xudcDcxT5hyIms6eQHfx5lUz0nL8E4wrS6gxt5vYoLc1N1+3OaQjwCDIq9B NRm00J7ayBWNNe5jBDV6k50E+12w7YFm/mYSApNv+tqTLon1Fw/jbQ6fIp7u+EXGUa0cgudwrUf 8GSAjQmlRcQspObbQIpt9BWCkf91k7zDFHNUrACDWYtJKUXV6b7iqfPlngS9YkWmn2k/FJs/i9T FuyjsRyo/5vCAd400AAldbkolJks0QzXon30j3wphg+7wfm/CY0AdOki/3zXPjPZcHz+j9O5mER Nr5hJo6luFjLjqw== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Initial submission for one member of the prime Xiaomi Mi 8 family. Mi 8 Pro (equuleus) and Mi 8 Explorer (ursa) are nearly identical. Known differences are battery capacity and fingerprint sensor placement. This submission includes basic abstraction for other developers to be able easily extend it to support other variants. What does work: framebuffer, USB, UFS, Bluetooth, Wi-Fi. Based on work of multiple people trying to bring the device in the past. Last attempt was done by Max Furman. Signed-off-by: David Heidelberg --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sdm845-xiaomi-dipper-common.dtsi | 607 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/sdm845-xiaomi-dipper.dts | 36 ++ 3 files changed, 644 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 1c86e7e98f55d..02793d00503e3 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -325,16 +325,17 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-oneplus-enchilada.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-oneplus-fajita.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-samsung-starqltechn.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-sony-xperia-tama-akari.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-sony-xperia-tama-akatsuki.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-sony-xperia-tama-apollo.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-xiaomi-beryllium-ebbg.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-xiaomi-beryllium-tianma.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-xiaomi-dipper.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-xiaomi-polaris.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-shift-axolotl.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm850-huawei-matebook-e-2019.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm850-lenovo-yoga-c630.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm850-samsung-w737.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdx75-idp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D shikra-cqm-evk.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D shikra-cqs-evk.dtb diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-dipper-common.dtsi b/ar= ch/arm64/boot/dts/qcom/sdm845-xiaomi-dipper-common.dtsi new file mode 100644 index 0000000000000..eb4243e7f2c07 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-dipper-common.dtsi @@ -0,0 +1,607 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Xiaomi Mi 8 family common device tree source. + * Covers Mi 8 Explorer Edition (equuleus), Mi 8 (dipper), Mi 8 Pro (urza). + * + * Copyright David Heidelberg. + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include +#include +#include "sdm845.dtsi" +#include "pm8998.dtsi" +#include "pmi8998.dtsi" + +/delete-node/ &adsp_mem; +/delete-node/ &cdsp_mem; +/delete-node/ &mba_region; +/delete-node/ &mpss_region; +/delete-node/ &rmtfs_mem; +/delete-node/ &slpi_mem; +/delete-node/ &spss_mem; +/delete-node/ &tz_mem; +/delete-node/ &venus_mem; +/delete-node/ &wlan_msa_mem; + +/ { + chassis-type =3D "handset"; + + qcom,msm-id =3D ; + + aliases { + serial0 =3D &uart9; + serial1 =3D &uart6; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + framebuffer { + compatible =3D "simple-framebuffer"; + memory-region =3D <&cont_splash_mem>; + + vci-supply =3D <&vreg_panel_vci>; + vddio-supply =3D <&vreg_panel_vddio>; + + width =3D <1080>; + height =3D <2248>; + stride =3D <(1080 * 4)>; + format =3D "a8r8g8b8"; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + autorepeat; + + pinctrl-0 =3D <&volume_up_gpio>; + pinctrl-names =3D "default"; + + key-volume-up { + label =3D "Volume Up"; + linux,code =3D ; + gpios =3D <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; + wakeup-source; + debounce-interval =3D <15>; + }; + }; + + vreg_panel_vci: regulator-panel-vci { + compatible =3D "regulator-fixed"; + regulator-name =3D "panel_vci_vreg"; + + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + + gpio =3D <&tlmm 35 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us =3D <4000>; + regulator-boot-on; + }; + + vreg_panel_vddio: regulator-panel-vddio { + compatible =3D "regulator-fixed"; + regulator-name =3D "panel_vddio_vreg"; + + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 23 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us =3D <4000>; + regulator-boot-on; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vph_pwr"; + + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + }; + + vreg_s4a_1p8: regulator-vreg-s4a-1p8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_s4a_1p8"; + + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + regulator-boot-on; + + vin-supply =3D <&vph_pwr>; + }; + + reserved-memory { + /* + * It seems like reserving the old rmtfs_mem region is + * also needed to prevent random crashes + */ + old-rmtfs@88f00000 { + reg =3D <0 0x88f00000 0 0x200000>; + no-map; + }; + + adsp_mem: adsp@8c500000 { + reg =3D <0 0x8c500000 0 0x1e00000>; + no-map; + }; + + wlan_msa_mem: wlan-msa@8e300000 { + reg =3D <0 0x8e300000 0 0x100000>; + no-map; + }; + + mpss_region: mpss@8e400000 { + reg =3D <0 0x8e400000 0 0x7800000>; + no-map; + }; + + venus_mem: venus@95c00000 { + reg =3D <0 0x95c00000 0 0x500000>; + no-map; + }; + + cdsp_mem: cdsp@96100000 { + reg =3D <0 0x96100000 0 0x800000>; + no-map; + }; + + mba_region: mba@96900000 { + reg =3D <0 0x96900000 0 0x200000>; + no-map; + }; + + slpi_mem: slpi@96b00000 { + reg =3D <0 0x96b00000 0 0x1400000>; + no-map; + }; + + spss_mem: spss@97f00000 { + reg =3D <0 0x97f00000 0 0x100000>; + no-map; + }; + + cont_splash_mem: splash@9d400000 { + reg =3D <0 0x9d400000 0 0x950000>; + no-map; + }; + + ramoops@b0000000 { + compatible =3D "ramoops"; + reg =3D <0 0xb0000000 0 0x00400000>; + record-size =3D <0x40000>; + console-size =3D <0x40000>; + ftrace-size =3D <0x40000>; + pmsg-size =3D <0x200000>; + }; + + rmtfs_mem: memory@f7300000 { + compatible =3D "qcom,rmtfs-mem"; + reg =3D <0 0xf7300000 0 0x202000>; + qcom,use-guard-pages; + no-map; + + qcom,client-id =3D <1>; + qcom,vmid =3D ; + }; + }; + + wcn3990-pmu { + compatible =3D "qcom,wcn3990-pmu"; + + pinctrl-0 =3D <&sw_ctrl_default>; + pinctrl-names =3D "default"; + + vddio-supply =3D <&vreg_s4a_1p8>; + vddxo-supply =3D <&vreg_l7a_1p8>; + vddrf-supply =3D <&vreg_l17a_1p3>; + vddch0-supply =3D <&vreg_l25a_3p3>; + vddch1-supply =3D <&vreg_l23a_3p3>; + + swctrl-gpios =3D <&pm8998_gpios 3 GPIO_ACTIVE_HIGH>; + + regulators { + vreg_pmu_io: ldo0 { + regulator-name =3D "vreg_pmu_io"; + }; + + vreg_pmu_xo: ldo1 { + regulator-name =3D "vreg_pmu_xo"; + }; + + vreg_pmu_rf: ldo2 { + regulator-name =3D "vreg_pmu_rf"; + }; + + vreg_pmu_ch0: ldo3 { + regulator-name =3D "vreg_pmu_ch0"; + }; + + vreg_pmu_ch1: ldo4 { + regulator-name =3D "vreg_pmu_ch1"; + }; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8998-rpmh-regulators"; + qcom,pmic-id =3D "a"; + + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + vdd-s3-supply =3D <&vph_pwr>; + vdd-s4-supply =3D <&vph_pwr>; + vdd-s5-supply =3D <&vph_pwr>; + vdd-s6-supply =3D <&vph_pwr>; + vdd-s7-supply =3D <&vph_pwr>; + vdd-s8-supply =3D <&vph_pwr>; + vdd-s9-supply =3D <&vph_pwr>; + vdd-s10-supply =3D <&vph_pwr>; + vdd-s11-supply =3D <&vph_pwr>; + vdd-s12-supply =3D <&vph_pwr>; + vdd-s13-supply =3D <&vph_pwr>; + vdd-l1-l27-supply =3D <&vreg_s7a_1p025>; + vdd-l2-l8-l17-supply =3D <&vreg_s3a_1p35>; + vdd-l3-l11-supply =3D <&vreg_s7a_1p025>; + vdd-l4-l5-supply =3D <&vreg_s7a_1p025>; + vdd-l6-supply =3D <&vph_pwr>; + vdd-l7-l12-l14-l15-supply =3D <&vreg_s5a_2p04>; + vdd-l9-supply =3D <&vreg_bob>; + vdd-l10-l23-l25-supply =3D <&vreg_bob>; + vdd-l13-l19-l21-supply =3D <&vreg_bob>; + vdd-l16-l28-supply =3D <&vreg_bob>; + vdd-l18-l22-supply =3D <&vreg_bob>; + vdd-l20-l24-supply =3D <&vreg_bob>; + vdd-l26-supply =3D <&vreg_s3a_1p35>; + vin-lvs-1-2-supply =3D <&vreg_s4a_1p8>; + + vreg_s2a_1p125: smps2 { + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + }; + + vreg_s3a_1p35: smps3 { + regulator-min-microvolt =3D <1352000>; + regulator-max-microvolt =3D <1352000>; + }; + + vreg_s5a_2p04: smps5 { + regulator-min-microvolt =3D <1904000>; + regulator-max-microvolt =3D <2040000>; + }; + + vreg_s7a_1p025: smps7 { + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <1028000>; + }; + + vreg_l1a_0p875: ldo1 { + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l2a_1p2: ldo2 { + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l5a_0p8: ldo5 { + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-initial-mode =3D ; + }; + + vreg_l7a_1p8: ldo7 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l14a_1p8: ldo14 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l17a_1p3: ldo17 { + regulator-min-microvolt =3D <1304000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l20a_2p95: ldo20 { + regulator-min-microvolt =3D <2950000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l22a_2p864: ldo22 { + regulator-min-microvolt =3D <2864000>; + regulator-max-microvolt =3D <2864000>; + regulator-initial-mode =3D ; + }; + + vreg_l23a_3p3: ldo23 { + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + }; + + vreg_l24a_3p075: ldo24 { + regulator-min-microvolt =3D <3088000>; + regulator-max-microvolt =3D <3088000>; + regulator-initial-mode =3D ; + }; + + vreg_l25a_3p3: ldo25 { + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + }; + + vreg_l26a_1p2: ldo26 { + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-boot-on; + }; + + vreg_l28a_3p3: ldo28 { + regulator-min-microvolt =3D <2856000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_lvs1_1p8: lvs1 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + }; + + regulators-1 { + compatible =3D "qcom,pmi8998-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob-supply =3D <&vph_pwr>; + + vreg_bob: bob { + regulator-min-microvolt =3D <3312000>; + regulator-max-microvolt =3D <3600000>; + regulator-initial-mode =3D ; + regulator-allow-bypass; + }; + }; +}; + +&dispcc { + /* Disable for now so simple-framebuffer continues working */ + status =3D "disabled"; +}; + +&gcc { + protected-clocks =3D , + , + , + , + ; +}; + +&gpi_dma0 { + status =3D "okay"; +}; + +&gpi_dma1 { + status =3D "okay"; +}; + +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/sdm845/Xiaomi/dipper/a630_zap.mbn"; +}; + +&ibb { + regulator-min-microvolt =3D <4600000>; + regulator-max-microvolt =3D <6000000>; + regulator-over-current-protection; + regulator-pull-down; + regulator-soft-start; +}; + +&ipa { + firmware-name =3D "qcom/sdm845/Xiaomi/dipper/ipa_fws.mbn"; + + status =3D "okay"; +}; + +&lab { + regulator-min-microvolt =3D <4600000>; + regulator-max-microvolt =3D <6000000>; + regulator-pull-down; + regulator-soft-start; +}; + +&mdss { + /* Disable for now so simple-framebuffer continues working */ + status =3D "disabled"; +}; + +&mss_pil { + firmware-name =3D "qcom/sdm845/Xiaomi/dipper/mba.mbn", + "qcom/sdm845/Xiaomi/dipper/modem.mbn"; + + status =3D "okay"; +}; + +&pmi8998_charger { + monitored-battery =3D <&battery>; + + status =3D "okay"; +}; + +&pm8998_gpios { + sw_ctrl_default: sw-ctrl-default-state { + pins =3D "gpio3"; + function =3D "normal"; + input-enable; + bias-pull-down; + }; + + volume_up_gpio: vol-up-active-state { + pins =3D "gpio6"; + function =3D "normal"; + input-enable; + bias-pull-up; + power-source =3D <0>; + }; +}; + +&pm8998_resin { + linux,code =3D ; + + status =3D "okay"; +}; + +&qupv3_id_0 { + status =3D "okay"; +}; + +&qupv3_id_1 { + status =3D "okay"; +}; + +&qup_uart9_rx { + drive-strength =3D <2>; + bias-pull-up; +}; + +&qup_uart9_tx { + drive-strength =3D <2>; + bias-disable; +}; + +&i2c5 { + status =3D "okay"; + + /* tas2557 @4c */ +}; + +&i2c14 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* stmfts5 @49 */ +}; + +&tlmm { + gpio-reserved-ranges =3D < 0 4>, /* SPI (Goodix Fingerprint) */ + <81 4>; /* SPI (Synaptics Fingerprint) */ +}; + +&ufs_mem_hc { + reset-gpios =3D <&tlmm 150 GPIO_ACTIVE_LOW>; + + vcc-supply =3D <&vreg_l20a_2p95>; + vcc-max-microamp =3D <600000>; + vccq2-supply =3D <&vreg_s4a_1p8>; + vccq2-max-microamp =3D <600000>; + + status =3D "okay"; + +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l1a_0p875>; + vdda-pll-supply =3D <&vreg_l26a_1p2>; + + status =3D "okay"; +}; + +&usb_1 { + qcom,select-utmi-as-pipe-clk; + + status =3D "okay"; +}; + +&usb_1_dwc3 { + /* Until we have Type C hooked up we'll force this as peripheral. */ + dr_mode =3D "peripheral"; + + maximum-speed =3D "high-speed"; + phys =3D <&usb_1_hsphy>; + phy-names =3D "usb2-phy"; +}; + +&usb_1_hsphy { + vdd-supply =3D <&vreg_l1a_0p875>; + vdda-pll-supply =3D <&vreg_l12a_1p8>; + vdda-phy-dpdm-supply =3D <&vreg_l24a_3p075>; + + qcom,imp-res-offset-value =3D <8>; + qcom,hstx-trim-value =3D ; + qcom,preemphasis-level =3D ; + qcom,preemphasis-width =3D ; + + status =3D "okay"; +}; + +&uart6 { + pinctrl-0 =3D <&qup_uart6_4pin>; + + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn3990-bt"; + + firmware-name =3D "Xiaomi/dipper/crnv21.bin"; + + vddio-supply =3D <&vreg_pmu_io>; + vddxo-supply =3D <&vreg_pmu_xo>; + vddrf-supply =3D <&vreg_pmu_rf>; + vddch0-supply =3D <&vreg_pmu_ch0>; + + max-speed =3D <3200000>; + }; +}; + +&uart9 { + status =3D "okay"; +}; + +&wifi { + vdd-0.8-cx-mx-supply =3D <&vreg_l5a_0p8>; + vdd-1.8-xo-supply =3D <&vreg_pmu_xo>; + vdd-1.3-rfa-supply =3D <&vreg_pmu_rf>; + vdd-3.3-ch0-supply =3D <&vreg_pmu_ch0>; + vdd-3.3-ch1-supply =3D <&vreg_pmu_ch1>; + + qcom,snoc-host-cap-skip-quirk; + + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-dipper.dts b/arch/arm64= /boot/dts/qcom/sdm845-xiaomi-dipper.dts new file mode 100644 index 0000000000000..bf45fe8fde80b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-dipper.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Xiaomi Mi 8 (dipper). + * + * Copyright David Heidelberg. + */ + +/dts-v1/; + +#include "sdm845-xiaomi-dipper-common.dtsi" + +/ { + model =3D "Xiaomi Mi 8"; + compatible =3D "xiaomi,dipper", "xiaomi,dipper-common", "qcom,sdm845"; + + qcom,board-id =3D <55 0>; + + battery: battery { + compatible =3D "simple-battery"; + + charge-full-design-microamp-hours =3D <3400000>; + voltage-min-design-microvolt =3D <3400000>; + voltage-max-design-microvolt =3D <4400000>; + }; + +}; + +&adsp_pas { + firmware-name =3D "qcom/sdm845/Xiaomi/dipper/adsp.mbn"; + + status =3D "okay"; +}; + +&wifi { + qcom,calibration-variant =3D "Xiaomi_dipper"; +}; --=20 2.55.0