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[2a01:cb00:7c5:9900:d73f:8285:c1e6:47ab]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49e7ef88754sm63175565e9.13.2026.09.15.04.56.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 04:56:45 -0700 (PDT) From: Amin Gattout Date: Tue, 15 Sep 2026 13:56:40 +0200 Subject: [PATCH v2 1/2] media: dt-bindings: rockchip,rk3568-mipi-csi2: add rk3576 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-csi-2-rcv-dts-v2-1-bdaf8141616a@gmail.com> References: <20260915-csi-2-rcv-dts-v2-0-bdaf8141616a@gmail.com> In-Reply-To: <20260915-csi-2-rcv-dts-v2-0-bdaf8141616a@gmail.com> To: Michael Riesch , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Amin Gattout , Conor Dooley X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789473404; l=1108; i=amin.gattout@gmail.com; s=20260818; h=from:subject:message-id; bh=76t/6TvrHo/ckJ30OYPKat5fWAU1rA0fOHpl6d6Cs/A=; b=U/+xcpmDD44TQLOMhpTWGOwHvugHp+qVjCLKGJpJc12iRo2mVKucsEvPRwhvI7BINPCfkaRtm ERXc22c4d6aC02BGFdZ1GwYSFiZhhii8gTNoE53pdNPf+ra6wSiiQVc X-Developer-Key: i=amin.gattout@gmail.com; a=ed25519; pk=MSIqDPkCOkwtyP8Fns1m+KFU9SgqoDl2mpLe18vL+hQ= The RK3576 MIPI CSI-2 receivers are compatible to the ones found in the RK3568: the register map is identical. Add the RK3576 variant to the list of compatible variants falling back to the RK3568 one. Acked-by: Conor Dooley Reviewed-by: Michael Riesch Signed-off-by: Amin Gattout --- Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml | 1= + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-c= si2.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi= 2.yaml index 8bfad0fca3b7..1898f3787a98 100644 --- a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml @@ -23,6 +23,7 @@ properties: - rockchip,rk3568-mipi-csi2 - items: - enum: + - rockchip,rk3576-mipi-csi2 - rockchip,rk3588-mipi-csi2 - const: rockchip,rk3568-mipi-csi2 =20 --=20 2.43.0 From nobody Fri Sep 25 07:56:45 2026 Received: from mail-wm2-f12.google.com (mail-wm2-f12.google.com [74.125.225.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E59FA4A1E1D for ; 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Tue, 15 Sep 2026 04:56:46 -0700 (PDT) Received: from [127.0.1.1] (2a01cb0007c59900d73f8285c1e647ab.ipv6.abo.wanadoo.fr. [2a01:cb00:7c5:9900:d73f:8285:c1e6:47ab]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49e7ef88754sm63175565e9.13.2026.09.15.04.56.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 04:56:46 -0700 (PDT) From: Amin Gattout Date: Tue, 15 Sep 2026 13:56:41 +0200 Subject: [PATCH v2 2/2] arm64: dts: rockchip: add mipi csi-2 receiver nodes to rk3576 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-csi-2-rcv-dts-v2-2-bdaf8141616a@gmail.com> References: <20260915-csi-2-rcv-dts-v2-0-bdaf8141616a@gmail.com> In-Reply-To: <20260915-csi-2-rcv-dts-v2-0-bdaf8141616a@gmail.com> To: Michael Riesch , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Amin Gattout X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789473404; l=2691; i=amin.gattout@gmail.com; s=20260818; h=from:subject:message-id; bh=hz7ecKJMlWN4w7YByidxbnhsifV5HkA2kX05eT5H6SA=; b=tj68X/IcmWZX/XZiXkGeeRk0CFzYyPr/Y7qcNgyol3bOUZ7O2Jnd8YAYI2xuhQ50+w+iMS1+r 8idipYTKQdOAh89PeeC1du381r95I3oTVoV/s0oBkv93JJ63M6jymvM X-Developer-Key: i=amin.gattout@gmail.com; a=ed25519; pk=MSIqDPkCOkwtyP8Fns1m+KFU9SgqoDl2mpLe18vL+hQ= The Rockchip RK3576 features five MIPI CSI-2 receiver units: - MIPI0: connected to MIPI DCPHY0 (not supported) - MIPI1: connected to MIPI DPHY0 - MIPI2: connected to MIPI DPHY0 lanes 2-3 in split mode (not supported) - MIPI3: connected to MIPI DPHY1 - MIPI4: connected to MIPI DPHY1 lanes 2-3 in split mode (not supported) The PHY to receiver routing is fixed. Only the full/split mode of each DPHY is selectable, via SYS_GRF_SOC_CON5 bits 1 and 2, whose reset value selects full mode, so no software configuration is required. As the MIPI DCPHY as well as the split DPHY mode are not yet supported, add only the device tree nodes for the MIPI1 and MIPI3 units. Reviewed-by: Michael Riesch Signed-off-by: Amin Gattout --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 52 ++++++++++++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts= /rockchip/rk3576.dtsi index b7a527614243..cbf8b70cc15a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1324,6 +1324,58 @@ vdec_mmu: iommu@27b00800 { #iommu-cells =3D <0>; }; =20 + csi1: csi@27c90000 { + compatible =3D "rockchip,rk3576-mipi-csi2", "rockchip,rk3568-mipi-csi2"; + reg =3D <0x0 0x27c90000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "err1", "err2"; + clocks =3D <&cru PCLK_CSI_HOST_1>; + phys =3D <&csi_dphy0>; + power-domains =3D <&power RK3576_PD_VI>; + resets =3D <&cru SRST_P_CSI_HOST_1>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi1_in: port@0 { + reg =3D <0>; + }; + + csi1_out: port@1 { + reg =3D <1>; + }; + }; + }; + + csi3: csi@27cb0000 { + compatible =3D "rockchip,rk3576-mipi-csi2", "rockchip,rk3568-mipi-csi2"; + reg =3D <0x0 0x27cb0000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "err1", "err2"; + clocks =3D <&cru PCLK_CSI_HOST_3>; + phys =3D <&csi_dphy1>; + power-domains =3D <&power RK3576_PD_VI>; + resets =3D <&cru SRST_P_CSI_HOST_3>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi3_in: port@0 { + reg =3D <0>; + }; + + csi3_out: port@1 { + reg =3D <1>; + }; + }; + }; + vop: vop@27d00000 { compatible =3D "rockchip,rk3576-vop"; reg =3D <0x0 0x27d00000 0x0 0x3000>, <0x0 0x27d05000 0x0 0x1000>; --=20 2.43.0