From nobody Fri Sep 25 07:59:34 2026 Received: from mx07-00376f01.pphosted.com (mx07-00376f01.pphosted.com [185.132.180.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2AFDA361668 for ; Tue, 15 Sep 2026 08:04:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.180.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789459474; cv=none; b=F+WHD6q7VpOFQle/gSimMTtx64lZjNakFToyxTEv/yCwP5VWqoI1KvG2akD8leA4OQC1xO7B9+AualzdkeLWxPVx5+rcw8wkR3gTSmeGaLQQh6Pyi8RLW9WrvH8AHZgbvsxwi1qAPABartEHf5ivet0cEeyBRSG6lEw1w5yZb0o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789459474; c=relaxed/simple; bh=2KNLb3L8nOI64aTWf3N3rfDvVRWt44Om7x+/Xjw4poA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=YMEeHo5j7dVkmyRE8lg9AdFaX3M3UGlYlQcUA+esrtuHOievyJv1EM44vY2M4PORfiG8PD/pSfehxZembfQk7985eqIbOechBBy7T/6EDNBc+ChgmNpqR7H0v6MUXUvK85umP4yipHQzJ96GVsrFGJb/g0I+NY+PBibI8C27D2w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=imgtec.com; spf=pass smtp.mailfrom=imgtec.com; dkim=pass (2048-bit key) header.d=imgtec.com header.i=@imgtec.com header.b=OCTpOin+; arc=none smtp.client-ip=185.132.180.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=imgtec.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=imgtec.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=imgtec.com header.i=@imgtec.com header.b="OCTpOin+" Received: from pps.filterd (m0168889.ppops.net [127.0.0.1]) by mx07-00376f01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6YxCg2004760; Tue, 15 Sep 2026 09:04:05 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=imgtec.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=dk201812; bh=/ E3INs25mnq+3t02mE1FVSMuWAqgKq0iIGYPKvwjwnY=; b=OCTpOin+Y9F9262Q/ mzaXAs3AzMYQIrYwsODzjGwezvWHIqJpMgWkSACR1JUgoVkYsN2++jOxFNAykHSD 3TCJwLnum8YbpZwYIMcsr1vID2mc7RmMqgjhbDDvdA6bgoTQFFJ1RilHOpBT1K9Z 7A1Q5MgxF6LA5DircNbn/bXA1I/DrZCYniMu+wVd2iN98LMFGnifcfXgPInPwPrK kY4xklxBFJvCQB2wCcgwwGlAu1j3gRUZYPV16TSWHLsbRcYFTpys/BgP3/7p51oK WJlKteT6ZDG+X/iN6OY6php0ngu6wQxabyNrSiWDsZEIDKoa8WtepWq5thaOTS3Y Cd/Qg== Received: from hhmail01.hh.imgtec.org (83-244-153-141.cust-83.exponential-e.net [83.244.153.141]) by mx07-00376f01.pphosted.com (PPS) with ESMTPS id 4gmxtujca8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Sep 2026 09:04:05 +0100 (BST) Received: from [127.0.1.1] (172.25.5.88) by HHMAIL01.hh.imgtec.org (10.100.10.19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 15 Sep 2026 09:04:03 +0100 From: Alexandru Dadu Date: Tue, 15 Sep 2026 11:03:45 +0300 Subject: [PATCH 1/2] drm/imagination: Treat FW connection ctl like other interface structures Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260915-b4-do-not-map-if-structs-unnecessarily-v1-1-a0e2ccee154a@imgtec.com> References: <20260915-b4-do-not-map-if-structs-unnecessarily-v1-0-a0e2ccee154a@imgtec.com> In-Reply-To: <20260915-b4-do-not-map-if-structs-unnecessarily-v1-0-a0e2ccee154a@imgtec.com> To: Alessio Belle , Luigi Santivetti , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: , , , Alexandru Dadu X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789459442; l=4145; i=alexandru.dadu@imgtec.com; s=20260304; h=from:subject:message-id; bh=zX252s12X54vt5scMMdqunk3ucRRQ/NDB8LG/yVC93I=; b=XJ7LQgLW6PVQpHBfoLyt+0ykeBSrRSsLsmYwRqn0YvAUA0RduapxSzp/em0OEA4cVi4EYkpxF 19XU7xA2HVuAikztd2r/9jgu5HDgY9ERiPez8Yr3iBOueh/n9yf1r7h X-Developer-Key: i=alexandru.dadu@imgtec.com; a=ed25519; pk=FU07SyNrYGwhahqSxbWEuzyXlUh47xBXvLvOR7UA6+U= X-Authority-Analysis: v=2.4 cv=Se9i5fRu c=1 sm=1 tr=0 ts=6aa8fbf5 cx=c_pps a=AKOq//PuzOIrVTIF9yBwbA==:117 a=AKOq//PuzOIrVTIF9yBwbA==:17 a=YP7Kpn5otooA:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=kQ-hrUj2-E3RCbRHssb7:22 a=7RYWX5rxfSByPNLylY2M:22 a=r_1tXGB3AAAA:8 a=Dj9Jg6a66uChcVUBEUgA:9 a=QEXdDO2ut3YA:10 a=t8nPyN_e6usw4ciXM-Pk:22 X-Proofpoint-ORIG-GUID: uUoNZT9VaJZwp3YG95ZxSQCkUgWeEpW8 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDExNSBTYWx0ZWRfXytzuG3Ihjr6M pza+cH7ThtPMZrJTt9DhtiZYL2HFywEXSgQIFA4mmzzRFN87OSctqM8PUEMjWuBIDDylTmxN+Gk gIHa3M/qBzRDZZAGgh9DefgbZN5Tv8kAs5xuiyxRhSDWV43LiKMTFKtpDrbSWruv5HsNexadYR5 /34qkcwBaPmVv7BkD/fTXNa/RXs9DUF9COeTq1G9PSQHSxHYLXVNjcPAIPW7U3RdH8Fp4mkUObg WNxlqMDZnxcJW3g5fytJfOiXv8HXHlngMZv0CSpAN4FqlUPb10IoURDtDofmOTXMdkvaNYAkEtP Q2nYDztHzF2V1WO+oinmjxkFaS3og48ARZZdg8fezhsRA7D3Hx0jNsLjnMiBwHSXjlDj3LEnnhe Z+4djVRMnO0TaNWQL1bSVN36IQLWH4btdAetdjlANkw8ozYBCA+KFm1KIoOwZ7wmxDm1Bncwe7C I2ZOxEuHSdynPJl9sXw== X-Proofpoint-GUID: uUoNZT9VaJZwp3YG95ZxSQCkUgWeEpW8 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDExNSBTYWx0ZWRfX+LT/T43S9MQR ORsDmf/n/l6rotESa6mbdOaNXSozjj+SpocTYBsQmMiWNlM3rfh+HeBLI3GiZS/PVU1e1u1j9V5 LraUtvTOic9kaheCnQxocx5RJjJlESU= From: Alessio Belle There is no particular reason for this structure to be allocated and freed on its own. Move the related logic to where there other firmware interface structures are allocated and freed. Signed-off-by: Alessio Belle Signed-off-by: Alexandru Dadu --- drivers/gpu/drm/imagination/pvr_fw.c | 59 +++++++++++++-------------------= ---- 1 file changed, 21 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/drm/imagination/pvr_fw.c b/drivers/gpu/drm/imagina= tion/pvr_fw.c index 850a3ec8e775..b2a5ea001474 100644 --- a/drivers/gpu/drm/imagination/pvr_fw.c +++ b/drivers/gpu/drm/imagination/pvr_fw.c @@ -278,37 +278,6 @@ pvr_fw_find_mmu_segment(struct pvr_device *pvr_dev, u3= 2 addr, u32 size, void *fw return -EINVAL; } =20 -static int -pvr_fw_create_fwif_connection_ctl(struct pvr_device *pvr_dev) -{ - struct drm_device *drm_dev =3D from_pvr_device(pvr_dev); - struct pvr_fw_device *fw_dev =3D &pvr_dev->fw_dev; - - fw_dev->fwif_connection_ctl =3D - pvr_fw_object_create_and_map_offset(pvr_dev, - fw_dev->fw_heap_info.config_offset + - PVR_ROGUE_FWIF_CONNECTION_CTL_OFFSET, - sizeof(*fw_dev->fwif_connection_ctl), - PVR_BO_FW_FLAGS_DEVICE_UNCACHED, - NULL, NULL, - &fw_dev->mem.fwif_connection_ctl_obj); - if (IS_ERR(fw_dev->fwif_connection_ctl)) { - drm_err(drm_dev, - "Unable to allocate FWIF connection control memory\n"); - return PTR_ERR(fw_dev->fwif_connection_ctl); - } - - return 0; -} - -static void -pvr_fw_fini_fwif_connection_ctl(struct pvr_device *pvr_dev) -{ - struct pvr_fw_device *fw_dev =3D &pvr_dev->fw_dev; - - pvr_fw_object_unmap_and_destroy(fw_dev->mem.fwif_connection_ctl_obj); -} - static void fw_osinit_init(void *cpu_ptr, void *priv) { @@ -459,12 +428,28 @@ pvr_fw_create_structures(struct pvr_device *pvr_dev) struct pvr_fw_mem *fw_mem =3D &fw_dev->mem; int err; =20 + fw_dev->fwif_connection_ctl =3D + pvr_fw_object_create_and_map_offset(pvr_dev, + fw_dev->fw_heap_info.config_offset + + PVR_ROGUE_FWIF_CONNECTION_CTL_OFFSET, + sizeof(*fw_dev->fwif_connection_ctl), + PVR_BO_FW_FLAGS_DEVICE_UNCACHED, + NULL, NULL, + &fw_mem->fwif_connection_ctl_obj); + + if (IS_ERR(fw_dev->fwif_connection_ctl)) { + drm_err(drm_dev, + "Unable to allocate FWIF connection control memory\n"); + return PTR_ERR(fw_dev->fwif_connection_ctl); + } + fw_dev->power_sync =3D pvr_fw_object_create_and_map(pvr_dev, sizeof(*fw_d= ev->power_sync), PVR_BO_FW_FLAGS_DEVICE_UNCACHED, NULL, NULL, &fw_mem->power_sync_obj); if (IS_ERR(fw_dev->power_sync)) { drm_err(drm_dev, "Unable to allocate FW power_sync structure\n"); - return PTR_ERR(fw_dev->power_sync); + err =3D PTR_ERR(fw_dev->power_sync); + goto err_release_connection_ctl; } =20 fw_dev->hwrinfobuf =3D pvr_fw_object_create_and_map(pvr_dev, sizeof(*fw_d= ev->hwrinfobuf), @@ -594,6 +579,9 @@ pvr_fw_create_structures(struct pvr_device *pvr_dev) err_release_power_sync: pvr_fw_object_unmap_and_destroy(fw_mem->power_sync_obj); =20 +err_release_connection_ctl: + pvr_fw_object_unmap_and_destroy(fw_mem->fwif_connection_ctl_obj); + return err; } =20 @@ -615,6 +603,7 @@ pvr_fw_destroy_structures(struct pvr_device *pvr_dev) pvr_fw_object_unmap_and_destroy(fw_mem->power_sync_obj); pvr_fw_object_unmap_and_destroy(fw_mem->osdata_obj); pvr_fw_object_unmap_and_destroy(fw_mem->osinit_obj); + pvr_fw_object_unmap_and_destroy(fw_mem->fwif_connection_ctl_obj); } =20 /** @@ -755,10 +744,6 @@ pvr_fw_process(struct pvr_device *pvr_dev) pvr_fw_object_vunmap(fw_mem->code_obj); fw_code_ptr =3D NULL; =20 - err =3D pvr_fw_create_fwif_connection_ctl(pvr_dev); - if (err) - goto err_free_kdata; - return 0; =20 err_free_kdata: @@ -842,8 +827,6 @@ pvr_fw_cleanup(struct pvr_device *pvr_dev) { struct pvr_fw_mem *fw_mem =3D &pvr_dev->fw_dev.mem; =20 - pvr_fw_fini_fwif_connection_ctl(pvr_dev); - kfree(fw_mem->core_data); kfree(fw_mem->core_code); kfree(fw_mem->data); --=20 2.43.0 From nobody Fri Sep 25 07:59:34 2026 Received: from mx07-00376f01.pphosted.com (mx07-00376f01.pphosted.com [185.132.180.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2AC092D2382 for ; Tue, 15 Sep 2026 08:04:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.180.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789459475; cv=none; b=PG7WKox1fiYEA9jEZ45quHY7SAwPKX+56XckKb3bWnw2/mK8fTpLa+jmd0uqQ8OGlb3jUG8fdCoM71GVkDbm3ubeJTbI7qGHdYiEBDpv+Y/eNxOOdSXoQiy+wHmeUpSzezl1one0PKPVH/gPv1RXb+t67AGvj2teV8naoNuafqI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789459475; c=relaxed/simple; bh=j+YAiGvl2JG4UjbeMp8SIBAc1PmgNN9bCnYbRXNfpWs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=bDG3cWgwqaIC/sE8qkR2rvBywMbTSLZLIVhtuCMumoYyFccGzZeJGDpQXkg5AdiqLk0cj48vlK6Evl8DkP3fnlIqJwx4rG6m/TK9g0/hAfTyCqgyzD8PgypA2l8pioURMdslJlItkgrCBtcjr07JWmveVtB+N6XzJTlBDnUUBZM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=imgtec.com; spf=pass smtp.mailfrom=imgtec.com; dkim=pass (2048-bit key) header.d=imgtec.com header.i=@imgtec.com header.b=v21lziyf; arc=none smtp.client-ip=185.132.180.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=imgtec.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=imgtec.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=imgtec.com header.i=@imgtec.com header.b="v21lziyf" Received: from pps.filterd (m0168889.ppops.net [127.0.0.1]) by mx07-00376f01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6Yfbs2004317; Tue, 15 Sep 2026 09:04:07 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=imgtec.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=dk201812; bh=g t8CFlTZ8f2cjImnjHsOKyv54nZJ16Xn11i4nyYU8co=; b=v21lziyfqbECbUlE6 zEWVSm8defp2OGcwNrlLohwt+4vlktsZPMprjmLKxBk1jy3HZzj/+d66ch2TyZZS pIqeHSHDZh3XFCkEuPDLVHuddm9ojP2V40RKaL0l6SyG7AGz5qGv0gJ+B0+DH3Ij mGlUfASViVS2qbbzcMeWF487oVv0nhvo6G4hknNNRzfesvRhhVFYcJmSWYKNyxsU F5Nn9fwAk1c4Hf4slq8WflPRtOTTCFwOHzfTyFwhLV4Yvq3l61i6pYzkjvNk2VWI bd/ZBxf0/jCoh/V0pv9IY573JliZLfd7gFQI9LuD1madRm8tFXluFi6em9VtH5yG qv2Lg== Received: from hhmail01.hh.imgtec.org (83-244-153-141.cust-83.exponential-e.net [83.244.153.141]) by mx07-00376f01.pphosted.com (PPS) with ESMTPS id 4gmxtujca9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Sep 2026 09:04:06 +0100 (BST) Received: from [127.0.1.1] (172.25.5.88) by HHMAIL01.hh.imgtec.org (10.100.10.19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 15 Sep 2026 09:04:04 +0100 From: Alexandru Dadu Date: Tue, 15 Sep 2026 11:03:46 +0300 Subject: [PATCH 2/2] drm/imagination: Don't map FW interface structures unnecessarily Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260915-b4-do-not-map-if-structs-unnecessarily-v1-2-a0e2ccee154a@imgtec.com> References: <20260915-b4-do-not-map-if-structs-unnecessarily-v1-0-a0e2ccee154a@imgtec.com> In-Reply-To: <20260915-b4-do-not-map-if-structs-unnecessarily-v1-0-a0e2ccee154a@imgtec.com> To: Alessio Belle , Luigi Santivetti , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: , , , Alexandru Dadu X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789459442; l=8607; i=alexandru.dadu@imgtec.com; s=20260304; h=from:subject:message-id; bh=TSvRkcCjfXhus5FZdojub+lNae7bXbvLSXaDKaZJ+dg=; b=/dWD8nNleg0HdNBapX53iZ/J64UVcJV6W93uaVboxfUd5czpqtuQOvEeRrzxA/NqLzedHYpYp 6Mdp9TvFud5BQkri3l03c6xGnIg/97x4MWbozSbBAgezCjrYbsTbmVm X-Developer-Key: i=alexandru.dadu@imgtec.com; a=ed25519; pk=FU07SyNrYGwhahqSxbWEuzyXlUh47xBXvLvOR7UA6+U= X-Authority-Analysis: v=2.4 cv=Se9i5fRu c=1 sm=1 tr=0 ts=6aa8fbf6 cx=c_pps a=AKOq//PuzOIrVTIF9yBwbA==:117 a=AKOq//PuzOIrVTIF9yBwbA==:17 a=YP7Kpn5otooA:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=kQ-hrUj2-E3RCbRHssb7:22 a=7RYWX5rxfSByPNLylY2M:22 a=r_1tXGB3AAAA:8 a=Z8F9gRzKEWkVkQCTrYAA:9 a=QEXdDO2ut3YA:10 a=t8nPyN_e6usw4ciXM-Pk:22 X-Proofpoint-ORIG-GUID: SCXy-ITqIdzmh4r76-W9gU9OWU6OFAlB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDExNSBTYWx0ZWRfXyJ1z7twm4z8K KQ8Npue7cHZL5v1gIWE4XUQQ0PQcDj6Hk+UvQnwWHWWH2SY1tQ+GvTKeFBwe50CY5vsXaoI9Ps3 arQiTHOp1bg3F5yj45d7g/cV9vrUOkxiEHyoI01URPstftVSdsAhZ0pLlpbID2FLrAYKCcExa6P qfRg/KTuFzlG43kLa8pwguL9oi3mwM7+xgW03U0ompiPyaYD0Wp/cla4ScxxWPISXnBcoWjzB9s vc8W41CVjsFzwAsx/YbyT8V20SZNCDlj9SR0EWc8miPQqHono+WxtR7Weu/VciNWbYivF3VVVe7 ibB4FfO8azQQTf0h3PxGEVxOG9JTiQwK8JBTwrSL3/d0LnP+30z3f00+i7Jz6kA/cCRitaTyWk/ gtFwKCrsgK34JAd2GDBWEiSFyPvaba8/aI3TJRxA3zvb0kFV3jEujliWT5eBiYKp5AH/VvwYAZR j69DRpWE8q/0g4VfKSQ== X-Proofpoint-GUID: SCXy-ITqIdzmh4r76-W9gU9OWU6OFAlB X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDExNSBTYWx0ZWRfX/sbpqAw61ING cmEcYlclFWi2OOMrFROxN0ulOBSS9hilfDV+hoFW+gbMLOKWbsgNCTw/hON3Ix5ApTgf3Up3xin Ks66F3ivRngR/3NcQtADYYuSgZo+uj0= From: Alessio Belle Connection control, OS init and HWR info buffer structures are currently not accessed by the driver during or after firmware initialisation. OS init is accessed during hard reset, but the common hard reset logic already takes care of temporarily mapping it again. Signed-off-by: Alessio Belle Signed-off-by: Alexandru Dadu --- drivers/gpu/drm/imagination/pvr_fw.c | 97 ++++++++++++++++++++++++--------= ---- drivers/gpu/drm/imagination/pvr_fw.h | 18 +++---- 2 files changed, 72 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/drm/imagination/pvr_fw.c b/drivers/gpu/drm/imagina= tion/pvr_fw.c index b2a5ea001474..ad5e8d68defe 100644 --- a/drivers/gpu/drm/imagination/pvr_fw.c +++ b/drivers/gpu/drm/imagination/pvr_fw.c @@ -428,19 +428,17 @@ pvr_fw_create_structures(struct pvr_device *pvr_dev) struct pvr_fw_mem *fw_mem =3D &fw_dev->mem; int err; =20 - fw_dev->fwif_connection_ctl =3D - pvr_fw_object_create_and_map_offset(pvr_dev, - fw_dev->fw_heap_info.config_offset + - PVR_ROGUE_FWIF_CONNECTION_CTL_OFFSET, - sizeof(*fw_dev->fwif_connection_ctl), - PVR_BO_FW_FLAGS_DEVICE_UNCACHED, - NULL, NULL, - &fw_mem->fwif_connection_ctl_obj); - - if (IS_ERR(fw_dev->fwif_connection_ctl)) { + err =3D pvr_fw_object_create_offset(pvr_dev, + fw_dev->fw_heap_info.config_offset + + PVR_ROGUE_FWIF_CONNECTION_CTL_OFFSET, + sizeof(struct rogue_fwif_connection_ctl), + PVR_BO_FW_FLAGS_DEVICE_UNCACHED, + NULL, NULL, + &fw_mem->fwif_connection_ctl_obj); + if (err) { drm_err(drm_dev, "Unable to allocate FWIF connection control memory\n"); - return PTR_ERR(fw_dev->fwif_connection_ctl); + return err; } =20 fw_dev->power_sync =3D pvr_fw_object_create_and_map(pvr_dev, sizeof(*fw_d= ev->power_sync), @@ -452,13 +450,12 @@ pvr_fw_create_structures(struct pvr_device *pvr_dev) goto err_release_connection_ctl; } =20 - fw_dev->hwrinfobuf =3D pvr_fw_object_create_and_map(pvr_dev, sizeof(*fw_d= ev->hwrinfobuf), - PVR_BO_FW_FLAGS_DEVICE_UNCACHED, - NULL, NULL, &fw_mem->hwrinfobuf_obj); - if (IS_ERR(fw_dev->hwrinfobuf)) { + err =3D pvr_fw_object_create(pvr_dev, sizeof(struct rogue_fwif_hwrinfobuf= ), + PVR_BO_FW_FLAGS_DEVICE_UNCACHED, + NULL, NULL, &fw_mem->hwrinfobuf_obj); + if (err) { drm_err(drm_dev, "Unable to allocate FW hwrinfobuf structure\n"); - err =3D PTR_ERR(fw_dev->hwrinfobuf); goto err_release_power_sync; } =20 @@ -521,16 +518,14 @@ pvr_fw_create_structures(struct pvr_device *pvr_dev) goto err_fw_trace_fini; } =20 - fw_dev->fwif_osinit =3D - pvr_fw_object_create_and_map_offset(pvr_dev, - fw_dev->fw_heap_info.config_offset + - PVR_ROGUE_FWIF_OSINIT_OFFSET, - sizeof(*fw_dev->fwif_osinit), - PVR_BO_FW_FLAGS_DEVICE_UNCACHED, - fw_osinit_init, pvr_dev, &fw_mem->osinit_obj); - if (IS_ERR(fw_dev->fwif_osinit)) { + err =3D pvr_fw_object_create_offset(pvr_dev, + fw_dev->fw_heap_info.config_offset + + PVR_ROGUE_FWIF_OSINIT_OFFSET, + sizeof(struct rogue_fwif_osinit), + PVR_BO_FW_FLAGS_DEVICE_UNCACHED, + fw_osinit_init, pvr_dev, &fw_mem->osinit_obj); + if (err) { drm_err(drm_dev, "Unable to allocate FW OSINIT structure\n"); - err =3D PTR_ERR(fw_dev->fwif_osinit); goto err_release_osdata; } =20 @@ -550,7 +545,7 @@ pvr_fw_create_structures(struct pvr_device *pvr_dev) return 0; =20 err_release_osinit: - pvr_fw_object_unmap_and_destroy(fw_mem->osinit_obj); + pvr_fw_object_destroy(fw_mem->osinit_obj); =20 err_release_osdata: pvr_fw_object_unmap_and_destroy(fw_mem->osdata_obj); @@ -574,13 +569,13 @@ pvr_fw_create_structures(struct pvr_device *pvr_dev) pvr_fw_object_destroy(fw_mem->mmucache_sync_obj); =20 err_release_hwrinfobuf: - pvr_fw_object_unmap_and_destroy(fw_mem->hwrinfobuf_obj); + pvr_fw_object_destroy(fw_mem->hwrinfobuf_obj); =20 err_release_power_sync: pvr_fw_object_unmap_and_destroy(fw_mem->power_sync_obj); =20 err_release_connection_ctl: - pvr_fw_object_unmap_and_destroy(fw_mem->fwif_connection_ctl_obj); + pvr_fw_object_destroy(fw_mem->fwif_connection_ctl_obj); =20 return err; } @@ -599,11 +594,11 @@ pvr_fw_destroy_structures(struct pvr_device *pvr_dev) pvr_fw_object_unmap_and_destroy(fw_mem->sysinit_obj); =20 pvr_fw_object_destroy(fw_mem->mmucache_sync_obj); - pvr_fw_object_unmap_and_destroy(fw_mem->hwrinfobuf_obj); + pvr_fw_object_destroy(fw_mem->hwrinfobuf_obj); pvr_fw_object_unmap_and_destroy(fw_mem->power_sync_obj); pvr_fw_object_unmap_and_destroy(fw_mem->osdata_obj); - pvr_fw_object_unmap_and_destroy(fw_mem->osinit_obj); - pvr_fw_object_unmap_and_destroy(fw_mem->fwif_connection_ctl_obj); + pvr_fw_object_destroy(fw_mem->osinit_obj); + pvr_fw_object_destroy(fw_mem->fwif_connection_ctl_obj); } =20 /** @@ -1402,6 +1397,46 @@ pvr_fw_object_create_and_map_offset(struct pvr_devic= e *pvr_dev, fw_obj_out); } =20 +/** + * pvr_fw_object_create_offset() - Create a FW object and map to firmware + * at the provided offset. + * @pvr_dev: PowerVR device pointer. + * @fw_addr: Base address of desired FW mapping, offset from start of FW h= eap. + * If a specific FW address is not required, pass %U32_MAX. + * @size: Size of object, in bytes. + * @flags: Options which affect both this operation and future mapping + * operations performed on the returned object. Must be a combination of + * DRM_PVR_BO_* and/or PVR_BO_* flags. + * @init: Initialisation callback. + * @init_priv: Private pointer to pass to initialisation callback. + * @fw_obj_out: Pointer to location to store created object pointer. + * + * %DRM_PVR_BO_DEVICE_PM_FW_PROTECT is implied for all FW objects. Consequ= ently, + * this function will fail if @flags has %DRM_PVR_BO_CPU_ALLOW_USERSPACE_A= CCESS + * set. + * + * Returns: + * * 0 on success, or + * * Any error returned by pvr_fw_object_create_and_map(). + */ +int +pvr_fw_object_create_offset(struct pvr_device *pvr_dev, u32 fw_addr, + size_t size, u64 flags, + void (*init)(void *cpu_ptr, void *priv), + void *init_priv, struct pvr_fw_object **fw_obj_out) +{ + void *cpu_ptr; + + cpu_ptr =3D pvr_fw_object_create_and_map_offset(pvr_dev, fw_addr, size, f= lags, + init, init_priv, fw_obj_out); + if (IS_ERR(cpu_ptr)) + return PTR_ERR(cpu_ptr); + + pvr_fw_object_vunmap(*fw_obj_out); + + return 0; +} + /** * pvr_fw_object_destroy() - Destroy a pvr_fw_object * @fw_obj: Pointer to object to destroy. diff --git a/drivers/gpu/drm/imagination/pvr_fw.h b/drivers/gpu/drm/imagina= tion/pvr_fw.h index 3390c84e4fd3..67d1e63669f1 100644 --- a/drivers/gpu/drm/imagination/pvr_fw.h +++ b/drivers/gpu/drm/imagination/pvr_fw.h @@ -349,30 +349,18 @@ struct pvr_fw_device { /** @fw_mm_base: Base address of address space managed by @fw_mm. */ u64 fw_mm_base; =20 - /** - * @fwif_connection_ctl: Pointer to CPU mapping of FWIF connection - * control structure. - */ - struct rogue_fwif_connection_ctl *fwif_connection_ctl; - /** @fwif_sysinit: Pointer to CPU mapping of FW SYSINIT structure. */ struct rogue_fwif_sysinit *fwif_sysinit; =20 /** @fwif_sysdata: Pointer to CPU mapping of FW SYSDATA structure. */ struct rogue_fwif_sysdata *fwif_sysdata; =20 - /** @fwif_osinit: Pointer to CPU mapping of FW OSINIT structure. */ - struct rogue_fwif_osinit *fwif_osinit; - /** @fwif_osdata: Pointer to CPU mapping of FW OSDATA structure. */ struct rogue_fwif_osdata *fwif_osdata; =20 /** @power_sync: Pointer to CPU mapping of power sync state. */ u32 *power_sync; =20 - /** @hwrinfobuf: Pointer to CPU mapping of FW HWR info buffer. */ - struct rogue_fwif_hwrinfobuf *hwrinfobuf; - /** @fw_trace: Device firmware trace buffer state. */ struct pvr_fw_trace fw_trace; =20 @@ -430,6 +418,12 @@ void *pvr_fw_object_create_and_map(struct pvr_device *= pvr_dev, size_t size, u64 void (*init)(void *cpu_ptr, void *priv), void *init_priv, struct pvr_fw_object **pvr_obj_out); =20 +int +pvr_fw_object_create_offset(struct pvr_device *pvr_dev, u32 fw_addr, + size_t size, u64 flags, + void (*init)(void *cpu_ptr, void *priv), + void *init_priv, struct pvr_fw_object **pvr_obj_out); + void * pvr_fw_object_create_and_map_offset(struct pvr_device *pvr_dev, u32 dev_of= fset, size_t size, u64 flags, void (*init)(void *cpu_ptr, void *priv), --=20 2.43.0