From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1B3974ADD82; Tue, 15 Sep 2026 15:49:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487348; cv=none; b=prF82ZblKFPWo70kwsVTQUc0vjaesi95dcQw8/G+ydL1W0WXjMqEU6vaIRKdBdf1pPFxyEZp3NJflyZFGLP2FCiEvETazHDFSUbMdj3SwT2MROvLV7sLcwg2XR2djCikE0tMVR0H5z40CZty36QAAM01M5SUZMpqRq/wd/3cD90= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487348; c=relaxed/simple; bh=SS1qtrHSbngdvNGeG6RPiWAf922Nowh6gFGV0Y8RWAU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ahK4h10s6ZBVbtqaOWD14afzQlxIFHzaa9O7/llxnOs7SVrjrUrqRzQJ73WR61S2ocpAs5JVTnWrQF9Zf6EgfS+wNos81gF15CoUDvXkHXUyM1FlvOP44XMhBVEEt0gIN9irinRfSqVNLAw2LCQGwDHtdkxYrSzfrqzNcMkfnBc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=Cg02Lq0g; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="Cg02Lq0g" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A68FC15A1; Tue, 15 Sep 2026 08:49:02 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DC1673F882; Tue, 15 Sep 2026 08:49:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487346; bh=SS1qtrHSbngdvNGeG6RPiWAf922Nowh6gFGV0Y8RWAU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Cg02Lq0gG5n1mRpbGar6YHdQ8r8ovabBEs37FeOp7fn80ms95FFn+uehzIRFgZD+2 gJwvFzGP1r4Tnj+agH2QJuyc+dnb0QRIUoufd+RGSKYtLzPyRs82ORN8J4qHmlT8iF 8DOz3Hmq2rFd8Vf7jz7DDVVpYaKT0xGCH5K2uaVY= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:47 +0100 Subject: [PATCH 01/25] perf/core: Reject non-positive AUX snapshot sizes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-1-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=1513; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=SS1qtrHSbngdvNGeG6RPiWAf922Nowh6gFGV0Y8RWAU=; b=SxMQuzcTemr+ai7HEpuK/BgH25DGTLYAII4GoCYRsGRwpD4jnF4vZB/wJ1/ILF7ZHo87xkeGA NpJFSBgW4toCfGtbeZNzzIBJzrZ5NWrqzrBvU1MuGsRJjAnlh/KDdM0 X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The existing validation rejects negative copy errors but allows a zero return. In that case no AUX data was copied, but it is incorrectly passed to the alignment-padding check. Reject zero together with negative errors before calculating the padding. This reports the invalid snapshot result and avoids treating a missing AUX payload as alignment padding. Fixes: a4faf00d994c ("perf/aux: Allow using AUX data in perf samples") Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- kernel/events/core.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/kernel/events/core.c b/kernel/events/core.c index fe33fe15689d077e7f445c0b17d9c2e638c884a1..17355e4b8b7c6c106117153c9eb= 8509e6f9a41e3 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -8058,12 +8058,11 @@ static void perf_aux_sample_output(struct perf_even= t *event, size =3D perf_pmu_snapshot_aux(rb, sampler, handle, data->aux_size); =20 /* - * An error here means that perf_output_copy() failed (returned a - * non-zero surplus that it didn't copy), which in its current - * enlightened implementation is not possible. If that changes, we'd - * like to know. + * A negative return means that perf_output_copy() failed, while zero + * means that no AUX data was copied despite a non-zero request. Neither + * can be treated as alignment padding below. */ - if (WARN_ON_ONCE(size < 0)) + if (WARN_ON_ONCE(size <=3D 0)) goto out_put; =20 /* --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C3E934AF9D5; Tue, 15 Sep 2026 15:49:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487351; cv=none; b=D0ptgsFi/pR5AjBFRg/DHvW85MVVwppDafyQu1cdI2Afvds/BKvD7zI4VLJFcsTz+fzvSNMXg8f7AS5YwIiwlp8feCOZDTDI8k26s3Npg1+NdRRCwoWEPd1LvYFsp161HLgvrFuekfBFaeyfbs4fk6dNoywLCS/9HI6L3bMF83I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487351; c=relaxed/simple; bh=B0UpuY1UdwYGmq+lypGwMC9Rr8VbjvbhGjJOTbTkvgg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OlfcqfjIHTTdtnEn9wc6/O3B4nqKRPNqWeoKeJfLW2tUcAZhFdFVegCwvtq9vf/7oi1ht+lW1B6EE1p7sDDwLKoT0/G5086Sq+TCBf+3wLe+XvMTM7NbrNLrDjfC9ewe9LwUAMtzmLG0XGdLG+8DReFpO4aIJ38Ya8BfSzuRLaU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=Y2m8tbMy; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="Y2m8tbMy" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4F9EB1BF3; Tue, 15 Sep 2026 08:49:05 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 881773F882; Tue, 15 Sep 2026 08:49:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487348; bh=B0UpuY1UdwYGmq+lypGwMC9Rr8VbjvbhGjJOTbTkvgg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Y2m8tbMyFKI7i6DtKAsBVajowPHcKU+EhCiHmbR02SdpzMuaksIa6cija/04cTuRW BFjZbXoTp5F0Y+v6Jl2HV5YeotzxXmhpa1aQLTzIxhpRyVFhuREeB1FRmSd4LjTVFu 3a6HYrVb7e1QnyArLClsly+KB45I/tPvnTMlDeAg= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:48 +0100 Subject: [PATCH 02/25] perf/core: Prevent AUX sampling from racing with pause/resume Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-2-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=2358; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=B0UpuY1UdwYGmq+lypGwMC9Rr8VbjvbhGjJOTbTkvgg=; b=WfTg/03reVi5kRMDM9V0J2d7OosG9mo6fY4Ts2KQmsi56+F2MvdU4wqtAP9rcPyGIxN0oMUz6 Fsb+2AOOzf9DzQKRfzEKZ6w7GWnVXSlJRYYruCMouVKZ6rOLWk9nmAx X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= AUX snapshot sampling and AUX pause/resume can both run from NMI context. Each path currently guards only against its own recursion. An NMI can therefore enter one path while the other is changing the AUX hardware or buffer state, allowing snapshot_aux() and the PMU pause/resume callbacks to overlap. Use aux_in_sampling and aux_in_pause_resume as a shared exclusion scheme. If sampling nests inside pause/resume, emit the regular sample without an AUX payload. If pause/resume nests inside AUX sampling, drop the AUX action, matching the existing behavior for recursive pause/resume. This prevents overlapping PMU operations without waiting in NMI context. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- kernel/events/core.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/kernel/events/core.c b/kernel/events/core.c index 17355e4b8b7c6c106117153c9eb8509e6f9a41e3..a524eb381d4b5731650ec0105d9= 794b8c89fba4d 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -7990,10 +7990,12 @@ static unsigned long perf_prepare_sample_aux(struct= perf_event *event, goto out; =20 /* - * If this is an NMI hit inside sampling code, don't take - * the sample. See also perf_aux_sample_output(). + * If this is an NMI hit inside AUX sampling or pause/resume, don't + * include AUX data in the sample. See also perf_aux_sample_output() + * and perf_event_aux_pause(). */ - if (READ_ONCE(rb->aux_in_sampling)) { + if (READ_ONCE(rb->aux_in_sampling) || + READ_ONCE(rb->aux_in_pause_resume)) { data->aux_size =3D 0; } else { size =3D min_t(size_t, size, perf_aux_size(rb)); @@ -8869,10 +8871,13 @@ static void perf_event_aux_pause(struct perf_event = *event, bool pause) =20 scoped_guard (irqsave) { /* - * Guard against self-recursion here. Another event could trip - * this same from NMI context. + * Guard against self-recursion and AUX sampling. Another event + * could trigger either path from NMI context, in which case the + * AUX action is dropped instead of waiting for the preempted + * context. */ - if (READ_ONCE(rb->aux_in_pause_resume)) + if (READ_ONCE(rb->aux_in_pause_resume) || + READ_ONCE(rb->aux_in_sampling)) break; =20 WRITE_ONCE(rb->aux_in_pause_resume, 1); --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8C7044ACC9A; Tue, 15 Sep 2026 15:49:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487354; cv=none; b=BHF5OoVFLB9ZM1xF8fhiNscwBovbp8oO1x5kxkkeibsbb+nOouaTaxvqKhK10Truab/8luxbTrzQZPyWApBvgMb8bHdlLyHTqJ0OahhMitBLpRRojKgpsgCVmNo0PCVKJAFqwAarz/GapQq7iaxru0UxgwDed8NDhmFzNN29WfI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487354; c=relaxed/simple; bh=uKAFRhyIt1gjtBPb9l3BgDILFBey3jhPAZxBylli1AA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lpeO3hgAWcF9OYL18qtVGFlI2wA8lL5Yoa0v7kWrpkvJcrHdsPCDD8OAv4ffgkpKcVpHDJFUIcyVVj+R93ZyngG1Gb0vLc/on9Ye2/0/BuEMO49q3DYEl8R7wH44RO8GOCqONBaWwE9hmJvFrPYaxvc8U/y7v+khQTLux3Sgj7s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=hIhsgwZt; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="hIhsgwZt" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 00A121570; Tue, 15 Sep 2026 08:49:08 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 343C43F882; Tue, 15 Sep 2026 08:49:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487351; bh=uKAFRhyIt1gjtBPb9l3BgDILFBey3jhPAZxBylli1AA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=hIhsgwZtsfBg4lWL2UBv9c04SkNq7BCDILiHgCNpigGvMpYsS0/cOpbvpb2/CpdJw 5FPWNBpQVsV/fD7bdfDP3YL3vJWY6CEXk7BVlP+EIvW53kY8y7DpAHqRPO7M4uY9Jp 4MyMcvT8AfsUcHCrCPzLUKwtz3WsI6oCZXjK2s7c= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:49 +0100 Subject: [PATCH 03/25] perf/core: Export output copy helpers for CoreSight Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-3-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=1214; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=uKAFRhyIt1gjtBPb9l3BgDILFBey3jhPAZxBylli1AA=; b=nIQGJIWpljvvO37hFp25/Y01Ze6az87G38R0IwB3bG0xzjOIw6zkAlRH6Nr8s2RA0pY8VTFQh O8+3/fLPJSkBbThxx66yZ+dakd5DQG4o+8YWP1jB846bHezSmX2V0KT X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= CoreSight AUX sampling needs perf_output_copy_aux() to copy trace data into samples and perf_output_copy() to prepend zero bytes when the available trace is shorter than the requested snapshot. Export both helpers so the CoreSight snapshot_aux() callback can use them when CONFIG_CORESIGHT=3Dm. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- kernel/events/ring_buffer.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c index 1b1ffe0533e58a9d976d0eb0fc23e09d5936da2b..e69ea5b077a5e94b5b6bb1f4c6f= 0ca5b8a94a6cc 100644 --- a/kernel/events/ring_buffer.c +++ b/kernel/events/ring_buffer.c @@ -298,6 +298,7 @@ unsigned int perf_output_copy(struct perf_output_handle= *handle, { return __output_copy(handle, buf, len); } +EXPORT_SYMBOL_GPL(perf_output_copy); =20 unsigned int perf_output_skip(struct perf_output_handle *handle, unsigned int len) @@ -617,6 +618,7 @@ long perf_output_copy_aux(struct perf_output_handle *au= x_handle, =20 return len; } +EXPORT_SYMBOL_GPL(perf_output_copy_aux); =20 #define PERF_AUX_GFP (GFP_KERNEL | __GFP_ZERO | __GFP_NOWARN | __GFP_NORET= RY) =20 --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E71DF4AE8DA; Tue, 15 Sep 2026 15:49:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487358; cv=none; b=GeWLYrKzYdclqYeoEHVIAukJ9HKNtrtHu0z4l4xXhSuZ9ErUzj4ODlnteoYMAStwrIbmWMAYrNvE47mHl8W5bN2TV+Jnm69eA1dPX2NCBZPDLi9CcFa5XsORNDbg/Q2nev/Q0FPCUdRVixlEHNbvInTRfRL2+yWaZq1NVOnBjGg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487358; c=relaxed/simple; bh=WbRS/Ap5Om/Fa2STqxqbiF5EMD3hpUj6Nz87W986fSw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Qphiz5WPX21dPYEF4vEJ7v3dq5DP/iSvr9IcqicG10KXx+qMzHy4hbm6eo78mJluQe6Ff2CQS7QLJihmP1W36fdkf+vLDxh6NzH2bhYDrKXZ4xCEzXm4Yguic/dtRw9TiBB2qoMg3UY6HBgpKuOUGW1DsZk0tFO/dSu+Ag8J8YU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=SlXuDNmq; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="SlXuDNmq" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A040215A1; Tue, 15 Sep 2026 08:49:10 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D45ED3F882; Tue, 15 Sep 2026 08:49:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487354; bh=WbRS/Ap5Om/Fa2STqxqbiF5EMD3hpUj6Nz87W986fSw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=SlXuDNmquYrW0O4NHVPVD9q9KwtgKyf0TRfzbDnSwgt/D5odHlAORmKE7/fCkR02F n1IyZBZIoly0Jn8hj/1LWeKGNfbzDbsJ3VC09KMO9wCcbIKAKcJN6ufMxfBXT+EonX rUjvT66vyjQIm1Ikl8qL5aOSQsEDYmNT+S6LS99o= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:50 +0100 Subject: [PATCH 04/25] coresight: perf: End AUX output when an event is throttled Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-4-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=4688; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=WbRS/Ap5Om/Fa2STqxqbiF5EMD3hpUj6Nz87W986fSw=; b=e3BQsslojgwRU2uNLB4vpSsPSM4tMUfDSc0pAs9nnrNLoQelZXXm/2xqF7xcg4KzpdRQ4PJ+Z FUS3jLp68qtAwDz+SzIFhOqUuBtdcYpMvxTNNxWa2Yy3GMNCj+1SMsP X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Since commit 9734e25fbf5a ("perf: Fix the throttle logic for a group"), the perf core stops every event in a throttled group by calling the PMU stop callback with flags set to zero: perf_event_throttle() `> event->pmu->stop(event, 0) The ETM perf stop callback only ends the AUX output handle when PERF_EF_UPDATE was set. For throttling with mode is zero, it skips to end the AUX handle. When the event is later unthrottled and ETM tracing is started again, perf_aux_output_begin() sees the perf handle is nest enabled and triggers a warning: [ 181.161897] ------------[ cut here ]------------ [ 181.161906] WARNING: kernel/events/ring_buffer.c:415 at perf_aux_outpu= t_begin+0x1dc/0x1f0, CPU#0:2 [ 181.234120] arm-scmi arm-scmi.1.auto: timed out in resp(caller: do_xfe= r+0x1a0/0x558) [ 181.234223] cpufreq: __target_index: Failed to change cpu frequency: -= 110 [ 181.286675] Modules linked in: panfrost tda9950 hdlcd tda998x drm_shme= m_helper drm_client_lib cect [ 181.314139] CPU: 0 UID: 0 PID: 352 Comm: perf Not tainted 7.1.0-rc1-00= 058-gdca922e019dd-dirty #11 [ 181.323915] Hardware name: ARM LTD ARM Juno Development Platform/ARM J= uno Development Platform, B5 [ 181.334732] pstate: 600000c5 (nZCv daIF -PAN -UAO -TCO -DIT -SSBS BTYP= E=3D--) [ 181.341721] pc : perf_aux_output_begin+0x1dc/0x1f0 [ 181.346547] lr : perf_aux_output_begin+0x9c/0x1f0 [ 181.351280] sp : ffff800080003be0 [ 181.354606] x29: ffff800080003be0 x28: ffff0008023fc000 x27: ffff4b45d= 287f000 [ 181.361789] x26: ffff0009764787a8 x25: 0000000000000000 x24: ffff00080= dc99710 [ 181.368970] x23: ffffb4c334553000 x22: 0000000000000001 x21: ffff00080= dc99710 [ 181.376151] x20: ffff0009764787a8 x19: ffff000801cc6000 x18: 00000000f= fffffff [ 181.383332] x17: 0000000000000000 x16: ffffb4c3a118c998 x15: 000000000= 0000000 [ 181.390512] x14: 00003d0900000000 x13: 00000001ffff006e x12: 696765625= f747570 [ 181.397692] x11: ffffb4c3a52758d8 x10: 0000000000000108 x9 : ffffb4c3a= 117f620 [ 181.404873] x8 : ffff800080003a58 x7 : ffff000808de4000 x6 : 000000000= 00fffff [ 181.412053] x5 : 0000000000000000 x4 : 0000000000000000 x3 : 000000000= 0000000 [ 181.419232] x2 : 0000000000000007 x1 : 0000000000000000 x0 : 000000000= 0000007 [ 181.426411] Call trace: [ 181.428868] perf_aux_output_begin+0x1dc/0x1f0 (P) [ 181.433692] etm_event_start+0xdc/0x290 [coresight] [ 181.438665] perf_event_unthrottle+0x70/0xa8 [ 181.442964] perf_event_unthrottle_group+0x40/0x170 [ 181.447871] perf_adjust_freq_unthr_events+0x178/0x1a8 [ 181.453038] perf_adjust_freq_unthr_context+0x74/0xf8 [ 181.458120] perf_event_task_tick+0xa8/0x290 [ 181.462418] sched_tick+0x144/0x2c8 [ 181.465937] update_process_times+0xc0/0x198 Reproduce this with the command: perf record -a -e cs_etm/aux-action=3Dstart-paused/k \ -e cycles/aux-action=3Dpause,period=3D3000/ \ -e cycles/aux-action=3Dresume,period=3D1500/ -- sleep 10 An update of the sink buffer is unnecessary when PERF_EF_UPDATE is not set, but the AUX output operation must still be terminated. End it with a size of zero so that a later restart can acquire a new handle. Fixes: 9734e25fbf5a ("perf: Fix the throttle logic for a group") Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm-perf.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwt= racing/coresight/coresight-etm-perf.c index 09b21a711a8764ea429d712890265c84648e889e..a45f69f39f175f3044322b25fe5= 413fb97154496 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -748,13 +748,16 @@ static void etm_event_stop(struct perf_event *event, = int mode) * handle due to lack of buffer space), we don't * have to do anything here. */ - if (handle->event && (mode & PERF_EF_UPDATE)) { + if (!handle->event) + goto out; + + if (mode & PERF_EF_UPDATE) { if (WARN_ON_ONCE(handle->event !=3D event)) - return; + goto out; =20 /* update trace information */ if (!sink_ops(sink)->update_buffer) - return; + goto out; =20 size =3D sink_ops(sink)->update_buffer(sink, handle, event_data->snk_config); @@ -773,8 +776,11 @@ static void etm_event_stop(struct perf_event *event, i= nt mode) perf_aux_output_end(handle, size); else WARN_ON(size); + } else { + perf_aux_output_end(handle, 0); } =20 +out: /* Disabling the path make its elements available to other sessions */ coresight_disable_path(path); } --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B6C2E4AF9D5; Tue, 15 Sep 2026 15:49:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487360; cv=none; b=pgk2haf9csDdqo4ty+YZ9KWF8lz5hbrDa+U0anu2+uHSsr4BCLxbB2YryC4phJmRO9OS/c6YRBC1KgP7xRm7TiKTrdanTqshAxvRcqT5RW7P85IoAiKGx+fuAjdFS5tMAcQjs7q/IF8qPkewad+a3G7zf3cKEe8Ct1dXQECjTf8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487360; c=relaxed/simple; bh=rzWBLuFeZQZl5yGb8RvJIlMSZz68zKpAICaDgrSBzSA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nw+4PY7g44KykAu5ZmBpn0xJrSZJ4iF/TcoTed7x/PA1bkHdLZlMd1JDxTgLTS9bFJe79HWHDgERiKhmGZcok1UnNm98RL7cYI6OunHYMAClbbsvINyfLgSNEW11zEFvIHO3ksAsWu2949oBX8Fko0icFk83MaXUctjvolPq84Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=eKLnsicl; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="eKLnsicl" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 491A81570; Tue, 15 Sep 2026 08:49:13 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8044F3F882; Tue, 15 Sep 2026 08:49:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487356; bh=rzWBLuFeZQZl5yGb8RvJIlMSZz68zKpAICaDgrSBzSA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=eKLnsiclKicDCoZ/rB/R70y+EO9DbIexlf1O6Yb10Rv6CSilSlHAE9thwIc2HNElB GoQBWpcBrUfJI+2VVbWemVQF8CA1uJ0t/fcAlO20lzPIZmU0MOG61mgK2i5oHB7x+B hwntAJCW+bFowVKylN+sB+Rjd23zFqkGvfnHFDmM= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:51 +0100 Subject: [PATCH 05/25] coresight: perf: Extract AUX buffer update helper Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-5-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=4787; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=rzWBLuFeZQZl5yGb8RvJIlMSZz68zKpAICaDgrSBzSA=; b=4HBcAcKHFe4Z45oSwhpAFqSLMoJr0D0hTz0E5G75YK2+UArFHFbpBZA1FUqME1bRFZPloWGo9 wkUxKZvL/XuBdi3wav+Q9KeF+huvfDnz/ePbY8xjDF62bWATD2CQMb0 X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The pause and stop callbacks duplicate the sequence that updates a sink buffer and finishes the current AUX output transaction. Move the common sequence into etm_event_update_buffer() for a single implementation. The helper first verifies that perf handle is active. It updates the buffer when PERF_EF_UPDATE is requested and otherwise ends the transaction without data. The pause callback can then start a new perf handle for resuming trace. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm-perf.c | 89 ++++++++++----------= ---- 1 file changed, 36 insertions(+), 53 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwt= racing/coresight/coresight-etm-perf.c index a45f69f39f175f3044322b25fe5413fb97154496..13d865ca86f1161b2e21174f096= 473c4829afc8c 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -637,6 +637,38 @@ static void etm_event_start(struct perf_event *event, = int flags) return; } =20 +static void etm_event_update_buffer(struct perf_output_handle *handle, + struct etm_event_data *event_data, + struct coresight_device *sink, + int mode) +{ + unsigned long size; + + /* + * Make sure the handle is still valid, as the sink may close it from + * the IRQ handler. E.g., the sink driver may fail to restart the + * handle during interrupt handling due to insufficient buffer space. + * The sink driver must serialize update_buffer() with IRQ handling, + * so this should return either a valid handle with a valid size + * (which may be 0), or no handle at all. + */ + if (!perf_get_aux(handle)) + return; + + if (!sink_ops(sink)->update_buffer) + goto out; + + if (mode & PERF_EF_UPDATE) { + size =3D sink_ops(sink)->update_buffer(sink, handle, + event_data->snk_config); + perf_aux_output_end(handle, size); + return; + } + +out: + perf_aux_output_end(handle, 0); +} + static void etm_event_pause(struct coresight_path *path, struct perf_event *event, struct etm_ctxt *ctxt) @@ -644,7 +676,6 @@ static void etm_event_pause(struct coresight_path *path, struct perf_output_handle *handle =3D &ctxt->handle; struct coresight_device *source, *sink; struct etm_event_data *event_data; - unsigned long size; =20 if (!path) return; @@ -669,27 +700,16 @@ static void etm_event_pause(struct coresight_path *pa= th, if (WARN_ON_ONCE(handle->event !=3D event)) return; =20 - if (!sink_ops(sink)->update_buffer) - return; - event_data =3D READ_ONCE(ctxt->event_data); - size =3D sink_ops(sink)->update_buffer(sink, handle, - event_data->snk_config); - if (READ_ONCE(handle->event)) { - if (!size) - return; + etm_event_update_buffer(handle, event_data, sink, PERF_EF_UPDATE); =20 - perf_aux_output_end(handle, size); - perf_aux_output_begin(handle, event); - } else { - WARN_ON_ONCE(size); - } + /* Prepare the handle for resuming trace */ + perf_aux_output_begin(handle, event); } =20 static void etm_event_stop(struct perf_event *event, int mode) { int cpu =3D smp_processor_id(); - unsigned long size; struct coresight_device *source, *sink; struct etm_ctxt *ctxt =3D this_cpu_ptr(&etm_ctxt); struct perf_output_handle *handle =3D &ctxt->handle; @@ -742,45 +762,8 @@ static void etm_event_stop(struct perf_event *event, i= nt mode) /* tell the core */ event->hw.state =3D PERF_HES_STOPPED; =20 - /* - * If the handle is not bound to an event anymore - * (e.g, the sink driver was unable to restart the - * handle due to lack of buffer space), we don't - * have to do anything here. - */ - if (!handle->event) - goto out; - - if (mode & PERF_EF_UPDATE) { - if (WARN_ON_ONCE(handle->event !=3D event)) - goto out; - - /* update trace information */ - if (!sink_ops(sink)->update_buffer) - goto out; + etm_event_update_buffer(handle, event_data, sink, mode); =20 - size =3D sink_ops(sink)->update_buffer(sink, handle, - event_data->snk_config); - /* - * Make sure the handle is still valid as the - * sink could have closed it from an IRQ. - * The sink driver must handle the race with - * update_buffer() and IRQ. Thus either we - * should get a valid handle and valid size - * (which may be 0). - * - * But we should never get a non-zero size with - * an invalid handle. - */ - if (READ_ONCE(handle->event)) - perf_aux_output_end(handle, size); - else - WARN_ON(size); - } else { - perf_aux_output_end(handle, 0); - } - -out: /* Disabling the path make its elements available to other sessions */ coresight_disable_path(path); } --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 80DA74AC158; Tue, 15 Sep 2026 15:49:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487363; cv=none; b=jGPPBXXwTqFs7cnvcK0Xi3D9DPmYD4jRuUFD668xwG/bcxxcI1vSlg92XJnbUh6NOIvi6IWK6FegSaW25qQIC7x3kRDJgla31/Re946fca6IOuFdBjinAlxihWDyKtEie42XuJGJd4f+Mwf6uUOOCi1liS7B5b+uf5+IgsglrEg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487363; c=relaxed/simple; bh=7nL38er/+3j2hefe4RM396+0d0LyX5ets3LkSWVeuic=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rDU5zpbkzVV9QnjoQ2lVjs63wuSrf9gC4CNr1PCLdTxOQ0V8itLcDvM3h6XU4BR+BJfX8NesYlWwVkTYFRnujP/o+xoREenSqURv+UIRokTZ702Bz04w0jPX/A99v/y0EW9F/l16FxSoM1GMi/9YuUK4b5/Au9BfLYkqbNJyW/4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=UlXrf9bG; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="UlXrf9bG" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E93AA15A1; Tue, 15 Sep 2026 08:49:15 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2B6773F882; Tue, 15 Sep 2026 08:49:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487359; bh=7nL38er/+3j2hefe4RM396+0d0LyX5ets3LkSWVeuic=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=UlXrf9bG1nHvsbhlDq2E4hvdQ48e/xgGnPNTqQnkUU4iMAcdyjk5Mt6dgF/xRyREu feRnKvGE6IhJfCvhg0WoKaA+7s9dDK9us7GIGGAyACSnr2WuhftjKjZpH6b/c3Y8u6 i5Th0XLO4bVHaTfCxF4xOxlC4PjanWLQ860IuneQ= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:52 +0100 Subject: [PATCH 06/25] coresight: perf: Simplify flow for CPUs without a path Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-6-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=3816; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=7nL38er/+3j2hefe4RM396+0d0LyX5ets3LkSWVeuic=; b=8hME0Sh1ecVqfaF48gsV60DOyQlz651sF79Du8NnfVGtAoHKy6TX9oE3uLjzBJnEoXJECmOCH AMvYvk+9zeZBU+1uYlbRdJ1DDFFJtH9TmAdvqCUhqWwnBwrNAlCeU0p X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= etm_setup_aux() removes a CPU from the event mask when it cannot build a path from that CPU's ETM to the selected sink. The start nevertheless allocates buffer handle and keeps event data active until the corresponding stop callback. End the newly acquired handle immediately when the current CPU is not in the mask, and do not publish event data in the per-CPU context. The event remains logically active so that a task event can trace after migrating to an eligible CPU. A stop on the unsupported CPU then has no CoreSight modules to disable or trace data to synchronize. Mark its hardware state stopped and up to date. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm-perf.c | 38 +++++++++++---------= ---- 1 file changed, 17 insertions(+), 21 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwt= racing/coresight/coresight-etm-perf.c index 13d865ca86f1161b2e21174f096473c4829afc8c..afd22fd4a851e600ab69fd5b688= 3e6f8518b2cab 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -572,13 +572,15 @@ static void etm_event_start(struct perf_event *event,= int flags) * the sink was specified or hinted to the driver. For * now, simply don't record anything on this ETM. * - * As such we pretend that everything is fine, and let - * it continue without actually tracing. The event could - * continue tracing when it moves to a CPU where it is - * reachable to a sink. + * In that case, leave the event logically active but stop AUX + * output on this CPU. The event could continue tracing when + * it moves to a CPU where it is reachable to a sink. */ - if (!cpumask_test_cpu(cpu, &event_data->mask)) - goto out; + if (!cpumask_test_cpu(cpu, &event_data->mask)) { + perf_aux_output_end(handle, 0); + event->hw.state =3D 0; + return; + } =20 path =3D etm_event_cpu_path(event_data, cpu); path->handle =3D handle; @@ -613,7 +615,6 @@ static void etm_event_start(struct perf_event *event, i= nt flags) perf_report_aux_output_id(event, hw_id); } =20 -out: /* Tell the perf core the event is alive */ event->hw.state =3D 0; /* Save the event_data for this ETM */ @@ -709,7 +710,6 @@ static void etm_event_pause(struct coresight_path *path, =20 static void etm_event_stop(struct perf_event *event, int mode) { - int cpu =3D smp_processor_id(); struct coresight_device *source, *sink; struct etm_ctxt *ctxt =3D this_cpu_ptr(&etm_ctxt); struct perf_output_handle *handle =3D &ctxt->handle; @@ -719,6 +719,15 @@ static void etm_event_stop(struct perf_event *event, i= nt mode) if (mode & PERF_EF_PAUSE) return etm_event_pause(path, event, ctxt); =20 + /* + * With no path enabled, there is no hardware to stop or trace data + * to synchronize. Mark the event stopped and up to date. + */ + if (!path) { + event->hw.state =3D PERF_HES_STOPPED | PERF_HES_UPTODATE; + return; + } + /* * If we still have access to the event_data via handle, * confirm that we haven't messed up the tracking. @@ -738,19 +747,6 @@ static void etm_event_stop(struct perf_event *event, i= nt mode) if (WARN_ON(!event_data)) return; =20 - /* - * Check if this ETM was allowed to trace, as decided at - * etm_setup_aux(). If it wasn't allowed to trace, then - * nothing needs to be torn down other than outputting a - * zero sized record. - */ - if (handle->event && (mode & PERF_EF_UPDATE) && - !cpumask_test_cpu(cpu, &event_data->mask)) { - event->hw.state =3D PERF_HES_STOPPED; - perf_aux_output_end(handle, 0); - return; - } - source =3D coresight_get_source(path); sink =3D coresight_get_sink(path); if (!source || !sink) --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A660C4B3364; Tue, 15 Sep 2026 15:49:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487365; cv=none; b=TRQ/uCYDHGWS+6Tju3xGFUQ9ibOlPCG2Ssrv7Zus6bqI9on1rYBRtteG2QSNgRZOanA5Aodj/8R3wGmodxQyb892F/DCXSaYBL5bac67QDpCrE+cAgVGe9nxR6ZXrvbSRy2rXAuUOU3tlTtagrp0n5p8Hv2WXpTYAKO/mll//wM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487365; c=relaxed/simple; bh=e9fTX9+bNoGVkOFH4Qc5xPv659tjBz3BDwn9aDSMUtw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QGmfVPnAvDXd3FLCZOt9NBIhS/ltyi6V45NYiED5FG56DTjFjS6mkZJ/ZQRLx/GMEtopuVoSHfqdXXVth4KAjZtQrcgvO92WVAPjwCgcGMF4FEg1YNZZVfBUjFCOboQYUWqK4tI5gMGdDbDhqfS0Oeb9TpC5E5OgIyKfFF/Fcy4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=OcpG6wCu; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="OcpG6wCu" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9562E1BF3; Tue, 15 Sep 2026 08:49:18 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CA7D43F882; Tue, 15 Sep 2026 08:49:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487362; bh=e9fTX9+bNoGVkOFH4Qc5xPv659tjBz3BDwn9aDSMUtw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=OcpG6wCuLJZbJyoRHTAmFgIhDIqBD427Ejsgpg1A/PC01RCeX1KEH+dva5tye+j3J XpczWbIXuuBXKCvtgua8QL/HvBW7dc/jbKnvcCvBwFGzRv6EFyx9mbIws9nH9VERl+ tf3l3wEQyP2CYcPmbGHQfJ9BVp6CdEpkblYnp7Vw= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:53 +0100 Subject: [PATCH 07/25] coresight: perf: Validate the live context through its path Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-7-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=2724; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=e9fTX9+bNoGVkOFH4Qc5xPv659tjBz3BDwn9aDSMUtw=; b=lAdf8oZUCVNhZymCOH1NZ4X3CSaEiL4HcJYo0fhzXenTJ7he1VwNMBIwQjGySYJvN/gS0w8Cv cpstf1Hx1ohDR7sa43msEv1h/iZY9/3BfcDYV2SEEmv71gVGkNuVTvL X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= etm_event_get_ctxt_path() returns a path only when the per-CPU context has published event data and that data contains a path for the current CPU. Perf PMU callbacks run on the same CPU in atomic context, and only the normal stop clears the event data. A returned path therefore establishes that the pause and stop callbacks have a live ETM context. The AUX handle has a separate lifetime. It can be absent after an AUX transaction could not be restarted while the CoreSight path still needs to be paused or disabled. The handle is acquired for the callback event before event data is published, and another ETM event cannot replace it while the published context remains live. Thus any active handle belongs to that context, and etm_event_update_buffer() uses perf_get_aux() to determine whether it remains valid. Remove the redundant comparisons of the handle with the event and event data, together with the redundant event_data check. Use the path to validate the ETM context lifetime and perf_get_aux() to validate the AUX handle lifetime. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm-perf.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwt= racing/coresight/coresight-etm-perf.c index afd22fd4a851e600ab69fd5b6883e6f8518b2cab..c7454da5c881c4a8eea5cc77902= c9113c297096e 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -698,9 +698,6 @@ static void etm_event_pause(struct coresight_path *path, if (coresight_is_percpu_sink(sink)) return; =20 - if (WARN_ON_ONCE(handle->event !=3D event)) - return; - event_data =3D READ_ONCE(ctxt->event_data); etm_event_update_buffer(handle, event_data, sink, PERF_EF_UPDATE); =20 @@ -728,14 +725,6 @@ static void etm_event_stop(struct perf_event *event, i= nt mode) return; } =20 - /* - * If we still have access to the event_data via handle, - * confirm that we haven't messed up the tracking. - */ - if (handle->event && - WARN_ON(perf_get_aux(handle) !=3D ctxt->event_data)) - return; - event_data =3D READ_ONCE(ctxt->event_data); /* Clear the event_data as this ETM is stopping the trace. */ WRITE_ONCE(ctxt->event_data, NULL); @@ -743,10 +732,6 @@ static void etm_event_stop(struct perf_event *event, i= nt mode) if (event->hw.state =3D=3D PERF_HES_STOPPED) return; =20 - /* We must have a valid event_data for a running event */ - if (WARN_ON(!event_data)) - return; - source =3D coresight_get_source(path); sink =3D coresight_get_sink(path); if (!source || !sink) --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9B1A54B489D; Tue, 15 Sep 2026 15:49:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487368; cv=none; b=KCEG13O9rqw3MWi4I6T15x39JMuiiByjfX42tggqHiY8nKeO2h3X6l8o6/FXjp1vUqlhZjR6HMDakTd+pKKWGwj25oaz+WjgnWD/1A4jJZMJHn74zj6rQaYPRwRJfceKdjFBqJKXP+1tnXA0u2BdGAXYUr5ihRCmbkQQf15ZYhY= ARC-Message-Signature: i=1; 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Tue, 15 Sep 2026 08:49:21 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 768E73F882; Tue, 15 Sep 2026 08:49:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487364; bh=rhjgu0y5asKDIU5Zxii2LNz8ZubPzlbgrZL/U/eqBEo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=OduQGEJNFa8tyVkY5wFKQp9SAx8Qfw3cARQ5l45VPsp2hmU7PvqLSkxDxYqHM4WoG cSwrs5fcW3UNzwzdrU5euR6ktpIPxAM/s9PHOQZBl3Drbh6OsRz1lY39buhYttDxAU P4YG5BQJzqOspa73JAiuAqy3+FPeRe7InIEsJDTA= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:54 +0100 Subject: [PATCH 08/25] coresight: perf: Validate context before resuming trace Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-8-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=1830; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=rhjgu0y5asKDIU5Zxii2LNz8ZubPzlbgrZL/U/eqBEo=; b=fCuwxc40dlV8yQA2S+XPYdRX5eTJanVhEXDcrqONj0/qW1wFYzGh+WPkluTb9yhSVawIdmIsO MEXwFEPbueCDE7JwXOlx88FVwMQHb+mO4Dw2ie6nkRPTXQKmqQc+7Yd X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= An AUX pause ends the current AUX output before trying to begin a new one. That new beginning can fail, leaving the CoreSight path published after the perf handle has become inactive. AUX resume may also overlap a normal stop which clears the per-CPU context. Pass the per-CPU ETM context to etm_event_resume() and centralize both lifetime checks there. Use perf_get_aux() to confirm that the AUX output handle is active and path to confirm that the context is still live. Resume the source only when both checks succeed. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm-perf.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwt= racing/coresight/coresight-etm-perf.c index c7454da5c881c4a8eea5cc77902c9113c297096e..e3c9d3cf84c502f357a430bc3bf= a854a776618f1 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -517,11 +517,17 @@ static void *etm_setup_aux(struct perf_event *event, = void **pages, goto out; } =20 -static int etm_event_resume(struct coresight_path *path) +static int etm_event_resume(struct etm_ctxt *ctxt) { + struct perf_output_handle *handle =3D &ctxt->handle; struct coresight_device *source; + struct coresight_path *path; int ret; =20 + if (!perf_get_aux(handle)) + return 0; + + path =3D etm_event_get_ctxt_path(ctxt); if (!path) return 0; =20 @@ -547,8 +553,7 @@ static void etm_event_start(struct perf_event *event, i= nt flags) u64 hw_id; =20 if (flags & PERF_EF_RESUME) { - path =3D etm_event_get_ctxt_path(ctxt); - if (etm_event_resume(path) < 0) + if (etm_event_resume(ctxt) < 0) goto fail; return; } --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2DD884B5123; Tue, 15 Sep 2026 15:49:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487371; cv=none; b=Q+aYb7KX8g+XdNZrNv2DFbSGocZCkf594lUo6pOdJ/o173dYtL8KJ/RZDjwfB3qVtND5ju7loqAipprNF5HFYVp4m2idZrzizt40wjYO7lpwVelP8FLEZHpVECHqhDlEcuf/VFPd5RR06Z6tx/6udcSiJ6ZyKKNPjyCfrGVQlvI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487371; c=relaxed/simple; bh=rSmwIpwuvnASQCteerBDAoK6QsAT2ln4DSbDM8NGx7Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=krY8ehz+UJFZR3TFFsyCzRL6Pr2c1StcziaDE4B7n9HN6KD4oLYtma8icslov8So2nYYMIhgpWZA0kWRjWpjQCA0xUfar7+9avJO3h1IYbJLMi09CnuuI4UPs4crYgdYGMwGjrlKeK1HTdOSI2YFBOlqwkWiCi/HaDVbC5brWTk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=u5/U1E4k; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="u5/U1E4k" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E028F15A1; Tue, 15 Sep 2026 08:49:23 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 229A83F882; Tue, 15 Sep 2026 08:49:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487367; bh=rSmwIpwuvnASQCteerBDAoK6QsAT2ln4DSbDM8NGx7Y=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=u5/U1E4kC6AOfMVaxUM1Dh4bG3DO2xy3+8RPwPoZH4EorcEjaCYSbEOFe2EVTuDo8 0DZl+d4vXE9oePpQBr6Sd1ZgfW9VotmwE5s0dHnjf0ST15tZcRiRWJagUJw6RfylQA 8/f/LYek8KOkef2+j/TgCxRHGMyYQs+sRBjSfp44= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:55 +0100 Subject: [PATCH 09/25] coresight: perf: Improve hardware state transitions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-9-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=6635; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=rSmwIpwuvnASQCteerBDAoK6QsAT2ln4DSbDM8NGx7Y=; b=vsdmreUTHLDwTaeZP7/Tk39n2e+TAz6DWM3agImbAdzf58+mzWRlwQ/T0gTHPnn9CQ5F7sot2 HY5nZtwkM/ZDfLIELo/MVzngBKkSmaZRbfojoAwycyRw2nmOCmxr/PA X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Keep hw.state consistent with event activation and AUX buffer updates. Initialize events as stopped and up to date, clear both flags after a successful start, and set UPTODATE after committing an AUX buffer update. On resume, clear UPTODATE only on success. Preserve state on resume failure and ignore duplicate stops. Add helpers for setting and clearing state bits. Use READ_ONCE() and WRITE_ONCE() to prevent compiler merging or refetching of state accesses. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm-perf.c | 58 ++++++++++++++++----= ---- 1 file changed, 40 insertions(+), 18 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwt= racing/coresight/coresight-etm-perf.c index e3c9d3cf84c502f357a430bc3bfa854a776618f1..f66c99b26e1862ab04105704276= c901b21728207 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -150,6 +150,20 @@ etm_event_cpu_path(struct etm_event_data *data, int cp= u) return *etm_event_cpu_path_ptr(data, cpu); } =20 +static inline void etm_event_set_hw_state(struct perf_event *event, int ma= sk) +{ + struct hw_perf_event *hwc =3D &event->hw; + + WRITE_ONCE(hwc->state, READ_ONCE(hwc->state) | mask); +} + +static inline void etm_event_clear_hw_state(struct perf_event *event, int = mask) +{ + struct hw_perf_event *hwc =3D &event->hw; + + WRITE_ONCE(hwc->state, READ_ONCE(hwc->state) & ~mask); +} + static void etm_event_read(struct perf_event *event) {} =20 static int etm_addr_filters_alloc(struct perf_event *event) @@ -520,6 +534,7 @@ static void *etm_setup_aux(struct perf_event *event, vo= id **pages, static int etm_event_resume(struct etm_ctxt *ctxt) { struct perf_output_handle *handle =3D &ctxt->handle; + struct perf_event *event =3D handle->event; struct coresight_device *source; struct coresight_path *path; int ret; @@ -536,10 +551,13 @@ static int etm_event_resume(struct etm_ctxt *ctxt) return 0; =20 ret =3D coresight_resume_source(source); - if (ret < 0) + if (ret < 0) { dev_err(&source->dev, "Failed to resume ETM event.\n"); + return ret; + } =20 - return ret; + etm_event_clear_hw_state(event, PERF_HES_UPTODATE); + return 0; } =20 static void etm_event_start(struct perf_event *event, int flags) @@ -553,8 +571,7 @@ static void etm_event_start(struct perf_event *event, i= nt flags) u64 hw_id; =20 if (flags & PERF_EF_RESUME) { - if (etm_event_resume(ctxt) < 0) - goto fail; + WARN_ON_ONCE(etm_event_resume(ctxt)); return; } =20 @@ -583,7 +600,7 @@ static void etm_event_start(struct perf_event *event, i= nt flags) */ if (!cpumask_test_cpu(cpu, &event_data->mask)) { perf_aux_output_end(handle, 0); - event->hw.state =3D 0; + etm_event_clear_hw_state(event, PERF_HES_STOPPED); return; } =20 @@ -621,7 +638,7 @@ static void etm_event_start(struct perf_event *event, i= nt flags) } =20 /* Tell the perf core the event is alive */ - event->hw.state =3D 0; + etm_event_clear_hw_state(event, PERF_HES_STOPPED | PERF_HES_UPTODATE); /* Save the event_data for this ETM */ WRITE_ONCE(ctxt->event_data, event_data); return; @@ -639,11 +656,12 @@ static void etm_event_start(struct perf_event *event,= int flags) perf_aux_output_end(handle, 0); } fail: - event->hw.state =3D PERF_HES_STOPPED; + etm_event_set_hw_state(event, PERF_HES_STOPPED); return; } =20 -static void etm_event_update_buffer(struct perf_output_handle *handle, +static void etm_event_update_buffer(struct perf_event *event, + struct perf_output_handle *handle, struct etm_event_data *event_data, struct coresight_device *sink, int mode) @@ -668,6 +686,7 @@ static void etm_event_update_buffer(struct perf_output_= handle *handle, size =3D sink_ops(sink)->update_buffer(sink, handle, event_data->snk_config); perf_aux_output_end(handle, size); + etm_event_set_hw_state(event, PERF_HES_UPTODATE); return; } =20 @@ -704,7 +723,8 @@ static void etm_event_pause(struct coresight_path *path, return; =20 event_data =3D READ_ONCE(ctxt->event_data); - etm_event_update_buffer(handle, event_data, sink, PERF_EF_UPDATE); + etm_event_update_buffer(event, handle, event_data, sink, + PERF_EF_UPDATE); =20 /* Prepare the handle for resuming trace */ perf_aux_output_begin(handle, event); @@ -716,8 +736,13 @@ static void etm_event_stop(struct perf_event *event, i= nt mode) struct etm_ctxt *ctxt =3D this_cpu_ptr(&etm_ctxt); struct perf_output_handle *handle =3D &ctxt->handle; struct coresight_path *path =3D etm_event_get_ctxt_path(ctxt); + struct hw_perf_event *hwc =3D &event->hw; struct etm_event_data *event_data; =20 + /* If we're already stopped, then nothing to do */ + if (READ_ONCE(hwc->state) & PERF_HES_STOPPED) + return; + if (mode & PERF_EF_PAUSE) return etm_event_pause(path, event, ctxt); =20 @@ -726,7 +751,7 @@ static void etm_event_stop(struct perf_event *event, in= t mode) * to synchronize. Mark the event stopped and up to date. */ if (!path) { - event->hw.state =3D PERF_HES_STOPPED | PERF_HES_UPTODATE; + etm_event_set_hw_state(event, PERF_HES_STOPPED | PERF_HES_UPTODATE); return; } =20 @@ -734,9 +759,6 @@ static void etm_event_stop(struct perf_event *event, in= t mode) /* Clear the event_data as this ETM is stopping the trace. */ WRITE_ONCE(ctxt->event_data, NULL); =20 - if (event->hw.state =3D=3D PERF_HES_STOPPED) - return; - source =3D coresight_get_source(path); sink =3D coresight_get_sink(path); if (!source || !sink) @@ -746,9 +768,9 @@ static void etm_event_stop(struct perf_event *event, in= t mode) coresight_disable_source(source, event); =20 /* tell the core */ - event->hw.state =3D PERF_HES_STOPPED; + etm_event_set_hw_state(event, PERF_HES_STOPPED); =20 - etm_event_update_buffer(handle, event_data, sink, mode); + etm_event_update_buffer(event, handle, event_data, sink, mode); =20 /* Disabling the path make its elements available to other sessions */ coresight_disable_path(path); @@ -759,12 +781,12 @@ static int etm_event_add(struct perf_event *event, in= t mode) int ret =3D 0; struct hw_perf_event *hwc =3D &event->hw; =20 + etm_event_set_hw_state(event, PERF_HES_STOPPED | PERF_HES_UPTODATE); + if (mode & PERF_EF_START) { etm_event_start(event, 0); - if (hwc->state & PERF_HES_STOPPED) + if (READ_ONCE(hwc->state) & PERF_HES_STOPPED) ret =3D -EINVAL; - } else { - hwc->state =3D PERF_HES_STOPPED; } =20 return ret; --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1EC97396B70; Tue, 15 Sep 2026 15:49:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487373; cv=none; b=PR2YJO0VCOTf1BnJBdr8NkKKnigF8ATldrkrHTHur0HALR1lihoILfk8hnQ5FPqa23SY5y4IxM9na489BjCCCnwwbcA/QZgSI8aiuEPMI0z+wJH5njPUMp1e30YBdVAH7XmjgZFJQNy8KSL+xdUenVDsmj2wHMIPm72SIwyGo+w= ARC-Message-Signature: i=1; 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Tue, 15 Sep 2026 08:49:26 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C2BAD3F882; Tue, 15 Sep 2026 08:49:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487370; bh=AydmBDCGxJoieq4qMCoYXMM5JRa7TDwIw3gGM515xLI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ChgiyNeE2xQD0onL/5oFutj0JGE3PYEkM4/YTnJoJwh4MYSRTfGG/fvyRDvzxHRmM 73uqGT5hvFRPPwYoU1EpC7qfRiCEbzXH8QwNYVN6tLx89J8hEZTvl5y8JbYo2uqxaV 4NktOchFCenfKns0ljWbexDM16ZyThJ10tMxs2DU= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:56 +0100 Subject: [PATCH 10/25] coresight: trbe: Pad snapshot buffers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-10-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=2612; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=AydmBDCGxJoieq4qMCoYXMM5JRa7TDwIw3gGM515xLI=; b=bd4sFk+qXNO9HuRRhhh3F+uLaoxL8tn7YVQjLkFsE6GIeJ7NwBuxuMIRYAIx4ZvuAiPAk1bip 6i8LIzRyHHMA8GEVzvqeMnmAN1Ge4EYpG1tqKv8++0vekOc6OW54RR7 X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Snapshot buffers use the head as the write pointer without checking its alignment or the space remaining before the limit. After a stop or a move to another CPU, the head can be misaligned for the current TRBE. It can also leave too little space for the Fill mode out-of-range workaround. Pad the head to the current CPU's alignment. If the remaining buffer cannot hold the minimum trace region, pad to the end of buffer. Update the head for setting next write pointer. Fixes: 3fbf7f011f24 ("coresight: sink: Add TRBE driver") Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-trbe.c | 36 ++++++++++++++++++------= ---- 1 file changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtraci= ng/coresight/coresight-trbe.c index c7cbca45f2debd4047b93283ea9fe5dd9e1f2ebf..a31f2ebc327cd681344a62de28c= 0b3840505a9cb 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -374,18 +374,6 @@ static void trbe_pad_buf(struct perf_output_handle *ha= ndle, int len) perf_aux_output_skip(handle, len); } =20 -static unsigned long trbe_snapshot_offset(struct perf_output_handle *handl= e) -{ - struct trbe_buf *buf =3D etm_perf_sink_config(handle); - - /* - * The ETE trace has alignment synchronization packets allowing - * the decoder to reset in case of an overflow or corruption. - * So we can use the entire buffer for the snapshot mode. - */ - return buf->nr_pages * PAGE_SIZE; -} - static u64 trbe_min_trace_buf_size(struct perf_output_handle *handle) { u64 size =3D TRBE_TRACE_MIN_BUF_SIZE; @@ -405,6 +393,30 @@ static u64 trbe_min_trace_buf_size(struct perf_output_= handle *handle) return size; } =20 +static unsigned long trbe_snapshot_offset(struct perf_output_handle *handl= e) +{ + struct trbe_buf *buf =3D etm_perf_sink_config(handle); + struct trbe_cpudata *cpudata =3D buf->cpudata; + u64 buf_size =3D (u64)buf->nr_pages << PAGE_SHIFT; + u64 head =3D PERF_IDX2OFF(handle->head, buf); + u64 next =3D round_up(head, cpudata->trbe_align); + + /* + * A task event may migrate to a CPU with a different alignment or + * errata. Make sure it has enough space, pad up to the alignment + * required by the current TRBE. + */ + if (buf_size - next < trbe_min_trace_buf_size(handle)) + next =3D buf_size; + + if (next !=3D head) { + __trbe_pad_buf(buf, head, next - head); + handle->head +=3D next - head; + } + + return buf_size; +} + /* * TRBE Limit Calculation * --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3F8874BA1D9; Tue, 15 Sep 2026 15:49:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487375; cv=none; b=BjdHvLLE6i/z3F5uSsiXFENsY8pp3qWcRKD1w6+fIfwby822dxM1cskSv06blZST+ICS2a6PC/dWh0FEt/OfTMvfqruXPEvNbbfUUIctMb9q2aIuJnMtkyEsDplAru6l4Cqn8OUw4f5pQUgRUxG8Y5VVvxkm9M0pmrMFp6XXZ5s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487375; c=relaxed/simple; bh=02XRQdNwi/IGyKd7CRNCUbJzgLtRFPbMVPvVQ+wGuSU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DLg11mdw2xwltYsmV5vV1U6Y6VGMYkPlB1Z0s4uNE4HO2pZmMcMoB5x85vJKiZ0l9UUZ20MA6WbimkGiejMPCO1Qyxj/fMmSSIaZZjkZD4c77WnfLH3u6oy0rjlaef7QerRMcXiLZMdqE7LYOL6X3v/TbFdfQJ3mNr2tXGe7XhI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=ITgQMlk7; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="ITgQMlk7" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 347E115A1; Tue, 15 Sep 2026 08:49:29 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6DD113F882; Tue, 15 Sep 2026 08:49:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487372; bh=02XRQdNwi/IGyKd7CRNCUbJzgLtRFPbMVPvVQ+wGuSU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ITgQMlk7KScRhJvAsV94GJ3Q/FcOEOg0nxH1PyBFkLA1PlkvgXyZuP9e1K4i9cn6J gq6VcE/FF7rHXGaLtT5aYfCJC4Y4fbROkSHgEhRKy5WNAMlVVrWselp5Sf+fjhpK6N P2Hk7ZCIZeo7SNS/fSmvHJJLBpzITT/+OH51l91Y= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:57 +0100 Subject: [PATCH 11/25] coresight: trbe: Use circular buffer mode for snapshots Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-11-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=6164; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=02XRQdNwi/IGyKd7CRNCUbJzgLtRFPbMVPvVQ+wGuSU=; b=vDRlFc0M1ouvf1Jy/YdiGbtMpi7/VnoZFyVq4lqtEPl3G7unJkBzaLtZy5OAF5HbmS4gy/cCN cmmnFBu3nmjBR5lxKTUoj+/fJ+FcZdw9RNJkGjBYOsfamkgKYHq8POj X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= TRBE uses Fill mode for snapshots, stopping trace collection and raising a maintenance interrupt at each wrap. Circular buffer mode retains the most recent trace without stopping collection or generating wrap interrupts. Use circular buffer mode for snapshots unless the CPU requires the write out-of-range workaround. Keep Fill mode and its guard page on affected CPUs. Select the mode on each enable to handle task migration. Calculate the minimum known trace advance from the write pointer and the WRAP flag, since additional complete laps cannot be counted. Advance the AUX head by this amount, then clamp the reported size to one buffer of retained trace. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-trbe.c | 61 +++++++++++++++++++++---= ---- 1 file changed, 47 insertions(+), 14 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtraci= ng/coresight/coresight-trbe.c index a31f2ebc327cd681344a62de28c0b3840505a9cb..ab3c5c7d27f3d272b07eade1e64= 52559808b196c 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -69,6 +69,7 @@ struct trbe_buf { int nr_pages; void **pages; bool snapshot; + bool circular; struct trbe_cpudata *cpudata; }; =20 @@ -324,9 +325,11 @@ static void trbe_stop_and_truncate_event(struct perf_o= utput_handle *handle) * When the write pointer reaches the address just before the limit pointe= r, it gets * wrapped around again to the base pointer. This is called a TRBE wrap ev= ent, which * generates a maintenance interrupt when operated in WRAP or FILL mode. T= his driver - * uses FILL mode, where the TRBE stops the trace collection at wrap event= . The IRQ - * handler updates the AUX buffer and re-enables the TRBE with updated WRI= TE and - * LIMIT pointers. + * uses FILL mode for non-overwrite buffers, where the TRBE stops trace co= llection + * at a wrap event. The IRQ handler updates the AUX buffer and re-enables = the TRBE + * with updated WRITE and LIMIT pointers. Snapshot buffers use Circular Bu= ffer + * mode where possible, overwriting old trace without stopping or interrup= ting + * the CPU when the write pointer wraps. * * Wrap around with an IRQ * ------ < ------ < ------- < ----- < ----- @@ -628,6 +631,7 @@ static void set_trbe_limit_pointer_enabled(struct trbe_= buf *buf) { u64 trblimitr =3D read_sysreg_s(SYS_TRBLIMITR_EL1); unsigned long addr =3D buf->trbe_limit; + u64 mode =3D buf->circular ? TRBLIMITR_EL1_FM_CBUF : TRBLIMITR_EL1_FM_FIL= L; =20 WARN_ON(!IS_ALIGNED(addr, (1UL << TRBLIMITR_EL1_LIMIT_SHIFT))); WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); @@ -638,15 +642,11 @@ static void set_trbe_limit_pointer_enabled(struct trb= e_buf *buf) trblimitr &=3D ~TRBLIMITR_EL1_LIMIT_MASK; =20 /* - * Fill trace buffer mode is used here while configuring the - * TRBE for trace capture. In this particular mode, the trace - * collection is stopped and a maintenance interrupt is raised - * when the current write pointer wraps. This pause in trace - * collection gives the software an opportunity to capture the - * trace data in the interrupt handler, before reconfiguring - * the TRBE. + * Circular mode keeps the most recent trace in a snapshot buffer + * without generating wrap interrupts. Use Fill mode otherwise so + * the IRQ handler can collect the trace before it is overwritten. */ - trblimitr |=3D (TRBLIMITR_EL1_FM_FILL << TRBLIMITR_EL1_FM_SHIFT) & + trblimitr |=3D (mode << TRBLIMITR_EL1_FM_SHIFT) & TRBLIMITR_EL1_FM_MASK; =20 /* @@ -757,6 +757,26 @@ static unsigned long trbe_get_trace_size(struct perf_o= utput_handle *handle, return size; } =20 +static unsigned long trbe_get_circular_size(struct perf_output_handle *han= dle, + struct trbe_buf *buf, u64 status) +{ + u64 start =3D PERF_IDX2OFF(handle->head, buf); + u64 write =3D get_trbe_write_pointer() - buf->trbe_base; + + /* + * WRAP indicates at least one crossing of the limit. Any additional + * full laps cannot be determined, so account only for the trace + * known to have been collected. This also preserves the write offset + * when updating the head. + */ + if (is_trbe_wrap(status)) + write +=3D (u64)buf->nr_pages << PAGE_SHIFT; + else if (WARN_ON_ONCE(write < start)) + return 0; + + return write - start; +} + static void *arm_trbe_alloc_buffer(struct coresight_device *csdev, struct perf_event *event, void **pages, int nr_pages, bool snapshot) @@ -887,14 +907,19 @@ static unsigned long arm_trbe_update_buffer(struct co= resight_device *csdev, wrap =3D true; } =20 - size =3D trbe_get_trace_size(handle, buf, wrap); + if (buf->circular) + size =3D trbe_get_circular_size(handle, buf, status); + else + size =3D trbe_get_trace_size(handle, buf, wrap); =20 done: local_irq_restore(flags); =20 if (buf->snapshot) handle->head +=3D size; - return size; + + /* At most one full buffer of trace is available */ + return min(size, (unsigned long)buf->nr_pages << PAGE_SHIFT); } =20 =20 @@ -973,7 +998,8 @@ static int trbe_apply_work_around_before_enable(struct = trbe_buf *buf) * - At trace collection: * - Pad the 256bytes skipped above again with IGNORE packets. */ - if (trbe_has_erratum(buf->cpudata, TRBE_WORKAROUND_OVERWRITE_FILL_MODE)) { + if (!buf->circular && + trbe_has_erratum(buf->cpudata, TRBE_WORKAROUND_OVERWRITE_FILL_MODE)) { if (WARN_ON(!IS_ALIGNED(buf->trbe_write, PAGE_SIZE))) return -EINVAL; buf->trbe_hw_base =3D buf->trbe_write; @@ -1056,6 +1082,13 @@ static int arm_trbe_enable(struct coresight_device *= csdev, enum cs_mode mode, cpudata->mode =3D mode; buf->cpudata =3D cpudata; =20 + /* + * A CPU affected by the write out-of-range erratum cannot use circular + * mode, as the TRBE continues tracing after wrapping and may write out + * of range. Fall back to FILL mode so the IRQ handler can fix this up. + */ + buf->circular =3D buf->snapshot && !trbe_may_write_out_of_range(cpudata); + return __arm_trbe_enable(buf, handle); } =20 --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DF37C4BA9FB; Tue, 15 Sep 2026 15:49:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487378; cv=none; b=TQ0bTa4jld79Q5UtEKbGKMQZTTy6YWUP0rGSQb0Lj+klxmZgjkCa60ZCsMUMCQasG7i7xAnbi6EEGD/VynKUl9L9b3tDxqiauN6XOXnwM/zJUAn30uKmCnYKzoWuMzV7ojbqLQ9bPBhDlzRHUpxfqDLt/sP+/sOrmPIR+bpUgWA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487378; c=relaxed/simple; bh=qzq9lLjuTS6Prgx1lZHT+cj9d8Nv+QaG1PQFXY2Natw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Gy92nMWC4I2cAYoY+zfU9KP0zWtJ26hoGgChWfOo6UQPAeNA9sIxQSJDJWZ6inX/XLtwg+CIY6muoK78kpocWMPQNMzVOl8zG2N9/fhosXujy/+AEdyYSo5i3a+zP4yPKKDz5EShLQgO919wU97JfLsOLC5khVW9fxlDpUzhFao= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=svDIG3eL; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="svDIG3eL" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D5BCE1570; Tue, 15 Sep 2026 08:49:31 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 188F23F882; Tue, 15 Sep 2026 08:49:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487375; bh=qzq9lLjuTS6Prgx1lZHT+cj9d8Nv+QaG1PQFXY2Natw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=svDIG3eLlH+MZGJ+ZjDsOxy/H8oVslMgdwyK82uskiJ5KuLb1GTfGSXOn8ZYcHhGe ScDk1CIVt4a6T3OBuLuvkIAnzeU9Z55PFTl5QpQUr7GrGahv41vnGMYM1It3wQWtDF 6H5txtSipDRrpnzRRNIYkm4adKXtgTuKtVI+PQTY= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:58 +0100 Subject: [PATCH 12/25] coresight: trbe: Track per-CPU sink interrupt handling Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-12-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=2982; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=qzq9lLjuTS6Prgx1lZHT+cj9d8Nv+QaG1PQFXY2Natw=; b=fV8kseG8x7mChJYniDqWNzR+udx1uwnsiclVN65ydu6ywIwAZZNBBmUmJu3DUASq7TPBcvFRm bGQeigFplLKDgtd2BTCeBTA0msPVOIhTk5BorL9AYtHGp1YXyjL9XY8 X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= A sampling NMI can interrupt TRBE while it is using the active AUX handle or buffer. Circular buffer mode avoids wrap interrupts but can still generate fault interrupts. Add an in_interrupt flag to per-CPU sinks and set it around the TRBE IRQ handler. Compiler barriers keep AUX buffer accesses between the flag updates. This lets NMI callbacks detect when they have interrupted sink handling before modifying its state. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-trbe.c | 17 ++++++++++++++++- include/linux/coresight.h | 2 ++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtraci= ng/coresight/coresight-trbe.c index ab3c5c7d27f3d272b07eade1e6452559808b196c..8eb625d3fc99db57a18e35ef59e= f814dacf20a09 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -1185,7 +1185,7 @@ static u64 cpu_prohibit_trace(void) return trfcr; } =20 -static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) +static irqreturn_t __arm_trbe_irq_handler(int irq, void *dev) { struct perf_output_handle **handle_ptr =3D dev; struct perf_output_handle *handle =3D *handle_ptr; @@ -1249,6 +1249,21 @@ static irqreturn_t arm_trbe_irq_handler(int irq, voi= d *dev) return IRQ_HANDLED; } =20 +static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) +{ + struct coresight_device *csdev =3D coresight_get_percpu_sink(smp_processo= r_id()); + irqreturn_t ret; + + /* Circular Buffer mode can still interrupt on a fault. */ + WRITE_ONCE(csdev->in_interrupt, true); + barrier(); + ret =3D __arm_trbe_irq_handler(irq, dev); + barrier(); + WRITE_ONCE(csdev->in_interrupt, false); + + return ret; +} + static int arm_trbe_save(struct coresight_device *csdev) { struct trbe_cpudata *cpudata =3D dev_get_drvdata(&csdev->dev); diff --git a/include/linux/coresight.h b/include/linux/coresight.h index ddf18c970e343041787424c2019f2b5dd49154c2..8830c30be0df53a22525ef4fc3c= 7e41a0ec6fd90 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -275,6 +275,7 @@ struct coresight_trace_id_map { * when a source has been selected and a path is enabled from * source to that sink. A sink can also become enabled but not * activated if it's used via Perf. + * @in_interrupt: Per-CPU sink interrupt handler is running. * @ea: Device attribute for sink representation under PMU directory. * @def_sink: cached reference to default sink found for this device. * @nr_links: number of sysfs links created to other components from this @@ -299,6 +300,7 @@ struct coresight_device { bool orphan; /* sink specific fields */ bool sysfs_sink_activated; + bool in_interrupt; struct dev_ext_attribute *ea; struct coresight_device *def_sink; struct coresight_trace_id_map perf_sink_id_map; --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D74964BB5D4; Tue, 15 Sep 2026 15:49:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487380; cv=none; b=NKbjpsFehdoTLvnfe6cEQUrl8xBYeycoISqVQXo+ACwBj2YdFLkvc5OO23UYLUFim2C5aTctzO5h0NKtPoxp+58yey+4IGPTAqm5ZhObfpjNUOWKBCJ1ubEST48ICTuQc22lMSTUVtQffZLFtslkxUzZ/ikVEhwjwnxUI0/+q94= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487380; c=relaxed/simple; bh=goYiVNAh7k6LrTB80GAwHLKvpuHR7WeoPkl/mqvmd2I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ew7IKT2nMjzI2sPQvx9grhlALat32f0CXo+sQt98/CapwjVt3fB9Bky5iExibQHlv7PaW1Sv9OBKpZ18IqaXyEHm5DNKsc+Ad0vYGob9nKh6r2DQR1XO/txmeDCjvpEpqRs2f5BdLcrZ0t2EDSX/NNKpHA3jXIXh/glvIKk7xeg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=VDu+61na; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="VDu+61na" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 813841D70; Tue, 15 Sep 2026 08:49:34 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B80203F882; Tue, 15 Sep 2026 08:49:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487378; bh=goYiVNAh7k6LrTB80GAwHLKvpuHR7WeoPkl/mqvmd2I=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=VDu+61nacaNq62c+Y4fyqJUKJh0gegijVuObVTnfmfQcF7eQGvM6tpV/52nb8UUpi ATAWZFQfTn4LYJlaohsrQzEzkAehS1YaKMmdKqv2fcQbPmUOKH18QuHjdAxZyBYknp s2GQ5gKXdM1YxWd/z3F5Yb3eKO2jJPNLuhPhaYug= From: Leo Yan Date: Tue, 15 Sep 2026 16:48:59 +0100 Subject: [PATCH 13/25] coresight: trbe: Handle an already disabled sink Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-13-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=1564; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=goYiVNAh7k6LrTB80GAwHLKvpuHR7WeoPkl/mqvmd2I=; b=1WIYqNYiThALBMj8kG5F4TrNuDDUl31UG37XqvGx0yGPWo0Z05JjSFFwCnQfQd+VJeYGU9hDV u623GE8RbunDL+u+YzcnNxXZyS96GY9YwNxS7cwu7g+Ga1JkzGy7oTB X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= arm_trbe_disable() detaches the trace buffer and clears cpudata->buf. A subsequent disable dereferences this NULL pointer in the buffer consistency check before testing whether the sink is still in perf mode. Check the mode before accessing the buffer and return success when the sink is already disabled. This allows deferred event cleanup to revisit a path that an AUX snapshot has already disabled after a failure. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-trbe.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtraci= ng/coresight/coresight-trbe.c index 8eb625d3fc99db57a18e35ef59ef814dacf20a09..6da89a890712d32e87a15f7c564= ff4dc4d197bb1 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -1098,11 +1098,15 @@ static int arm_trbe_disable(struct coresight_device= *csdev) struct trbe_cpudata *cpudata =3D dev_get_drvdata(&csdev->dev); struct trbe_buf *buf =3D cpudata->buf; =20 + /* A failed AUX snapshot may have already disabled the sink. */ + if (cpudata->mode =3D=3D CS_MODE_DISABLED) + return 0; + if (cpudata->mode !=3D CS_MODE_PERF) + return -EINVAL; + WARN_ON(buf->cpudata !=3D cpudata); WARN_ON(cpudata->cpu !=3D smp_processor_id()); WARN_ON(cpudata->drvdata !=3D drvdata); - if (cpudata->mode !=3D CS_MODE_PERF) - return -EINVAL; =20 trbe_drain_and_disable_local(cpudata); buf->cpudata =3D NULL; --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 806FC4BD0FD; Tue, 15 Sep 2026 15:49:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487383; cv=none; b=bZSQUPfCXpPnSugt6ox9R+wIesQOl7SW+D8PDEMEwRHYJazoE1nBqWlYskS68gx3AUFP9ufizJ+fvMojOXTEfGgmHNcp6tyjdAaGzhx0jSDn7/JxfZx5WcR3dmbUJ1XaodhfK1Xly5SjCTvwSwuV7YI00Y2OfWKB+SWvD0/KgNA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487383; c=relaxed/simple; bh=ZLhP9+hk4aabaXSGT54lI6NuOvSPZUJCkdIwDLOtAu4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=d0hFTr+ahiZOtl5rkqpU7S6K+bzcfoQI7wRcBNiwid6/XFb+N1mtI5prulLBnPqiE3nDyyKYrzdbMKSraifrqqi32goCYmWoTciZ4u9/cMLYMMg5b3qbvBgHqfBhrX1pu1ImZxMZy+FStdXs41R5io9aNb1bR7Q8W0uLSYXxswQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=BdAXaQPh; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="BdAXaQPh" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2E9DF1570; Tue, 15 Sep 2026 08:49:37 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 640363F882; Tue, 15 Sep 2026 08:49:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487380; bh=ZLhP9+hk4aabaXSGT54lI6NuOvSPZUJCkdIwDLOtAu4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=BdAXaQPhr83OQa7dCtrINo7V0Ik022DcCN3ePCCAPmH0rPYM2/ka84ZuMHgCI0Nj7 79/IvJE6eiWpBtG7rAU3MfDfD2yRisiHh3S6xevjvez5+zw3oui0mqnqIhhWqQNkcs pzR8eFyE9xwoyT+/G2Kry12YSH7rPk0hUdw1k5mQ= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:00 +0100 Subject: [PATCH 14/25] coresight: perf: Look up the trace path in etm_event_pause() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-14-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=2117; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=ZLhP9+hk4aabaXSGT54lI6NuOvSPZUJCkdIwDLOtAu4=; b=xElk10YnXyUhppvLhUxoiFU+LW5Fv+8kQIwvgFAKzhUuLDJByQtapb0TsuCyCt6DtEpgYaPHC SD9k9LTKFx+B2aE3gtHt8F8WAVaE/zrwGnWOwU4xe+wyxQRCPwyqehr X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Have etm_event_pause() retrieve the active path from the event context instead of passing the path from etm_event_stop(). Move the stop path lookup after the pause dispatch so each operation resolves its own path. This prepares etm_event_stop() to coordinate hardware access before looking up the active context. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm-perf.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwt= racing/coresight/coresight-etm-perf.c index f66c99b26e1862ab04105704276c901b21728207..8f803914e9abfb18e080ff68371= ad8b32042f180 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -694,10 +694,10 @@ static void etm_event_update_buffer(struct perf_event= *event, perf_aux_output_end(handle, 0); } =20 -static void etm_event_pause(struct coresight_path *path, - struct perf_event *event, +static void etm_event_pause(struct perf_event *event, struct etm_ctxt *ctxt) { + struct coresight_path *path =3D etm_event_get_ctxt_path(ctxt); struct perf_output_handle *handle =3D &ctxt->handle; struct coresight_device *source, *sink; struct etm_event_data *event_data; @@ -735,7 +735,7 @@ static void etm_event_stop(struct perf_event *event, in= t mode) struct coresight_device *source, *sink; struct etm_ctxt *ctxt =3D this_cpu_ptr(&etm_ctxt); struct perf_output_handle *handle =3D &ctxt->handle; - struct coresight_path *path =3D etm_event_get_ctxt_path(ctxt); + struct coresight_path *path; struct hw_perf_event *hwc =3D &event->hw; struct etm_event_data *event_data; =20 @@ -744,7 +744,9 @@ static void etm_event_stop(struct perf_event *event, in= t mode) return; =20 if (mode & PERF_EF_PAUSE) - return etm_event_pause(path, event, ctxt); + return etm_event_pause(event, ctxt); + + path =3D etm_event_get_ctxt_path(ctxt); =20 /* * With no path enabled, there is no hardware to stop or trace data --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5E8524B127B; Tue, 15 Sep 2026 15:49:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487387; cv=none; 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spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="NPKnQfww" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D91EA15A1; Tue, 15 Sep 2026 08:49:39 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 101303F882; Tue, 15 Sep 2026 08:49:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487383; bh=5dh0uFLLLCouP6+OkfA97GnOOv7HsvkRRHLYhRReAf8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=NPKnQfwwyvGRJkLdxdOuc4DOxZn0cS2zl3Sh37gf6CPZnWQVn7czhkpqTqTfXIIhU JB69zI4H+zsQf4n/MUf8QXe97FeYiUEKeIhccYslYxwQU7bNrv2YPlL6KVTqMJvFcz HZltalMaNQCuhZf4jlVtVXZe8eglNsAlvLmM/sKQ= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:01 +0100 Subject: [PATCH 15/25] coresight: perf: Serialize AUX pause and resume with event stops Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-15-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=7280; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=5dh0uFLLLCouP6+OkfA97GnOOv7HsvkRRHLYhRReAf8=; b=J1K+IWYMMLhzPcADLZNzQcjitD4TM/hnwUjyZeGWvamWNJUNExstCLAeZGNbjXw+P25hWod0G tcZpp4WVbX/BxhjEK9GOI09oVf8Z0ykXyeXAaZvljMidgM4vmEkRub3 X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= A PMU NMI can throttle a group during an AUX pause or resume, stopping its CoreSight event before the callback finishes. The callback can then restart tracing or reopen an AUX output handle after teardown. Use per-CPU atomic STOP and AUX bits to serialize these callbacks. Reject AUX operations while a stop is pending and defer stops until an active AUX operation finishes. Complete deferred stops through etm_event_stop() and set PERF_HES_STOPPED only after disabling the source and path. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm-perf.c | 104 ++++++++++++++++++-= ---- 1 file changed, 84 insertions(+), 20 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwt= racing/coresight/coresight-etm-perf.c index 8f803914e9abfb18e080ff68371ad8b32042f180..8020a4d8af18bb669441824cfdb= 687f4fa299eb4 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -4,6 +4,7 @@ * Author: Mathieu Poirier */ =20 +#include #include #include #include @@ -26,6 +27,9 @@ #include "coresight-syscfg.h" #include "coresight-trace-id.h" =20 +#define ETM_PERF_ACT_STOP BIT(0) +#define ETM_PERF_ACT_AUX BIT(1) + static struct pmu etm_pmu; static bool etm_perf_up; =20 @@ -46,6 +50,7 @@ static bool etm_perf_up; struct etm_ctxt { struct perf_output_handle handle; struct etm_event_data *event_data; + atomic_t action; }; =20 static DEFINE_PER_CPU(struct etm_ctxt, etm_ctxt); @@ -531,33 +536,69 @@ static void *etm_setup_aux(struct perf_event *event, = void **pages, goto out; } =20 -static int etm_event_resume(struct etm_ctxt *ctxt) +static void etm_event_stop(struct perf_event *event, int mode); + +static bool etm_event_aux_begin(struct perf_event *event, struct etm_ctxt = *ctxt) +{ + int action; + + /* Claim exclusive access for the AUX operation */ + action =3D atomic_fetch_or(ETM_PERF_ACT_AUX, &ctxt->action); + if (action & ETM_PERF_ACT_AUX) + return false; + + /* Leave an existing stop to finish its own work */ + if ((action & ETM_PERF_ACT_STOP) || + (READ_ONCE(event->hw.state) & PERF_HES_STOPPED)) { + atomic_fetch_andnot(ETM_PERF_ACT_AUX, &ctxt->action); + return false; + } + + return true; +} + +static void etm_event_aux_end(struct perf_event *event, struct etm_ctxt *c= txt) +{ + int action; + + /* Complete any stop deferred while the AUX operation was active */ + action =3D atomic_fetch_andnot(ETM_PERF_ACT_AUX, &ctxt->action); + if (action & ETM_PERF_ACT_STOP) + etm_event_stop(event, PERF_EF_UPDATE); +} + +static int etm_event_resume(struct perf_event *event, struct etm_ctxt *ctx= t) { struct perf_output_handle *handle =3D &ctxt->handle; - struct perf_event *event =3D handle->event; struct coresight_device *source; struct coresight_path *path; - int ret; + int ret =3D 0; =20 - if (!perf_get_aux(handle)) + if (!etm_event_aux_begin(event, ctxt)) return 0; =20 + if (!perf_get_aux(handle)) + goto out; + path =3D etm_event_get_ctxt_path(ctxt); if (!path) - return 0; + goto out; =20 source =3D coresight_get_source(path); if (!source) - return 0; + goto out; =20 ret =3D coresight_resume_source(source); if (ret < 0) { dev_err(&source->dev, "Failed to resume ETM event.\n"); - return ret; + goto out; } =20 etm_event_clear_hw_state(event, PERF_HES_UPTODATE); - return 0; + +out: + etm_event_aux_end(event, ctxt); + return ret; } =20 static void etm_event_start(struct perf_event *event, int flags) @@ -571,7 +612,7 @@ static void etm_event_start(struct perf_event *event, i= nt flags) u64 hw_id; =20 if (flags & PERF_EF_RESUME) { - WARN_ON_ONCE(etm_event_resume(ctxt)); + WARN_ON_ONCE(etm_event_resume(event, ctxt)); return; } =20 @@ -697,18 +738,22 @@ static void etm_event_update_buffer(struct perf_event= *event, static void etm_event_pause(struct perf_event *event, struct etm_ctxt *ctxt) { - struct coresight_path *path =3D etm_event_get_ctxt_path(ctxt); + struct coresight_path *path; struct perf_output_handle *handle =3D &ctxt->handle; struct coresight_device *source, *sink; struct etm_event_data *event_data; =20 - if (!path) + if (!etm_event_aux_begin(event, ctxt)) return; =20 + path =3D etm_event_get_ctxt_path(ctxt); + if (!path) + goto out; + source =3D coresight_get_source(path); sink =3D coresight_get_sink(path); if (WARN_ON_ONCE(!source || !sink)) - return; + goto out; =20 /* Stop tracer */ coresight_pause_source(source); @@ -720,7 +765,7 @@ static void etm_event_pause(struct perf_event *event, * disallows updating buffer for the per CPU sink case. */ if (coresight_is_percpu_sink(sink)) - return; + goto out; =20 event_data =3D READ_ONCE(ctxt->event_data); etm_event_update_buffer(event, handle, event_data, sink, @@ -728,6 +773,9 @@ static void etm_event_pause(struct perf_event *event, =20 /* Prepare the handle for resuming trace */ perf_aux_output_begin(handle, event); + +out: + etm_event_aux_end(event, ctxt); } =20 static void etm_event_stop(struct perf_event *event, int mode) @@ -738,13 +786,28 @@ static void etm_event_stop(struct perf_event *event, = int mode) struct coresight_path *path; struct hw_perf_event *hwc =3D &event->hw; struct etm_event_data *event_data; + int action; + + if (mode & PERF_EF_PAUSE) { + etm_event_pause(event, ctxt); + return; + } =20 /* If we're already stopped, then nothing to do */ if (READ_ONCE(hwc->state) & PERF_HES_STOPPED) return; =20 - if (mode & PERF_EF_PAUSE) - return etm_event_pause(event, ctxt); + /* Leave STOP pending until the AUX operation releases its action bit */ + action =3D atomic_fetch_or(ETM_PERF_ACT_STOP, &ctxt->action); + if (action & ETM_PERF_ACT_AUX) + return; + + /* + * A repeated throttling stop must not interrupt an active teardown. + * PERF_EF_UPDATE lets the AUX callback complete a deferred stop. + */ + if ((action & ETM_PERF_ACT_STOP) && !(mode & PERF_EF_UPDATE)) + return; =20 path =3D etm_event_get_ctxt_path(ctxt); =20 @@ -754,7 +817,7 @@ static void etm_event_stop(struct perf_event *event, in= t mode) */ if (!path) { etm_event_set_hw_state(event, PERF_HES_STOPPED | PERF_HES_UPTODATE); - return; + goto out; } =20 event_data =3D READ_ONCE(ctxt->event_data); @@ -764,18 +827,19 @@ static void etm_event_stop(struct perf_event *event, = int mode) source =3D coresight_get_source(path); sink =3D coresight_get_sink(path); if (!source || !sink) - return; + goto out; =20 /* stop tracer */ coresight_disable_source(source, event); =20 - /* tell the core */ - etm_event_set_hw_state(event, PERF_HES_STOPPED); - etm_event_update_buffer(event, handle, event_data, sink, mode); =20 /* Disabling the path make its elements available to other sessions */ coresight_disable_path(path); + etm_event_set_hw_state(event, PERF_HES_STOPPED); + +out: + atomic_fetch_andnot(ETM_PERF_ACT_STOP, &ctxt->action); } =20 static int etm_event_add(struct perf_event *event, int mode) --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BF8EE4BD7AB; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-16-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=6175; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=ZKZYRDVVp0NsuoaDwzVZFXX6CxcoXZSRDbOKmH0PKD4=; b=iltpZVgZYT6qQh4lQMWIjomzyc/itbmeHADGpKU7IqxBZK0WaS13MZ6fvnf+EzbjvRpzgHECk eZ1aE9vgzu7DUjEKSmzoJmgvXW3faUT2Fp4iiGfiothiipmLAVeqNCL X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Add snapshot_aux() for per-CPU sinks with overwrite buffers. Shared sinks can mix trace from multiple CPUs, making them unsuitable for context-based profiling. Pad missing trace with leading zeros, or zero-fill the requested AUX payload when a snapshot is unavailable. This ensures that the decoder can safely discard the zero-filled trace data. Reuse the AUX action guard to defer concurrent stops until the snapshot finishes. Skip snapshots during sink interrupt handling. On copy or restart failure, mark the AUX output truncated so perf core disables the event. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm-perf.c | 123 +++++++++++++++++++= ++++ drivers/hwtracing/coresight/coresight-etm-perf.h | 2 + 2 files changed, 125 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwt= racing/coresight/coresight-etm-perf.c index 8020a4d8af18bb669441824cfdb687f4fa299eb4..5e90ed49562c117879780f57307= 2e6b522d9d048 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -456,6 +456,7 @@ static void *etm_setup_aux(struct perf_event *event, vo= id **pages, if (!event_data) return NULL; INIT_WORK(&event_data->work, free_event_data); + event_data->overwrite =3D overwrite; =20 /* First get the selected sink from user space. */ sink_hash =3D ATTR_CFG_GET_FLD(&event->attr, sinkid); @@ -863,6 +864,127 @@ static void etm_event_del(struct perf_event *event, i= nt mode) etm_event_stop(event, PERF_EF_UPDATE); } =20 +/* A zero trace size pads the sample without accessing the AUX handle. */ +static long etm_event_snapshot_aux_copy_data(struct perf_output_handle *au= x_handle, + struct perf_output_handle *handle, + unsigned long trace_size, + unsigned long size) +{ + unsigned long pad; + long ret; + + trace_size =3D min(size, trace_size); + + /* Pad the front with zeros to keep the latest trace data at the end */ + pad =3D size - trace_size; + while (pad) { + unsigned long chunk =3D min(pad, PAGE_SIZE); + + if (perf_output_copy(handle, page_address(ZERO_PAGE(0)), chunk)) + return -EFAULT; + pad -=3D chunk; + } + + /* + * Skip an empty snapshot, as equal offsets would otherwise copy the + * entire AUX ring. + */ + if (trace_size) { + unsigned long to =3D aux_handle->head; + + ret =3D perf_output_copy_aux(aux_handle, handle, to - trace_size, to); + if (ret < 0) + return ret; + } + + return size; +} + +static long etm_event_snapshot_aux(struct perf_event *event, + struct perf_output_handle *handle, + unsigned long size) +{ + struct etm_ctxt *ctxt =3D this_cpu_ptr(&etm_ctxt); + struct perf_output_handle *aux_handle =3D &ctxt->handle; + struct etm_event_data *event_data; + struct coresight_device *source, *sink; + struct coresight_path *path; + unsigned long trace_size; + long ret =3D 0; + + if (!etm_event_aux_begin(event, ctxt)) + goto padding; + + if (READ_ONCE(event->hw.aux_paused)) + goto out; + + event_data =3D perf_get_aux(aux_handle); + if (!event_data || !event_data->overwrite) + goto out; + + path =3D etm_event_get_ctxt_path(ctxt); + if (!path) + goto out; + + source =3D coresight_get_source(path); + sink =3D coresight_get_sink(path); + if (WARN_ON_ONCE(!source || !sink)) + goto out; + + if (!coresight_is_percpu_sink(sink)) { + dev_err_once(&sink->dev, "AUX sampling requires a per-CPU sink\n"); + goto out; + } + + /* Skip snapshots that preempt the sink's interrupt handler */ + if (READ_ONCE(sink->in_interrupt)) + goto out; + + coresight_pause_source(source); + trace_size =3D sink_ops(sink)->update_buffer(sink, aux_handle, + event_data->snk_config); + coresight_disable_path(path); + + /* + * If the AUX handle was closed or marked truncated, the sink is + * expected to have notified perf core to disable the AUX event. + */ + if (!perf_get_aux(aux_handle) || + (aux_handle->aux_flags & PERF_AUX_FLAG_TRUNCATED)) + goto fail; + + ret =3D etm_event_snapshot_aux_copy_data(aux_handle, handle, trace_size, = size); + if (ret < 0) + goto fail; + + if (coresight_enable_path(path, CS_MODE_PERF)) + goto fail; + + if (coresight_resume_source(source)) { + coresight_disable_path(path); + goto fail; + } + + goto out; + +fail: + /* Set the truncated AUX flag so perf core can disable the event */ + if (perf_get_aux(aux_handle)) { + perf_aux_output_flag(aux_handle, PERF_AUX_FLAG_TRUNCATED); + perf_aux_output_end(aux_handle, 0); + } + +out: + etm_event_aux_end(event, ctxt); + +padding: + /* Pad the buffer with zeros on an early exit */ + if (!ret) + ret =3D etm_event_snapshot_aux_copy_data(NULL, handle, 0, size); + + return ret; +} + static int etm_addr_filters_validate(struct list_head *filters) { bool range =3D false, address =3D false; @@ -1109,6 +1231,7 @@ int __init etm_perf_init(void) etm_pmu.free_aux =3D etm_free_aux; etm_pmu.start =3D etm_event_start; etm_pmu.stop =3D etm_event_stop; + etm_pmu.snapshot_aux =3D etm_event_snapshot_aux; etm_pmu.add =3D etm_event_add; etm_pmu.del =3D etm_event_del; etm_pmu.addr_filters_sync =3D etm_addr_filters_sync; diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwt= racing/coresight/coresight-etm-perf.h index 24d929428633f56f24a114d5bb93b8ac4799ca11..a69eb04a597efcfe630342a410c= bf8fea3c4501e 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.h +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h @@ -89,6 +89,7 @@ struct etm_filters { * @aux_hwid_done: Whether a CPU has emitted the TraceID packet or not. * @snk_config: The sink configuration. * @cfg_hash: The hash id of any coresight config selected. + * @overwrite: Whether the AUX buffer uses overwrite mode. * @path: An array of path, each slot for one CPU. */ struct etm_event_data { @@ -97,6 +98,7 @@ struct etm_event_data { cpumask_t aux_hwid_done; void *snk_config; u32 cfg_hash; + bool overwrite; struct coresight_path * __percpu *path; }; =20 --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 53A664BE42A; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-17-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=1574; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=2BWIzct5AOjyfF3AD0YgFM25chejHt1dAhhGT0eurX0=; b=JEAlUVzjAxBjSEXx7rX7saEGp6gs8WRPKMkLB0A+GL/m05JjtdPTWvwRsDl9QqVTOeULXeoee 1Z7SykBs4bPC3TUZz3yZ28S3t5cPrPCfZprrjvB+TBsNuIvtpY/192C X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Perf clears the IP of a user-only PMU sample when its interrupt skids into the kernel. The timestamp and TID remain valid, but the zero-IP check prevents --itrace=3DL from attaching decoded branch history. Remove the IP check and keep matching samples to trace by time and thread. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- tools/perf/util/cs-etm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 00407a80933e1c0b76260aed5894dece50b9aecd..baa962085dba5226d9729a0ee80= 39374d5fcb1a0 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -3097,6 +3097,8 @@ static int cs_etm__br_stack_init(struct cs_etm_auxtra= ce *etm, /* * Add decoded branch history to an existing sample. The sample keeps its = own * ip, callchain and event identity; only an absent branch stack is filled= in. + * A user-only PMU sample can have a zero IP when the interrupt skids into + * the kernel; its thread and trace window still identify valid history. */ static int cs_etm__process_sample(struct cs_etm_auxtrace *etm, struct perf_session *session, @@ -3107,7 +3109,7 @@ static int cs_etm__process_sample(struct cs_etm_auxtr= ace *etm, int err; =20 if (!etm->synth_opts.add_last_branch || sample->branch_stack || - !sample->ip || !sample->time || sample->time =3D=3D (u64)-1) + !sample->time || sample->time =3D=3D (u64)-1) return 0; =20 /* Adding branch history to existing samples supports the host only */ --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 565E34BD0F1; Tue, 15 Sep 2026 15:49:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487395; cv=none; b=LfasquI62eT9zuBBS2OICxWVbTBtR7RthQwIQwVcpfHTU++WIWqZ4V+J27wUJBOs9uXCLhGluCUinCqgAmECB5+BNCGLgReSdic9+hy7m4cdnq9sVHLFVFYsXN7vTcRxLLs+FupjevoIYohgzakKgY79EKJgAiMqQ1xzdUI8VNo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487395; c=relaxed/simple; bh=gphGBW/pfYc0+60Lt5giBEwB4ytrBqfB1hnk2C3sI3A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uILJBVPW6BhZf83J7e4TI5yEgdHYWylppQcxCix1q/2StGKvgC2zMYUbGWJvIQ5YrJsMC7zAzj8qHbhRKpCPcg8Ga0a3EXVebJTdD9uoXcRvsBjnmO0VUjLM/xOGlJb+t7xEOrdLaLv+5M/6tmx7AcvmCYboLEwdALIZWm7Hxgg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=ZJSZAPzr; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="ZJSZAPzr" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C43081BF3; Tue, 15 Sep 2026 08:49:47 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 061ED3F882; Tue, 15 Sep 2026 08:49:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487391; bh=gphGBW/pfYc0+60Lt5giBEwB4ytrBqfB1hnk2C3sI3A=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ZJSZAPzr2jM5zW1l9HDakxHBwkBdOZKjeVv4MdAdu11/dEbTi4vFGjKGaL+PWbvJG KVxkdCLfNxVGO/qN9bQjyol0B/Ts3EozXmsxHJRivv4EvTpYnq/o0SUc4YkYCkhhWt 6Cja+CM4epKq0yOrDMpNrkPSh/a4a4qG8E/dzDgc= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:04 +0100 Subject: [PATCH 18/25] perf cs-etm: Unify timeless buffer decoding Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-18-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487340; l=4213; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=gphGBW/pfYc0+60Lt5giBEwB4ytrBqfB1hnk2C3sI3A=; b=Z8fLFHV3iIRtUuX2kypLyPdTfdHlUP1B9PUzCtr/QBREGYcOjT45zxXAOtr3kLC7UDKo3MdeF FzUq5nWOx3vBpn+x8a821QVXxu35zElQhml+NNKX1b2XwqMeTQn5dpk X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Per-thread and per-CPU timeless decoding use separate loops for the same buffer processing. Per-thread mode already collects packets in a single trace ID queue, so both modes can share the queue iteration. Use cs_etm__run_timeless_decoder() for both modes, keeping the thread selection in the caller. Propagate packet processing and end-of-block errors through the common decoding path. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- tools/perf/util/cs-etm.c | 68 ++++++++++++--------------------------------= ---- 1 file changed, 16 insertions(+), 52 deletions(-) diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index baa962085dba5226d9729a0ee8039374d5fcb1a0..1a53431161e995ba6b3cfdc86e3= 38ed26e675774 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -2681,47 +2681,9 @@ static void cs_etm__clear_all_traceid_queues(struct = cs_etm_queue *etmq) } } =20 -static int cs_etm__run_per_thread_timeless_decoder(struct cs_etm_queue *et= mq) +static int cs_etm__run_timeless_decoder(struct cs_etm_queue *etmq) { - int err =3D 0; - struct cs_etm_traceid_queue *tidq; - - tidq =3D cs_etm__etmq_get_traceid_queue(etmq, CS_ETM_PER_THREAD_TRACEID); - if (!tidq) - return -EINVAL; - - /* Go through each buffer in the queue and decode them one by one */ - while (1) { - err =3D cs_etm__get_data_block(etmq); - if (err <=3D 0) - return err; - - /* Run trace decoder until buffer consumed or end of trace */ - do { - err =3D cs_etm__decode_data_block(etmq); - if (err) - return err; - - /* - * Process each packet in this chunk, nothing to do if - * an error occurs other than hoping the next one will - * be better. - */ - err =3D cs_etm__process_traceid_queue(etmq, tidq); - - } while (etmq->buf_len); - - if (err =3D=3D 0) - /* Flush any remaining branch stack entries */ - err =3D cs_etm__end_block(etmq, tidq); - } - - return err; -} - -static int cs_etm__run_per_cpu_timeless_decoder(struct cs_etm_queue *etmq) -{ - int idx, err =3D 0; + int idx, err; struct cs_etm_traceid_queue *tidq; struct int_node *inode; =20 @@ -2731,23 +2693,23 @@ static int cs_etm__run_per_cpu_timeless_decoder(str= uct cs_etm_queue *etmq) if (err <=3D 0) return err; =20 - /* Run trace decoder until buffer consumed or end of trace */ + /* Run trace decoder until the input buffer is consumed. */ do { err =3D cs_etm__decode_data_block(etmq); if (err) return err; =20 /* - * cs_etm__run_per_thread_timeless_decoder() runs on a - * single traceID queue because each TID has a separate - * buffer. But here in per-cpu mode we need to iterate - * over each channel instead. + * Per-thread decoding uses a single traceID queue; + * formatted per-CPU buffers can contain several. */ intlist__for_each_entry(inode, etmq->traceid_queues_list) { idx =3D (int)(intptr_t)inode->priv; tidq =3D etmq->traceid_queues[idx]; - cs_etm__process_traceid_queue(etmq, tidq); + err =3D cs_etm__process_traceid_queue(etmq, tidq); + if (err) + return err; } } while (etmq->buf_len); =20 @@ -2760,8 +2722,6 @@ static int cs_etm__run_per_cpu_timeless_decoder(struc= t cs_etm_queue *etmq) return err; } } - - return err; } =20 static int cs_etm__process_timeless_queues(struct cs_etm_auxtrace *etm, @@ -2774,6 +2734,7 @@ static int cs_etm__process_timeless_queues(struct cs_= etm_auxtrace *etm, struct auxtrace_queue *queue =3D &etm->queues.queue_array[i]; struct cs_etm_queue *etmq =3D queue->priv; struct cs_etm_traceid_queue *tidq; + int err; =20 if (!etmq) continue; @@ -2785,10 +2746,13 @@ static int cs_etm__process_timeless_queues(struct c= s_etm_auxtrace *etm, if (!tidq) continue; =20 - if (tid =3D=3D -1 || thread__tid(tidq->frontend_thread) =3D=3D tid) - cs_etm__run_per_thread_timeless_decoder(etmq); - } else - cs_etm__run_per_cpu_timeless_decoder(etmq); + if (tid !=3D -1 && thread__tid(tidq->frontend_thread) !=3D tid) + continue; + } + + err =3D cs_etm__run_timeless_decoder(etmq); + if (err) + return err; } =20 return 0; --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 93A234BFE88; Tue, 15 Sep 2026 15:49:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487397; cv=none; b=Zdugp73V8M+/fRy08nAOvRWrXaUQjEF3tyUgClmA84SbqPSsispI7HboqAMgjke+QH2P46jRIr1yJnR0jGyunnp5fMaLV3Fpv1O2Nc/aaVyI57lBVZXf4ixRbmCiRklSjsRK8I79QBHKgAgbaD2+au40MrZ/b0cSinC5SmaneCE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Tue, 15 Sep 2026 08:49:50 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A550C3F882; Tue, 15 Sep 2026 08:49:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487394; bh=M6nqCi/crONOiSQCUR9ebCZXN0BqQCYtCGnaHG7Fm3U=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=cdLyKYlvjIsbO9h1g6r+fzgWKXudScU1Iv6uZNOzp5LiiEcQ9yWuWy8SLNVqbjv0m BUEZXeRpsQ+417PqpCq3LKpipFp5gyocY3Z/TnIkoG1CXDM65LoVk7FslnE9w3P4J/ /2aV+o3o0tnBrwYuHzpVOtmMF22ZmhMtumh49vfM= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:05 +0100 Subject: [PATCH 19/25] perf cs-etm: Propagate errors from trace queue flushing Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-19-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487341; l=3038; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=M6nqCi/crONOiSQCUR9ebCZXN0BqQCYtCGnaHG7Fm3U=; b=G4NLdPyQpLVOuFsk9+NyG+u9mJpgzbism1K/8D1yQs6qhKsCfH9hrgv5/wL71KrEZ/fCx2dph A/NmBRW20ARCjHe9BeGmMlW8B4U8qU0zu9kzPllQ32ZilECj7YlyCnc X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= cs_etm__flush() can fail while synthesizing or delivering a sample at a trace discontinuity. cs_etm__process_traceid_queue() ignores the result and continues even though the packet swap and thread stack flush may not have completed. The timestamped decoder also loses errors when it processes packets left at the end of an AUX buffer: cs_etm__clear_all_traceid_queues() discards the result from each trace ID queue and allows decoding to fetch the next buffer. Check the discontinuity flush result, make cs_etm__clear_all_traceid_queues() return the first queue-processing error, and propagate that error through cs_etm__process_timestamped_queues(). This stops decoding on failure and reports the error to the caller, including sample delivery errors from a perf script dlfilter. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- tools/perf/util/cs-etm.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 1a53431161e995ba6b3cfdc86e338ed26e675774..8340b8a16fed363795fc78ffbc4= 19661a61442a3 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -2644,10 +2644,13 @@ static int cs_etm__process_traceid_queue(struct cs_= etm_queue *etmq, break; case CS_ETM_DISCONTINUITY: /* - * Discontinuity in trace, flush - * previous branch stack + * Flush the previous branch stack at a discontinuity. + * Propagate sample delivery errors, which can occur before + * the packet swap and thread stack flush are complete. */ - cs_etm__flush(etmq, tidq); + ret =3D cs_etm__flush(etmq, tidq); + if (ret) + goto out; break; case CS_ETM_EMPTY: /* @@ -2665,9 +2668,9 @@ static int cs_etm__process_traceid_queue(struct cs_et= m_queue *etmq, return ret; } =20 -static void cs_etm__clear_all_traceid_queues(struct cs_etm_queue *etmq) +static int cs_etm__clear_all_traceid_queues(struct cs_etm_queue *etmq) { - int idx; + int idx, ret; struct int_node *inode; struct cs_etm_traceid_queue *tidq; struct intlist *traceid_queues_list =3D etmq->traceid_queues_list; @@ -2676,9 +2679,12 @@ static void cs_etm__clear_all_traceid_queues(struct = cs_etm_queue *etmq) idx =3D (int)(intptr_t)inode->priv; tidq =3D etmq->traceid_queues[idx]; =20 - /* Ignore return value */ - cs_etm__process_traceid_queue(etmq, tidq); + ret =3D cs_etm__process_traceid_queue(etmq, tidq); + if (ret) + return ret; } + + return 0; } =20 static int cs_etm__run_timeless_decoder(struct cs_etm_queue *etmq) @@ -2893,7 +2899,9 @@ static int cs_etm__process_timestamped_queues(struct = cs_etm_auxtrace *etm, * process in this auxtrace_buffer. As such empty and * flush all traceID queues. */ - cs_etm__clear_all_traceid_queues(etmq); + ret =3D cs_etm__clear_all_traceid_queues(etmq); + if (ret) + goto out; =20 /* Fetch another auxtrace_buffer for this etmq */ goto refetch; --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 90F3B4C1502; Tue, 15 Sep 2026 15:49:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487400; cv=none; b=ES3RCWDCyTsAmM3vHpizl4yB05NfNxqGv27GHzrlh23OYUoF3ZkAzCSPBvvl56gYFKTtLcJKkEX0IGVT6CtQ+cju4BGXIbDWrVZO4RPrt7KmGuMCgINKp+6kcSnHzAknTDCzK0favKK4WnJM/rFtZLvoN9X0eJaWXYfX5cWsZnM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487400; c=relaxed/simple; bh=QSuE0CikkbK3d7jRBR8VtxCr0gWJsEf3ovfSqjudRaI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SIxaKS6DQemIYJ2dfAX/Htc0OFokKv68Qjft1NlU0GsHwwGFUKFOgvIJDITIIjHW1l6+G4fl3c4Xr5IwZxz3mXtwndMzQ6b978fbi0FG0R2eBxHPfICbi0oxOwrQyaFBnebQo6m6tkEa/GqhDtbgzsEDoCJKzI8EHJ4VY0cjLAM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=qmU5CpfU; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="qmU5CpfU" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1DA6115A1; Tue, 15 Sep 2026 08:49:53 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 507713F882; Tue, 15 Sep 2026 08:49:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487396; bh=QSuE0CikkbK3d7jRBR8VtxCr0gWJsEf3ovfSqjudRaI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=qmU5CpfUedMXo6kozsqjXEMrRQkEgeoK3ehedaoinzbxgbhuQPDUO3EtE5lPS1f3h IyT8miznoGU/dX3fVCk41eoRLNGnqgjimfJKcMF/iNnbIRO7B0cXpTe4EDEcInzi88 DImKhXTAnnIDgPmDZEwwBY+lue1wjV67ke+KGSMQ= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:06 +0100 Subject: [PATCH 20/25] perf cs-etm: Drain pending packets before finishing trace blocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-20-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487341; l=7864; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=QSuE0CikkbK3d7jRBR8VtxCr0gWJsEf3ovfSqjudRaI=; b=ZZBCNU6WWj/S5L54s4XqqS2xuzPDvb3N5VEi679N1z4zkevOxcPZ6WHhLr+L2XzJzy7wprDUl 5s9VOfUPQgrAQ2QXHnAlyRAtj0cDveVBdPue2qRrDvlAd917W37O7f+ X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= OpenCSD can consume the final input byte while returning WAIT with trace output still pending. Stopping when buf_len reaches zero leaves that output unprocessed before the next block resets the decoder. Add cs_etm_decoder__drain_packets() to resume a waiting decoder with OCSD_OP_FLUSH without supplying more input. Call it from cs_etm__decode_data_block() after all input has been consumed and keep the buffer active until draining completes. Return a positive value while input or pending output remains, zero on completion, and a negative error on failure. Update timeless decoding, timestamp seeding and timestamped queue processing to use this contract. Process queued packets even on the final call. Also drain pending output before resetting the decoder when dumping raw packets. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 17 +++++++ tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 7 +++ tools/perf/util/cs-etm.c | 59 ++++++++++++++++-----= ---- 3 files changed, 61 insertions(+), 22 deletions(-) diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/u= til/cs-etm-decoder/cs-etm-decoder.c index 26940f1f1b0bf44c8671d80020597c672c361c1a..a7a6410481e5c99be14a9514930= 92c145a8512ba 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c @@ -793,6 +793,23 @@ int cs_etm_decoder__process_data_block(struct cs_etm_d= ecoder *decoder, return ret; } =20 +int cs_etm_decoder__drain_packets(struct cs_etm_decoder *decoder) +{ + if (OCSD_DATA_RESP_IS_WAIT(decoder->prev_return)) + decoder->prev_return =3D ocsd_dt_process_data(decoder->dcd_tree, + OCSD_OP_FLUSH, + 0, + 0, + NULL, + NULL); + + if (OCSD_DATA_RESP_IS_WAIT(decoder->prev_return)) + return 1; + + /* No further WAIT driven flushing is needed */ + return OCSD_DATA_RESP_IS_CONT(decoder->prev_return) ? 0 : -EINVAL; +} + void cs_etm_decoder__free(struct cs_etm_decoder *decoder) { if (!decoder) diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h b/tools/perf/u= til/cs-etm-decoder/cs-etm-decoder.h index 12c782fa6db285852f9f901735aa1f0e55b955e8..c187f3809ba0a350ca6ee549d2c= 0c67ed8e16d1e 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h @@ -91,6 +91,13 @@ int cs_etm_decoder__process_data_block(struct cs_etm_dec= oder *decoder, u64 indx, const u8 *buf, size_t len, size_t *consumed); =20 +/* + * Drain pending packets after consuming a data block. + * Process queued packets after each call, including the final call. + * Returns 1 for WAIT, 0 when done, or a negative error. + */ +int cs_etm_decoder__drain_packets(struct cs_etm_decoder *decoder); + struct cs_etm_decoder * cs_etm_decoder__new(int num_cpu, struct cs_etm_decoder_params *d_params, diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 8340b8a16fed363795fc78ffbc419661a61442a3..e78c8e089f38eae34faa12bbd2f= 899f1f72acce4 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -129,6 +129,7 @@ struct cs_etm_queue { u8 pending_timestamp_chan_id; enum cs_etm_format format; u64 offset; + /* Cleared once the current block is fully decoded and drained */ const unsigned char *buf; size_t buf_len, buf_used; /* Conversion between traceID and index in traceid_queues array */ @@ -943,6 +944,12 @@ static void cs_etm__dump_event(struct cs_etm_queue *et= mq, buffer_used +=3D consumed; } while (buffer_used < buffer->size); =20 + if (!ret) { + do { + ret =3D cs_etm_decoder__drain_packets(etmq->decoder); + } while (ret > 0); + } + cs_etm_decoder__reset(etmq->decoder); } =20 @@ -1319,7 +1326,7 @@ static int cs_etm__queue_first_cs_timestamp(struct cs= _etm_auxtrace *etm, * trace for that block. */ ret =3D cs_etm__decode_data_block(etmq); - if (ret) + if (ret < 0) goto out; =20 /* @@ -2171,14 +2178,17 @@ static void cs_etm__flush_all_stack(struct cs_etm_q= ueue *etmq) * if need be. * Returns: < 0 if error * =3D 0 if no more auxtrace_buffer to read - * > 0 if the current buffer isn't empty yet + * > 0 if input or decoder output remains in the current block */ static int cs_etm__get_data_block(struct cs_etm_queue *etmq) { int ret; =20 - /* The current block is not finished */ - if (etmq->buf_len) + /* + * A non-NULL buf indicates that packets are still pending. + * Drain them before resetting for a new block. + */ + if (etmq->buf) return 1; =20 ret =3D cs_etm__get_trace(etmq); @@ -2555,11 +2565,22 @@ static int cs_etm__set_sample_flags(struct cs_etm_q= ueue *etmq, return 0; } =20 +/* + * Return 0 when decoding and draining are complete, 1 if another call is + * needed, or a negative error. Process queued packets even on return 0. + */ static int cs_etm__decode_data_block(struct cs_etm_queue *etmq) { - int ret =3D 0; + int ret; size_t processed =3D 0; =20 + if (!etmq->buf_len) { + ret =3D cs_etm_decoder__drain_packets(etmq->decoder); + if (!ret) + etmq->buf =3D NULL; + return ret; + } + /* * Packets are decoded and added to the decoder's packet queue * until the decoder packet processing callback has requested that @@ -2573,14 +2594,13 @@ static int cs_etm__decode_data_block(struct cs_etm_= queue *etmq) etmq->buf_len, &processed); if (ret) - goto out; + return ret; =20 etmq->offset +=3D processed; etmq->buf_used +=3D processed; etmq->buf_len -=3D processed; =20 -out: - return ret; + return 1; } =20 static int cs_etm__process_traceid_queue(struct cs_etm_queue *etmq, @@ -2689,7 +2709,7 @@ static int cs_etm__clear_all_traceid_queues(struct cs= _etm_queue *etmq) =20 static int cs_etm__run_timeless_decoder(struct cs_etm_queue *etmq) { - int idx, err; + int idx, err, pending; struct cs_etm_traceid_queue *tidq; struct int_node *inode; =20 @@ -2701,9 +2721,9 @@ static int cs_etm__run_timeless_decoder(struct cs_etm= _queue *etmq) =20 /* Run trace decoder until the input buffer is consumed. */ do { - err =3D cs_etm__decode_data_block(etmq); - if (err) - return err; + pending =3D cs_etm__decode_data_block(etmq); + if (pending < 0) + return pending; =20 /* * Per-thread decoding uses a single traceID queue; @@ -2717,7 +2737,7 @@ static int cs_etm__run_timeless_decoder(struct cs_etm= _queue *etmq) if (err) return err; } - } while (etmq->buf_len); + } while (pending); =20 intlist__for_each_entry(inode, etmq->traceid_queues_list) { idx =3D (int)(intptr_t)inode->priv; @@ -2884,26 +2904,21 @@ static int cs_etm__process_timestamped_queues(struc= t cs_etm_auxtrace *etm, } =20 ret =3D cs_etm__decode_data_block(etmq); - if (ret) + if (ret < 0) goto out; =20 cs_timestamp =3D cs_etm__etmq_get_timestamp(etmq, &trace_chan_id); =20 if (!cs_timestamp) { /* - * Function cs_etm__decode_data_block() returns when - * there is no more traces to decode in the current - * auxtrace_buffer OR when a timestamp has been - * encountered on any of the traceID queues. Since we - * did not get a timestamp, there is no more traces to - * process in this auxtrace_buffer. As such empty and - * flush all traceID queues. + * No timestamp is available yet. Process the queued packets + * before resuming input or draining the current block. */ ret =3D cs_etm__clear_all_traceid_queues(etmq); if (ret) goto out; =20 - /* Fetch another auxtrace_buffer for this etmq */ + /* Draining and fetch another auxtrace_buffer for this etmq */ goto refetch; } =20 --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 438BB4C1516; Tue, 15 Sep 2026 15:50:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487402; cv=none; b=fcoh6zHrhwhf45Kd/fJWtkdLeDqzHdv63MHMaade9AieSs7O+aCLKo1hY4qgm2r/i8Ccas1WgeMj4Zx8eYDPlZy3MQ3S7J39EOwgaA/QkAyNgoqyFIP9RE5NicmssZUQeTlkVtMN8hFc124DYVrHtze0R/SG/a1AW/6I6Lb1Fmk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487402; c=relaxed/simple; bh=HljhFJEqlq7f7W2DVP9TBWkK9RJ5OJM0OyDY6TKa7aA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mY03BQ6mHHN+7fOZWnLDqVulUaMM4QCtM4PIXUrVYTzUXRTr0iE8HqWVO6S4x9fogwqrjAdgJHi4vyRLSefE40w6sqkreNFzu0chE3tLFpinNnIHtRvTtdRC+Nk8fQGKnn7LjQOGbmylqBHAWvIFG0SOq2AyEpunh4BTziUGY+o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=YrouDpNp; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="YrouDpNp" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B85491570; Tue, 15 Sep 2026 08:49:55 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F0A9C3F882; Tue, 15 Sep 2026 08:49:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487399; bh=HljhFJEqlq7f7W2DVP9TBWkK9RJ5OJM0OyDY6TKa7aA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=YrouDpNp8SZ2QE0byjuIbn4UIH71Pv+tBu/JVzTQEN/ByKG/NR3Dc7y3G+AHSduIh 0xAhYO6MvCILzSJfiRGwCuIGPlkVUbq6lzNdOmWiMdJ2ngt9dWFO10Fbtb+viClnbv 5do8HDKn1XPYcTqjFG1IjlHGeLpSh9WGiCxKDDdw= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:07 +0100 Subject: [PATCH 21/25] perf cs-etm: Complete packet draining with end of trace Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-21-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487341; l=4028; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=HljhFJEqlq7f7W2DVP9TBWkK9RJ5OJM0OyDY6TKa7aA=; b=o4v41o6wGnQSWzRh19HpHqvnPSpr3ZFpJWJvM/Kdl1h0QFmJjWhexacHQOm9rKrwolJzWC1r0 9BXw4L71Mb6B3g4LxsHg9VlZYNN7xwD1DVYZSiOvNO9N5I0PkB3K2YU X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= OpenCSD can retain output at the end of an input block even after returning CONT. WAIT driven flushing alone does not use out that output before the decoder is reset for the next block. Submit OCSD_OP_EOT from cs_etm_decoder__drain_packets() after any pending WAIT response has been flushed. Track submission with the eot_sent flag and clear it on reset, make sure to submit EOT only once. This applies to timeless decoding, timestamped decoding and raw packet dumping through their existing drain calls. Return OCSD_RESP_CONT for a clean EOT without queuing a discontinuity. This lets the frontend finish draining while preserving trace history for sample processing. EOT reporting trace loss, NO_SYNC and TRACE_ON still generate discontinuities and flush the thread stack. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 24 +++++++++++++++++++++= ++- tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 2 +- 2 files changed, 24 insertions(+), 2 deletions(-) diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/u= til/cs-etm-decoder/cs-etm-decoder.c index a7a6410481e5c99be14a951493092c145a8512ba..0fcbf91aac63bcc5c40bf145335= 9d3be3ece684f 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c @@ -46,6 +46,7 @@ struct cs_etm_decoder { void *data; void (*packet_printer)(const char *msg, void *data); bool suppress_printing; + bool eot_sent; dcd_tree_handle_t dcd_tree; cs_etm_mem_cb_type mem_access; ocsd_datapath_resp_t prev_return; @@ -86,6 +87,7 @@ int cs_etm_decoder__reset(struct cs_etm_decoder *decoder) ocsd_datapath_resp_t dp_ret; =20 decoder->prev_return =3D OCSD_RESP_CONT; + decoder->eot_sent =3D false; decoder->suppress_printing =3D true; dp_ret =3D ocsd_dt_process_data(decoder->dcd_tree, OCSD_OP_RESET, 0, 0, NULL, NULL); @@ -592,6 +594,17 @@ static ocsd_datapath_resp_t cs_etm_decoder__gen_trace_= elem_printer( =20 type =3D elem->elem_type; =20 + /* + * The frontend uses EOT to drain packets buffered in OpenCSD at the + * end of a data block. Return CONT for a clean EOT so the frontend + * can finish draining without generating a discontinuity, preserving + * trace history for sample processing. EOTs reporting trace loss + * still generate a discontinuity below. + */ + if (type =3D=3D OCSD_GEN_TRC_ELEM_EO_TRACE && + elem->unsync_eot_info =3D=3D UNSYNC_EOT) + return OCSD_RESP_CONT; + if (type =3D=3D OCSD_GEN_TRC_ELEM_EO_TRACE || type =3D=3D OCSD_GEN_TRC_ELEM_NO_SYNC || type =3D=3D OCSD_GEN_TRC_ELEM_TRACE_ON) @@ -803,10 +816,19 @@ int cs_etm_decoder__drain_packets(struct cs_etm_decod= er *decoder) NULL, NULL); =20 + if (OCSD_DATA_RESP_IS_CONT(decoder->prev_return) && !decoder->eot_sent) { + decoder->prev_return =3D ocsd_dt_process_data(decoder->dcd_tree, + OCSD_OP_EOT, + 0, + 0, + NULL, + NULL); + decoder->eot_sent =3D true; + } + if (OCSD_DATA_RESP_IS_WAIT(decoder->prev_return)) return 1; =20 - /* No further WAIT driven flushing is needed */ return OCSD_DATA_RESP_IS_CONT(decoder->prev_return) ? 0 : -EINVAL; } =20 diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h b/tools/perf/u= til/cs-etm-decoder/cs-etm-decoder.h index c187f3809ba0a350ca6ee549d2c0c67ed8e16d1e..876b28f6fda099db5694fdfa955= 2104cc270b49a 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h @@ -92,7 +92,7 @@ int cs_etm_decoder__process_data_block(struct cs_etm_deco= der *decoder, size_t len, size_t *consumed); =20 /* - * Drain pending packets after consuming a data block. + * Drain pending packets and submit EOT once after consuming a data block. * Process queued packets after each call, including the final call. * Returns 1 for WAIT, 0 when done, or a negative error. */ --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 50E5D4B0CAA; Tue, 15 Sep 2026 15:50:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487408; cv=none; b=ejJWCnYw03ZulDJHzAvzSL1heaLU66nR4vF2FeFMVuYHVzUrwECbpWVg+bZa2eIPojwqrPxAVMOYD0SSsI6yr8+mC9yDreLgggntAhZhsYLk2ESio3+FNXHU63qc7Tr+58vF1iPbDai6UPdrUZ6vsTOx1HmvBxfjlX6UyVA5tTs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487408; c=relaxed/simple; bh=RwdsZM+a5uD/u0uXiHq0QhelTuat7HbYA6vpgy4lSvY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Tue, 15 Sep 2026 08:49:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487402; bh=RwdsZM+a5uD/u0uXiHq0QhelTuat7HbYA6vpgy4lSvY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=HA48Op/BWQoUQohLek/bFyrKQzhCJgoB7Fig1/46bRzCj+hp1dwOLeJPUyYywG4eZ LTpK3n8h3aeX+ir5Nwnx5lkQvUhGMyGNuO8UN4lZzJ8iRLPaOokkLori4z8BLJpkro fGyxShcWhCsy0aHs/5rJRHf12WmBx1+YTv49x2To= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:08 +0100 Subject: [PATCH 22/25] perf cs-etm: Centralize sample history collection Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-22-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487341; l=3619; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=RwdsZM+a5uD/u0uXiHq0QhelTuat7HbYA6vpgy4lSvY=; b=SzWUV9IxuvwoEnwv1yCjXzzj2D+2HcEKberLOkn9Tby6iG+oqqbtlnqZAh6pNlqSOg3oaD450 0ecb8mnF72MCUsyXyyY0f2uFtUrBujFTE4yF4UnFXoMoZ41Xi1XlgUA X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Extract thread lookup, branch history collection and history consumption from cs_etm__process_sample() into cs_etm__save_sample_history(). This separates collecting decoded history from attaching it to a perf sample and provides a common place for adding callchain collection. Keep history collection to consume branch history so later samples cannot reuse an earlier trace window. Use the session stored in the auxtrace state and remove the redundant process_sample() argument. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- tools/perf/util/cs-etm.c | 46 ++++++++++++++++++++++++--------------------= -- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index e78c8e089f38eae34faa12bbd2f899f1f72acce4..815a22cedc49e9281b7087f0135= 5bb71b5e41c57 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -2048,6 +2048,26 @@ static int cs_etm__exception(struct cs_etm_traceid_q= ueue *tidq) return 0; } =20 +static int cs_etm__save_sample_history(struct cs_etm_auxtrace *etm, + const struct perf_sample *sample) +{ + struct machine *machine =3D &etm->session->machines.host; + struct thread *thread; + + thread =3D machine__findnew_thread(machine, sample->pid, sample->tid); + if (!thread) + return -ENOMEM; + + /* Consume branch history so later samples cannot reuse the same window. = */ + thread_stack__br_sample_late(thread, sample->cpu, etm->br_stack, + etm->br_stack_sz, sample->ip, + machine__kernel_start(machine)); + thread_stack__br_stack_consume(thread, sample->cpu); + + thread__put(thread); + return 0; +} + static int cs_etm__flush(struct cs_etm_queue *etmq, struct cs_etm_traceid_queue *tidq) { @@ -3088,11 +3108,8 @@ static int cs_etm__br_stack_init(struct cs_etm_auxtr= ace *etm, * the kernel; its thread and trace window still identify valid history. */ static int cs_etm__process_sample(struct cs_etm_auxtrace *etm, - struct perf_session *session, struct perf_sample *sample) { - struct machine *machine =3D &session->machines.host; - struct thread *thread; int err; =20 if (!etm->synth_opts.add_last_branch || sample->branch_stack || @@ -3117,28 +3134,13 @@ static int cs_etm__process_sample(struct cs_etm_aux= trace *etm, if (err) return err; =20 - thread =3D machine__findnew_thread(machine, sample->pid, sample->tid); - if (!thread) - return -ENOMEM; - - /* - * Take the branch history rather than copying it. The trace window - * belongs to the sample that ends it, so once it has been attached a - * later sample with nothing newly decoded finds an empty stack rather - * than being given an earlier window's branches. That is the common - * case whenever the trace is duty cycled, by AUX pause/resume or by - * ETM strobing. - */ - thread_stack__br_sample_late(thread, sample->cpu, etm->br_stack, - etm->br_stack_sz, sample->ip, - machine__kernel_start(machine)); - thread_stack__br_stack_consume(thread, sample->cpu); + err =3D cs_etm__save_sample_history(etm, sample); + if (err) + return err; =20 if (etm->br_stack->nr) sample->branch_stack =3D etm->br_stack; =20 - thread__put(thread); - return 0; } =20 @@ -3181,7 +3183,7 @@ static int cs_etm__process_event(struct perf_session = *session, return cs_etm__process_switch_cpu_wide(etm, event); =20 case PERF_RECORD_SAMPLE: - return cs_etm__process_sample(etm, session, sample); + return cs_etm__process_sample(etm, sample); =20 case PERF_RECORD_AUX: /* --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7E0524C4F57; Tue, 15 Sep 2026 15:50:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487408; cv=none; b=ny+tSgODME3umYTpYHS869s2NW2Tphvut7mpPbridipN6Ab/NZ/idg+4lS0Auk3eZnTekd4N5SEir2AuF8RcrjU7yzuNxKTkZFen7DKa94VQYVd3FtQvyuBmRtXtxzhlrPQHec2Q+phWvq+AUZZqZPZrjTdpk52twaja+JXM5dQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487408; c=relaxed/simple; bh=I+iiIlGTfrQKy13QypHXpMwmt+eDHgZHgtpkVV9oHQc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=safgt+5xeX93zBpdscGt/xBfqeeQnOpeETiyf13FI0Z3iszF2FlR/dpBW8ENFzpaViLS5We5ZOD9F/RAkaqjX998qMOuxaH7Zh/xEk9Ns10zr+/BMuXqfPhUNGw2ChokxfTe67QLhwjxTARxnsd/UWgKItObkS9pwAzrjHem+t8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=bo8GCotS; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="bo8GCotS" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 141D41570; Tue, 15 Sep 2026 08:50:01 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 47D0E3FA32; Tue, 15 Sep 2026 08:50:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487404; bh=I+iiIlGTfrQKy13QypHXpMwmt+eDHgZHgtpkVV9oHQc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=bo8GCotSIFB1anG/4UN/PYgn1Hkd/WVv6Hkfob2l8S515F0kCwMXWO5EpvbxgkPcJ EHvsnqqWwLPWSsoTN0pa8NXFFH/QPJWLXtctTNmHBjFRXDRM3+Dhs3gJiTVi8Q+O2s VPfbjD002tLZaBWimmJPKxMurdkVA/5VaGwgAjEc= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:09 +0100 Subject: [PATCH 23/25] perf cs-etm: Decode AUX samples into callchains and branch stacks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-23-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487341; l=19991; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=I+iiIlGTfrQKy13QypHXpMwmt+eDHgZHgtpkVV9oHQc=; b=kJvurkfssjOYXzd6If0vwjW5B3oA/3aRwhclhRRO28d2A4TpVNMFhPA/B4BWtewaqbZnyif12 CNTUP4BY4jTDHqgw2gSTZui3/lNO5kQYBnFC+LJ2zmHsV77IaBRnFwv X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Decode raw AUX trace embedded in PERF_SAMPLE_AUX and attach missing callchains and branch stacks to the owning PMU samples. Select the decoder by the sampled CPU and initialize its thread context from the sample's PID and TID. Queue each payload temporarily for the shared timeless decoder, clearing packet queues and flushing thread stacks before decoding an independent window. The embedded trace already belongs to the sample, so timestamp correlation is not needed. Extend cs_etm__save_sample_history() to collect callchains as well as branch stacks after decoding. Support --itrace=3DG and --itrace=3DL while preserving recorded callchains and branch stacks. Record CPU ID on AUX sampling events so each sample selects the correct decoder. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- tools/perf/arch/arm/util/cs-etm.c | 6 + tools/perf/util/cs-etm.c | 308 +++++++++++++++++++++++++++++++++-= ---- 2 files changed, 274 insertions(+), 40 deletions(-) diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/c= s-etm.c index d2861d66a6612ea213066258672ba41769e578cb..710887daad0e4cbb5f48a45aa39= 6c7bbab4c7ead 100644 --- a/tools/perf/arch/arm/util/cs-etm.c +++ b/tools/perf/arch/arm/util/cs-etm.c @@ -450,6 +450,12 @@ static int cs_etm_recording_options(struct auxtrace_re= cord *itr, */ evsel__set_sample_bit(cs_etm_evsel, CPU); =20 + /* Raw AUX samples need the sampling CPU to select the trace decoder. */ + evlist__for_each_entry(evlist, evsel) { + if (evsel->core.attr.aux_sample_size) + evsel__set_sample_bit(evsel, CPU); + } + /* * Also the case of per-cpu mmaps, need the contextID in order to be noti= fied * when a context switch happened. diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 815a22cedc49e9281b7087f01355bb71b5e41c57..8a1b532df0d3f45fbec85b32ade= 9bc5ce5b58c98 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -66,6 +66,7 @@ struct cs_etm_auxtrace { */ bool per_thread_decoding; bool snapshot_mode; + bool sampling_mode; bool data_queued; bool has_virtual_ts; /* Virtual/Kernel timestamps in the trace. */ bool use_thread_stack; @@ -77,6 +78,7 @@ struct cs_etm_auxtrace { /* Internal reconstruction depth, see cs_etm__br_stack_init() */ unsigned int br_stack_sz_plus; struct branch_stack *br_stack; + struct ip_callchain *chain; u64 latest_kernel_timestamp; u32 auxtrace_type; u32 branches_filter; @@ -804,7 +806,8 @@ static void cs_etm__packet_swap(struct cs_etm_auxtrace = *etm, struct cs_etm_packet *tmp; =20 if (etm->synth_opts.branches || etm->synth_opts.last_branch || - etm->synth_opts.add_last_branch || etm->synth_opts.instructions) { + etm->synth_opts.add_last_branch || etm->synth_opts.add_callchain || + etm->synth_opts.instructions) { /* * Swap PACKET with PREV_PACKET: PACKET becomes PREV_PACKET for * the next incoming packet. @@ -961,7 +964,7 @@ static int cs_etm__flush_events(struct perf_session *se= ssion, auxtrace); int ret; =20 - if (dump_trace) + if (dump_trace || etm->sampling_mode) return 0; =20 if (!tool->ordered_events) @@ -1077,6 +1080,7 @@ static void cs_etm__free(struct perf_session *session) =20 zfree(&aux->metadata); zfree(&aux->br_stack); + zfree(&aux->chain); zfree(&aux); } =20 @@ -1102,6 +1106,13 @@ static struct machine *cs_etm__get_machine(struct cs= _etm_queue *etmq, if (pid_fmt =3D=3D CS_ETM_PIDFMT_CTXTID) return &etmq->etm->session->machines.host; =20 + /* + * AUX samples without context IDs use the owning host sample's PID/TID. + * Keep EL1 trace in that host context as well. + */ + if (etmq->etm->sampling_mode && pid_fmt =3D=3D CS_ETM_PIDFMT_NONE) + return &etmq->etm->session->machines.host; + /* * Not perfect, but otherwise assume anything in EL1 is the default * guest, and everything else is the host. Distinguishing between guest @@ -1615,7 +1626,7 @@ static void cs_etm__add_stack_event(struct cs_etm_que= ue *etmq, int size; =20 if (!etm->synth_opts.branches && !etm->synth_opts.instructions && - !etm->synth_opts.add_last_branch) + !etm->synth_opts.add_last_branch && !etm->synth_opts.add_callchain) return; =20 if (!cs_etm__packet_has_taken_branch(tidq->prev_packet)) @@ -2059,10 +2070,17 @@ static int cs_etm__save_sample_history(struct cs_et= m_auxtrace *etm, return -ENOMEM; =20 /* Consume branch history so later samples cannot reuse the same window. = */ - thread_stack__br_sample_late(thread, sample->cpu, etm->br_stack, - etm->br_stack_sz, sample->ip, - machine__kernel_start(machine)); - thread_stack__br_stack_consume(thread, sample->cpu); + if (etm->synth_opts.add_last_branch && !sample->branch_stack) { + thread_stack__br_sample_late(thread, sample->cpu, etm->br_stack, + etm->br_stack_sz, sample->ip, + machine__kernel_start(machine)); + thread_stack__br_stack_consume(thread, sample->cpu); + } + + if (etm->synth_opts.add_callchain && !sample->callchain) + thread_stack__sample_late(thread, sample->cpu, etm->chain, + etm->synth_opts.callchain_sz + 1, + sample->ip, machine__kernel_start(machine)); =20 thread__put(thread); return 0; @@ -2187,6 +2205,13 @@ static void cs_etm__flush_all_stack(struct cs_etm_qu= eue *etmq) cs_etm__flush_machine_stack(etmq, HOST_KERNEL_ID); break; case CS_ETM_PIDFMT_NONE: + /* + * AUX samples provide PID/TID via PERF_SAMPLE_TID, so flush host + * stacks even without traced context IDs. + */ + if (etmq->etm->sampling_mode) + cs_etm__flush_machine_stack(etmq, HOST_KERNEL_ID); + break; default: break; =20 @@ -3064,6 +3089,61 @@ static bool cs_etm__tracing_kernel(struct cs_etm_aux= trace *etm, return false; } =20 +static bool cs_etm__sampling_mode(struct perf_session *session) +{ + struct evsel *evsel; + + evlist__for_each_entry(session->evlist, evsel) { + if ((evsel->core.attr.sample_type & PERF_SAMPLE_AUX) && + evsel->core.attr.aux_sample_size) + return true; + } + return false; +} + +static int cs_etm__aux_sample_init(struct cs_etm_auxtrace *etm) +{ + struct evsel *evsel; + + if (!etm->sampling_mode) { + if (etm->synth_opts.add_callchain) { + pr_err("CS ETM: --itrace=3DG requires AUX samples\n"); + return -EINVAL; + } + + return 0; + } + + evlist__for_each_entry(etm->session->evlist, evsel) { + u64 type =3D evsel->core.attr.sample_type; + u64 required =3D PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_CPU; + + if (!(type & PERF_SAMPLE_AUX)) + continue; + + if ((type & required) !=3D required) { + pr_err("CS ETM: AUX samples require IP, TID and CPU\n"); + return -EINVAL; + } + + /* + * Synthesize the callchain from AUX trace when it is not + * provided by the PMU sample. + */ + if (etm->synth_opts.add_callchain && !(type & PERF_SAMPLE_CALLCHAIN)) + evsel->synth_sample_type |=3D PERF_SAMPLE_CALLCHAIN; + } + + if (etm->synth_opts.add_callchain) { + etm->chain =3D zalloc(struct_size(etm->chain, ips, + etm->synth_opts.callchain_sz + 1)); + if (!etm->chain) + return -ENOMEM; + } + + return 0; +} + static int cs_etm__br_stack_init(struct cs_etm_auxtrace *etm, struct perf_session *session) { @@ -3071,10 +3151,11 @@ static int cs_etm__br_stack_init(struct cs_etm_auxt= race *etm, =20 evlist__for_each_entry(session->evlist, evsel) { /* - * Only timestamped events can be matched against the decoded - * trace, so do not advertise a branch stack on any other. + * AUX samples own their trace window. Other samples need a + * timestamp to match against the decoded trace. */ - if (!(evsel->core.attr.sample_type & PERF_SAMPLE_TIME)) + if (!(evsel->core.attr.sample_type & + (etm->sampling_mode ? PERF_SAMPLE_AUX : PERF_SAMPLE_TIME))) continue; if (!(evsel->core.attr.sample_type & PERF_SAMPLE_BRANCH_STACK)) evsel->synth_sample_type |=3D PERF_SAMPLE_BRANCH_STACK; @@ -3101,9 +3182,85 @@ static int cs_etm__br_stack_init(struct cs_etm_auxtr= ace *etm, return 0; } =20 +static int cs_etm__set_sample_context(struct cs_etm_queue *etmq, + const struct perf_sample *sample) +{ + struct machine *machine =3D &etmq->etm->session->machines.host; + struct cs_etm_traceid_queue *tidq; + u64 *metadata =3D get_cpu_data(etmq->etm, sample->cpu); + struct thread *thread; + u8 trace_id; + int ret; + + if (!metadata) + return -EINVAL; + + ret =3D cs_etm__metadata_get_trace_id(&trace_id, metadata); + if (ret) + return ret; + + tidq =3D cs_etm__etmq_get_traceid_queue(etmq, trace_id); + if (!tidq) + return -ENOMEM; + + thread =3D machine__findnew_thread(machine, sample->pid, sample->tid); + if (!thread) + return -ENOMEM; + + tidq->kernel_start =3D machine__kernel_start(machine); + tidq->decode_el =3D ocsd_EL_unknown; + thread__put(tidq->decode_thread); + thread__put(tidq->frontend_thread); + /* Thread already holds a reference from machine__findnew_thread() */ + tidq->decode_thread =3D thread; + tidq->frontend_thread =3D thread__get(thread); + + return 0; +} + +/* Consume the queued AUX window while its owning sample is still availabl= e. */ +static int cs_etm__process_aux_sample(struct cs_etm_auxtrace *etm, + struct perf_sample *sample) +{ + struct cs_etm_queue *etmq =3D cs_etm__get_queue(etm, sample->cpu); + struct auxtrace_buffer buffer =3D { + .data =3D sample->aux_sample.data, + .size =3D sample->aux_sample.size, + .pid =3D sample->pid, + .tid =3D sample->tid, + .cpu =3D { sample->cpu }, + }; + struct auxtrace_queue *queue; + int ret; + + if (!etmq || !etmq->decoder) + return -EINVAL; + + queue =3D &etm->queues.queue_array[etmq->queue_nr]; + if (!list_empty(&queue->head) || etmq->buffer) + return -EINVAL; + + ret =3D cs_etm__set_sample_context(etmq, sample); + if (ret) + return ret; + + cs_etm__clear_all_packet_queues(etmq); + + buffer.buffer_nr =3D etm->queues.next_buffer_nr++; + list_add_tail(&buffer.list, &queue->head); + ret =3D cs_etm__run_timeless_decoder(etmq); + + /* The buffer is borrowed for this decode only. */ + list_del_init(&buffer.list); + etmq->buffer =3D NULL; + etmq->buf =3D NULL; + etmq->buf_len =3D 0; + return ret; +} + /* - * Add decoded branch history to an existing sample. The sample keeps its = own - * ip, callchain and event identity; only an absent branch stack is filled= in. + * Decode the trace belonging to this sample and fill in missing history. + * The sample keeps its IP, event identity and any recorded stacks. * A user-only PMU sample can have a zero IP when the interrupt skids into * the kernel; its thread and trace window still identify valid history. */ @@ -3112,25 +3269,35 @@ static int cs_etm__process_sample(struct cs_etm_aux= trace *etm, { int err; =20 - if (!etm->synth_opts.add_last_branch || sample->branch_stack || - !sample->time || sample->time =3D=3D (u64)-1) + if ((!etm->synth_opts.add_last_branch || sample->branch_stack) && + (!etm->synth_opts.add_callchain || sample->callchain)) return 0; =20 - /* Adding branch history to existing samples supports the host only */ + /* Adding history to existing samples supports the host only */ if (sample->cpumode =3D=3D PERF_RECORD_MISC_GUEST_KERNEL || sample->cpumode =3D=3D PERF_RECORD_MISC_GUEST_USER) return 0; =20 - err =3D cs_etm__update_queues(etm); - if (err) - return err; + if (etm->sampling_mode) { + if (!sample->aux_sample.size) + return 0; =20 - /* - * Decode every queue up to this sample's time. Afterwards the thread - * stack holds the branches that executed before the sample, and - * nothing that executed after it. - */ - err =3D cs_etm__process_timestamped_queues(etm, sample->time); + err =3D cs_etm__process_aux_sample(etm, sample); + } else { + if (!sample->time || sample->time =3D=3D (u64)-1) + return 0; + + err =3D cs_etm__update_queues(etm); + if (err) + return err; + + /* + * Decode every queue up to this sample's time. Afterwards the + * thread stack holds the branches that executed before the + * sample, and nothing that executed after it. + */ + err =3D cs_etm__process_timestamped_queues(etm, sample->time); + } if (err) return err; =20 @@ -3138,9 +3305,16 @@ static int cs_etm__process_sample(struct cs_etm_auxt= race *etm, if (err) return err; =20 - if (etm->br_stack->nr) + if (etm->synth_opts.add_last_branch && !sample->branch_stack && etm->br_s= tack->nr) sample->branch_stack =3D etm->br_stack; =20 + if (etm->synth_opts.add_callchain && !sample->callchain) { + /* An empty history produces only a context marker and sample IP */ + if (etm->chain->nr > 2 || + (etm->chain->nr =3D=3D 2 && etm->chain->ips[1] !=3D sample->ip)) + sample->callchain =3D etm->chain; + } + return 0; } =20 @@ -3225,6 +3399,10 @@ static int cs_etm__process_auxtrace_event(struct per= f_session *session, struct cs_etm_auxtrace *etm =3D container_of(session->auxtrace, struct cs_etm_auxtrace, auxtrace); + + if (etm->sampling_mode) + return 0; + if (!etm->data_queued) { struct auxtrace_buffer *buffer; off_t data_offset; @@ -3529,14 +3707,28 @@ static int cs_etm__queue_aux_records_cb(struct perf= _session *session, union perf return ret; } =20 -static int cs_etm__queue_aux_records(struct perf_session *session) +static int cs_etm__prepare_auxtrace_queues(struct cs_etm_auxtrace *etm, + struct perf_session *session) { - struct auxtrace_index *index =3D list_first_entry_or_null(&session->auxtr= ace_index, - struct auxtrace_index, list); - if (index && index->nr > 0) - return perf_session__peek_events(session, session->header.data_offset, - session->header.data_size, - cs_etm__queue_aux_records_cb, NULL); + struct auxtrace_index *index; + unsigned int i; + + /* + * AUX samples have no AUX record to describe the formatter framing. + * Since it is only supported by TRBE, the trace is always unformatted. + */ + if (etm->sampling_mode) { + for (i =3D 0; i < etm->queues.nr_queues; i++) { + struct cs_etm_queue *etmq =3D etm->queues.queue_array[i].priv; + + etmq->format =3D UNFORMATTED; + } + + return 0; + } + + index =3D list_first_entry_or_null(&session->auxtrace_index, + struct auxtrace_index, list); =20 /* * We would get here if there are no entries in the index (either no auxt= race @@ -3546,7 +3738,12 @@ static int cs_etm__queue_aux_records(struct perf_ses= sion *session) * * In that scenario, buffers will not be split by AUX records. */ - return 0; + if (!index || index->nr <=3D 0) + return 0; + + return perf_session__peek_events(session, session->header.data_offset, + session->header.data_size, + cs_etm__queue_aux_records_cb, NULL); } =20 #define HAS_PARAM(j, type, param) (metadata[(j)][CS_ETM_NR_TRC_PARAMS] <= =3D \ @@ -3622,6 +3819,11 @@ static int cs_etm__create_queue_decoders(struct cs_e= tm_queue *etmq) if (decoders =3D=3D 0) return 0; =20 + if (etmq->etm->sampling_mode && decoders !=3D 1) { + pr_err("CS ETM Trace: AUX samples require a per-CPU raw trace source\n"); + return -EINVAL; + } + /* * Each queue can only contain data from one CPU when unformatted, so onl= y one decoder is * needed. @@ -3679,11 +3881,12 @@ static int cs_etm__create_decoders(struct cs_etm_au= xtrace *etm) int ret; =20 /* - * Don't create decoders for empty queues, mainly because - * etmq->format is unknown for empty queues. + * AUX sample buffers are queued when their samples are processed, + * so create their decoders even though the queues are still empty. + * Other empty queues have no known format or data to decode. */ assert(empty || etmq->format !=3D UNSET); - if (empty) + if (empty && !etm->sampling_mode) continue; =20 ret =3D cs_etm__create_queue_decoders(etmq); @@ -3818,6 +4021,19 @@ int cs_etm__process_auxtrace_info_full(union perf_ev= ent *event, etm->synth_opts.thread_stack =3D session->itrace_synth_opts->thread_stac= k; } =20 + etm->sampling_mode =3D cs_etm__sampling_mode(session); + if (etm->sampling_mode) { + /* AUX windows augment their owning samples, without synthesizing events= . */ + etm->synth_opts.instructions =3D false; + etm->synth_opts.branches =3D false; + etm->synth_opts.callchain =3D false; + etm->synth_opts.last_branch =3D false; + if (!session->itrace_synth_opts->set) { + etm->synth_opts.add_callchain =3D true; + etm->synth_opts.add_last_branch =3D true; + } + } + if (etm->synth_opts.calls) etm->branches_filter |=3D PERF_IP_FLAG_CALL | PERF_IP_FLAG_TRACE_BEGIN | @@ -3828,11 +4044,13 @@ int cs_etm__process_auxtrace_info_full(union perf_e= vent *event, PERF_IP_FLAG_TRACE_BEGIN | PERF_IP_FLAG_TRACE_END; =20 - if (etm->synth_opts.callchain && !symbol_conf.use_callchain) { + if ((etm->synth_opts.callchain || etm->synth_opts.add_callchain) && + !symbol_conf.use_callchain) { symbol_conf.use_callchain =3D true; if (callchain_register_param(&callchain_param) < 0) { symbol_conf.use_callchain =3D false; etm->synth_opts.callchain =3D false; + etm->synth_opts.add_callchain =3D false; } } =20 @@ -3859,7 +4077,7 @@ int cs_etm__process_auxtrace_info_full(union perf_eve= nt *event, /* Use virtual timestamps if all ETMs report ts_source =3D 1 */ etm->has_virtual_ts =3D cs_etm__has_virtual_ts(metadata, num_cpu); =20 - if (!etm->has_virtual_ts) + if (!etm->has_virtual_ts && !etm->sampling_mode) ui__warning("Virtual timestamps are not enabled, or not supported by the= traced system.\n" "The time field of the samples will not be set accurately.\n" "For Arm CPUs prior to Armv8.4 or without support FEAT_TRF,\n" @@ -3875,6 +4093,8 @@ int cs_etm__process_auxtrace_info_full(union perf_eve= nt *event, session->auxtrace =3D &etm->auxtrace; =20 cs_etm__setup_timeless_decoding(etm); + if (etm->sampling_mode) + etm->timeless_decoding =3D true; =20 etm->tc.time_shift =3D tc->time_shift; etm->tc.time_mult =3D tc->time_mult; @@ -3889,9 +4109,11 @@ int cs_etm__process_auxtrace_info_full(union perf_ev= ent *event, etm->use_thread_stack =3D etm->synth_opts.thread_stack || etm->synth_opts.last_branch || etm->synth_opts.add_last_branch || + etm->synth_opts.add_callchain || etm->synth_opts.callchain; =20 etm->use_callchain =3D etm->synth_opts.thread_stack || + etm->synth_opts.add_callchain || etm->synth_opts.callchain; =20 if (etm->synth_opts.last_branch || etm->synth_opts.add_last_branch) { @@ -3899,13 +4121,18 @@ int cs_etm__process_auxtrace_info_full(union perf_e= vent *event, etm->br_stack_sz_plus =3D etm->br_stack_sz; } =20 + err =3D cs_etm__aux_sample_init(etm); + if (err) + goto err_free_queues; + if (etm->synth_opts.add_last_branch) { /* * Existing samples are matched to decoded trace by time, so * the trace must carry timestamps that are correlated to perf * time and the queues must be decoded in time order. */ - if (etm->timeless_decoding || !etm->has_virtual_ts) { + if (!etm->sampling_mode && + (etm->timeless_decoding || !etm->has_virtual_ts)) { pr_err("CS ETM Trace: --itrace=3DL requires virtual timestamped trace\n= "); err =3D -EINVAL; goto err_free_queues; @@ -3920,7 +4147,7 @@ int cs_etm__process_auxtrace_info_full(union perf_eve= nt *event, if (err) goto err_free_queues; =20 - err =3D cs_etm__queue_aux_records(session); + err =3D cs_etm__prepare_auxtrace_queues(etm, session); if (err) goto err_free_queues; =20 @@ -3972,6 +4199,7 @@ int cs_etm__process_auxtrace_info_full(union perf_eve= nt *event, session->auxtrace =3D NULL; err_free_etm: zfree(&etm->br_stack); + zfree(&etm->chain); zfree(&etm); err_free_metadata: /* No need to check @metadata[j], free(NULL) is supported */ --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3C9784C4F6F; Tue, 15 Sep 2026 15:50:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487410; cv=none; b=b+fQPTVER9LZfhJqX1m7Nl3EHrWbuRC4UVO7nyYXu7T94JsmnFjD+0+9gFsELWlR8otaKV4Yf2KgM4ytjf1uHPdH1DVHQ8lgwU0lZwYIvMV8V/ecUndhgM5JDezTyWyZSp5pq1++jvOOTLRuLrVXvt1dMvU7TJQR4hT9/SFHJBo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487410; c=relaxed/simple; bh=kLfMsIfvtix9HRGhI1LbWAkQl/p2UK/wmVVuQM9xjoM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u++uQI0wEZmHozNzvZP1jj3AyR4/c+QpZNpQURDx+XPIG60ie5Y02dj7XaKK027qan59UWbzXEieOug3QqE297NGUFhGwEwun0xabOgZUd9lejbD+bBfQA6sgjHSRsfVDK99vpIayk4ReQ0C9cZav6w9YRUg2wY8oNgbKquy+bc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=fPNhmIBH; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="fPNhmIBH" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B0E6515A1; Tue, 15 Sep 2026 08:50:03 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E7D833F882; Tue, 15 Sep 2026 08:50:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487407; bh=kLfMsIfvtix9HRGhI1LbWAkQl/p2UK/wmVVuQM9xjoM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fPNhmIBHWs2DNgdpfsazb1noO++NHgFJIhG9JAjP7l6I2W+o15TZApYA10Fs77kRg QvwODn/gwYHrM7ujhpjvAElen4b5L32+5q+casCaNuAZUiHj8ui1nIjHFn29zLvtZ4 spWTlAsvPm/JZ7XVrd1WVh7Nma6d+sWQq/8BV0iA= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:10 +0100 Subject: [PATCH 24/25] perf test: Add CoreSight AUX sample decoding test Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-24-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487341; l=6971; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=kLfMsIfvtix9HRGhI1LbWAkQl/p2UK/wmVVuQM9xjoM=; b=FB94Ni0Ju4Zb0A/OTrxX2DMxUkZ5uO+G81x6c0Sb6i5exMXh1W/H2brTyYyoXP5Isn/GDHyRW IGeN4xsKL05AZgapYTSQTJK6FlLDIjboWjOeyruPC3DoaUHjJVAfRWc X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Add a shell test that records the brstack workload with 8 KiB AUX samples attached to cycle events. Pin the workload to a CPU with a TRBE sink and use per-thread recording with trace timestamps and context IDs disabled, exercising decoding with the owning sample's context. Check branch stacks and callchains with --itrace=3DL4, L64, G3 and G3L64. Require at least one sample to reach both requested depths, with all callchain frames belonging to the workload, and reject samples exceeding either limit. Use a callchain depth of three to match the nested calls in brstack. Compare with AUX decoding enabled and disabled to verify that adding history preserves the original PMU samples. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- tools/perf/tests/shell/coresight/aux_sample.sh | 189 +++++++++++++++++++++= ++++ 1 file changed, 189 insertions(+) diff --git a/tools/perf/tests/shell/coresight/aux_sample.sh b/tools/perf/te= sts/shell/coresight/aux_sample.sh new file mode 100755 index 0000000000000000000000000000000000000000..887ad6a085eacdfd192db3863fb= b61dae1aa19b5 --- /dev/null +++ b/tools/perf/tests/shell/coresight/aux_sample.sh @@ -0,0 +1,189 @@ +#!/bin/bash -e +# SPDX-License-Identifier: GPL-2.0 +# CoreSight AUX samples with callchains and branch stacks (exclusive) + +export LC_ALL=3DC + +skip() +{ + echo "[Skip] $1" + exit 2 +} + +perf list pmu | grep -q 'cs_etm//' || skip "cs_etm is not available" +perf check feature -q libopencsd || skip "perf was built without OpenCSD" +[ "$(id -u)" =3D 0 ] || skip "No root permission" +command -v taskset >/dev/null || skip "taskset is not available" + +# AUX sample now supports per CPU sink (e.g., TRBE). Select a usable CPU +# and name its sink explicitly to avoid a shared sink. +sink=3D +for dev in /sys/bus/coresight/devices/trbe[0-9]*; do + [ -d "$dev" ] || continue + name=3D${dev##*/} + cpu=3D${name#trbe} + [ -e "/sys/bus/event_source/devices/cs_etm/cpu$cpu" ] || continue + if taskset -c "$cpu" true 2>/dev/null; then + sink=3D$name + break + fi +done +[ -n "$sink" ] || skip "No usable TRBE CPU is available" + +tmpdir=3D$(mktemp -d /tmp/perf-cs-aux-sample.XXXXXX) + +cleanup() +{ + rm -rf "$tmpdir" +} + +trap cleanup EXIT +trap 'exit 1' TERM INT + +fail() +{ + echo "$1" >&2 + cat "$tmpdir/stderr" >&2 + exit 1 +} + +cf=3D"$tmpdir/ctl" +af=3D"$tmpdir/ack" +mkfifo "$cf" "$af" + +# Disable trace timestamps and context IDs to use the owning sample's cont= ext. +# Use a per-thread mmap so the explicit sink is only used on the pinned CP= U. +if ! taskset -c "$cpu" perf record -o "$tmpdir/data" --aux-sample=3D8192 \ + -e "{cs_etm/@$sink,timestamp=3D0,contextid=3D0/u,cycles/period=3D100003/u= }" \ + --per-thread -D -1 --control fifo:"$cf","$af" -- \ + perf test --record-ctl fifo:"$cf","$af" -w brstack 1000000 \ + >/dev/null 2>"$tmpdir/stderr"; then + # Kernels without snapshot_aux reject the sampling event at open time. + if grep -Eq 'sys_perf_event_open.*event \(.*cycles.*\): Invalid argument'= \ + "$tmpdir/stderr"; then + skip "Kernel does not accept CoreSight AUX sampling" + fi + fail "Failed to record CoreSight AUX samples" +fi + +perf evlist -v -i "$tmpdir/data" >"$tmpdir/evlist" 2>"$tmpdir/stderr" || + fail "Failed to read AUX sample attributes" +grep -Eq 'sample_type:.*\|AUX(,|\|).*aux_sample_size: 8192(,|$)' \ + "$tmpdir/evlist" || fail "Missing AUX sample attributes" + +check_history() +{ + local options=3D$1 + local max_branches=3D$2 + local max_callchains=3D$3 + local output=3D"$tmpdir/script-$options" + + perf script -i "$tmpdir/data" --itrace=3D"$options" \ + -F comm,pid,tid,cpu,event,ip,sym,brstack >"$output" \ + 2>"$tmpdir/stderr" || fail "Failed to decode AUX samples with $options" + + # Some windows may contain incomplete trace. Require at least one cycle + # sample to reach both requested depths, and reject any that exceed them. + if ! awk -v max_branches=3D"$max_branches" \ + -v max_callchains=3D"$max_callchains" ' + function check_sample() { + if (in_sample =3D=3D 0) { + return + } + + if (branch_entries > max_branches || callchain_frames > max_callchains)= { + depth_exceeded =3D 1 + } + + # Both depths must be reached in the same sample, with all + # callchain frames belonging to the brstack workload. + if (branch_entries =3D=3D max_branches && + callchain_frames =3D=3D max_callchains && + workload_frames =3D=3D max_callchains) { + found_sample =3D 1 + } + + branch_entries =3D 0 + callchain_frames =3D 0 + workload_frames =3D 0 + in_sample =3D 0 + } + { + # A blank line marks the end of a sample. + if (NF =3D=3D 0) { + check_sample() + next + } + + # Sample header: comm pid/tid [cpu] event ... + # The event may include a PMU prefix and configuration terms. + if ($4 ~ /(^|\/)cycles([,\/:]|$)/) { + check_sample() + in_sample =3D 1 + } + if (in_sample =3D=3D 0) { + next + } + + # Each branch entry is a field in 0xFROM/0xTO/... form. + for (i =3D 1; i <=3D NF; i++) { + if ($i ~ /^0x[[:xdigit:]]+\/0x[[:xdigit:]]+\//) { + branch_entries++ + } + } + + # Callchain rows start with a hexadecimal IP, then a symbol. + if ($1 ~ /^[[:xdigit:]]+$/) { + callchain_frames++ + if ($2 ~ /^brstack(_|$)/) { + workload_frames++ + } + } + } + END { + # Account for the last sample even without a trailing blank line. + check_sample() + + if (depth_exceeded !=3D 0) { + print "AUX sample history exceeds the requested depth" > "/dev/stderr" + exit 1 + } + if (found_sample =3D=3D 0) { + printf "No sample has %d branches and %d workload callchain frames\n",= \ + max_branches, max_callchains > "/dev/stderr" + exit 1 + } + exit 0 + } + ' "$output"; then + head -n 80 "$output" >&2 + fail "Missing AUX sample history or incorrect depth with $options" + fi +} + +check_sample_identity() +{ + local fields=3Dcomm,pid,tid,cpu,event,ip + + # Hiding history must leave exactly the original PMU samples, including + # their PID/TID, CPU and sampled IP, with no synthesized events. Per-thre= ad + # recording does not require sample timestamps. + perf script -i "$tmpdir/data" --no-itrace -F "$fields" \ + >"$tmpdir/original" 2>"$tmpdir/stderr" || fail "Failed to read cycle sam= ples" + perf script -i "$tmpdir/data" --itrace=3DL4 -F "$fields" \ + >"$tmpdir/decoded" 2>"$tmpdir/stderr" || fail "Failed to decode cycle sa= mples" + diff -u "$tmpdir/original" "$tmpdir/decoded" || + fail "AUX decoding changed the original cycle samples" +} + +check_history L4 4 0 +check_history L64 64 0 + +# brstack -> brstack_bench -> brstack_foo -> brstack_bar provides three +# nested calls whose caller frames can be reconstructed from an AUX window. +check_history G3 0 3 +check_history G3L64 64 3 + +check_sample_identity + +echo "CoreSight AUX sample decoding: PASS" --=20 2.34.1 From nobody Fri Sep 25 07:23:46 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7A5CC4C14FA; Tue, 15 Sep 2026 15:50:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487412; cv=none; b=UBrsU/smeQLbdUftE+o1fFVddjsuedYyCXmTDCOgNdR8XHC3vhJabg9u46AVGZ0UPLfJqYNTJfv7j/nS42zM6jlZUH/+RG1YETtbTMKlXkQfPRfgiS8/c1FwfZWZ5Fq7gnvsCSplQg9ruHGvkHmWS6F9gww4PNP8OFPb84DYxWM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789487412; c=relaxed/simple; bh=lVZAl+1VuCBKIxAJbqmvv4H5T5nJSZSgCMMDFerPAQM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=N2QTDPfsI1/LAKM5t3DqiK8XTY4nnE/vXFtnTm6dwjvoVIPJvKeOB+qXi3G0TATLi4PdaVpyTg3ZyDMOxaQbOAT1QKzeQeXNq+o2P3G4+YoCxoceM0Y+4JTAfxUTQsp2RU6o0WlViL4HgRKBbB8+RvL8IJiZEGRK1AFfYZjtsY0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=ExkSaBJo; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="ExkSaBJo" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5EE711570; Tue, 15 Sep 2026 08:50:06 -0700 (PDT) Received: from e132581.arm.com (unknown [10.2.196.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 93D623F882; Tue, 15 Sep 2026 08:50:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789487409; bh=lVZAl+1VuCBKIxAJbqmvv4H5T5nJSZSgCMMDFerPAQM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ExkSaBJoAMNwxm+ZhzKUfYC/Xcf5kDN8atZv3BhBSawhhHcZEzSSuetTJ3ClfUsEK eKuGkiPPqRWVlERgQQbO49QhRWlo9s28Y/2v/I8SiSTHhWQDfpOXe4S9IXrTIJBlpN JCuQsUDmbi6Q6Y1gOoMGPZpKSuPrlz50Y95hw66Q= From: Leo Yan Date: Tue, 15 Sep 2026 16:49:11 +0100 Subject: [PATCH 25/25] Documentation: coresight: Document AUX sample decoding Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-arm_cs_support_aux_sample-v1-25-35cf6f297d20@arm.com> References: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> In-Reply-To: <20260915-arm_cs_support_aux_sample-v1-0-35cf6f297d20@arm.com> To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , James Clark , Mike Leach , Anshuman Khandual , Yeoreum Yun , Jonathan Corbet , Suyash Mahar , Amir Ayupov Cc: Ingo Molnar , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789487341; l=3171; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=lVZAl+1VuCBKIxAJbqmvv4H5T5nJSZSgCMMDFerPAQM=; b=XjxNu2wRoGrUaTZHtHM2Yf1eAsTXNzo+4/Umo08aBPRMMhqEKSEPnPqtp1q9c0Kfj7e3hWMIc KXpp1K5QzZrDEQ7FZ4kRoP89qkLuUIUk355gwdtfbw/ZpJbg6jXuNjk X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Describe recording AUX trace in PMU samples and generating callchains and branch stacks with --itrace=3DG and --itrace=3DL. Explain the default decoding behavior, preservation of recorded stacks, context ID requirements and decoding limitations. Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan --- Documentation/trace/coresight/coresight-perf.rst | 39 ++++++++++++++++++++= ++++ 1 file changed, 39 insertions(+) diff --git a/Documentation/trace/coresight/coresight-perf.rst b/Documentati= on/trace/coresight/coresight-perf.rst index c0c82b3d26ea88dad7143afdb047c4d8f502b4a6..59eda2a5b6473ed1cb6bade5d28= 1a12bdde76bb0 100644 --- a/Documentation/trace/coresight/coresight-perf.rst +++ b/Documentation/trace/coresight/coresight-perf.rst @@ -171,6 +171,45 @@ no branch history at all, for example samples from a t= hread that was never traced, or samples recorded before the first or after the last trace windo= w. It is built and installed with perf's other dlfilters. =20 +Decode branch stack and callchain from AUX samples +-------------------------------------------------- + +With a kernel that supports CoreSight AUX sampling, record an AUX trace +window inside each cycle sample:: + + perf record --aux-sample=3D8192 -e '{cs_etm//u,cycles/period=3D100003/u}= ' \ + -- ./workload + perf script --itrace=3DG16L64 -F comm,pid,tid,cpu,event,ip,brstack + +``G16`` adds a reconstructed callchain and ``L64`` adds up to 64 branches. +Either option can be used alone. Existing callchains and branch stacks are +preserved. Without an explicit ``--itrace`` option, both are enabled for A= UX +samples. Decoded history is available in ``perf script`` and ``perf report= ``. + +AUX sampling supports unformatted, per-CPU sink (TRBE) trace. Each sample +selects its CPU's decoder and starts a fresh trace window. The window alre= ady +belongs to the sample, so ETM timestamps are not required for attribution. +Samples without decodable history receive no reconstructed stack. CPU-wide +recordings must enable context IDs to distinguish tasks within a window; t= he +default recording setup enables them. + +Callchains cover only calls visible in the captured window; callers before +the first synchronization point cannot be recovered. + +When kernel tracing is enabled, AUX samples can include PMU interrupt-hand= ler +execution before the trace source is paused. The late-sample helpers trim +this using instruction addresses, which may not uniquely identify the samp= le +boundary for kernel samples. + +Formatted sinks such as ETR are not supported. They can collect trace from +sources on multiple CPUs in a shared buffer, mixing execution from unrelat= ed +threads into the AUX sample. Context IDs can distinguish these threads, but +trace from other CPUs can consume the limited sample window, leaving little +history for the sampled thread. + +Guest samples, synthesizing instruction events, and saving reconstructed +callchains with ``perf inject`` are also unsupported. + Perf test - Verify kernel and userspace perf CoreSight work ----------------------------------------------------------- =20 --=20 2.34.1