From nobody Fri Sep 25 10:38:01 2026 Received: from mail-wr2-f12.google.com (mail-wr2-f12.google.com [74.125.225.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2DCEA36606A for ; Mon, 14 Sep 2026 09:00:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.225.76 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376427; cv=none; b=QHev5sW15tuybD0lGG5CzjmCh1n6lueilbSU6pDGTn8Q9u/qtbrd/LdYF9tvLMrVPhBYPeui8t6XmC/yhg2yjeklNDWUUkjdP8BW/Ymcy+fzxN154x7QlZK167fumewhn1PHMn1T5e2NsKTD+PrMEgmo8O7YSQ2USJvwgTkJ3q4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376427; c=relaxed/simple; bh=ZThK6w33sNeSJm6i+TcvTGH7nC9nR7E1kVeNR9qy2n8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rwXzwVw3sn8XfCbb7ESqoFfzc3mZP9QCy4nAa/RypRqkARsEkV8av7JUp0eI/WHHzUMHOcxfK4e9DHQQyJZdmdCW+Xw7zHI3Rzm31mi+gQkgqMKw7jIlx/UhhxjeJs6d4GtShAHUqNMAc8VpjheK5A52Nb9mmlzE/FqFxiX5GxE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=tHQ+GRaj; arc=none smtp.client-ip=74.125.225.76 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="tHQ+GRaj" Received: by mail-wr2-f12.google.com with SMTP id ffacd0b85a97d-4834977ae75so901674f8f.3 for ; Mon, 14 Sep 2026 02:00:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1789376419; x=1789981219; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=JkGTDT04pW78/8HwUzjAbakPSC/5O9ox51K5klLa3hc=; b=tHQ+GRajkKYQKWHFzXoLVGcbAldVtcqZIpfQxBR2MmUS6RB3fAJZjs5taHciQCFDTO iaxndw+jbbJh8ukbOHaFF5+hAiM8UgeZo7eN9Oio/weWefkrTAQhTEpUd8xR6yZeCgIZ iKpuf7sBRNCj8eL+WVBONpAbGajyk5v//yo3xDToe4w0xndBtRnZH21yM5KM69YYOR8Z J8suBSTkjWF/j+S3F7pVOaVAbJteu5bm4bigWswsT6AHea3J2ngctX22ccFFpQkYUCw3 ZHHU/hAuCr45GtGcaUiopMFou3g5d2YqEngGBqVJbDcu75F5annlbp5io3Nsam6/a+nT jgJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1789376419; x=1789981219; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=JkGTDT04pW78/8HwUzjAbakPSC/5O9ox51K5klLa3hc=; b=G0nonFtaYgHBJr3PNt3z4oG2gnCZlkXMIk6QgG1TF7re+q6ItV2fEL54Dr81iMcEoH yhkG0VD6s55UzOoM/Aq0D68NiAIOeC4CaOR4eXWv+Lvla0tx6Dt+IZwNLkfJk1LEXJ+q yL4T9K9qnr/LwY7GvFf/POivtv8Tt3C+TRMk1xY0lpyVm4n6LL3/01e/RSROs0FwmEuC 6TOROGbt+SyoL489+18Fm1dHRShtg6D16f+V0jc5HtHEYiwV+iFdXbgQev5/c+dgRmJd BOjJxDGh0mRdUaZpO+7w9YPRJb6eGAt3f3Y4bFKPAR+dQYfwwhJaFA9nYoHICYMnnN6z 85zA== X-Forwarded-Encrypted: i=1; AKwUvBxGTDYba1KN0aUKhpdWUlIazS7O3UyO7y07emMNgwM9XQ5Ne7m9Kqbh0Da6aEFpPx7hIzlYNeyNGUYQWk0=@vger.kernel.org X-Gm-Message-State: AFuF++mRFjzOTCM0MgeVCPAcHkRj430HPR7mNmWE6n3gS3gdO9e4wyn6 h2ETIWIGlvugZwThjmfJ9KuIXi857gCrKKs9tBrNFGmwUlhZ0C7TRCny X-Gm-Gg: AYBFou00qkrExnKugfrL5aJLGEOQkUIZ4m1p5oZQG4X8YxE4jxZP8rmRz3KXg325Shs utO3r5QumlLPe+rDyvBiog9V9ZBry1B6o6Svt4rl0OjlunJRkUpoZFFAWpjy8OJ5+rLa8nITdu4 rup+x5xV7aZq1i7529pFGFn9/FFu0We2JcVQYfeL5NEW6mpJ2ILIXsgYmLAZGVSqoFmBHP7ik+L lo4GUXlOw7AQu7k5g64IXbxTqFT4AsJ3d7wbN+nAFZjk8sxJmqxxPdfqwyzDR2tyd92JonqfD/J 2Uex17XPP8AwYSevM7A8zlG4bOkGzLMAEdEl0P11DB1HIL5MtcVkX6G78vTXOq/qtecF9SzD+Z0 G2ekrJZL48Aq0662YGAlCAScbKhVoXG76b9vnn8sXC7N5sFtAKlBYltoOZfYR50lp7tlrDWueow i4XRygr3O+n/8Uhpuo5ohsFvVsEPisSy/gFcc5L46P5ILuWLL2cLY9XRunej18Tr7HqRyLoA== X-Received: by 2002:a05:6000:491e:b0:485:b1db:5a58 with SMTP id ffacd0b85a97d-48702b18bcdmr3736086f8f.14.1789376418642; Mon, 14 Sep 2026 02:00:18 -0700 (PDT) Received: from anthony.local ([2a06:c701:9cc4:c200:33d8:8ea2:e077:ebe1]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-486eb32e7f5sm25245851f8f.9.2026.09.14.02.00.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 02:00:18 -0700 (PDT) From: Amit Barzilai To: javierm@redhat.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andriy.shevchenko@intel.com, holofermes@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, amit.barzilai22@gmail.com, Krzysztof Kozlowski Subject: [PATCH v6 1/6] dt-bindings: display: Add Solomon SSD1351 OLED controller Date: Mon, 14 Sep 2026 11:59:26 +0300 Message-ID: <20260914085931.66857-2-amit.barzilai22@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260914085931.66857-1-amit.barzilai22@gmail.com> References: <20260914085931.66857-1-amit.barzilai22@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a device tree binding for the Solomon SSD1351, a 128x128 65k-color RGB OLED display controller driven over a 4-wire SPI bus. The binding builds on the shared solomon,ssd-common.yaml properties already used by the other Solomon display controllers. Assisted-by: LLM Signed-off-by: Amit Barzilai Reviewed-by: Javier Martinez Canillas Reviewed-by: Krzysztof Kozlowski --- .../bindings/display/solomon,ssd1351.yaml | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/solomon,ssd13= 51.yaml diff --git a/Documentation/devicetree/bindings/display/solomon,ssd1351.yaml= b/Documentation/devicetree/bindings/display/solomon,ssd1351.yaml new file mode 100644 index 000000000000..80850c2ab5b3 --- /dev/null +++ b/Documentation/devicetree/bindings/display/solomon,ssd1351.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/solomon,ssd1351.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Solomon SSD1351 OLED Display Controller + +maintainers: + - Amit Barzilai + - Javier Martinez Canillas + +allOf: + - $ref: solomon,ssd-common.yaml# + +properties: + compatible: + enum: + - solomon,ssd1351 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + oled@0 { + compatible =3D "solomon,ssd1351"; + reg =3D <0x0>; + reset-gpios =3D <&gpio2 7 GPIO_ACTIVE_LOW>; + dc-gpios =3D <&gpio2 8 GPIO_ACTIVE_HIGH>; + spi-max-frequency =3D <10000000>; + }; + }; --=20 2.55.0 From nobody Fri Sep 25 10:38:01 2026 Received: from mail-wr2-f12.google.com (mail-wr2-f12.google.com [74.125.225.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B19A41443B for ; Mon, 14 Sep 2026 09:00:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.225.76 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376432; cv=none; b=kmEO6MDW56CgjBwGJF8T9NbmTMX/6eIuuU6XwZOlsCXXcntVHhpgHbyd2HcmhSfuw4unfVYCZadkgMnHfyKVKMtNfXi481CuFJfAaDz6hEfwGcVXvtzyKR93U3Udv/2AtTeGvV+t8S4x2ymV4GKH+4TGM3VbOE0+7vOGLC7FUOo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376432; c=relaxed/simple; bh=Ie0FCsE2DHtI4jhzGqR+dmG93hiTT/8SIraHQpg8y4M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=d7np0vsRJzl0Zm0tXFcFfRkoIRHCZFrzp74ay5zWZg2tFE7LrA1qEWd2GVgW2NzPZv+QrgNH1RITZ0BKE40plwNMuaaxpqy4iLTpyun28FPdFC5qjmFCa4Wykbf47eRPH/n/QCUgQsaf2EJBw4CA38MktJGZ/c8HS4NtEk/EBVo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=oHyMKVHG; arc=none smtp.client-ip=74.125.225.76 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="oHyMKVHG" Received: by mail-wr2-f12.google.com with SMTP id ffacd0b85a97d-4843c3ea1f6so702211f8f.0 for ; Mon, 14 Sep 2026 02:00:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1789376423; x=1789981223; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=VT13ksi3OXIOndUOzudMSplx3NO7d38IamwYpMwrKgo=; b=oHyMKVHGHZBwZ+N3uFSDeVSrJqzY0mn9UM25WIQkh5CXuPLM2miWF1PqI9oujKm59P NlwigdLiAvAdRIDFlhuz2iriltWCAvP3cKk0kT9VL1J9+kz39BnY5n3I1K6jY9+dKLgq 8uzof4GdCGCEE5nHfRQ1ps0rWmfMqAtdnOdhGQvsMbVAVuS2E/d3EIQ4aZkHbUQ7E3JD pAT9/Yc6Cp/WUMoY44z3C9IuqIQi3STttxajcCrXdZcH2aJoRxWowPaQZzooChTPohOU inDG7PX2NNouxtczNRiYZZ7m4DDQAqxRlfNSXajhxHBqBKh+EET+Cfs4Jg9b8bTffGCc s1hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1789376423; x=1789981223; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=VT13ksi3OXIOndUOzudMSplx3NO7d38IamwYpMwrKgo=; b=NX+ke9hyVeIkD3YpMgpwXlSNsOdMrh/7wV/LUlVJoyQEY4oQOfLGR9pF8DyUbSWw1e jJgyrk4S74ZYtsIROBITFc6I74VIWUjenxLFEG6jWW2z6dijD9TQf0o8Qh4JIaH5Tpeb OQZCfwWmz4pkIJDbqcEGPJkkyBHonUYFdb4A7/IxxzEFe6oQmyq3FvYWsFWvp3w/PxoQ /iXqhezEqIKPZjPict8qjd+6DlaLOYNw55fvAU3laWWmKLY99lNPmEn85K/KphesD6wA Agm2dYs4ODVkQbC10BQd5bZ8I7eH83eyi50+E73NKLySDNzHQ23FqNVcbEPlYMlaZXrw ooCA== X-Forwarded-Encrypted: i=1; AKwUvBwwVlzMyd4LLTQW5c47INDtW1NY3Wf6fYZFz2iaMB48vAiAWP+9bQWfRfau1/uRYAB6LoWWxjwfxoumZRk=@vger.kernel.org X-Gm-Message-State: AFuF++nq3iPyGKMARCnUBFJAU3Tpd5y/Olbi8uAkXaajZUF8m7gRvOTU wSG5QPdZXtufev70gAFCB9MIjSsrzVkcH/4c5VhqPOAzSk7C75Ix187C X-Gm-Gg: AYBFou3tUJqE/NGzYso0QyIQVfiF0VTjIbRIo2ngUNkQ/mRvCAvekon2q/RhjzTE+HQ otDh/f842jyY4i7MsBKlxPGo3LLRpZPvXdiIfkgDKClx1Es7W6YPw5l7q7zy+JEdmDhUdNUjmei FAjKUixwshnclt+8APGGHcU8Mzak3r2zwT3MjaI+O48n4T12OEmhmavm/CvYnnzxaIgwYmDb62E B97zDFcc+zT56ayCRMCyDqJaP/gprllRCmwx/QGUrpziUDZVD78nwBXk4tMBoGQPUSWY/HfKk4U mIPJxmxc1S89cGvsPPMM7i5kyFHKsPIrn+bunpbw10OxWFj0EtpAcM8oAbWDxtN2UKq1YzNYiAw yWpqEJmPp8bdpBAZ+Xh+mf9M4oKx9p8MNjSxFP5KdmNPQFCBfDVJIhJ7zUKYOxvVVOU1w09HFhX vY7BrbEi4TIuhTdQ+M1P8jcuxSakT8gH5/YW+xJ+cySEho7aweuMcu4Jm3gTSwBWOLHiLdoyqgp uYqwkXOTYX4 X-Received: by 2002:a5d:5f8e:0:b0:485:8a46:b3ce with SMTP id ffacd0b85a97d-48702b8316dmr1416118f8f.54.1789376420461; Mon, 14 Sep 2026 02:00:20 -0700 (PDT) Received: from anthony.local ([2a06:c701:9cc4:c200:33d8:8ea2:e077:ebe1]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-486eb32e7f5sm25245851f8f.9.2026.09.14.02.00.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 02:00:20 -0700 (PDT) From: Amit Barzilai To: javierm@redhat.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andriy.shevchenko@intel.com, holofermes@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, amit.barzilai22@gmail.com Subject: [PATCH v6 2/6] drm/ssd130x: Change SSD133X color format to RGB565 from RGB332 Date: Mon, 14 Sep 2026 11:59:27 +0300 Message-ID: <20260914085931.66857-3-amit.barzilai22@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260914085931.66857-1-amit.barzilai22@gmail.com> References: <20260914085931.66857-1-amit.barzilai22@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" SSD133X screens were driven at 8bpp RGB332 despite supporting 16bpp RGB565. Switch the SSD133X data path to RGB565. Assisted-by: LLM Signed-off-by: Amit Barzilai Reviewed-by: Javier Martinez Canillas Reviewed-by: Andy Shevchenko --- drivers/gpu/drm/solomon/ssd130x.c | 48 ++++++++++++++++++++----------- 1 file changed, 31 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/solomon/ssd130x.c b/drivers/gpu/drm/solomon/ss= d130x.c index feec4933e3e6..cbf77a74c4fa 100644 --- a/drivers/gpu/drm/solomon/ssd130x.c +++ b/drivers/gpu/drm/solomon/ssd130x.c @@ -146,6 +146,11 @@ #define SSD133X_DEFAULT_CONTRAST_B 0x50 #define SSD133X_DEFAULT_CONTRAST_C 0x7d =20 +/* ssd133x remap byte (data of SSD13XX_SET_SEG_REMAP) */ +#define SSD133X_SET_REMAP_COM_SPLIT BIT(5) +#define SSD133X_SET_REMAP_COLOR_DEPTH_MASK GENMASK(7, 6) +#define SSD133X_COLOR_DEPTH_65K 0x1 + #define MAX_CONTRAST 255 =20 const struct ssd130x_deviceinfo ssd130x_variants[] =3D { @@ -618,17 +623,17 @@ static int ssd133x_set_contrast(struct ssd130x_device= *ssd130x, u32 brightness) static int ssd133x_init(struct ssd130x_device *ssd130x) { int ret; + /* + * Horizontal address increment, normal SA,SB,SC (e.g. RGB) sub-pixel + * order, COM split odd even and 65k (RGB565) color depth. + */ + const u8 remap =3D SSD133X_SET_REMAP_COM_SPLIT | + FIELD_PREP(SSD133X_SET_REMAP_COLOR_DEPTH_MASK, SSD133X_COLOR_DEPTH_65K= ); const u8 cmds[] =3D { 2, SSD133X_SET_MASTER_CURRENT, 0x06, 3, SSD133X_SET_COL_RANGE, 0x00, ssd130x->width - 1, 3, SSD133X_SET_ROW_RANGE, 0x00, ssd130x->height - 1, - /* - * Horizontal Address Increment - * Normal order SA,SB,SC (e.g. RGB) - * COM Split Odd Even - * 256 color format - */ - 2, SSD13XX_SET_SEG_REMAP, 0x20, + 2, SSD13XX_SET_SEG_REMAP, remap, 2, SSD133X_SET_DISPLAY_START, 0x00, 2, SSD133X_SET_DISPLAY_OFFSET, 0x00, 1, SSD133X_SET_DISPLAY_NORMAL, @@ -829,14 +834,20 @@ static int ssd133x_update_rect(struct ssd130x_device = *ssd130x, * COM0 to COM[N - 1] are the rows and SEG0 to SEG[M - 1] are * the columns. * - * Each Segment has a 8-bit pixel and each Common output has a - * row of pixels. When using the (default) horizontal address - * increment mode, each byte of data sent to the controller has - * a Segment (e.g: SEG0). + * Each Segment holds one pixel and each Common output has a row + * of pixels. A pixel is 8 bits (one byte) in the 256 color + * (RGB332) format or 16 bits (two bytes) in the 65k color + * (RGB565) format. When using the (default) horizontal address + * increment mode, the pixel data is sent Segment by Segment + * (e.g: SEG0 first). * * When using the 256 color depth format, each pixel contains 3 - * sub-pixels for color A, B and C. These have 3 bit, 3 bit and - * 2 bits respectively. + * sub-pixels for color A, B and C. These have 3, 3 and 2 bits + * respectively. + * + * When using the 65k color depth format, each pixel contains 3 + * sub-pixels for color A, B and C. These have 5, 6 and 5 bits + * respectively. */ =20 /* Set column start and end */ @@ -909,9 +920,10 @@ static void ssd132x_clear_screen(struct ssd130x_device= *ssd130x, u8 *data_array) =20 static void ssd133x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_= array) { - const struct drm_format_info *fi =3D drm_format_info(DRM_FORMAT_RGB332); + const struct drm_format_info *fi; unsigned int pitch; =20 + fi =3D drm_format_info(DRM_FORMAT_RGB565); if (!fi) return; =20 @@ -978,17 +990,18 @@ static int ssd133x_fb_blit_rect(struct drm_framebuffe= r *fb, struct drm_format_conv_state *fmtcnv_state) { struct ssd130x_device *ssd130x =3D drm_to_ssd130x(fb->dev); - const struct drm_format_info *fi =3D drm_format_info(DRM_FORMAT_RGB332); + const struct drm_format_info *fi; unsigned int dst_pitch; struct iosys_map dst; =20 + fi =3D drm_format_info(DRM_FORMAT_RGB565); if (!fi) return -EINVAL; =20 dst_pitch =3D drm_format_info_min_pitch(fi, 0, drm_rect_width(rect)); =20 iosys_map_set_vaddr(&dst, data_array); - drm_fb_xrgb8888_to_rgb332(&dst, &dst_pitch, vmap, fb, rect, fmtcnv_state); + drm_fb_xrgb8888_to_rgb565be(&dst, &dst_pitch, vmap, fb, rect, fmtcnv_stat= e); =20 ssd133x_update_rect(ssd130x, rect, data_array, dst_pitch); =20 @@ -1446,10 +1459,11 @@ static int ssd133x_crtc_atomic_check(struct drm_crt= c *crtc, struct ssd130x_device *ssd130x =3D drm_to_ssd130x(drm); struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(state= , crtc); struct ssd130x_crtc_state *ssd130x_state =3D to_ssd130x_crtc_state(crtc_s= tate); - const struct drm_format_info *fi =3D drm_format_info(DRM_FORMAT_RGB332); + const struct drm_format_info *fi; unsigned int pitch; int ret; =20 + fi =3D drm_format_info(DRM_FORMAT_RGB565); if (!fi) return -EINVAL; =20 --=20 2.55.0 From nobody Fri Sep 25 10:38:01 2026 Received: from mail-wm2-f12.google.com (mail-wm2-f12.google.com [74.125.225.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56CB54119F7 for ; Mon, 14 Sep 2026 09:00:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.225.140 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376435; cv=none; b=tC91SNBEs50cJBzunb/EpFQJuHQBzhAfhsD2BjJCoTuE8g04MqnM30WxexcamsLm1OrHUc56kH/LnRZ8FqVD9QFY+KIHO/7G+oLn/Wm13+jpJRlI8GDb/bEBUMvUBG9JeiGUuz0j0TT8wYXPSC5x4a7Bhb/eLH8uwDF8GngZ5tg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376435; c=relaxed/simple; bh=yyET+MmmYD+WyLCEXc1+I3yQ2jnZot7dAuEkT2NMzjA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e/S2qF1W2Wcvk2QycpPW/0YWY0IeYufqquIDfYidy9PrCwEeBgEUsC8owEzLmfD9IQS9PJlUKEgW1zjLDWeTrcAdKoKBMgwqf/DWn5jvDg4ntDw7czeJw0eL3C104G3rQSVpL+qknwqSA+OMuNQPga+M4P/ua5RznfeKab0OXp0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=WILlPdQx; arc=none smtp.client-ip=74.125.225.140 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WILlPdQx" Received: by mail-wm2-f12.google.com with SMTP id 5b1f17b1804b1-49e69b9e16aso15917205e9.1 for ; Mon, 14 Sep 2026 02:00:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1789376423; x=1789981223; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=rzH1SlhYJo44ZT//ESye8TSMbGDxpawi+vZSdaQIq4M=; b=WILlPdQxNbllY4DE00lAN6aoxWrOkO/TDLiFnhtcwH9vG/K6asoqWJ+lvkTRH3xAso M9skKncG9HdTbw84eu+auEHJu4RQ2ypRIP8iisiKLEUzU+Vs9Kv2grkipQ6InGEA2OA4 VMA3uKnDAx0IfxA1GXxlre6V3kTAF0y563YBKcpawTWYohKiafh0oFHFkjE48+tEXlwZ DUhXt88Dg7r4X4dQ9seDuEEemfMn3C6wM/U1w8iGU+0EKIRm+/fJOwj/gNP8dNcs44py fyhPoG3sscFiB39rMMHwXMG/+ozXlbefR1lpD5I0wCCpheeUc6LOgLpHp2Xl5NoInaW3 r3HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1789376423; x=1789981223; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=rzH1SlhYJo44ZT//ESye8TSMbGDxpawi+vZSdaQIq4M=; b=XPf4sTHmiGEoj5Ss3kgEVN00USXbS3xvG0VDziznL6yAQZ2lSfLq6FH/iLTNY+KmBr bDQFzSwEiMIUFdF0/WUSJu3VdjdymFA3wgM+OKNwyjNfjxhKOsCm5AJaTh0eRe84f2lT gkewgVbvOrdyj8oMXkUE6rCzIEtmSdkDDo0hzM461UUF551p2lQI36eRbMS8WxBMrEjk D799NS46bPP3YWsbheOdkSxOytp/tPUDUuggsLR7c+t2US1l2mWyB9G3YyUhebGzvjF7 Dbdxp8Wb3StfHqR3kZlIsn6Of9mtx6RgnkbGQ9M8RHTKpcvOArk+B0qqn70DQIhfBGpJ X5gQ== X-Forwarded-Encrypted: i=1; AKwUvBxDE7IKIP/F60kQ5kvQ6oGpVsRVZhzSh0Wv2gsQ3bTWRg1Wvv5t5/UhsvtuFH3qBx4Am1J9xrXloA3fVvY=@vger.kernel.org X-Gm-Message-State: AFuF++k8vnklNa2Tu8qdbSReg15oMhWa1+DikhGs+S2tMrVfyptbbV1i d+hLTyWAmFot1ee6F1qdPjIzLhqQyz1ZcWl23PrJGdrFhJIATlA+dNFV X-Gm-Gg: AYBFou3UT6dyujDL2LgRu+xQC8jMgAlFSJAZJW28mwqtlS7zDet2wfuUM3RkxFQPG7A 6M7zE7pyVKgSxZBQMo2T9LoZb8Jaw4NKa7OzBTLcWPnqgVyQMx+dBsiUjPRsr1K+zcWurqQFRG7 S27JGKK9FBJsd3vTTdhRBXb2rQeJUMN7c6IpjCMdB8RSOaVHrJwLjYKxo+n3RZ6kvUxQtoHSa0R D/MhO1/HRPcDcblCNus8xIItTrKeBwL/ijJnm8AjIoaxNf+TY0apGJaPTCAPqwYIHfrvv0rABUc LGmN1XLcbhq6VGKXddUazEApW5lIGey8guV/+1+u1DBi0+MeOcf5h8iqHR4yQwl1eLd40TQpIer yAIMK0nW8ng57v48by8Giyqjo0BN1+XUQ6PpSSnGf/Nv6siPqzZouHgCGaK+HyfP0eb8LFhflkK AbxjCLynf0Z6THA/0QwtRD2Za7PtMAbLSfpbdV8OtnxAQxLyTsmZMk8iQrKjZLYQKLkP6ud98Q5 oE36rDWAaj1 X-Received: by 2002:a05:600c:4ecc:b0:499:7219:122f with SMTP id 5b1f17b1804b1-49e7a662f2emr17392085e9.4.1789376422333; Mon, 14 Sep 2026 02:00:22 -0700 (PDT) Received: from anthony.local ([2a06:c701:9cc4:c200:33d8:8ea2:e077:ebe1]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-486eb32e7f5sm25245851f8f.9.2026.09.14.02.00.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 02:00:21 -0700 (PDT) From: Amit Barzilai To: javierm@redhat.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andriy.shevchenko@intel.com, holofermes@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, amit.barzilai22@gmail.com Subject: [PATCH v6 3/6] drm/ssd130x: Constify ssd130x_write_data() 'values' parameter Date: Mon, 14 Sep 2026 11:59:28 +0300 Message-ID: <20260914085931.66857-4-amit.barzilai22@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260914085931.66857-1-amit.barzilai22@gmail.com> References: <20260914085931.66857-1-amit.barzilai22@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" At no point does ssd130x_write_data() change the bytes it receives via the 'values' parameter. Constify the parameter so const-qualified buffers pass through without casting away const. Signed-off-by: Amit Barzilai Reviewed-by: Javier Martinez Canillas Reviewed-by: Andy Shevchenko --- drivers/gpu/drm/solomon/ssd130x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/solomon/ssd130x.c b/drivers/gpu/drm/solomon/ss= d130x.c index cbf77a74c4fa..1d834be6243b 100644 --- a/drivers/gpu/drm/solomon/ssd130x.c +++ b/drivers/gpu/drm/solomon/ssd130x.c @@ -252,7 +252,7 @@ static inline struct ssd130x_device *drm_to_ssd130x(str= uct drm_device *drm) /* * Helper to write data (SSD13XX_DATA) to the device. */ -static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, = int count) +static int ssd130x_write_data(struct ssd130x_device *ssd130x, const u8 *va= lues, int count) { return regmap_bulk_write(ssd130x->regmap, SSD13XX_DATA, values, count); } --=20 2.55.0 From nobody Fri Sep 25 10:38:01 2026 Received: from mail-wr2-f12.google.com (mail-wr2-f12.google.com [74.125.225.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0DCA1418365 for ; Mon, 14 Sep 2026 09:00:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.225.76 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376432; cv=none; b=QlTCgvWUU5AGgUygB6SEmcLNki9KD4sLE0Bavj5Y1JHSd++265t7pHJtVAoPSixtDBQblrpVrfKQ4q7gCL9aUYxCuGsNktSQ4XZWsM+5JSgAkWAJwb2ybfcQLL+WnP1tl03Gk/xVjd8J6a4+294OgEJy9kimvWKaxH6V6sxkhFA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376432; c=relaxed/simple; bh=DHUqtTYkrYqLybqCJbNT+5Z0TBOUvJuXNKgM8+nOZTg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fqyfKQERvHbMloBRkMGnIVDcoxKyZW06iabI0oO3qb1N4a6T3XkMB2uJLWLvSrDTAfAxQs1WxGM1Nv3ktOSKPyz8WaVxAdNZ3HhxCRK6smPQjkAYKgFincaDBY9zFAZ981NzbH5nM1ktoLva6meCjHfm9i3DPg0crEsmBkVdcDI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=gFovcJpN; arc=none smtp.client-ip=74.125.225.76 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="gFovcJpN" Received: by mail-wr2-f12.google.com with SMTP id ffacd0b85a97d-48583cc7ab1so740346f8f.2 for ; Mon, 14 Sep 2026 02:00:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1789376424; x=1789981224; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=JgEITP5zYNHD7Hd4jE+xDuU4E1MB+W23iELVzvgQk0c=; b=gFovcJpN+hkqd7uP774xLXZj8ptFzEq47bqOzVUqy0FvBK8bmjupe9YIJAXms51olg x68QzK37tkWjhxAoDV3uEppZu3SiNsY2ulYygqhAuRZ4i2yW9f5qlj/rUawKgv7McPuS Y9Tk/YSY/LlLZd6oBqPMjFmP8JIZlD/LUza1vJhTGpbPXT0a8E0OObgnZOYinG/NjVFt Iio3cB/n0CEuVrpQTV7tbV5g7DWz8xNHpXOa6sQyFDZDCsaq7E5g+caADuqF188Sszy+ U+1zaOxLUe1VIPDMoNAppmAR4OO3R5YgnU9brXNgYG32U/mpgHL2NIZ3JUA87ile3bTJ 5txA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1789376424; x=1789981224; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=JgEITP5zYNHD7Hd4jE+xDuU4E1MB+W23iELVzvgQk0c=; b=VIhTEtko4CwClNHLFKIsNvrkau2lHwZ99Sjhd9/nL5MtwmFkpzyBS3wNSDBSp8D20a 12/Jl1PzDdqY5V2KiM2Ib+TaXWrxhArcNlx/Y6M1XHk7GwfAGQbuon4Pkj2gWi3vL1vo vkvszhKerO9cZ5tWybh8qq5q1g/xYVpoEx/4FTMfP/Ojcn3N2bLcR5bgaHhP0KW0QRui BsJAEahFmO1EjqNibUDCWxKZmfg3DD8UubopMd7D9ZsghklWpMj/RZ6VMmywK4eUov2S evsyicMuU5yrnviFb5j93iTNY4KpV98H1JSDMuKUFITXn8jQVeuEyZ5Hhp6fguNEzA9W QA3Q== X-Forwarded-Encrypted: i=1; AKwUvBxA5hM3QRsy+QcaKAhL/ToAMVDjg3Ql8fsenIzvolzq/VDwwdtfGhUAs9DEdfRoJuC+hFykN7tZpu9Cjeo=@vger.kernel.org X-Gm-Message-State: AFuF++mtYqNg89bnURxBokFOVNnCbE1AayqGX/JTqL2JLSNmnUDsM59o Xp/KHXV6BHeNrq9kGhMlfJD4/j84gdZxEGEYmku16WwWQFTPeTFxXiH0 X-Gm-Gg: AYBFou3n+Jwdxcq/coMWH7aGR3GJrTl2u0xp8b0dcZ6+NTofMg9DbKDGUzc3B+iOHdc WwCXLzruJVn4VENkejAsPa5HgIs8X04q0+sCtudQBYImWeX8YtbYFwqYOY3GQOCH/a8zz4H62Gq nE7zHZVzf48nvVID+82XqdRR9yRoq/kXEsv7fQA4AOIMNx7QNPwm0ECrPH9BK7+mibZXAmX1XSd 2kkkBKOepagXlrs3DDXk/5O3YDiZonwy4rBwPXIly5ympbCskpgj7TM5EH7qwDbYTPRmBTa73ma O6RrEHuohYicAJoD0rzb2rSnilbWZszy8cpfvrOM/UDg3BorPM/aBQHMejynkAeYNgoREBpp31M tHzjoUq2EKmd6yF4YrwCb/U1FYD3YdIc7V2844/jbrZOCK0Ys419X8A9itSfDKC9GZOVDlM7QHC HdxwtmJ2km4vBgHqm6aWEQtKlcMmBsSc2b1z9rf/A6amZ5qYSEobhrHXNzzCS3pwYo0OlNI3Aio Hz0KzRMapqi X-Received: by 2002:a05:6000:41da:b0:485:ac0e:6fa6 with SMTP id ffacd0b85a97d-48702ab93bdmr1778531f8f.14.1789376424193; Mon, 14 Sep 2026 02:00:24 -0700 (PDT) Received: from anthony.local ([2a06:c701:9cc4:c200:33d8:8ea2:e077:ebe1]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-486eb32e7f5sm25245851f8f.9.2026.09.14.02.00.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 02:00:23 -0700 (PDT) From: Amit Barzilai To: javierm@redhat.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andriy.shevchenko@intel.com, holofermes@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, amit.barzilai22@gmail.com Subject: [PATCH v6 4/6] drm/ssd130x: Replace positional ssd130x_spi_id[] initialization with C99 Date: Mon, 14 Sep 2026 11:59:29 +0300 Message-ID: <20260914085931.66857-5-amit.barzilai22@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260914085931.66857-1-amit.barzilai22@gmail.com> References: <20260914085931.66857-1-amit.barzilai22@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" ssd130x_spi_id[] is initialized with positional initializers, which easily create easy-to-miss bugs when changing the members of the target struct (struct spi_device_id in this example). Change this to C99 initializers to guarantee each member is initialized with the correct value. Signed-off-by: Amit Barzilai Reviewed-by: Andy Shevchenko Reviewed-by: Javier Martinez Canillas --- drivers/gpu/drm/solomon/ssd130x-spi.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/solomon/ssd130x-spi.c b/drivers/gpu/drm/solomo= n/ssd130x-spi.c index b52f5fd592a1..be50e5aa2c87 100644 --- a/drivers/gpu/drm/solomon/ssd130x-spi.c +++ b/drivers/gpu/drm/solomon/ssd130x-spi.c @@ -160,17 +160,17 @@ MODULE_DEVICE_TABLE(of, ssd130x_of_match); */ static const struct spi_device_id ssd130x_spi_id[] =3D { /* ssd130x family */ - { "sh1106", SH1106_ID }, - { "ssd1305", SSD1305_ID }, - { "ssd1306", SSD1306_ID }, - { "ssd1307", SSD1307_ID }, - { "ssd1309", SSD1309_ID }, + { .name =3D "sh1106", .driver_data =3D SH1106_ID }, + { .name =3D "ssd1305", .driver_data =3D SSD1305_ID }, + { .name =3D "ssd1306", .driver_data =3D SSD1306_ID }, + { .name =3D "ssd1307", .driver_data =3D SSD1307_ID }, + { .name =3D "ssd1309", .driver_data =3D SSD1309_ID }, /* ssd132x family */ - { "ssd1322", SSD1322_ID }, - { "ssd1325", SSD1325_ID }, - { "ssd1327", SSD1327_ID }, + { .name =3D "ssd1322", .driver_data =3D SSD1322_ID }, + { .name =3D "ssd1325", .driver_data =3D SSD1325_ID }, + { .name =3D "ssd1327", .driver_data =3D SSD1327_ID }, /* ssd133x family */ - { "ssd1331", SSD1331_ID }, + { .name =3D "ssd1331", .driver_data =3D SSD1331_ID }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(spi, ssd130x_spi_id); --=20 2.55.0 From nobody Fri Sep 25 10:38:02 2026 Received: from mail-wr2-f12.google.com (mail-wr2-f12.google.com [74.125.225.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 49D2341A4FB for ; Mon, 14 Sep 2026 09:00:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.225.76 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376439; cv=none; b=mFNIJHkJ/qMcVGZJnBT8ODMm+MelrGKJiRJHSrGwF3lXdjTOSSGRBScXJ5/oRA//a1SzgS4p1nqe4sR9dPcY+Rr70FvGgr+Sn7zHPapS/gBWG/EtIBKWJs/ayglREC4li5V2yHoTTWukcaJTV+5ufAp4HdxWhw2X1DEvMFHHTA4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376439; c=relaxed/simple; bh=fd4IwnttAj8+fxTWq2c8ZtjFO80h/q8D0v0Pef6pMwg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CYv1XCTLT7Y8OVPCw/UarnuGnpHtXuTuuO99dwva9jB1e/dkTMkOYwvkYtPzM8ko4TKEK/v5gSd11CeyKcLxbe2VRmG/pnd/Edv65HMQ3PIrGrv85pS7grIQ1YhKmcAm+m3/7ey7wH79UOYli3GcyymleozAzQOvjSdRK4i0YTo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=WVynkl2Z; arc=none smtp.client-ip=74.125.225.76 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WVynkl2Z" Received: by mail-wr2-f12.google.com with SMTP id ffacd0b85a97d-482f6350faaso741676f8f.0 for ; Mon, 14 Sep 2026 02:00:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1789376427; x=1789981227; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=zaMjbnfDAPZVK+O4yC2H4PKXkZqx8bBFkgVpIjfU32g=; b=WVynkl2Zq7N8/va0ac9dIVoEfryijXIX6UhMCF8GnLH7lpf99tkgApeEv8kVOd90Jw dgBs2RHK7ryNuA4ysWEMUWMSfx26DGORzrgXm+qsqFFLAUccwnxmGkWubQefUE+fVH1l TTZr2x2u3Y8RP+Jdq8EHuQqtVMeDj/WJRjUpBlzBjfvLaett2/qmuG10zKDX7WmjAb59 M2vP/dqGetPNFWj0BPr8MBWy69XQQTaRPDoFHn/cgQhihs9WSK8ASKp9J8v1zp0tNxuy Rs1mTczMwQ6HGhru/A5zX0V1cOKEcrWShmVyeQTp2szBFM9AfZJXPcYvza5WWgVNIQEx /a5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1789376427; x=1789981227; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=zaMjbnfDAPZVK+O4yC2H4PKXkZqx8bBFkgVpIjfU32g=; b=tTRcd+ehTXyfOxPnFearAGadyDV4E2FdkagNVNoTqGECukxSYol7zpj68DhSr1Txc2 1koLyrfZXNPcyJb2FG7BpVQNfpFWHXcRcHNL2JUEOIexM+hqhgxoHR+0pb4udszOqkDx xrMwv4Ura2PmwFywbGCDxTMJ8m8ZHZ/SYkB+OZs/DKgNPfiSe8bIpYx7biMahWyZWZJ8 2kNz6r3eeIjMLb98YukEYG1N9g3Jj13vNaMH0E0s9cHkDFmjq6mKVnv4lg0SWJL4uFt6 wrtLvwCB1OUQgnJCTT1ruBK3ai2e0L7fP3gVNXhrtKlGva9YXTBhx8IOG1ClGf/gdZPW 2XbQ== X-Forwarded-Encrypted: i=1; AKwUvBygamN0W+mg0LRsZcE6Jp47KgJ90MK6sHg1Ylh+bf0+BAJZo5I74YKGCsezp3673maZnjtKOr7JGe0qkTE=@vger.kernel.org X-Gm-Message-State: AFuF++moX3g3Zng2DUZxQsAgC7eJxd9dbt98wIwvU4ZnaBKOl83AJfFA M3gYem4SGTEB5a+RgL208PQuXnZdncsZ6kzxUWGQuNsr1afRepY6I4jM X-Gm-Gg: AYBFou2ywRLE2ZgOUCH2YS81CuzhCnV62R8HJTtCln8LsZqqd710cJUmRBwueg66ppq aaSbQQFhqj4rUgpWJ5KamunnOhV5sc44+rHHEckCa/UaGhIlZjR1hytc6hL1h1/BuYYBgGrpN3U 6xVKhkgB/DS8g8JaUD3R5hMcfSDrEnEQmCzK2sfV1XadVNofuqakmu7owYfm8bD73z5gNNq+j3B TvaCainrm6KHPhxKfSqIVLskBw8n42VXQ3UtcGE+nFyteGo/RPzW7boHWTINCY5Oner4eTlYrcT JybXeFjL8IQ8IjKxVmLJdD34pWu2Xol+BTZJAwYXRhZrelQAZjtF178CxAcNa7G4mTSGtQuLpIk Oo+8BjiYlAu8Kmg4++E5VvyRQgZe3EA+Pj6c/YWPkdY1uvVL1CPUvioriDdHFMreuYehH9RJ2EK p49rQ4Cpm3qCNPIhmmlJKLl2oUJC0DWxeAj79lWViy2MKacFya+iP+i8jBcxXv6gzHX70l4fbBF qxM0ch8X1uV X-Received: by 2002:adf:e18d:0:b0:486:f955:895e with SMTP id ffacd0b85a97d-48702a9a5b5mr1446542f8f.7.1789376425972; Mon, 14 Sep 2026 02:00:25 -0700 (PDT) Received: from anthony.local ([2a06:c701:9cc4:c200:33d8:8ea2:e077:ebe1]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-486eb32e7f5sm25245851f8f.9.2026.09.14.02.00.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 02:00:25 -0700 (PDT) From: Amit Barzilai To: javierm@redhat.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andriy.shevchenko@intel.com, holofermes@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, amit.barzilai22@gmail.com Subject: [PATCH v6 5/6] drm/ssd130x: Implement ssd130x_write_cmd() on top of ssd130x_write_cmds() Date: Mon, 14 Sep 2026 11:59:30 +0300 Message-ID: <20260914085931.66857-6-amit.barzilai22@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260914085931.66857-1-amit.barzilai22@gmail.com> References: <20260914085931.66857-1-amit.barzilai22@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" ssd130x_write_cmd() and ssd130x_write_cmds() each carried their own regmap_write() loop over SSD13XX_COMMAND, differing only in how the caller supplies the bytes. Turn ssd130x_write_cmd() into a thin variadic wrapper that collects its arguments into a small stack buffer and defers to ssd130x_write_cmds(), and move the protocol comment onto the latter, which is where the loop now lives. No functional change: the bytes sent and the bus transactions used to send them are identical for every chip on both the I2C and SPI transports. Assisted-by: LLM Signed-off-by: Amit Barzilai Reviewed-by: Javier Martinez Canillas --- drivers/gpu/drm/solomon/ssd130x.c | 65 +++++++++++++++---------------- 1 file changed, 31 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/solomon/ssd130x.c b/drivers/gpu/drm/solomon/ss= d130x.c index 1d834be6243b..fd13250ef56a 100644 --- a/drivers/gpu/drm/solomon/ssd130x.c +++ b/drivers/gpu/drm/solomon/ssd130x.c @@ -258,41 +258,12 @@ static int ssd130x_write_data(struct ssd130x_device *= ssd130x, const u8 *values, } =20 /* - * Helper to write command (SSD13XX_COMMAND). The fist variadic argument - * is the command to write and the following are the command options. + * Helper to write a command (SSD13XX_COMMAND) from a buffer. The first by= te + * is the command opcode and the following ones are its parameters. * - * Note that the ssd13xx protocol requires each command and option to be - * written as a SSD13XX_COMMAND device register value. That is why a call - * to regmap_write(..., SSD13XX_COMMAND, ...) is done for each argument. - */ -static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count, - /* u8 cmd, u8 option, ... */...) -{ - va_list ap; - u8 value; - int ret; - - va_start(ap, count); - - do { - value =3D va_arg(ap, int); - ret =3D regmap_write(ssd130x->regmap, SSD13XX_COMMAND, value); - if (ret) - goto out_end; - } while (--count); - -out_end: - va_end(ap); - - return ret; -} - -/* - * Write a command byte sequence from a buffer. - * - * Like ssd130x_write_cmd() but takes a pre-built byte array instead of - * variadic arguments, handy when the command is already in an array or - * when the caller wants to use sizeof() for the length. + * Note that the ssd13xx protocol requires the opcode and each parameter to + * be written as a SSD13XX_COMMAND device register value. That is why a ca= ll + * to regmap_write(..., SSD13XX_COMMAND, ...) is done for each byte. */ static int ssd130x_write_cmds(struct ssd130x_device *ssd130x, const u8 *cm= d, size_t len) @@ -309,6 +280,32 @@ static int ssd130x_write_cmds(struct ssd130x_device *s= sd130x, const u8 *cmd, return 0; } =20 +/* + * Variadic wrapper around ssd130x_write_cmds(). The first variadic argume= nt + * is the command opcode and the following are its parameters. + * + * The arguments are gathered into a fixed size buffer, so at most 8 bytes + * can be sent per call, i.e. an opcode and seven parameters. That covers + * every command this driver sends through it. Commands taking more parame= ters, + * such as the grey scale tables, must use ssd130x_write_cmds() instead. + */ +static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count, + /* u8 cmd, u8 param, ... */...) +{ + u8 buf[8]; + va_list ap; + + if (drm_WARN_ON(&ssd130x->drm, count > sizeof(buf))) + return -EINVAL; + + va_start(ap, count); + for (int i =3D 0; i < count; i++) + buf[i] =3D va_arg(ap, int); + va_end(ap); + + return ssd130x_write_cmds(ssd130x, buf, count); +} + /* * Run a packed command sequence. The format is a flat byte array where e= ach * entry starts with a length byte followed by that many command bytes. A --=20 2.55.0 From nobody Fri Sep 25 10:38:02 2026 Received: from mail-wr1-f48.google.com (mail-wr1-f48.google.com [209.85.221.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 419A9411F9D for ; Mon, 14 Sep 2026 09:00:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376438; cv=none; b=VA38wXv7E69/sa7fzXkpHLmFNc1cxZwDMTS4GyS9tzbtTNobBK9lDCO1EV4WomCz07F8oyDDbuUioQF3wuXW49eG75ggbzThOQ0sFMAjwVQNzibefNqOitEG9SNo5xQ3H4AbdpMhTXLCfMEGulI0Z5VgoDNONCQxOIGrznAtt2g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789376438; c=relaxed/simple; bh=AR6mHKKkVg/yxmxi0LXkA57EnOvPtJaM8g+L+HA/UmA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dn5k0r8wllyFA7cjpkRZ2VYWOznOXfDWT1Ytw1ZxA6z7uL4Mh3n2pUluiAE43vrjtXVuue3t9kMFAESUWPTg3xveFngR9rxphPG4KQ7qbsJt7zN/umiPLFd63AmkLVf14ClQc/PhcJGiuG5HSDPymwhDZCYl8HmkSMgG2+yYivw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Ax6p0WEe; arc=none smtp.client-ip=209.85.221.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ax6p0WEe" Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-4843e397f74so1822693f8f.1 for ; Mon, 14 Sep 2026 02:00:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1789376429; x=1789981229; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=v2HrjQPpcVWm6BhiXO9b7DCr+5kSL3AyFXfVdl7HOS4=; b=Ax6p0WEeEZAtdU/Pc1eHTX6GALfgyvIPkypwamzoGA9nM8jSGpB3zE/sV1fYEHvB0l C2hJBJdHpGaIhDNt1dL7O+ZcHxWXcO7eC9gjIOka2sFuVcWq7TUwgiMocFeLoWuYFKOD fYcohfb4DDHZ2H/sndCIpIL4Gt0OtLJr8VvVA6dftII7pSUt4f2+o5o33aqLqfmrQxX1 DTdbZfvgzoSmEypAxOSZIu5TDjS7pbZ9JzPJ2nU6/toJ8obCnWC5pxAoC62xBEEoWOuS gApE9RYdIos8qLXmprvGykqK1NeB01uIHkk5aIYsGG4QtiLpQ1amJXpcmq27CsTeG+AC CdjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1789376429; x=1789981229; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=v2HrjQPpcVWm6BhiXO9b7DCr+5kSL3AyFXfVdl7HOS4=; b=QOVkdQT8p0J+b+uxZVGCKq820/gaKGY2v9DRDR0Bb94hE+5DI6mP2ERmbR8zpAoqtR wRL1nQJ9RHQjjpYiHdiB6VdxV0C70Mni0iw33vszflAo+LptfyOoiheu9wduNi7HdW3h P5UEMb03QC9tugnwGDCT4guLFDuGJ4ktyhXMY7wnIk0mq3h4HMDVqEJ1fNBPEnBxhBCs q6e+Dhpp5Cye6c807oY98CYlFvYx1//hcRJs2vhQcXhEjwhphRef/5vi1+G29dC/ng6I UnVsnPjEUdBIHC1JU+sfObRqVOlDHq2VIZ2OxzaXzSJOrIQUrFngdfdB7wj/nterFAOI kMxg== X-Forwarded-Encrypted: i=1; AKwUvBwkqj7h2JbjBPm56DOYRIQVbHSc2v9S64yfRx2RvaO5GCvfwrtKr+mA/+YSPiNsKbOD4pBgm1r0M4wIkRg=@vger.kernel.org X-Gm-Message-State: AFuF++lgimdjOH/KwUAhtDLaqc04RA6PB2UF9bhrIs+NX9lJJ2aG5Ozu grNWYhgxWQs0yBQmK8XXlRMhwfaJGbmqpWdipCYM4/sEzWLvf6xmjyvJ X-Gm-Gg: AYBFou0DrwCUQoVSHwqltlH8LHFK9FrdbdJm5MsKG2umAn3o/va7xgSVtnZnIh4aHOR JrKpdjk3QA0ene7J+jnCje+RZEEZNgHtUH7RhYNhG8ZNpUJfaCupq6G06CTR5C+yNhza7wLGv1y Y6yIxL6NDRzL/nDan2CJ4QjNUgEi9TscPWBy2aHIiPxBwfjXrjyNArheelfSzRq4fUVNx6JWEPy eYwa57Uj/N8IWEs8V1m+aa2HD5elpMWEk06GF5/AhHZkRyp3LWkIlw3ZktXiOiD8st0mXprm+N7 xqnmN7sEVFESQLF3Pyx5UUtrlHt5RnWynxk4ExWlMZn/QxQT8POk96vo2TSwkaFRmjkZoMsVd6w BQbXz4NrSmQ0+R7/XDUPrwp/7pRrNs96crKv+b/vH/mfS0dL+QfmX3FVtLzFtk36DpAkMxVvTIM pcQeyYcRAqaLePnsrBYtktmsr3Yj54n00avJE0RcliooTfF7vdkjzt3Igx8D17edB8otMSTkmmb QNPZG0PrQ/6 X-Received: by 2002:a05:6000:4b17:b0:482:dd86:348 with SMTP id ffacd0b85a97d-486fc955dffmr6546190f8f.4.1789376427849; Mon, 14 Sep 2026 02:00:27 -0700 (PDT) Received: from anthony.local ([2a06:c701:9cc4:c200:33d8:8ea2:e077:ebe1]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-486eb32e7f5sm25245851f8f.9.2026.09.14.02.00.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 02:00:27 -0700 (PDT) From: Amit Barzilai To: javierm@redhat.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andriy.shevchenko@intel.com, holofermes@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, amit.barzilai22@gmail.com Subject: [PATCH v6 6/6] drm/ssd130x: Add SSD135X_FAMILY and SSD1351 support Date: Mon, 14 Sep 2026 11:59:31 +0300 Message-ID: <20260914085931.66857-7-amit.barzilai22@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260914085931.66857-1-amit.barzilai22@gmail.com> References: <20260914085931.66857-1-amit.barzilai22@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Solomon SSD1351 is a 128x128 RGB color OLED controller. It shares the SSD133X pixel layout: one 65k color (RGB565) pixel per Segment, written as a bulk transfer once a column/row addressing window has been programmed. Add it as a new SSD135X_FAMILY rather than as a separate driver, so that the ssd130x plane, CRTC and encoder infrastructure is reused. Give the family its own primary plane update and disable, encoder enable and backlight callbacks instead of teaching the ssd133x ones about a second family. Only the callbacks that carry no family specific logic are reused as is: ssd133x_primary_plane_atomic_check(), ssd133x_crtc_atomic_check() and ssd130x_encoder_atomic_disable(). The data path differs from the ssd133x family in one respect. The SSD1351 only starts accepting pixel data after an explicit Write RAM command (0x5c), while the SSD133X enters data mode as soon as the address window has been programmed. Emit it from ssd135x_update_rect(), which both the damage update and the clear screen paths go through. SSD1351 differs from previous controllers in the command protocol. While the opcode is still sent on the command path, the parameters are sent on the data path. Introduce the cmd_params_are_data flag to struct ssd130x_deviceinfo and let ssd130x_write_cmds() split the buffer in accordance to the device specifications. The SSD1351 also needs its own init sequence (ssd135x_init). The remap byte is fixed at horizontal address increment, COM split, reversed COM scan direction, BGR sub-pixel order and 65k color depth; rotation is not supported. Contrast is calibrated per color channel as for the ssd133x family, but the three channels are parameters of a single command (0xc1) instead of one command per channel. Add ssd135x_set_contrast() for that and use it from both the init and the backlight update paths. The SSD1351 is SPI-only, so only the SPI transport match tables gain an entry; no new config symbol is needed. Assisted-by: LLM Signed-off-by: Amit Barzilai Reviewed-by: Javier Martinez Canillas --- drivers/gpu/drm/solomon/ssd130x-spi.c | 7 + drivers/gpu/drm/solomon/ssd130x.c | 312 +++++++++++++++++++++++++- drivers/gpu/drm/solomon/ssd130x.h | 10 +- 3 files changed, 322 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/solomon/ssd130x-spi.c b/drivers/gpu/drm/solomo= n/ssd130x-spi.c index be50e5aa2c87..c41064aa8221 100644 --- a/drivers/gpu/drm/solomon/ssd130x-spi.c +++ b/drivers/gpu/drm/solomon/ssd130x-spi.c @@ -146,6 +146,11 @@ static const struct of_device_id ssd130x_of_match[] = =3D { .compatible =3D "solomon,ssd1331", .data =3D &ssd130x_variants[SSD1331_ID], }, + /* ssd135x family */ + { + .compatible =3D "solomon,ssd1351", + .data =3D &ssd130x_variants[SSD1351_ID], + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, ssd130x_of_match); @@ -171,6 +176,8 @@ static const struct spi_device_id ssd130x_spi_id[] =3D { { .name =3D "ssd1327", .driver_data =3D SSD1327_ID }, /* ssd133x family */ { .name =3D "ssd1331", .driver_data =3D SSD1331_ID }, + /* ssd135x family */ + { .name =3D "ssd1351", .driver_data =3D SSD1351_ID }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(spi, ssd130x_spi_id); diff --git a/drivers/gpu/drm/solomon/ssd130x.c b/drivers/gpu/drm/solomon/ss= d130x.c index fd13250ef56a..324467ae9309 100644 --- a/drivers/gpu/drm/solomon/ssd130x.c +++ b/drivers/gpu/drm/solomon/ssd130x.c @@ -151,6 +151,37 @@ #define SSD133X_SET_REMAP_COLOR_DEPTH_MASK GENMASK(7, 6) #define SSD133X_COLOR_DEPTH_65K 0x1 =20 +/* ssd135x commands */ +#define SSD135X_SET_COL_RANGE 0x15 +#define SSD135X_WRITE_RAM 0x5c +#define SSD135X_SET_ROW_RANGE 0x75 +#define SSD135X_SET_DISPLAY_START 0xa1 +#define SSD135X_SET_DISPLAY_OFFSET 0xa2 +#define SSD135X_SET_DISPLAY_NORMAL 0xa6 +#define SSD135X_SET_FUNCTION 0xab +#define SSD135X_SET_PHASE_LENGTH 0xb1 +#define SSD135X_SET_CLOCK_FREQ 0xb3 +#define SSD135X_SET_VSL 0xb4 +#define SSD135X_SET_GPIO 0xb5 +#define SSD135X_SET_PRECHARGE2 0xb6 +#define SSD135X_SET_PRECHARGE_VOLTAGE 0xbb +#define SSD135X_SET_VCOMH_VOLTAGE 0xbe +#define SSD135X_SET_CONTRAST 0xc1 +#define SSD135X_SET_CONTRAST_MASTER 0xc7 +#define SSD135X_SET_MUX_RATIO 0xca +#define SSD135X_SET_COMMAND_LOCK 0xfd + +/* ssd135x A/B/C channel contrast at full brightness (white balance) */ +#define SSD135X_DEFAULT_CONTRAST_A 0xc8 +#define SSD135X_DEFAULT_CONTRAST_B 0x80 +#define SSD135X_DEFAULT_CONTRAST_C 0xc8 + +/* ssd135x remap byte (data of SSD13XX_SET_SEG_REMAP) */ +#define SSD135X_SET_REMAP_COLOR_BGR BIT(2) +#define SSD135X_SET_REMAP_COM_SCAN BIT(4) +#define SSD135X_SET_REMAP_COM_SPLIT BIT(5) +#define SSD135X_SET_REMAP_65K BIT(6) + #define MAX_CONTRAST 255 =20 const struct ssd130x_deviceinfo ssd130x_variants[] =3D { @@ -218,7 +249,14 @@ const struct ssd130x_deviceinfo ssd130x_variants[] =3D= { .default_width =3D 96, .default_height =3D 64, .family_id =3D SSD133X_FAMILY, - } + }, + /* ssd135x family */ + [SSD1351_ID] =3D { + .default_width =3D 128, + .default_height =3D 128, + .family_id =3D SSD135X_FAMILY, + .cmd_params_are_data =3D true, + }, }; EXPORT_SYMBOL_NS_GPL(ssd130x_variants, "DRM_SSD130X"); =20 @@ -261,9 +299,10 @@ static int ssd130x_write_data(struct ssd130x_device *s= sd130x, const u8 *values, * Helper to write a command (SSD13XX_COMMAND) from a buffer. The first by= te * is the command opcode and the following ones are its parameters. * - * Note that the ssd13xx protocol requires the opcode and each parameter to - * be written as a SSD13XX_COMMAND device register value. That is why a ca= ll - * to regmap_write(..., SSD13XX_COMMAND, ...) is done for each byte. + * By default every byte is written as a SSD13XX_COMMAND register value, h= ence + * the regmap_write() per byte. Controllers that set cmd_params_are_data e= xpect + * the parameters on the data path instead, so only the opcode is written = as + * SSD13XX_COMMAND and the rest as SSD13XX_DATA. */ static int ssd130x_write_cmds(struct ssd130x_device *ssd130x, const u8 *cm= d, size_t len) @@ -271,6 +310,18 @@ static int ssd130x_write_cmds(struct ssd130x_device *s= sd130x, const u8 *cmd, unsigned int i; int ret; =20 + if (!len) + return 0; + + if (ssd130x->device_info->cmd_params_are_data) { + ret =3D regmap_write(ssd130x->regmap, SSD13XX_COMMAND, cmd[0]); + /* A command with no parameters is complete after its opcode. */ + if (ret || len =3D=3D 1) + return ret; + + return ssd130x_write_data(ssd130x, cmd + 1, len - 1); + } + for (i =3D 0; i < len; i++) { ret =3D regmap_write(ssd130x->regmap, SSD13XX_COMMAND, cmd[i]); if (ret) @@ -617,6 +668,20 @@ static int ssd133x_set_contrast(struct ssd130x_device = *ssd130x, u32 brightness) return ssd130x_run_cmd_seq(ssd130x, cmds); } =20 +/* + * Same white balance calibration as for the ssd133x family, except that t= he + * ssd135x controllers take the three channels as parameters of a single + * command instead of one command per channel. + */ +static int ssd135x_set_contrast(struct ssd130x_device *ssd130x, u32 bright= ness) +{ + u8 a =3D ssd130x_scale_contrast(SSD135X_DEFAULT_CONTRAST_A, brightness); + u8 b =3D ssd130x_scale_contrast(SSD135X_DEFAULT_CONTRAST_B, brightness); + u8 c =3D ssd130x_scale_contrast(SSD135X_DEFAULT_CONTRAST_C, brightness); + + return ssd130x_write_cmd(ssd130x, 4, SSD135X_SET_CONTRAST, a, b, c); +} + static int ssd133x_init(struct ssd130x_device *ssd130x) { int ret; @@ -654,6 +719,47 @@ static int ssd133x_init(struct ssd130x_device *ssd130x) return ssd130x_run_cmd_seq(ssd130x, cmds); } =20 +static int ssd135x_init(struct ssd130x_device *ssd130x) +{ + /* + * Horizontal address increment, COM split, reversed COM scan direction, + * BGR sub-pixel order and 65k (RGB565) color depth. Rotation is not + * supported, so the remap byte is fixed. + */ + const u8 remap =3D SSD135X_SET_REMAP_65K | SSD135X_SET_REMAP_COM_SPLIT | + SSD135X_SET_REMAP_COLOR_BGR | SSD135X_SET_REMAP_COM_SCAN; + const u8 cmds[] =3D { + /* Unlock the controller, then the extended command set */ + 2, SSD135X_SET_COMMAND_LOCK, 0x12, + 2, SSD135X_SET_COMMAND_LOCK, 0xb1, + 1, SSD13XX_DISPLAY_OFF, + 2, SSD135X_SET_CLOCK_FREQ, 0xf1, + 2, SSD135X_SET_MUX_RATIO, ssd130x->height - 1, + 3, SSD135X_SET_COL_RANGE, 0x00, ssd130x->width - 1, + 3, SSD135X_SET_ROW_RANGE, 0x00, ssd130x->height - 1, + 2, SSD135X_SET_DISPLAY_START, 0x00, + 2, SSD135X_SET_DISPLAY_OFFSET, 0x00, + 2, SSD135X_SET_GPIO, 0x00, + 2, SSD135X_SET_FUNCTION, 0x01, + 2, SSD135X_SET_PHASE_LENGTH, 0x32, + 4, SSD135X_SET_VSL, 0xa0, 0xb5, 0x55, + 2, SSD135X_SET_PRECHARGE_VOLTAGE, 0x17, + 2, SSD135X_SET_VCOMH_VOLTAGE, 0x05, + 2, SSD135X_SET_CONTRAST_MASTER, 0x0f, + 2, SSD135X_SET_PRECHARGE2, 0x01, + 1, SSD135X_SET_DISPLAY_NORMAL, + 2, SSD13XX_SET_SEG_REMAP, remap, + 0, + }; + int ret; + + ret =3D ssd130x_run_cmd_seq(ssd130x, cmds); + if (ret < 0) + return ret; + + return ssd135x_set_contrast(ssd130x, ssd130x->contrast); +} + static int ssd130x_update_rect(struct ssd130x_device *ssd130x, struct drm_rect *rect, u8 *buf, u8 *data_array) @@ -863,6 +969,44 @@ static int ssd133x_update_rect(struct ssd130x_device *= ssd130x, return ret; } =20 +static int ssd135x_update_rect(struct ssd130x_device *ssd130x, + struct drm_rect *rect, u8 *data_array, + unsigned int pitch) +{ + unsigned int x =3D rect->x1; + unsigned int y =3D rect->y1; + unsigned int columns =3D drm_rect_width(rect); + unsigned int rows =3D drm_rect_height(rect); + int ret; + + /* + * The pixel layout is the same as for the ssd133x family: one 65k + * color (RGB565) pixel per Segment, sent Segment by Segment when the + * (default) horizontal address increment mode is used. + * + * But unlike the ssd133x family, which starts accepting pixel data as + * soon as the address window has been programmed, the ssd135x family + * needs an explicit Write RAM command before the data is written. + */ + + /* Set column start and end */ + ret =3D ssd130x_write_cmd(ssd130x, 3, SSD135X_SET_COL_RANGE, x, x + colum= ns - 1); + if (ret < 0) + return ret; + + /* Set row start and end */ + ret =3D ssd130x_write_cmd(ssd130x, 3, SSD135X_SET_ROW_RANGE, y, y + rows = - 1); + if (ret < 0) + return ret; + + ret =3D ssd130x_write_cmd(ssd130x, 1, SSD135X_WRITE_RAM); + if (ret < 0) + return ret; + + /* Write out update in one go since horizontal addressing mode is used */ + return ssd130x_write_data(ssd130x, data_array, pitch * rows); +} + static void ssd130x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_= array) { unsigned int pages =3D DIV_ROUND_UP(ssd130x->height, SSD130X_PAGE_HEIGHT); @@ -932,6 +1076,23 @@ static void ssd133x_clear_screen(struct ssd130x_devic= e *ssd130x, u8 *data_array) ssd130x_write_data(ssd130x, data_array, pitch * ssd130x->height); } =20 +static void ssd135x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_= array) +{ + struct drm_rect screen =3D DRM_RECT_INIT(0, 0, ssd130x->width, ssd130x->h= eight); + const struct drm_format_info *fi; + unsigned int pitch; + + fi =3D drm_format_info(DRM_FORMAT_RGB565); + if (!fi) + return; + + pitch =3D drm_format_info_min_pitch(fi, 0, ssd130x->width); + + memset(data_array, 0, pitch * ssd130x->height); + + ssd135x_update_rect(ssd130x, &screen, data_array, pitch); +} + static int ssd130x_fb_blit_rect(struct drm_framebuffer *fb, const struct iosys_map *vmap, struct drm_rect *rect, @@ -1005,6 +1166,30 @@ static int ssd133x_fb_blit_rect(struct drm_framebuff= er *fb, return 0; } =20 +static int ssd135x_fb_blit_rect(struct drm_framebuffer *fb, + const struct iosys_map *vmap, + struct drm_rect *rect, u8 *data_array, + struct drm_format_conv_state *fmtcnv_state) +{ + struct ssd130x_device *ssd130x =3D drm_to_ssd130x(fb->dev); + const struct drm_format_info *fi; + unsigned int dst_pitch; + struct iosys_map dst; + + fi =3D drm_format_info(DRM_FORMAT_RGB565); + if (!fi) + return -EINVAL; + + dst_pitch =3D drm_format_info_min_pitch(fi, 0, drm_rect_width(rect)); + + iosys_map_set_vaddr(&dst, data_array); + drm_fb_xrgb8888_to_rgb565be(&dst, &dst_pitch, vmap, fb, rect, fmtcnv_stat= e); + + ssd135x_update_rect(ssd130x, rect, data_array, dst_pitch); + + return 0; +} + static int ssd130x_primary_plane_atomic_check(struct drm_plane *plane, struct drm_atomic_commit *state) { @@ -1247,6 +1432,45 @@ static void ssd133x_primary_plane_atomic_update(stru= ct drm_plane *plane, drm_dev_exit(idx); } =20 +static void ssd135x_primary_plane_atomic_update(struct drm_plane *plane, + struct drm_atomic_commit *state) +{ + struct drm_plane_state *plane_state =3D drm_atomic_get_new_plane_state(st= ate, plane); + struct drm_plane_state *old_plane_state =3D drm_atomic_get_old_plane_stat= e(state, plane); + struct drm_shadow_plane_state *shadow_plane_state =3D to_drm_shadow_plane= _state(plane_state); + struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(state= , plane_state->crtc); + struct ssd130x_crtc_state *ssd130x_crtc_state =3D to_ssd130x_crtc_state(= crtc_state); + struct drm_framebuffer *fb =3D plane_state->fb; + struct drm_atomic_helper_damage_iter iter; + struct drm_device *drm =3D plane->dev; + struct drm_rect dst_clip; + struct drm_rect damage; + int idx; + + if (!drm_dev_enter(drm, &idx)) + return; + + if (drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE)) + goto out_drm_dev_exit; + + drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); + drm_atomic_for_each_plane_damage(&iter, &damage) { + dst_clip =3D plane_state->dst; + + if (!drm_rect_intersect(&dst_clip, &damage)) + continue; + + ssd135x_fb_blit_rect(fb, &shadow_plane_state->data[0], &dst_clip, + ssd130x_crtc_state->data_array, + &shadow_plane_state->fmtcnv_state); + } + + drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); + +out_drm_dev_exit: + drm_dev_exit(idx); +} + static void ssd130x_primary_plane_atomic_disable(struct drm_plane *plane, struct drm_atomic_commit *state) { @@ -1319,6 +1543,31 @@ static void ssd133x_primary_plane_atomic_disable(str= uct drm_plane *plane, drm_dev_exit(idx); } =20 +static void ssd135x_primary_plane_atomic_disable(struct drm_plane *plane, + struct drm_atomic_commit *state) +{ + struct drm_device *drm =3D plane->dev; + struct ssd130x_device *ssd130x =3D drm_to_ssd130x(drm); + struct drm_plane_state *plane_state; + struct drm_crtc_state *crtc_state; + struct ssd130x_crtc_state *ssd130x_crtc_state; + int idx; + + plane_state =3D drm_atomic_get_new_plane_state(state, plane); + if (!plane_state->crtc) + return; + + crtc_state =3D drm_atomic_get_new_crtc_state(state, plane_state->crtc); + ssd130x_crtc_state =3D to_ssd130x_crtc_state(crtc_state); + + if (!drm_dev_enter(drm, &idx)) + return; + + ssd135x_clear_screen(ssd130x, ssd130x_crtc_state->data_array); + + drm_dev_exit(idx); +} + /* Called during init to allocate the plane's atomic state. */ static struct drm_plane_state *ssd130x_primary_plane_create_state(struct d= rm_plane *plane) { @@ -1387,7 +1636,13 @@ static const struct drm_plane_helper_funcs ssd130x_p= rimary_plane_helper_funcs[] .atomic_check =3D ssd133x_primary_plane_atomic_check, .atomic_update =3D ssd133x_primary_plane_atomic_update, .atomic_disable =3D ssd133x_primary_plane_atomic_disable, - } + }, + [SSD135X_FAMILY] =3D { + DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, + .atomic_check =3D ssd133x_primary_plane_atomic_check, + .atomic_update =3D ssd135x_primary_plane_atomic_update, + .atomic_disable =3D ssd135x_primary_plane_atomic_disable, + }, }; =20 static const struct drm_plane_funcs ssd130x_primary_plane_funcs =3D { @@ -1544,6 +1799,10 @@ static const struct drm_crtc_helper_funcs ssd130x_cr= tc_helper_funcs[] =3D { .mode_valid =3D ssd130x_crtc_mode_valid, .atomic_check =3D ssd133x_crtc_atomic_check, }, + [SSD135X_FAMILY] =3D { + .mode_valid =3D ssd130x_crtc_mode_valid, + .atomic_check =3D ssd133x_crtc_atomic_check, + }, }; =20 static const struct drm_crtc_funcs ssd130x_crtc_funcs =3D { @@ -1631,6 +1890,31 @@ static void ssd133x_encoder_atomic_enable(struct drm= _encoder *encoder, ssd130x_power_off(ssd130x); } =20 +static void ssd135x_encoder_atomic_enable(struct drm_encoder *encoder, + struct drm_atomic_commit *state) +{ + struct drm_device *drm =3D encoder->dev; + struct ssd130x_device *ssd130x =3D drm_to_ssd130x(drm); + int ret; + + ret =3D ssd130x_power_on(ssd130x); + if (ret) + return; + + ret =3D ssd135x_init(ssd130x); + if (ret) + goto power_off; + + ssd130x_write_cmd(ssd130x, 1, SSD13XX_DISPLAY_ON); + + backlight_enable(ssd130x->bl_dev); + + return; + +power_off: + ssd130x_power_off(ssd130x); +} + static void ssd130x_encoder_atomic_disable(struct drm_encoder *encoder, struct drm_atomic_commit *state) { @@ -1656,7 +1940,11 @@ static const struct drm_encoder_helper_funcs ssd130x= _encoder_helper_funcs[] =3D { [SSD133X_FAMILY] =3D { .atomic_enable =3D ssd133x_encoder_atomic_enable, .atomic_disable =3D ssd130x_encoder_atomic_disable, - } + }, + [SSD135X_FAMILY] =3D { + .atomic_enable =3D ssd135x_encoder_atomic_enable, + .atomic_disable =3D ssd130x_encoder_atomic_disable, + }, }; =20 static const struct drm_encoder_funcs ssd130x_encoder_funcs =3D { @@ -1733,6 +2021,15 @@ static int ssd133x_update_bl(struct backlight_device= *bdev) return ssd133x_set_contrast(ssd130x, ssd130x->contrast); } =20 +static int ssd135x_update_bl(struct backlight_device *bdev) +{ + struct ssd130x_device *ssd130x =3D bl_get_data(bdev); + + ssd130x->contrast =3D backlight_get_brightness(bdev); + + return ssd135x_set_contrast(ssd130x, ssd130x->contrast); +} + static const struct backlight_ops ssd130xfb_bl_ops[] =3D { [SSD130X_FAMILY] =3D { .update_status =3D ssd130x_update_bl, @@ -1743,6 +2040,9 @@ static const struct backlight_ops ssd130xfb_bl_ops[] = =3D { [SSD133X_FAMILY] =3D { .update_status =3D ssd133x_update_bl, }, + [SSD135X_FAMILY] =3D { + .update_status =3D ssd135x_update_bl, + }, }; =20 static void ssd130x_parse_properties(struct ssd130x_device *ssd130x) diff --git a/drivers/gpu/drm/solomon/ssd130x.h b/drivers/gpu/drm/solomon/ss= d130x.h index a4554018bb2a..fd81262f2ceb 100644 --- a/drivers/gpu/drm/solomon/ssd130x.h +++ b/drivers/gpu/drm/solomon/ssd130x.h @@ -26,7 +26,8 @@ enum ssd130x_family_ids { SSD130X_FAMILY, SSD132X_FAMILY, - SSD133X_FAMILY + SSD133X_FAMILY, + SSD135X_FAMILY, }; =20 enum ssd130x_variants { @@ -42,6 +43,8 @@ enum ssd130x_variants { SSD1327_ID, /* ssd133x family */ SSD1331_ID, + /* ssd135x family */ + SSD1351_ID, NR_SSD130X_VARIANTS }; =20 @@ -54,6 +57,11 @@ struct ssd130x_deviceinfo { bool need_pwm; bool need_chargepump; bool page_mode_only; + /* + * Whether the controller takes a command's parameters on the data path + * instead of as further command bytes. + */ + bool cmd_params_are_data; =20 enum ssd130x_family_ids family_id; }; --=20 2.55.0