From nobody Fri Sep 25 10:04:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D05EE476694; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394166; cv=none; b=riQRfJV4LAMZG7y2PlTjRaSUmy9dVl+6mVEkclNlsRVD8o5KQSwzj3mM9GxZYHUm6LnJOOg3OvvuAPaVdLwTx8zCFfhMjq6ZbEDPy+3MpfvdO7Op3UgMSTdAnqSDa4bCU+H0CZq9NzmNEFqrzH7mTRTi6uBu9L+Mmz/BCxwMIZ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394166; c=relaxed/simple; bh=rbaaGGhMrAyh1jjBRyB+/BhoJ6jMu3hnKZff+HdRTbI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aDlz69PkfwYH/1NjlO8e3z0/ENra9UP0laBYuSDbyYuQxrAVzM08EHvoDwapmkHodmfiIuAtY9JI7GR2SNoE008U2OJhtvSXqyqhGVFlbA1RvRv2gbvmJMnSOI8q9iv+SeG7nLbFky8nWjOgyXLvhaBkJP7xRXxzfQhF2BRNO+o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=J8izxaG9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="J8izxaG9" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5E638C2BCFD; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789394166; bh=rbaaGGhMrAyh1jjBRyB+/BhoJ6jMu3hnKZff+HdRTbI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=J8izxaG93y+ha1k5i3DeGVpjLSd9P4Fhj7k7touXj2kOvj5Z7ZQ0qYPVB58fUSb/j thDR+ZE2y8D+gN7Xod552E8H34Vw4RbM7Ck1KqI2PRy8UVBJYVcqNL4TaOhVerZym1 DInh/f56kj7nIjF5MNZKkHqhejTkXMBbxl/zR/8mWGEH4GlyLfgwruQ2Gf0sVgNGx6 gKvp8/RHI9Njvib29eCzw9JSkD9T2zcL9vwQq0jhSlCiZWlrdYkOAEHQdTlljRsCbU 5XanB82m3Gzz9zg64spMiVYHhKauYSABfgWI34ZCo1egJGj8lGs5OmZcxLxMtb2qgB cQLOtl+JT6b6w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 360BBC88E64; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) From: Aleksa Paunovic via B4 Relay Date: Mon, 14 Sep 2026 15:55:49 +0200 Subject: [PATCH 1/9] dt-bindings: vendor-prefixes: Add GlobalFoundries, Inc. Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260914-p8700-dts-v1-1-3267f14ebce1@htecgroup.com> References: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> In-Reply-To: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Djordje Todorovic , Anup Patel , Thomas Gleixner , Radu Rendec , Inochi Amaoto , Daniel Lezcano Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Conor Dooley , linux-riscv@lists.infradead.org, Vladimir Kondratiev , Aleksa Paunovic X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789394164; l=1295; i=aleksa.paunovic@htecgroup.com; s=20250806; h=from:subject:message-id; bh=kuKqE2k4y4LDyGnqtj3oO0/ZCuqCwkmJo6BCsnZGNKc=; b=hjpmDgpH5H6bTV89dWm4yNI88HSAplU0zTEId7wlyzbd/VMhq6uaQ2u8yUUYzc40tf7c4Kz0y xXEvOYrF6nDBw1qeZSmCkjFYHQl3ej6nBvKpLPIsSUETgROHWybFrtr X-Developer-Key: i=aleksa.paunovic@htecgroup.com; a=ed25519; pk=Dn4KMnDdgyhlXJNspQQrlHJ04i7/irG29p2H27Avd+8= X-Endpoint-Received: by B4 Relay for aleksa.paunovic@htecgroup.com/20250806 with auth_id=476 X-Original-From: Aleksa Paunovic Reply-To: aleksa.paunovic@htecgroup.com From: Aleksa Paunovic GlobalFoundries acquired MIPS. All MIPS RISC-V compatibles should be labeled with the 'gf' prefix in the future. Signed-off-by: Aleksa Paunovic Acked-by: Conor Dooley --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index ba2002969373433b1f48118872c46cf7bcfff276..b699935f60b96b3cfbb9c6e8ce8= 02fcbedc52c1b 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -668,6 +668,8 @@ patternProperties: description: Genexis BV/AB "^geniatech,.*": description: Geniatech, Inc. + "^gf,.*": + description: GlobalFoundries, Inc. "^giantec,.*": description: Giantec Semiconductor, Inc. "^giantplus,.*": @@ -1104,7 +1106,7 @@ patternProperties: "^minix,.*": description: MINIX Technology Ltd. "^mips,.*": - description: MIPS Technology (deprecated, use 'mti' or 'img') + description: MIPS Technology (deprecated, use 'mti', 'img', or 'gf') deprecated: true "^miramems,.*": description: MiraMEMS Sensing Technology Co., Ltd. --=20 2.43.0 From nobody Fri Sep 25 10:04:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CFAB947668C; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394166; cv=none; b=fyBythX7Sf3nxlLHqCPiNrBQefORwC/L03q8v/2fL1o+NcxZc1eZp/MJQj5c2OHSo4a7ecrfEoCITx9DR/GtuYoulYw5C2NnAqeka4S5gb4DHn51wxhHoldevhxKRLftlADpZc+Lu5fmVvVAncXj896ZkccOmJFpuToHAm6iN8s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394166; c=relaxed/simple; bh=DM5y/tWXMbxpLh9TtMl1Y3EoywBhI86QLhi0kI9Cc50=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DwNpMUinnGlR/arBK5PPn+jEE/ih1mhj1NEc3Aq7yX7hEBcQ+/HX/u82thHR27boU+bsJDKOPpSe3Duh3+ThJmiESCtccC7JxpQKJtFnv40uaZH6S5DUOHfQ7ozStsUb7YHKVAlfFKXpEbexr3BmFvgmR1OaNYQFEC9hX+16XDk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ggYTQR9E; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ggYTQR9E" Received: by smtp.kernel.org (Postfix) with ESMTPS id 733C3C2BCB8; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789394166; bh=DM5y/tWXMbxpLh9TtMl1Y3EoywBhI86QLhi0kI9Cc50=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ggYTQR9EB8YrNLS/OGrhlbSYaKfo4G3LpQTf5kMarFwFOQAKAKQ4QTXEnEjTCkjv/ ujm09Jp9n8SnM13EffpCy1WpMlu+LyPNXGJGOQ2t9s3VhbGAk0dOCufyG3VeAHyDXu 6s1jHTZsXaUGPE7Z6+/YrOdbsB+9S8K8Ue08ANR3lBB8b1jflpprFOpMBHHmcxwsHh d8Cq2+L+LpCjFgJ9f8QG2fODM0q35A1ffY46+YLHrNeIszAENFBsJFimISvUogR75y ztSfUCOSCidjy3Yg+w9eR4klD+nilpda66rTFgPzAM6Yrz217JDvrcYCiWX7uNMaCu JErphVWHHOTPQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E517C88E73; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) From: Aleksa Paunovic via B4 Relay Date: Mon, 14 Sep 2026 15:55:50 +0200 Subject: [PATCH 2/9] dt-bindings: riscv: cpus: add gf,mips-p8700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260914-p8700-dts-v1-2-3267f14ebce1@htecgroup.com> References: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> In-Reply-To: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Djordje Todorovic , Anup Patel , Thomas Gleixner , Radu Rendec , Inochi Amaoto , Daniel Lezcano Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Conor Dooley , linux-riscv@lists.infradead.org, Vladimir Kondratiev , Aleksa Paunovic X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789394164; l=791; i=aleksa.paunovic@htecgroup.com; s=20250806; h=from:subject:message-id; bh=9r+1zOKPzU+i4ZT8EB9T5a+EqeMioNWwz2te9YRWjxc=; b=qgNSzK3mbpWHykXXt3BoXSbAo4L8C3Xt7fmDL1EpdA2TahWkXO/lt8DoAQpwkGw5h7HwV5t6Y SyjhbPnzIX5D6TYrQYhGZOi+KYYTpxvqh5nta7qS3qkqObPIskLfNTH X-Developer-Key: i=aleksa.paunovic@htecgroup.com; a=ed25519; pk=Dn4KMnDdgyhlXJNspQQrlHJ04i7/irG29p2H27Avd+8= X-Endpoint-Received: by B4 Relay for aleksa.paunovic@htecgroup.com/20250806 with auth_id=476 X-Original-From: Aleksa Paunovic Reply-To: aleksa.paunovic@htecgroup.com From: Aleksa Paunovic Document the MIPS P8700 compatible. Signed-off-by: Aleksa Paunovic --- Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentat= ion/devicetree/bindings/riscv/cpus.yaml index 0da219ae6769767a9b7f41f179a3559ae7160d69..c7f1cf1db6eef5b25403d53bca7= cffd9bc1f2240 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -48,6 +48,7 @@ properties: - amd,mbv64 - andestech,ax45mp - canaan,k210 + - gf,mips-p8700 - nuclei,ux900 - sifive,bullet0 - sifive,e5 --=20 2.43.0 From nobody Fri Sep 25 10:04:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD3B2472535; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394166; cv=none; b=jz+mNKMMUnxLCFF8vz+Kt4MZAhYaqGJppbOHXy1NMHIMkzkQrVEXsSMSzYNz6DOVZKWcxWJ4DzjIyoYoTvwJHo8kEXdpGY28BpfaHnK3Q8ZoDnWN4ivvZFG39M/2If2p+p2MhnQ5l7eXZCRuZQNLEt/OT6sRywF/AiEVy2tTOoU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394166; c=relaxed/simple; bh=NG0zcPrpuUrHqJArNTKYUb+/7+gQImfZBXI+QFiTCFI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dZ7vkTCdNJprOth+S2paVYA+Hb11M2zYn9fMfQvMgw5ZGqoj+yXV0PNtvisz0RaZUx6Ko2+k5paDoc4GbcaG0NSu3RbRnyrw+GwUJpAdSy47eAtR/0EDP9jk0e0BpT76lXvGhx9+79krz1kJtqgUKgOrfE1tHYAVSQqxcnTzn9s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=aSP8eS0c; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="aSP8eS0c" Received: by smtp.kernel.org (Postfix) with ESMTPS id 80BBBC2BD01; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789394166; bh=NG0zcPrpuUrHqJArNTKYUb+/7+gQImfZBXI+QFiTCFI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=aSP8eS0cnkVnk02fHxWD0m6A4C0cYkf2cmZ7d+OWcIq7X8b/lZBrb/pLOihmPsd/T YSEEAhV//pOiPp6dvHtzKmD6/H62Pr8rPopv+rbTD20ydbxlYYS3yYOjUQn1LHjl6F RDacv2sij70ev26NnjFDP95AmMBivj2Py5xqkCRbKZpZLG0MFF93mufJJQf3KorXly 3gailyrxhypzQViLLiDpzecQa29NiX2IQpQLOQ0j/AbTOgVo7cdAzkUuH/I49K9ilf bztWoDwsLE7bl9gbKUag+CT8O2X7nShntvBoSjx/mEliNp9OFDgSzgbJwwlxfHE5R7 dqphOwJWhdU6w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65185C88E70; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) From: Aleksa Paunovic via B4 Relay Date: Mon, 14 Sep 2026 15:55:51 +0200 Subject: [PATCH 3/9] dt-bindings: riscv: Add MIPS Boston board compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260914-p8700-dts-v1-3-3267f14ebce1@htecgroup.com> References: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> In-Reply-To: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Djordje Todorovic , Anup Patel , Thomas Gleixner , Radu Rendec , Inochi Amaoto , Daniel Lezcano Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Conor Dooley , linux-riscv@lists.infradead.org, Vladimir Kondratiev , Aleksa Paunovic X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789394164; l=1403; i=aleksa.paunovic@htecgroup.com; s=20250806; h=from:subject:message-id; bh=tHtPPite2sONqkkfk86N/TwZq1aosKXIXhSFvR7Duso=; b=4xcc9rb7EAWmZYMvfru0693dtlF9DrEifQUIycCT0YkGnWl3JuqAG1qMk2mmlbRPKtqQ+3mXv zQ0bHk6gJMSBgalImaA1FbxpVCwpTdzNifGoImPQB9jtec18F0X+aoY X-Developer-Key: i=aleksa.paunovic@htecgroup.com; a=ed25519; pk=Dn4KMnDdgyhlXJNspQQrlHJ04i7/irG29p2H27Avd+8= X-Endpoint-Received: by B4 Relay for aleksa.paunovic@htecgroup.com/20250806 with auth_id=476 X-Original-From: Aleksa Paunovic Reply-To: aleksa.paunovic@htecgroup.com From: Aleksa Paunovic Document the MIPS Boston board compatible with a P8700 bitfile. Co-developed-by: Djordje Todorovic Signed-off-by: Djordje Todorovic Signed-off-by: Aleksa Paunovic --- Documentation/devicetree/bindings/riscv/gf.yaml | 27 +++++++++++++++++++++= ++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/gf.yaml b/Documentatio= n/devicetree/bindings/riscv/gf.yaml new file mode 100644 index 0000000000000000000000000000000000000000..060910c9b04f482aee6f08f8f72= 232acbad118bb --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/gf.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/gf.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GlobalFoundries MIPS SoC-based boards + +maintainers: + - Djordje Todorovic + - Aleksa Paunovic + +description: + GlobalFoundries MIPS SoC-based boards + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Boston FPGA development board with a MIPS P8700 bitfi= le + items: + - const: gf,mips-p8700-boston + +additionalProperties: true + +... --=20 2.43.0 From nobody Fri Sep 25 10:04:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF11947668A; 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Signed-off-by: Aleksa Paunovic --- Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml | = 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,a= plic.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,ap= lic.yaml index 0718071444d29fbfa36283fc9666e8cecd6f77e7..9b986aa1a1c62316a1fd08fe535= 075111601b80e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.ya= ml +++ b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.ya= ml @@ -27,6 +27,7 @@ properties: compatible: items: - enum: + - gf,mips-p8700-aplic - qemu,aplic - spacemit,k3-aplic - const: riscv,aplic --=20 2.43.0 From nobody Fri Sep 25 10:04:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FBD24718D3; Mon, 14 Sep 2026 13:56:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394167; cv=none; b=oC/tvvZCz97lA1lmqg+uRwlb5J+kqE2ir8nn1RR+VKgZ6FRwrKNXgmluzh0hHVdBJ9GLZNXQ8lajenN2jbhSjt+DqAGm8izGqsYGrhJJen76X+HpnGGX0oVah296DkoPHu6/r2d2FiYyDyMDrcH/yDO17DJCvPHAtFVn8Bn3GhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394167; c=relaxed/simple; bh=H88R8D2yBEpmvpGWUbzHlGqiXdsK5APs1RfBjdRvVgM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Kj9WM7jlyQd5MRbWpDXGC60kO3CBJfSIzVPXJFlbFG5CFzCIsorsDkc8/2otsXToMdtw1Hu3Cu0cHyoyajmJzOxFp1icTJOJsSM+T999ZuE/eUajdDRaBQK7Gy9a5EevoEDldWeIBr+8TdDnb/q939H32RJqC3RroxXSUiMpx1U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qeewrU8w; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qeewrU8w" Received: by smtp.kernel.org (Postfix) with ESMTPS id B10B5C2BD00; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789394166; bh=H88R8D2yBEpmvpGWUbzHlGqiXdsK5APs1RfBjdRvVgM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=qeewrU8w0XLDazi5K4DRGQfKH54os/0xFquFkhtLjkFzFrolc48MQGq5y2P06vpMf kAeXXASlNVLAPetaijsTKmz5JpVhZHZSKIizKWz+wwV1tN7YE9hLlqg0ZGEhGb42mN aozHG67PiOmgYODPBsAtx9tvkeXp7M9mZwJXrEP+WpEO22xfq6zvVtyAIADxEDNXvi xyLY9ZwOtfMVXC1y+S5eGr5Ja5kG7u+FUGiuQtRqaLIhnbgy8bRMkvoZni7esGxrZv 78rgls1UsjnaGkCl/iCMXJDuyqol42S07nyknhV3Ego2CCsF/ZuubxjuuYZu4NqVEh zn3QyNeVGCT/g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9917BC88E72; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) From: Aleksa Paunovic via B4 Relay Date: Mon, 14 Sep 2026 15:55:53 +0200 Subject: [PATCH 5/9] dt-bindings: interrupt-controller: Add MIPS P8700 ACLINT MSWI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260914-p8700-dts-v1-5-3267f14ebce1@htecgroup.com> References: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> In-Reply-To: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Djordje Todorovic , Anup Patel , Thomas Gleixner , Radu Rendec , Inochi Amaoto , Daniel Lezcano Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Conor Dooley , linux-riscv@lists.infradead.org, Vladimir Kondratiev , Aleksa Paunovic X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789394164; l=2394; i=aleksa.paunovic@htecgroup.com; s=20250806; h=from:subject:message-id; bh=d6dCUSpFr/wHwlyABy937JZmuMEa5B5i8Du3V+WGvRU=; b=/CK+7BpY2QEZwNjyCeVxDPxAdvJb8B+L1XLb3ovHEhU/AAcNGfbaoNr5qYc7dKzjrvvqjF5gS 9i9e+eTcC1HCfeO68b+1EqPs+F600EQRxdEx2cyEs8zcUkYaL6wuIze X-Developer-Key: i=aleksa.paunovic@htecgroup.com; a=ed25519; pk=Dn4KMnDdgyhlXJNspQQrlHJ04i7/irG29p2H27Avd+8= X-Endpoint-Received: by B4 Relay for aleksa.paunovic@htecgroup.com/20250806 with auth_id=476 X-Original-From: Aleksa Paunovic Reply-To: aleksa.paunovic@htecgroup.com From: Aleksa Paunovic Document the aclint mswi compatible for the MIPS P8700 and introduce the 'riscv,hart-indexes' property, used to address the sparse MIPS P8700 harts. Signed-off-by: Aleksa Paunovic --- .../thead,c900-aclint-mswi.yaml | 34 ++++++++++++++++++= ++++ 1 file changed, 34 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c= 900-aclint-mswi.yaml b/Documentation/devicetree/bindings/interrupt-controll= er/thead,c900-aclint-mswi.yaml index 62fd220e126e650e3800d8eee2a749fdbbde6108..47c04943eb0c793467aaa557077= 6605cae0eadfd 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-acl= int-mswi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-acl= int-mswi.yaml @@ -17,6 +17,8 @@ properties: - sophgo,sg2042-aclint-mswi - sophgo,sg2044-aclint-mswi - const: thead,c900-aclint-mswi + - items: + - const: gf,mips-p8700-aclint-mswi - items: - enum: - anlogic,dr1v90-aclint-mswi @@ -29,6 +31,14 @@ properties: minItems: 1 maxItems: 4095 =20 + riscv,hart-indexes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 4095 + description: + A list of hart indexes that the MSWI device uses to address each hart + that is mentioned in the "interrupts-extended" + additionalProperties: false =20 required: @@ -36,6 +46,19 @@ required: - reg - interrupts-extended =20 +allOf: + - if: + properties: + compatible: + contains: + const: gf,mips-p8700-aclint-mswi + then: + required: + - riscv,hart-indexes + else: + properties: + riscv,hart-indexes: false + examples: - | interrupt-controller@94000000 { @@ -46,4 +69,15 @@ examples: <&cpu4intc 3>; reg =3D <0x94000000 0x00010000>; }; + + - | + mswi@16150000 { + compatible =3D "gf,mips-p8700-aclint-mswi"; + reg =3D <0x16150000 0x4000>; + interrupts-extended =3D <&cpu1intc 3>, + <&cpu2intc 3>, + <&cpu3intc 3>, + <&cpu4intc 3>; + riscv,hart-indexes =3D <0x0 0x1 0x10 0x11>; + }; ... --=20 2.43.0 From nobody Fri Sep 25 10:04:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FD6E477294; Mon, 14 Sep 2026 13:56:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394167; cv=none; b=OqzkpkaOcIunmAkkq/HCTEmSZ1Lt8VH2W3mxukwoSjoRR5m7Ek/4yGiL+yxZ7PG7QZhf4t5o49X8Xb05OwsH1a8RbwKiWWjADdK/BalBg/8CyaCO14AHaNp4vd2guchP1l8hTxxrW7jcDobuTN5KiB99xvJAFsS8IAjSmAiWTGA= ARC-Message-Signature: i=1; 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a=ed25519-sha256; t=1789394164; l=2438; i=aleksa.paunovic@htecgroup.com; s=20250806; h=from:subject:message-id; bh=M5IyHBybwxEJk8ac4GspHzVPEulbhlRzm20t9LNaGmM=; b=9Aj12FjNDRPLsiFijbdUWSzeynhgFvKygTdmlPOuxb81BeHEw3ZUUNOXAlM1adSx55m0YRq7V TSBpv33dDYvD1Q+vq/Md9Se5o8TYo+6qcTfV6wdJEUXvYRe9MDz2m7k X-Developer-Key: i=aleksa.paunovic@htecgroup.com; a=ed25519; pk=Dn4KMnDdgyhlXJNspQQrlHJ04i7/irG29p2H27Avd+8= X-Endpoint-Received: by B4 Relay for aleksa.paunovic@htecgroup.com/20250806 with auth_id=476 X-Original-From: Aleksa Paunovic Reply-To: aleksa.paunovic@htecgroup.com From: Aleksa Paunovic Document the MIPS P8700 ACLINT MTIMER. Extend support for both mtimecmp and mtime registers within the ACLINT MTIMER, identified via reg-names. Signed-off-by: Aleksa Paunovic --- .../bindings/timer/thead,c900-aclint-mtimer.yaml | 43 ++++++++++++++++++= ++-- 1 file changed, 39 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtim= er.yaml b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.= yaml index cf7c82e980f674afcf59fc726742dc4f49c1a820..35e02da675becb3c8bb187b8e1e= 623994d52df8c 100644 --- a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml +++ b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml @@ -17,18 +17,20 @@ properties: - sophgo,sg2042-aclint-mtimer - sophgo,sg2044-aclint-mtimer - const: thead,c900-aclint-mtimer + - items: + - const: gf,mips-p8700-aclint-mtimer - items: - enum: - anlogic,dr1v90-aclint-mtimer - const: nuclei,ux900-aclint-mtimer =20 reg: - items: - - description: MTIMECMP Registers + minItems: 1 + maxItems: 2 =20 reg-names: - items: - - const: mtimecmp + minItems: 1 + maxItems: 2 =20 interrupts-extended: minItems: 1 @@ -42,6 +44,28 @@ required: - reg-names - interrupts-extended =20 +allOf: + - if: + properties: + compatible: + contains: + const: gf,mips-p8700-aclint-mtimer + then: + properties: + reg: + minItems: 2 + reg-names: + items: + - const: mtime + - const: mtimecmp + else: + properties: + reg: + maxItems: 1 + reg-names: + items: + - const: mtimecmp + examples: - | timer@ac000000 { @@ -53,4 +77,15 @@ examples: reg =3D <0xac000000 0x00010000>; reg-names =3D "mtimecmp"; }; + + - | + timer@16108050 { + compatible =3D "gf,mips-p8700-aclint-mtimer"; + reg =3D <0x16108050 0x8>, <0x16154000 0x7ff8>; + reg-names =3D "mtime", "mtimecmp"; + interrupts-extended =3D <&cpu1intc 7>, + <&cpu2intc 7>, + <&cpu3intc 7>, + <&cpu4intc 7>; + }; ... --=20 2.43.0 From nobody Fri Sep 25 10:04:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72D964772BA; Mon, 14 Sep 2026 13:56:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394167; cv=none; b=dXZkWrKtFMtsgSyYK1Rp+OI78jBvEXRSZ5urRUV1LU1RTnALD+OwxyqMVAHBNLlzKZc4JluR3KLEuv+bQpUmnzZOenqOHVtcPMlHOJxdPeui20GLqtaqfEzgsFxdd9LLKustjuNt1MHv9OD6CT8pP9RazQsli5ryDt4tmNBpHK0= ARC-Message-Signature: i=1; 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b=ljd0L+/jPoReQDlyfSvmhT2jQE5f1C+5nMkCqjepM/74/pJ4MSjsd6Lw/YVsZklyY Riq1xE9Ah+rzeDGSEWgr1TRVH+qoE6U/e4ohWXlmgskhyZQekGaMBLhoG9Mv5t/uiv /2AtOhi9+PlmThCrbVjql/AQpTwbH7whntW8vnC8VfyhzMFflIdVolsUmJH4AuDptC FxlElNlARyskdAJUFakNzAzKv7phBnPoEJtEsk0wfcmwMAsEa5g8YEL5QCYn7vx+bx QlV+yQPTxoTi2xoOSHkod3Xadq1NNY199z8db4hbt4VLxJFTT/tyOZ09LLvitknRBF +dCJmt/hkbTww== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D45BBC88E73; Mon, 14 Sep 2026 13:56:06 +0000 (UTC) From: Aleksa Paunovic via B4 Relay Date: Mon, 14 Sep 2026 15:55:55 +0200 Subject: [PATCH 7/9] dt-bindings: interrupt-controller: thead,c900-aclint-sswi: Add MIPS P8700 gf compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260914-p8700-dts-v1-7-3267f14ebce1@htecgroup.com> References: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> In-Reply-To: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Djordje Todorovic , Anup Patel , Thomas Gleixner , Radu Rendec , Inochi Amaoto , Daniel Lezcano Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Conor Dooley , linux-riscv@lists.infradead.org, Vladimir Kondratiev , Aleksa Paunovic X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789394164; l=1111; i=aleksa.paunovic@htecgroup.com; s=20250806; h=from:subject:message-id; bh=WFsJFX8KbR9cAkA42pWDMyhUYcejxHY2wNhnlUtG9bs=; b=Y7p8yYv9zwnZFtrXTS2MrDg97xIcAaHrIiLL96HI0AQv1uDO2SVRXXJx1FZDMMtkpgsUOM0Og C41uzxDrVQLDtZAhRn0Vff+6OL7NlwO/Gug92lvhiUE32V0HhaDp3ec X-Developer-Key: i=aleksa.paunovic@htecgroup.com; a=ed25519; pk=Dn4KMnDdgyhlXJNspQQrlHJ04i7/irG29p2H27Avd+8= X-Endpoint-Received: by B4 Relay for aleksa.paunovic@htecgroup.com/20250806 with auth_id=476 X-Original-From: Aleksa Paunovic Reply-To: aleksa.paunovic@htecgroup.com From: Aleksa Paunovic Add a new compatible for the MIPS P8700 ACLINT SSWI, with the "gf" vendor prefix. The original compatible is left as is. Signed-off-by: Aleksa Paunovic --- .../bindings/interrupt-controller/thead,c900-aclint-sswi.yaml | 3= +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c= 900-aclint-sswi.yaml b/Documentation/devicetree/bindings/interrupt-controll= er/thead,c900-aclint-sswi.yaml index d02c6886283af790d75357f77a714558f68bb7d1..6c79d7b7058a64bb39141d565f0= a6304365991f2 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-acl= int-sswi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-acl= int-sswi.yaml @@ -30,6 +30,9 @@ properties: - const: thead,c900-aclint-sswi - items: - const: mips,p8700-aclint-sswi + - items: + - const: gf,mips-p8700-aclint-sswi + - const: mips,p8700-aclint-sswi - items: - enum: - anlogic,dr1v90-aclint-sswi --=20 2.43.0 From nobody Fri Sep 25 10:04:45 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F157477984; Mon, 14 Sep 2026 13:56:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394167; cv=none; b=nL8RlfSYeB7w6eQw/SfhK4rETltQNzGvPT3Ksw2obgxfjwJ/D6ivI6kI/ti55ge/1J1VKQlfDlOLbSd4V3SNc+iCJ7ywcavjtLTMJCvTiHMs941OsHBsnycPPBw2BPLbAOebbpMQB5UcOcBU4YPO0eZuMYmochZ84yWXAcwdw0E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789394167; c=relaxed/simple; bh=TI6Y15jK2WMpO29t4KxW6iYgnJvRaN1hre64+unrls0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NFettpG5ire7xXNOG6zAALxMrHOSWXMSDn8L8syqWJaMz/imOAVgCHqduClq/dM+vRQHdCWoQF5NkEGfMk7GMue1MlfKDpc5g4yNdOgpt9+PO/MTcw47ZltQtFqgJG3tGM6gr3MjpB2uFSBP2OwQnjuF964qDN1/JUyB4TetmR8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SWCAcz+b; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SWCAcz+b" Received: by smtp.kernel.org (Postfix) with ESMTPS id 244AAC2BCB8; Mon, 14 Sep 2026 13:56:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789394167; bh=TI6Y15jK2WMpO29t4KxW6iYgnJvRaN1hre64+unrls0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=SWCAcz+bE6QBe1jss6bpNT9GHXXM7uGMMa6CvNsGzvYFRKGoWhEgCQMdxHInnpC1c z8ug/Dq41gwk93CcT1TvhsTlNFmuJoQ7UrnenEeZL58U34uertlOI6MFSB4sHFsD5q BJHzRs8Wo+Y8YvA/zy8Yw43pyV9bxO9wCWf4hcdl5tNtYxVy3U6DjpK0MEi960B7/k G0qkCcog3zC1XXv8vMEaqWmr+EpoIl/rA6AltAgsHSi1hRxYreQu3dCk2/lu+JJdlq 2pe+OZHMhcHrh2OnUHWcCBe2WI+rFQKZI8ph9TtKSU47S02ms4MKimEFG710hHX6HB VEjeiKkB8TV6Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06997C88E72; Mon, 14 Sep 2026 13:56:07 +0000 (UTC) From: Aleksa Paunovic via B4 Relay Date: Mon, 14 Sep 2026 15:55:56 +0200 Subject: [PATCH 8/9] riscv: dts: gf: Initial support for the P8700 Boston board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260914-p8700-dts-v1-8-3267f14ebce1@htecgroup.com> References: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> In-Reply-To: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Djordje Todorovic , Anup Patel , Thomas Gleixner , Radu Rendec , Inochi Amaoto , Daniel Lezcano Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Conor Dooley , linux-riscv@lists.infradead.org, Vladimir Kondratiev , Aleksa Paunovic X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789394164; l=12458; i=aleksa.paunovic@htecgroup.com; s=20250806; h=from:subject:message-id; bh=sdKgjEvUZZC8ghjKq0mA+IWSifHHew1uS0qIbTFq0Zo=; b=eCS9CDGlBSaLwX04m02bgLCpgxbKPkhAzCqPlL4F9bEU4rjHqrmqDCPXU8Bzg/o1qNezlm5SL VR3Ux3RFmBkABkCRYg0z7KKzkVIet9TltRC2Fmf0Ql4feDSBqTm52KW X-Developer-Key: i=aleksa.paunovic@htecgroup.com; a=ed25519; pk=Dn4KMnDdgyhlXJNspQQrlHJ04i7/irG29p2H27Avd+8= X-Endpoint-Received: by B4 Relay for aleksa.paunovic@htecgroup.com/20250806 with auth_id=476 X-Original-From: Aleksa Paunovic Reply-To: aleksa.paunovic@htecgroup.com From: Aleksa Paunovic Add initial device tree for the MIPS P8700 and the device tree for the Boston FPGA development board with a MIPS P8700 bitfile. Add related Makefile and KCONFIG changes. Co-developed-by: Djordje Todorovic Signed-off-by: Djordje Todorovic Signed-off-by: Aleksa Paunovic --- arch/riscv/Kconfig.socs | 6 + arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/gf/Makefile | 2 + arch/riscv/boot/dts/gf/p8700-boston.dts | 135 ++++++++++++++++++ arch/riscv/boot/dts/gf/p8700.dtsi | 241 ++++++++++++++++++++++++++++= ++++ 5 files changed, 385 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 429e0758930687c742c4dd09603e71e90dc096a2..78b0a0076feb14ebdafc4b7f0fa= 1be3aa416d415 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -18,6 +18,12 @@ config ARCH_ESWIN This enables support for ESWIN SoC platform hardware, including the ESWIN EIC7700 SoC. =20 +config ARCH_GF + bool "GlobalFoundries SoCs" + help + This enables support for GlobalFoundries SoC platform hardware, + including the MIPS P8700. + config ARCH_MICROCHIP_POLARFIRE def_bool ARCH_MICROCHIP =20 diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile index 69d8751fb17c803f0efb8003e111ee24144c222b..5d8d55c4cf9d0b17f2a8744aa17= 526819e6c277a 100644 --- a/arch/riscv/boot/dts/Makefile +++ b/arch/riscv/boot/dts/Makefile @@ -4,6 +4,7 @@ subdir-y +=3D andes subdir-y +=3D anlogic subdir-y +=3D canaan subdir-y +=3D eswin +subdir-y +=3D gf subdir-y +=3D microchip subdir-y +=3D renesas subdir-y +=3D sifive diff --git a/arch/riscv/boot/dts/gf/Makefile b/arch/riscv/boot/dts/gf/Makef= ile new file mode 100644 index 0000000000000000000000000000000000000000..180d7cc7f5cf87e48e2219f9ac9= 882828ca62016 --- /dev/null +++ b/arch/riscv/boot/dts/gf/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_GF) +=3D p8700-boston.dtb diff --git a/arch/riscv/boot/dts/gf/p8700-boston.dts b/arch/riscv/boot/dts/= gf/p8700-boston.dts new file mode 100644 index 0000000000000000000000000000000000000000..b829899592aeed5f1cfe3323e75= 5410de07dbdb8 --- /dev/null +++ b/arch/riscv/boot/dts/gf/p8700-boston.dts @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (C) 2025 MIPS + * + * Boston FPGA development board with a MIPS P8700 bitfile. + */ + +/dts-v1/; + +#include "p8700.dtsi" + +#include + +/* Clock frequency (in Hz) of the FPGA bitfile */ +#define BITFILE_FREQ 25000000 + +/ { + model =3D "MIPS P8700 Boston"; + compatible =3D "gf,mips-p8700-boston"; + + aliases { + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + cpus { + timebase-frequency =3D ; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x80000000 0x80000000>; + }; + + pci2: pci@14000000 { + compatible =3D "xlnx,axi-pcie-host-1.00.a"; + device_type =3D "pci"; + reg =3D <0x14000000 0x2000000>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + #interrupt-cells =3D <1>; + + interrupt-parent =3D <&aplic_s0>; + interrupts =3D <7 IRQ_TYPE_LEVEL_HIGH>; + + ranges =3D <0x02000000 0 0x16000000 + 0x16000000 0 0x100000>; + + bus-range =3D <0x00 0xff>; + + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pci2_intc 1>, + <0 0 0 2 &pci2_intc 2>, + <0 0 0 3 &pci2_intc 3>, + <0 0 0 4 &pci2_intc 4>; + + pci2_intc: interrupt-controller { + interrupt-controller; + #address-cells =3D <0>; + #interrupt-cells =3D <1>; + }; + + pci2_root@0,0 { + compatible =3D "pci10ee,7021", "pci-bridge"; + reg =3D <0x00000000 0 0 0 0>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + + eg20t_bridge@1,0,0 { + compatible =3D "pci8086,8800", "pci-bridge"; + reg =3D <0x00010000 0 0 0 0>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + + eg20t_mac@2,0,1 { + compatible =3D "pci8086,8802", + "intel,pch-gbe"; + reg =3D <0x00020100 0 0 0 0>; + phy-reset-gpios =3D <&eg20t_gpio 6 1>; + }; + + eg20t_gpio: eg20t_gpio@2,0,2 { + compatible =3D "pci8086,8803", + "intel,eg20t-gpio"; + reg =3D <0x00020200 0 0 0 0>; + + gpio-controller; + #gpio-cells =3D <2>; + }; + + eg20t_i2c@2,12,2 { + compatible =3D "pci8086,8817"; + reg =3D <0x00026200 0 0 0 0>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + rtc@68 { + compatible =3D "st,m41t81s"; + reg =3D <0x68>; + }; + }; + }; + }; + }; + + uart0: serial@17ffe000 { + compatible =3D "ns16550a"; + reg =3D <0x17ffe000 0x1000>; + reg-shift =3D <2>; + reg-io-width =3D <4>; + + interrupt-parent =3D <&aplic_s0>; + interrupts =3D <4 IRQ_TYPE_LEVEL_HIGH>; + + clock-frequency =3D ; + }; + + lcd: lcd@17fff000 { + compatible =3D "img,boston-lcd"; + reg =3D <0x17fff000 0x8>; + }; + + flash@18000000 { + compatible =3D "cfi-flash"; + reg =3D <0x18000000 0x8000000>; + bank-width =3D <2>; + }; +}; diff --git a/arch/riscv/boot/dts/gf/p8700.dtsi b/arch/riscv/boot/dts/gf/p87= 00.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..ba1854df5201bc4a6ca26868811= 834a7847dc624 --- /dev/null +++ b/arch/riscv/boot/dts/gf/p8700.dtsi @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (C) 2025 MIPS + */ + +/dts-v1/; + +/ { + #address-cells =3D <1>; + #size-cells =3D <1>; + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "gf,mips-p8700", "riscv"; + reg =3D <0x0>; + mmu-type =3D "riscv,sv39"; + riscv,cbom-block-size =3D <64>; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", + "zicntr", "zicsr", "zifencei", + "zihpm", "zba", "zbb", + "xmipsexectl"; + + cpu0_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + }; + + cpu1: cpu@1 { + device_type =3D "cpu"; + compatible =3D "gf,mips-p8700", "riscv"; + reg =3D <0x1>; + mmu-type =3D "riscv,sv39"; + riscv,cbom-block-size =3D <64>; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", + "zicntr", "zicsr", "zifencei", + "zihpm", "zba", "zbb", + "xmipsexectl"; + + cpu1_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + }; + + cpu2: cpu@10 { + device_type =3D "cpu"; + compatible =3D "gf,mips-p8700", "riscv"; + reg =3D <0x10>; + mmu-type =3D "riscv,sv39"; + riscv,cbom-block-size =3D <64>; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", + "zicntr", "zicsr", "zifencei", + "zihpm", "zba", "zbb", + "xmipsexectl"; + + cpu2_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + }; + + cpu3: cpu@11 { + device_type =3D "cpu"; + compatible =3D "gf,mips-p8700", "riscv"; + reg =3D <0x11>; + mmu-type =3D "riscv,sv39"; + riscv,cbom-block-size =3D <64>; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", + "zicntr", "zicsr", "zifencei", + "zihpm", "zba", "zbb", + "xmipsexectl"; + + cpu3_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + }; + + cpu4: cpu@20 { + device_type =3D "cpu"; + compatible =3D "gf,mips-p8700", "riscv"; + reg =3D <0x20>; + mmu-type =3D "riscv,sv39"; + riscv,cbom-block-size =3D <64>; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", + "zicntr", "zicsr", "zifencei", + "zihpm", "zba", "zbb", + "xmipsexectl"; + + cpu4_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + }; + + cpu5: cpu@21 { + device_type =3D "cpu"; + compatible =3D "gf,mips-p8700", "riscv"; + reg =3D <0x21>; + mmu-type =3D "riscv,sv39"; + riscv,cbom-block-size =3D <64>; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", + "zicntr", "zicsr", "zifencei", + "zihpm", "zba", "zbb", + "xmipsexectl"; + + cpu5_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + }; + + cpu6: cpu@30 { + device_type =3D "cpu"; + compatible =3D "gf,mips-p8700", "riscv"; + reg =3D <0x30>; + mmu-type =3D "riscv,sv39"; + riscv,cbom-block-size =3D <64>; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", + "zicntr", "zicsr", "zifencei", + "zihpm", "zba", "zbb", + "xmipsexectl"; + + cpu6_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + }; + + cpu7: cpu@31 { + device_type =3D "cpu"; + compatible =3D "gf,mips-p8700", "riscv"; + reg =3D <0x31>; + mmu-type =3D "riscv,sv39"; + riscv,cbom-block-size =3D <64>; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", + "zicntr", "zicsr", "zifencei", + "zihpm", "zba", "zbb", + "xmipsexectl"; + + cpu7_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + }; + }; + + soc: soc { + compatible =3D "simple-bus"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + mtimer0: timer@16108050 { + compatible =3D "gf,mips-p8700-aclint-mtimer"; + reg =3D <0x16108050 0x8>, + <0x16154000 0x7ff8>; + reg-names =3D "mtime", "mtimecmp"; + interrupts-extended =3D <&cpu0_intc 7>, <&cpu1_intc 7>, + <&cpu2_intc 7>, <&cpu3_intc 7>, + <&cpu4_intc 7>, <&cpu5_intc 7>, + <&cpu6_intc 7>, <&cpu7_intc 7>; + }; + + aplic_m0: interrupt-controller@16140000 { + compatible =3D "gf,mips-p8700-aplic", "riscv,aplic"; + reg =3D <0x16140000 0x8000>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts-extended =3D <&cpu0_intc 11>, <&cpu1_intc 11>, + <&cpu2_intc 11>, <&cpu3_intc 11>, + <&cpu4_intc 11>, <&cpu5_intc 11>, + <&cpu6_intc 11>, <&cpu7_intc 11>; + riscv,num-sources =3D <53>; + riscv,hart-indexes =3D <0x00 0x01 0x10 0x11 + 0x20 0x21 0x30 0x31>; + riscv,children =3D <&aplic_s0>; + riscv,delegation =3D <&aplic_s0 1 53>; + }; + + mswi0: mswi@16150000 { + compatible =3D "gf,mips-p8700-aclint-mswi"; + reg =3D <0x16150000 0x4000>; + interrupts-extended =3D <&cpu0_intc 3>, <&cpu1_intc 3>, + <&cpu2_intc 3>, <&cpu3_intc 3>, + <&cpu4_intc 3>, <&cpu5_intc 3>, + <&cpu6_intc 3>, <&cpu7_intc 3>; + riscv,hart-indexes =3D <0x00 0x01 0x10 0x11 + 0x20 0x21 0x30 0x31>; + }; + + aplic_s0: interrupt-controller@16160000 { + compatible =3D "gf,mips-p8700-aplic", "riscv,aplic"; + reg =3D <0x16160000 0x8000>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts-extended =3D <&cpu0_intc 9>, <&cpu1_intc 9>, + <&cpu2_intc 9>, <&cpu3_intc 9>, + <&cpu4_intc 9>, <&cpu5_intc 9>, + <&cpu6_intc 9>, <&cpu7_intc 9>; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260914-p8700-dts-v1-9-3267f14ebce1@htecgroup.com> References: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> In-Reply-To: <20260914-p8700-dts-v1-0-3267f14ebce1@htecgroup.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Djordje Todorovic , Anup Patel , Thomas Gleixner , Radu Rendec , Inochi Amaoto , Daniel Lezcano Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Conor Dooley , linux-riscv@lists.infradead.org, Vladimir Kondratiev , Aleksa Paunovic X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789394164; l=643; i=aleksa.paunovic@htecgroup.com; s=20250806; h=from:subject:message-id; bh=ckrLYxO/o55vtvQsoEYaC2ibzDfEj23B4ST0fzSv/OU=; b=6kklmDzo+zlV9/ocsf66KcL0PYcAytiTWmKOWykSPgWKwfy0umiG7jFG5AguVWOHwTewK8bLv VsnxyKh0KoBCTqTm0/kx/44MMpXtIYVOGx1dMpOmQSIAVS4sNqYnn1R X-Developer-Key: i=aleksa.paunovic@htecgroup.com; a=ed25519; pk=Dn4KMnDdgyhlXJNspQQrlHJ04i7/irG29p2H27Avd+8= X-Endpoint-Received: by B4 Relay for aleksa.paunovic@htecgroup.com/20250806 with auth_id=476 X-Original-From: Aleksa Paunovic Reply-To: aleksa.paunovic@htecgroup.com From: Aleksa Paunovic Build the MIPS P8700 Boston dtb by default. Signed-off-by: Aleksa Paunovic --- arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 04ae305d5511bb0760247f50d4b69b1e3a00527b..eeac96a0ec878a2d0aa0887d7a7= ce71207774a23 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -25,6 +25,7 @@ CONFIG_PROFILING=3Dy CONFIG_ARCH_ANDES=3Dy CONFIG_ARCH_ANLOGIC=3Dy CONFIG_ARCH_ESWIN=3Dy +CONFIG_ARCH_GF=3Dy CONFIG_ARCH_MICROCHIP=3Dy CONFIG_ARCH_SIFIVE=3Dy CONFIG_ARCH_SOPHGO=3Dy --=20 2.43.0