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While at it, fix the big CPU idle state name, which was described as silver-power-collapse, and update CPU idle state names to match the CPU type and low power mode they describe. Use little, big, and prime CPU idle state labels for consistency with other platforms using this CPU naming scheme. Fixes: d9d59d105f98 ("arm64: dts: qcom: Add initial Milos dtsi") Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/milos.dtsi | 38 +++++++++++++++++++--------------= ---- 1 file changed, 20 insertions(+), 18 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom= /milos.dtsi index 87c9be29f973..68b3d06eec72 100644 --- a/arch/arm64/boot/dts/qcom/milos.dtsi +++ b/arch/arm64/boot/dts/qcom/milos.dtsi @@ -299,9 +299,9 @@ core0 { idle-states { entry-method =3D "psci"; =20 - silver_cpu_sleep_0: cpu-sleep-0-0 { + little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "pc"; + idle-state-name =3D "silver-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <250>; exit-latency-us =3D <700>; @@ -309,9 +309,9 @@ silver_cpu_sleep_0: cpu-sleep-0-0 { local-timer-stop; }; =20 - silver_cpu_sleep_1: cpu-sleep-0-1 { + little_cpu_sleep_1: cpu-sleep-0-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <550>; exit-latency-us =3D <750>; @@ -319,9 +319,9 @@ silver_cpu_sleep_1: cpu-sleep-0-1 { local-timer-stop; }; =20 - gold_cpu_sleep_0: cpu-sleep-1-0 { + big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-power-collapse"; + idle-state-name =3D "gold-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <400>; exit-latency-us =3D <900>; @@ -329,9 +329,9 @@ gold_cpu_sleep_0: cpu-sleep-1-0 { local-timer-stop; }; =20 - gold_cpu_sleep_1: cpu-sleep-1-1 { + big_cpu_sleep_1: cpu-sleep-1-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <600>; exit-latency-us =3D <1300>; @@ -339,9 +339,9 @@ gold_cpu_sleep_1: cpu-sleep-1-1 { local-timer-stop; }; =20 - gold_plus_cpu_sleep_0: cpu-sleep-2-0 { + prime_cpu_sleep_0: cpu-sleep-2-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-plus-rail-power-collapse"; + idle-state-name =3D "goldplus-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <600>; exit-latency-us =3D <1500>; @@ -353,6 +353,7 @@ gold_plus_cpu_sleep_0: cpu-sleep-2-0 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l3-pc"; arm,psci-suspend-param =3D <0x41000044>; entry-latency-us =3D <750>; exit-latency-us =3D <2350>; @@ -361,6 +362,7 @@ cluster_sleep_0: cluster-sleep-0 { =20 cluster_sleep_1: cluster-sleep-1 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cx-ret"; arm,psci-suspend-param =3D <0x41003344>; entry-latency-us =3D <2800>; exit-latency-us =3D <4400>; @@ -411,49 +413,49 @@ psci { cpu_pd0: power-domain-cpu0 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&silver_cpu_sleep_0>, <&silver_cpu_sleep_1>; + domain-idle-states =3D <&little_cpu_sleep_0>, <&little_cpu_sleep_1>; }; =20 cpu_pd1: power-domain-cpu1 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&silver_cpu_sleep_0>, <&silver_cpu_sleep_1>; + domain-idle-states =3D <&little_cpu_sleep_0>, <&little_cpu_sleep_1>; }; =20 cpu_pd2: power-domain-cpu2 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&silver_cpu_sleep_0>, <&silver_cpu_sleep_1>; + domain-idle-states =3D <&little_cpu_sleep_0>, <&little_cpu_sleep_1>; }; =20 cpu_pd3: power-domain-cpu3 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&silver_cpu_sleep_0>, <&silver_cpu_sleep_1>; + domain-idle-states =3D <&little_cpu_sleep_0>, <&little_cpu_sleep_1>; }; =20 cpu_pd4: power-domain-cpu4 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&gold_cpu_sleep_0>, <&gold_cpu_sleep_1>; + domain-idle-states =3D <&big_cpu_sleep_0>, <&big_cpu_sleep_1>; }; =20 cpu_pd5: power-domain-cpu5 { #power-domain-cells =3D <0>; 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Signed-off-by: Maulik Shah Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8750.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qco= m/sm8750.dtsi index 28cf22da854d..897790a3a492 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -200,6 +200,7 @@ cluster1_c4: cpu-sleep-1 { domain-idle-states { cluster_cl5: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cluster-cl5"; arm,psci-suspend-param =3D <0x01000054>; entry-latency-us =3D <2150>; exit-latency-us =3D <1983>; @@ -208,6 +209,7 @@ cluster_cl5: cluster-sleep-0 { =20 domain_ss3: domain-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cluster-ss3"; arm,psci-suspend-param =3D <0x0200c354>; entry-latency-us =3D <2800>; exit-latency-us =3D <4400>; --=20 2.43.0 From nobody Fri Sep 25 10:38:39 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2C5338F651 for ; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/= qcom/kaanapali.dtsi index 131fd2a16c54..5eaa563b6b02 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -182,7 +182,7 @@ idle-states { =20 cluster0_c4: cpu-sleep-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "retention"; + idle-state-name =3D "ret"; arm,psci-suspend-param =3D <0x00000004>; entry-latency-us =3D <93>; exit-latency-us =3D <129>; @@ -191,7 +191,7 @@ cluster0_c4: cpu-sleep-0 { =20 cluster1_c4: cpu-sleep-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "retention"; + idle-state-name =3D "ret"; arm,psci-suspend-param =3D <0x00000004>; entry-latency-us =3D <172>; exit-latency-us =3D <130>; @@ -202,6 +202,7 @@ cluster1_c4: cpu-sleep-1 { domain-idle-states { cluster_cl5: cluster-sleep-0 { compatible =3D "domain-idle-state"; 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Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom= /hamoa.dtsi index fcd88e5f5d7e..1d3ca2215914 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -290,6 +290,7 @@ cluster_c4: cpu-sleep-0 { domain-idle-states { cluster_cl4: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cluster-cl4"; arm,psci-suspend-param =3D <0x01000044>; entry-latency-us =3D <350>; exit-latency-us =3D <500>; @@ -298,6 +299,7 @@ cluster_cl4: cluster-sleep-0 { =20 cluster_cl5: cluster-sleep-1 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cluster-cl5"; arm,psci-suspend-param =3D <0x01000054>; entry-latency-us =3D <2000>; exit-latency-us =3D <2000>; @@ -306,6 +308,7 @@ cluster_cl5: cluster-sleep-1 { =20 domain_ss3: domain-sleep-0 { compatible =3D "domain-idle-state"; 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Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/glymur.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qco= m/glymur.dtsi index 7dedace8c3c4..68e06443e91c 100644 --- a/arch/arm64/boot/dts/qcom/glymur.dtsi +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi @@ -369,6 +369,7 @@ cpu_c4: cpu-sleep-0 { domain-idle-states { cluster_cl5: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cluster-cl5"; arm,psci-suspend-param =3D <0x01000054>; entry-latency-us =3D <2000>; exit-latency-us =3D <2000>; @@ -377,6 +378,7 @@ cluster_cl5: cluster-sleep-0 { =20 domain_ss3: domain-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cluster-ss3"; arm,psci-suspend-param =3D <0x0200c354>; entry-latency-us =3D <2800>; exit-latency-us =3D <4400>; --=20 2.43.0 From nobody Fri Sep 25 10:38:39 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ECF44392C3D for ; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qco= m/sdm845.dtsi index b1f6782a3ad9..a5693bc72636 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -330,7 +330,7 @@ cpu_idle_states: idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "little-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <350>; exit-latency-us =3D <461>; @@ -340,7 +340,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "big-rail-power-collapse"; + idle-state-name =3D "gold-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <264>; exit-latency-us =3D <621>; @@ -352,6 +352,7 @@ big_cpu_sleep_0: cpu-sleep-1-0 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; 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Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qc= om/sc8180x.dtsi index de1b72b64d96..e7af7e36ea1b 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -284,6 +284,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <355>; exit-latency-us =3D <909>; @@ -293,6 +294,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; + idle-state-name =3D "gold-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <2411>; exit-latency-us =3D <1461>; @@ -304,6 +306,7 @@ big_cpu_sleep_0: cpu-sleep-1-0 { domain-idle-states { cluster_sleep_apss_off: cluster-sleep-0 { compatible =3D "domain-idle-state"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qco= m/sdm670.dtsi index 5c60ea36f04a..1fae9bf16120 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -271,7 +271,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "little-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <915>; @@ -281,7 +281,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "big-rail-power-collapse"; + idle-state-name =3D "gold-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <526>; exit-latency-us =3D <1854>; @@ -293,6 +293,7 @@ big_cpu_sleep_0: cpu-sleep-1-0 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qco= m/sm6115.dtsi index 3520802d1fed..27b5ee48637b 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -209,7 +209,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <290>; exit-latency-us =3D <376>; @@ -219,7 +219,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <297>; exit-latency-us =3D <324>; @@ -230,8 +230,8 @@ big_cpu_sleep_0: cpu-sleep-1-0 { =20 domain-idle-states { cluster_0_sleep_0: cluster-sleep-0-0 { - /* GDHS */ compatible =3D "domain-idle-state"; + idle-state-name =3D "silver-cluster-gdhs"; arm,psci-suspend-param =3D <0x40000022>; entry-latency-us =3D <360>; exit-latency-us =3D <421>; @@ -239,8 +239,8 @@ cluster_0_sleep_0: cluster-sleep-0-0 { }; =20 cluster_0_sleep_1: cluster-sleep-0-1 { - /* Power Collapse */ compatible =3D "domain-idle-state"; + idle-state-name =3D "silver-cluster-pc"; arm,psci-suspend-param =3D <0x41000044>; entry-latency-us =3D <800>; exit-latency-us =3D <2118>; @@ -248,8 +248,8 @@ cluster_0_sleep_1: cluster-sleep-0-1 { }; =20 cluster_1_sleep_0: cluster-sleep-1-0 { - /* GDHS */ compatible =3D "domain-idle-state"; + idle-state-name =3D "gold-cluster-gdhs"; arm,psci-suspend-param =3D <0x40000042>; entry-latency-us =3D <314>; exit-latency-us =3D <345>; @@ -257,8 +257,8 @@ cluster_1_sleep_0: cluster-sleep-1-0 { }; =20 cluster_1_sleep_1: cluster-sleep-1-1 { - /* Power Collapse */ compatible =3D "domain-idle-state"; + idle-state-name =3D "gold-cluster-pc"; arm,psci-suspend-param =3D <0x41000044>; entry-latency-us =3D <640>; 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Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qco= m/sm6350.dtsi index 15d38b7e803c..379e0b48f94a 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -292,6 +292,7 @@ core7 { domain-idle-states { cluster_sleep_pc: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l3-pc"; arm,psci-suspend-param =3D <0x41000044>; entry-latency-us =3D <2752>; exit-latency-us =3D <3048>; @@ -300,6 +301,7 @@ cluster_sleep_pc: cluster-sleep-0 { =20 cluster_sleep_cx_ret: cluster-sleep-1 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cx-ret"; arm,psci-suspend-param =3D <0x41001244>; entry-latency-us =3D <3638>; exit-latency-us =3D <4562>; @@ -308,6 +310,7 @@ cluster_sleep_cx_ret: cluster-sleep-1 { =20 cluster_aoss_sleep: cluster-sleep-2 { compatible =3D "domain-idle-state"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/sm6375.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qco= m/sm6375.dtsi index 71a228597093..c0b6ac0cdcbc 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -252,7 +252,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-power-collapse"; + idle-state-name =3D "silver-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <549>; exit-latency-us =3D <901>; @@ -262,7 +262,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 little_cpu_sleep_1: cpu-sleep-0-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <915>; @@ -272,7 +272,7 @@ little_cpu_sleep_1: cpu-sleep-0-1 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index 94a3b02cb289..1d708f56e05d 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -287,7 +287,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "little-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <355>; exit-latency-us =3D <909>; @@ -297,7 +297,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "big-rail-power-collapse"; + idle-state-name =3D "gold-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <241>; exit-latency-us =3D <1461>; @@ -309,6 +309,7 @@ big_cpu_sleep_0: cpu-sleep-1-0 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/talos.dtsi | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom= /talos.dtsi index 531cf41b94dc..a3c514fd2c81 100644 --- a/arch/arm64/boot/dts/qcom/talos.dtsi +++ b/arch/arm64/boot/dts/qcom/talos.dtsi @@ -398,7 +398,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-power-collapse"; + idle-state-name =3D "silver-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <549>; exit-latency-us =3D <901>; @@ -408,7 +408,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 little_cpu_sleep_1: cpu-sleep-0-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <915>; @@ -418,7 +418,7 @@ little_cpu_sleep_1: cpu-sleep-0-1 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-power-collapse"; + idle-state-name =3D "gold-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <523>; exit-latency-us =3D <1244>; @@ -428,7 +428,7 @@ big_cpu_sleep_0: cpu-sleep-1-0 { =20 big_cpu_sleep_1: cpu-sleep-1-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <526>; exit-latency-us =3D <1854>; @@ -440,6 +440,7 @@ big_cpu_sleep_1: cpu-sleep-1-1 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l3-pc"; arm,psci-suspend-param =3D <0x41000044>; entry-latency-us =3D <2752>; exit-latency-us =3D <3048>; @@ -448,6 +449,7 @@ cluster_sleep_0: cluster-sleep-0 { =20 cluster_sleep_1: cluster-sleep-1 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cx-ret"; arm,psci-suspend-param =3D <0x41001344>; entry-latency-us =3D <3263>; exit-latency-us =3D <4562>; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qco= m/sm8250.dtsi index 8483a1bc56f4..57b90b62a53d 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -341,7 +341,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <360>; exit-latency-us =3D <531>; @@ -351,7 +351,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <1061>; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qco= m/sm8350.dtsi index 100faea925a3..6cb694be6fe7 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -252,7 +252,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <360>; exit-latency-us =3D <531>; @@ -262,7 +262,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <1061>; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 484ec8ec8c10..dbbdcbd4d4f3 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -249,7 +249,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <800>; exit-latency-us =3D <750>; @@ -259,7 +259,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <600>; exit-latency-us =3D <1550>; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 23604436add3..9fd739d1666f 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -336,7 +336,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <550>; exit-latency-us =3D <750>; @@ -346,7 +346,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <600>; exit-latency-us =3D <1300>; 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Mon, 14 Sep 2026 00:01:17 -0700 (PDT) Received: from hu-mkshah-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33ba4f55735sm25962177eec.24.2026.09.14.00.01.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 00:01:16 -0700 (PDT) From: Maulik Shah Date: Mon, 14 Sep 2026 12:29:50 +0530 Subject: [PATCH 18/31] arm64: dts: qcom: sm8650: Add domain idle state names Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260914-b4-idle-state-name-v1-18-660c31187819@oss.qualcomm.com> References: <20260914-b4-idle-state-name-v1-0-660c31187819@oss.qualcomm.com> In-Reply-To: <20260914-b4-idle-state-name-v1-0-660c31187819@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Abel Vesa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dmitry Baryshkov , Luca Weiss , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Maulik Shah X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; 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While at it, update CPU idle state names to match the low power modes they describe. Use little, big, and prime CPU idle state labels for consistency with other platforms using this CPU naming scheme. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qco= m/sm8650.dtsi index 99509305f970..11e491acb715 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -451,9 +451,9 @@ core7 { idle-states { entry-method =3D "psci"; =20 - silver_cpu_sleep_0: cpu-sleep-0-0 { + little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <550>; exit-latency-us =3D <750>; @@ -461,9 +461,9 @@ silver_cpu_sleep_0: cpu-sleep-0-0 { local-timer-stop; }; =20 - gold_cpu_sleep_0: cpu-sleep-1-0 { + big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <600>; exit-latency-us =3D <1300>; @@ -471,9 +471,9 @@ gold_cpu_sleep_0: cpu-sleep-1-0 { local-timer-stop; }; =20 - gold_plus_cpu_sleep_0: cpu-sleep-2-0 { + prime_cpu_sleep_0: cpu-sleep-2-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-plus-rail-power-collapse"; + idle-state-name =3D "goldplus-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <500>; exit-latency-us =3D <1350>; @@ -485,6 +485,7 @@ gold_plus_cpu_sleep_0: cpu-sleep-2-0 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l3-pc"; arm,psci-suspend-param =3D <0x41000044>; entry-latency-us =3D <750>; exit-latency-us =3D <2350>; @@ -493,6 +494,7 @@ cluster_sleep_0: cluster-sleep-0 { =20 cluster_sleep_1: cluster-sleep-1 { compatible =3D "domain-idle-state"; + idle-state-name =3D "llcc-off"; arm,psci-suspend-param =3D <0x4100c344>; entry-latency-us =3D <2800>; exit-latency-us =3D <4400>; @@ -1659,49 +1661,49 @@ psci { cpu_pd0: power-domain-cpu0 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&silver_cpu_sleep_0>; + domain-idle-states =3D <&little_cpu_sleep_0>; }; =20 cpu_pd1: power-domain-cpu1 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&silver_cpu_sleep_0>; + domain-idle-states =3D <&little_cpu_sleep_0>; }; =20 cpu_pd2: power-domain-cpu2 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&gold_cpu_sleep_0>; + domain-idle-states =3D <&big_cpu_sleep_0>; }; =20 cpu_pd3: power-domain-cpu3 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&gold_cpu_sleep_0>; + domain-idle-states =3D <&big_cpu_sleep_0>; }; =20 cpu_pd4: power-domain-cpu4 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_pd>; - domain-idle-states =3D <&gold_cpu_sleep_0>; + domain-idle-states =3D <&big_cpu_sleep_0>; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/eliza.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom= /eliza.dtsi index a8042291bd07..2b6bbdf3f28c 100644 --- a/arch/arm64/boot/dts/qcom/eliza.dtsi +++ b/arch/arm64/boot/dts/qcom/eliza.dtsi @@ -284,7 +284,7 @@ idle-states { =20 cluster0_c4: cpu-sleep-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <550>; exit-latency-us =3D <750>; @@ -293,7 +293,7 @@ cluster0_c4: cpu-sleep-0 { =20 cluster1_c4: cpu-sleep-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <550>; exit-latency-us =3D <1050>; @@ -302,7 +302,7 @@ cluster1_c4: cpu-sleep-1 { =20 cluster2_c4: cpu-sleep-2 { compatible =3D "arm,idle-state"; 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Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/agatti.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/agatti.dtsi b/arch/arm64/boot/dts/qco= m/agatti.dtsi index e7fed60a59d9..c226ef4aeed7 100644 --- a/arch/arm64/boot/dts/qcom/agatti.dtsi +++ b/arch/arm64/boot/dts/qcom/agatti.dtsi @@ -130,6 +130,7 @@ core3 { domain-idle-states { cluster_sleep: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l2-pc"; arm,psci-suspend-param =3D <0x41000043>; entry-latency-us =3D <800>; exit-latency-us =3D <2118>; --=20 2.43.0 From nobody Fri Sep 25 10:38:39 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A3D63AAF5C for ; Mon, 14 Sep 2026 07:01:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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While at it, update the CPU idle state name to match the low power mode it describes. Use a big CPU idle state label for the shared CPU idle state, since all eight CPUs use it. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/lemans.dtsi | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qco= m/lemans.dtsi index 695eae1b7256..09e6138d2990 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -297,9 +297,9 @@ core3 { idle-states { entry-method =3D "psci"; =20 - gold_rail_cpu_sleep_0: cpu-sleep-0 { + big_cpu_sleep_0: cpu-sleep-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <1061>; @@ -311,6 +311,7 @@ gold_rail_cpu_sleep_0: cpu-sleep-0 { domain-idle-states { cluster_sleep_gold: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l3-pc"; arm,psci-suspend-param =3D <0x41000044>; entry-latency-us =3D <2752>; exit-latency-us =3D <3048>; @@ -319,6 +320,7 @@ cluster_sleep_gold: cluster-sleep-0 { =20 cluster_sleep_apss_rsc_pc: cluster-sleep-1 { compatible =3D "domain-idle-state"; + idle-state-name =3D "rsc-pc"; arm,psci-suspend-param =3D <0x42000144>; entry-latency-us =3D <3263>; exit-latency-us =3D <6562>; @@ -557,49 +559,49 @@ psci { cpu_pd0: power-domain-cpu0 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_0_pd>; - domain-idle-states =3D <&gold_rail_cpu_sleep_0>; + domain-idle-states =3D <&big_cpu_sleep_0>; }; =20 cpu_pd1: power-domain-cpu1 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_0_pd>; - domain-idle-states =3D <&gold_rail_cpu_sleep_0>; + domain-idle-states =3D <&big_cpu_sleep_0>; }; =20 cpu_pd2: power-domain-cpu2 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_0_pd>; - domain-idle-states =3D <&gold_rail_cpu_sleep_0>; + domain-idle-states =3D <&big_cpu_sleep_0>; }; =20 cpu_pd3: power-domain-cpu3 { #power-domain-cells =3D <0>; power-domains =3D <&cluster_0_pd>; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/monaco.dtsi | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qco= m/monaco.dtsi index 395d32d36844..2b48b58b1bb1 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -309,7 +309,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <602>; exit-latency-us =3D <961>; @@ -319,7 +319,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "gold-rail-power-collapse"; + idle-state-name =3D "gold-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <1061>; @@ -331,6 +331,7 @@ big_cpu_sleep_0: cpu-sleep-1-0 { domain-idle-states { silver_cluster_sleep: cluster-sleep-0 { compatible =3D "domain-idle-state"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qc= om/msm8916.dtsi index e39743e22043..89b78e96bf49 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -205,7 +205,7 @@ idle-states { =20 cpu_sleep_0: cpu-sleep-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "standalone-power-collapse"; + idle-state-name =3D "cpu-pc"; arm,psci-suspend-param =3D <0x40000002>; entry-latency-us =3D <130>; exit-latency-us =3D <150>; @@ -218,6 +218,7 @@ domain-idle-states { =20 cluster_ret: cluster-retention { compatible =3D "domain-idle-state"; + idle-state-name =3D "l2-gdhs"; arm,psci-suspend-param =3D <0x41000012>; entry-latency-us =3D <500>; exit-latency-us =3D <500>; @@ -226,6 +227,7 @@ cluster_ret: cluster-retention { =20 cluster_pwrdn: cluster-gdhs { compatible =3D "domain-idle-state"; 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While at it, update the CPU idle state name to match the low power mode it describes. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8917.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8917.dtsi b/arch/arm64/boot/dts/qc= om/msm8917.dtsi index a2907f8a6376..0bd60f6bd636 100644 --- a/arch/arm64/boot/dts/qcom/msm8917.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8917.dtsi @@ -112,6 +112,7 @@ core3 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l2-pc"; arm,psci-suspend-param =3D <0x41000053>; entry-latency-us =3D <700>; exit-latency-us =3D <1000>; @@ -124,7 +125,7 @@ idle-states { =20 cpu_sleep_0: cpu-sleep-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "standalone-power-collapse"; + idle-state-name =3D "cpu-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <125>; exit-latency-us =3D <180>; --=20 2.43.0 From nobody Fri Sep 25 10:38:39 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C0953E5ED8 for ; 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Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qc= om/qdu1000.dtsi index af106aebd30d..1dfaac8c84b4 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -142,6 +142,7 @@ idle-states { =20 cpu_off: cpu-sleep-0 { compatible =3D "arm,idle-state"; + idle-state-name =3D "silver-pll-pc"; entry-latency-us =3D <274>; exit-latency-us =3D <480>; min-residency-us =3D <3934>; @@ -153,6 +154,7 @@ cpu_off: cpu-sleep-0 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l3-pc"; entry-latency-us =3D <584>; exit-latency-us =3D <2332>; min-residency-us =3D <6118>; @@ -161,6 +163,7 @@ cluster_sleep_0: cluster-sleep-0 { =20 cluster_sleep_1: cluster-sleep-1 { compatible =3D "domain-idle-state"; + idle-state-name =3D "llcc-off"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sar2130p.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/q= com/sar2130p.dtsi index 2ecead79806c..e85bfab7bcf4 100644 --- a/arch/arm64/boot/dts/qcom/sar2130p.dtsi +++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi @@ -157,7 +157,7 @@ idle-states { =20 cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-power-collapse"; + idle-state-name =3D "silver-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <549>; exit-latency-us =3D <901>; @@ -167,7 +167,7 @@ cpu_sleep_0: cpu-sleep-0-0 { =20 cpu_sleep_1: cpu-sleep-0-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "silver-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <915>; @@ -179,6 +179,7 @@ cpu_sleep_1: cpu-sleep-0-1 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index 874265f49d8d..b1e48b5ebe88 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -279,7 +279,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "little-rail-power-collapse"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <355>; exit-latency-us =3D <909>; @@ -289,7 +289,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "big-rail-power-collapse"; + idle-state-name =3D "gold-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <241>; exit-latency-us =3D <1461>; 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Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdx75.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom= /sdx75.dtsi index 81292850e531..42a44176a32d 100644 --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi @@ -156,6 +156,7 @@ idle-states { =20 cpu_off: cpu-sleep-0 { compatible =3D "arm,idle-state"; + idle-state-name =3D "cpu-pc"; entry-latency-us =3D <235>; exit-latency-us =3D <428>; min-residency-us =3D <1774>; @@ -165,6 +166,7 @@ cpu_off: cpu-sleep-0 { =20 cpu_rail_off: cpu-rail-sleep-1 { compatible =3D "arm,idle-state"; + idle-state-name =3D "cpu-pll-pc"; entry-latency-us =3D <800>; exit-latency-us =3D <750>; min-residency-us =3D <4090>; @@ -177,6 +179,7 @@ cpu_rail_off: cpu-rail-sleep-1 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l3-pc"; arm,psci-suspend-param =3D <0x41000044>; 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Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm4450.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qco= m/sm4450.dtsi index bc9c788b92b1..98f603961f8b 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -254,6 +254,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <800>; exit-latency-us =3D <750>; @@ -263,6 +264,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; + idle-state-name =3D "gold-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <600>; exit-latency-us =3D <1550>; @@ -274,6 +276,7 @@ big_cpu_sleep_0: cpu-sleep-1-0 { domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qco= m/sc7180.dtsi index 70fbfb31d4a4..51bab1711e4e 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -316,7 +316,7 @@ idle_states: idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "little-power-down"; + idle-state-name =3D "silver-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <549>; exit-latency-us =3D <901>; @@ -326,7 +326,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 little_cpu_sleep_1: cpu-sleep-0-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "little-rail-power-down"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <915>; @@ -336,7 +336,7 @@ little_cpu_sleep_1: cpu-sleep-0-1 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "big-power-down"; + idle-state-name =3D "gold-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <523>; exit-latency-us =3D <1244>; @@ -346,7 +346,7 @@ big_cpu_sleep_0: cpu-sleep-1-0 { =20 big_cpu_sleep_1: cpu-sleep-1-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "big-rail-power-down"; + idle-state-name =3D "gold-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <526>; exit-latency-us =3D <1854>; @@ -358,6 +358,7 @@ big_cpu_sleep_1: cpu-sleep-1-1 { domain_idle_states: domain-idle-states { cluster_sleep_pc: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l3-pc"; arm,psci-suspend-param =3D <0x41000044>; entry-latency-us =3D <2752>; exit-latency-us =3D <3048>; @@ -366,6 +367,7 @@ cluster_sleep_pc: cluster-sleep-0 { =20 cluster_sleep_cx_ret: cluster-sleep-1 { compatible =3D "domain-idle-state"; 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While at it, update CPU idle state names to match the low power modes they describe. Signed-off-by: Maulik Shah Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 1 + 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index 347815e5983e..759e16ed00cb 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -442,7 +442,7 @@ idle-states { =20 little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "little-power-down"; + idle-state-name =3D "silver-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <549>; exit-latency-us =3D <901>; @@ -452,7 +452,7 @@ little_cpu_sleep_0: cpu-sleep-0-0 { =20 little_cpu_sleep_1: cpu-sleep-0-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "little-rail-power-down"; + idle-state-name =3D "silver-pll-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <702>; exit-latency-us =3D <915>; @@ -462,7 +462,7 @@ little_cpu_sleep_1: cpu-sleep-0-1 { =20 big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; - idle-state-name =3D "big-power-down"; + idle-state-name =3D "gold-pc"; arm,psci-suspend-param =3D <0x40000003>; entry-latency-us =3D <523>; exit-latency-us =3D <1244>; @@ -472,7 +472,7 @@ big_cpu_sleep_0: cpu-sleep-1-0 { =20 big_cpu_sleep_1: cpu-sleep-1-1 { compatible =3D "arm,idle-state"; - idle-state-name =3D "big-rail-power-down"; + idle-state-name =3D "gold-pll-rail-pc"; arm,psci-suspend-param =3D <0x40000004>; entry-latency-us =3D <526>; exit-latency-us =3D <1854>; @@ -484,6 +484,7 @@ big_cpu_sleep_1: cpu-sleep-1-1 { domain_idle_states: domain-idle-states { cluster_sleep_apss_off: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "l3-pc"; arm,psci-suspend-param =3D <0x41000044>; entry-latency-us =3D <2752>; exit-latency-us =3D <3048>; @@ -492,6 +493,7 @@ cluster_sleep_apss_off: cluster-sleep-0 { =20 cluster_sleep_cx_ret: cluster-sleep-1 { compatible =3D "domain-idle-state"; + idle-state-name =3D "cx-ret"; arm,psci-suspend-param =3D <0x41001344>; entry-latency-us =3D <3263>; exit-latency-us =3D <4562>; @@ -500,6 +502,7 @@ cluster_sleep_cx_ret: cluster-sleep-1 { =20 cluster_sleep_llcc_off: cluster-sleep-2 { compatible =3D "domain-idle-state"; + idle-state-name =3D "llcc-off"; arm,psci-suspend-param =3D <0x4100b344>; entry-latency-us =3D <3638>; exit-latency-us =3D <6562>; diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm6= 4/boot/dts/qcom/sc7280-chrome-common.dtsi index debf62baec9b..116a43b7e18b 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi @@ -31,6 +31,7 @@ cpus { domain_idle_states: domain-idle-states { cluster_sleep_0: cluster-sleep-0 { compatible =3D "domain-idle-state"; + idle-state-name =3D "llcc-off"; arm,psci-suspend-param =3D <0x40003444>; entry-latency-us =3D <2752>; exit-latency-us =3D <6562>; --=20 2.43.0