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charset="utf-8" Add lenovo,thinkpad-t14s-gen7 as a board compatible under qcom,mahua. The T14s Gen 7 uses the Mahua SoC (a 12-core variant of Glymur with cluster2 / cpu12-cpu17 fused off) rather than Glymur proper, matching what the platform's ACPI MADT dump reports (12 enabled + 6 disabled processors). Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Srinivas Kandagatla --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index 5ccb571520d1..52b9163be357 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -178,6 +178,7 @@ properties: =20 - items: - enum: + - lenovo,thinkpad-t14s-gen7 - qcom,mahua-crd - const: qcom,mahua =20 --=20 2.53.0 From nobody Fri Sep 25 11:10:09 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52E69372EEA for ; Sun, 13 Sep 2026 20:18:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; 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charset="utf-8" 14" 1920x1200 IPS panel used on Lenovo ThinkPad T14s Gen 7 (Mahua). Panel identifies as CSW 0x1465 over eDP AUX; uses conservative delay_200_500_e50 preset in line with sibling MNE007QB/QS panels. Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Srinivas Kandagatla Reviewed-by: Abel Vesa --- drivers/gpu/drm/panel/panel-edp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pane= l-edp.c index bfb49b647b96..15ca62c88901 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -2140,6 +2140,7 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('C', 'S', 'W', 0x144b, &delay_200_500_e80, "MNE001BS1-4"), EDP_PANEL_ENTRY('C', 'S', 'W', 0x1457, &delay_80_500_e80_p2e200, "MNE007Q= S3-8"), EDP_PANEL_ENTRY('C', 'S', 'W', 0x1462, &delay_200_500_e50, "MNE007QS5-2"), + EDP_PANEL_ENTRY('C', 'S', 'W', 0x1465, &delay_200_500_e50, "MNE007QB1-1"), EDP_PANEL_ENTRY('C', 'S', 'W', 0x1468, &delay_200_500_e50, "MNE007QB2-2"), EDP_PANEL_ENTRY('C', 'S', 'W', 0x146e, &delay_80_500_e50_d50, "MNE007QB3-= 1"), EDP_PANEL_ENTRY('C', 'S', 'W', 0x147c, &delay_200_500_e50_d100, "MNE007QB= 3-1"), --=20 2.53.0 From nobody Fri Sep 25 11:10:09 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FA1E3B6379 for ; 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charset="utf-8" Introduce a device tree for the Mahua-based Lenovo ThinkPad T14s Gen 7, a Snapdragon X2 Elite laptop. It follows the Qualcomm Glymur reference design used by mahua-crd. Currently working: - Display (internal eDP panel) - Audio playback and capture (2x WSA8845 speakers on swr0, DMICs via the VA macro) - USB-C (host + charging on both ports) - Wi-Fi (WCN7850 on PCIe4), Bluetooth (over uart14) - NVMe on PCIe5 - HID-over-I2C touchpad, keyboard and TrackPoint on i2c0 - Lid switch - WWAN wiring is included but remains untested due to lack of access to such a SKU. Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Srinivas Kandagatla Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../qcom/mahua-lenovo-thinkpad-t14s-gen7.dts | 1184 +++++++++++++++++ 2 files changed, 1185 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/mahua-lenovo-thinkpad-t14s-gen= 7.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 6c2ac11133ca..c71d536fc3e7 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -59,6 +59,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk-el2.dtb lemans-evk-ifp-mezzanine-dtbs :=3D lemans-evk.dtb lemans-evk-ifp-mezzanine= .dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk-ifp-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D mahua-crd.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D mahua-lenovo-thinkpad-t14s-gen7.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D milos-fairphone-fp6.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D milos-nothing-asteroids.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-arduino-monza.dtb diff --git a/arch/arm64/boot/dts/qcom/mahua-lenovo-thinkpad-t14s-gen7.dts b= /arch/arm64/boot/dts/qcom/mahua-lenovo-thinkpad-t14s-gen7.dts new file mode 100644 index 000000000000..be5f12bfe56a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/mahua-lenovo-thinkpad-t14s-gen7.dts @@ -0,0 +1,1184 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ +/dts-v1/; + +#include "mahua.dtsi" + +#include "pmcx0102.dtsi" +#include "pmh0101.dtsi" +#include "pmh0110-glymur.dtsi" +#include "pmh0104-glymur.dtsi" +#include "pmk8850.dtsi" +#include "smb2370.dtsi" + +#include +#include +#include +#include + +/* PMICs tied to Glymur's cluster2 are absent on Mahua. */ +/delete-node/ &pmcx0102_d_e0; +/delete-node/ &pmcx0102_d0_thermal; +/delete-node/ &pmh0104_i_e0; +/delete-node/ &pmh0104_i0_thermal; +/delete-node/ &pmh0104_j_e0; +/delete-node/ &pmh0104_j0_thermal; + +/ { + model =3D "Lenovo ThinkPad T14s Gen 7"; + compatible =3D "lenovo,thinkpad-t14s-gen7", "qcom,mahua"; + + aliases { + i2c0 =3D &i2c0; + i2c5 =3D &i2c5; + + serial0 =3D &uart21; + serial1 =3D &uart14; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + clocks { + xo_board: xo-board { + compatible =3D "fixed-clock"; + clock-frequency =3D <38400000>; + #clock-cells =3D <0>; + }; + + sleep_clk: sleep-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <32000>; + #clock-cells =3D <0>; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&hall_int_n_default>; + pinctrl-names =3D "default"; + + switch-lid { + label =3D "lid"; + gpios =3D <&tlmm 92 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + wakeup-source; + wakeup-event-action =3D ; + }; + }; + + pmic-glink { + compatible =3D "qcom,glymur-pmic-glink", + "qcom,pmic-glink"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* Left-side USB-C port */ + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_hs_in: endpoint { + remote-endpoint =3D <&usb_0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss_in: endpoint { + remote-endpoint =3D <&usb_0_qmpphy_out>; + }; + }; + }; + }; + + /* Right-side USB-C port */ + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_hs_in1: endpoint { + remote-endpoint =3D <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss_in1: endpoint { + remote-endpoint =3D <&usb_1_qmpphy_out>; + }; + }; + }; + }; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_misc_3p3: regulator-misc-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_MISC_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pmh0110_f_e0_gpios 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + + regulator-boot-on; + regulator-always-on; + }; + + vreg_nvme: regulator-nvme { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_NVME_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pmh0101_gpios 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&nvme_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_0P95"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 94 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wcn_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_wwan: regulator-wwan { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WWAN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 246 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wwan_reg_en>; + pinctrl-names =3D "default"; + }; + + vreg_edp_bl: regulator-edp-bl { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_BL"; + regulator-min-microvolt =3D <3600000>; + regulator-max-microvolt =3D <3600000>; + + gpio =3D <&tlmm 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_bl_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + regulator-always-on; + }; + + reserved-memory { + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x10000000>; + reusable; + linux,cma-default; + }; + }; + + + sound { + compatible =3D "qcom,glymur-sndcard"; + model =3D "Lenovo-ThinkPad-T14s-Gen-7"; + audio-routing =3D "SpkrLeft IN", "WSA WSA_SPK1 OUT", + "SpkrRight IN", "WSA WSA_SPK2 OUT", + "VA DMIC0", "vdd-micb", + "VA DMIC1", "vdd-micb"; + + wsa-dai-link { + link-name =3D "WSA Playback"; + + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai =3D <&left_spk>, <&right_spk>, + <&swr0 0>, <&lpass_wsamacro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + va-dai-link { + link-name =3D "VA Capture"; + + cpu { + sound-dai =3D <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + codec { + sound-dai =3D <&lpass_vamacro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + }; + + wcn7850-pmu { + compatible =3D "qcom,wcn7850-pmu"; + + vdd-supply =3D <&vreg_wcn_0p95>; + vddio-supply =3D <&vreg_l15b_e0_1p8>; + vddaon-supply =3D <&vreg_l15b_e0_1p8>; + vdddig-supply =3D <&vreg_l15b_e0_1p8>; + vddrfa1p2-supply =3D <&vreg_l15b_e0_1p8>; + vddrfa1p8-supply =3D <&vreg_l15b_e0_1p8>; + + wlan-enable-gpios =3D <&tlmm 117 GPIO_ACTIVE_HIGH>; + bt-enable-gpios =3D <&tlmm 116 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&wcn_wlan_bt_en>; + pinctrl-names =3D "default"; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pmh0101-rpmh-regulators"; + qcom,pmic-id =3D "B_E0"; + + vreg_bob1_e0: bob1 { + regulator-name =3D "vreg_bob1_e0"; + regulator-min-microvolt =3D <2200000>; + regulator-max-microvolt =3D <4224000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2_e0: bob2 { + regulator-name =3D "vreg_bob2_e0"; + regulator-min-microvolt =3D <2540000>; + regulator-max-microvolt =3D <3600000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_e0_1p8: ldo1 { + regulator-name =3D "vreg_l1b_e0_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_e0_2p9: ldo2 { + regulator-name =3D "vreg_l2b_e0_2p9"; + regulator-min-microvolt =3D <2904000>; + regulator-max-microvolt =3D <2904000>; + regulator-initial-mode =3D ; + }; + + vreg_l7b_e0_2p79: ldo7 { + regulator-name =3D "vreg_l7b_e0_2p79"; + regulator-min-microvolt =3D <2790000>; + regulator-max-microvolt =3D <2792000>; + regulator-initial-mode =3D ; + }; + + vreg_l8b_e0_3p3: ldo8 { + regulator-name =3D "vreg_l8b_e0_3p3"; + regulator-min-microvolt =3D <1504000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_e0_2p9: ldo9 { + regulator-name =3D "vreg_l9b_e0_2p9"; + regulator-min-microvolt =3D <2704000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l10b_e0_1p8: ldo10 { + regulator-name =3D "vreg_l10b_e0_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l11b_e0_1p2: ldo11 { + regulator-name =3D "vreg_l11b_e0_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_e0_1p2: ldo12 { + regulator-name =3D "vreg_l12b_e0_1p2"; + regulator-min-microvolt =3D <1144000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_e0_1p8: ldo15 { + regulator-name =3D "vreg_l15b_e0_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l17b_e0_2p4: ldo17 { + regulator-name =3D "vreg_l17b_e0_2p4"; + regulator-min-microvolt =3D <2400000>; + regulator-max-microvolt =3D <2700000>; + regulator-initial-mode =3D ; + }; + + vreg_l18b_e0_1p2: ldo18 { + regulator-name =3D "vreg_l18b_e0_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + }; + + regulators-1 { + compatible =3D "qcom,pmcx0102-rpmh-regulators"; + qcom,pmic-id =3D "C_E1"; + + vreg_l1c_e1_0p82: ldo1 { + regulator-name =3D "vreg_l1c_e1_0p82"; + regulator-min-microvolt =3D <832000>; + regulator-max-microvolt =3D <832000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_e1_1p14: ldo2 { + regulator-name =3D "vreg_l2c_e1_1p14"; + regulator-min-microvolt =3D <1144000>; + regulator-max-microvolt =3D <1144000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_e1_0p89: ldo3 { + regulator-name =3D "vreg_l3c_e1_0p89"; + regulator-min-microvolt =3D <890000>; + regulator-max-microvolt =3D <980000>; + regulator-initial-mode =3D ; + }; + + vreg_l4c_e1_0p72: ldo4 { + regulator-name =3D "vreg_l4c_e1_0p72"; + regulator-min-microvolt =3D <720000>; + regulator-max-microvolt =3D <720000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-2 { + compatible =3D "qcom,pmh0110-rpmh-regulators"; + qcom,pmic-id =3D "F_E0"; + + vreg_s7f_e0_1p32: smps7 { + regulator-name =3D "vreg_s7f_e0_1p32"; + regulator-min-microvolt =3D <1320000>; + regulator-max-microvolt =3D <1352000>; + regulator-initial-mode =3D ; + }; + + vreg_s8f_e0_0p95: smps8 { + regulator-name =3D "vreg_s8f_e0_0p95"; + regulator-min-microvolt =3D <952000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_s9f_e0_1p9: smps9 { + regulator-name =3D "vreg_s9f_e0_1p9"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l2f_e0_0p94: ldo2 { + regulator-name =3D "vreg_l2f_e0_0p94"; + regulator-min-microvolt =3D <936000>; + regulator-max-microvolt =3D <936000>; + regulator-initial-mode =3D ; + }; + + vreg_l3f_e0_0p91: ldo3 { + regulator-name =3D "vreg_l3f_e0_0p91"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l4f_e0_0p3: ldo4 { + regulator-name =3D "vreg_l4f_e0_0p3"; + regulator-min-microvolt =3D <1080000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-3 { + compatible =3D "qcom,pmh0110-rpmh-regulators"; + qcom,pmic-id =3D "F_E1"; + + vreg_s7f_e1_0p3: smps7 { + regulator-name =3D "vreg_s7f_e1_0p3"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l1f_e1_0p88: ldo1 { + regulator-name =3D "vreg_l1f_e1_0p88"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l2f_e1_0p9: ldo2 { + regulator-name =3D "vreg_l2f_e1_0p9"; + regulator-min-microvolt =3D <904000>; + regulator-max-microvolt =3D <904000>; + regulator-initial-mode =3D ; + }; + + vreg_l4f_e1_1p2: ldo4 { + regulator-name =3D "vreg_l4f_e1_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-4 { + compatible =3D "qcom,pmh0110-rpmh-regulators"; + qcom,pmic-id =3D "H_E0"; + + vreg_l1h_e0_0p94: ldo1 { + regulator-name =3D "vreg_l1h_e0_0p94"; + regulator-min-microvolt =3D <936000>; + regulator-max-microvolt =3D <936000>; + regulator-initial-mode =3D ; + }; + + vreg_l2h_e0_0p72: ldo2 { + regulator-name =3D "vreg_l2h_e0_0p72"; + regulator-min-microvolt =3D <832000>; + regulator-max-microvolt =3D <832000>; + regulator-initial-mode =3D ; + }; + + vreg_l3h_e0_0p32: ldo3 { + regulator-name =3D "vreg_l3h_e0_0p32"; + regulator-min-microvolt =3D <320000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l4h_e0_1p2: ldo4 { + regulator-name =3D "vreg_l4h_e0_1p2"; + regulator-min-microvolt =3D <1080000>; + regulator-max-microvolt =3D <1320000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&i2c0 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + touchpad@2c { + compatible =3D "hid-over-i2c"; + reg =3D <0x2c>; + + hid-descr-addr =3D <0x20>; + interrupts-extended =3D <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; + + vdd-supply =3D <&vreg_misc_3p3>; + vddl-supply =3D <&vreg_l15b_e0_1p8>; + + pinctrl-0 =3D <&tpad_default>; + pinctrl-names =3D "default"; + + wakeup-source; + }; + + keyboard@3a { + compatible =3D "hid-over-i2c"; + reg =3D <0x3a>; + + hid-descr-addr =3D <0x1>; + interrupts-extended =3D <&tlmm 67 IRQ_TYPE_LEVEL_LOW>; + + vdd-supply =3D <&vreg_misc_3p3>; + vddl-supply =3D <&vreg_l15b_e0_1p8>; + + pinctrl-0 =3D <&kybd_default>; + pinctrl-names =3D "default"; + + wakeup-source; + }; +}; + +&i2c5 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* eUSB2 redriver for USB Type-A ports on the MultiPort controller */ + ptn3222_0: redriver@43 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x43>; + + reset-gpios =3D <&tlmm 8 GPIO_ACTIVE_LOW>; + + vdd3v3-supply =3D <&vreg_l8b_e0_3p3>; + vdd1v8-supply =3D <&vreg_l15b_e0_1p8>; + + #phy-cells =3D <0>; + }; + + ptn3222_1: redriver@47 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x47>; + + reset-gpios =3D <&tlmm 9 GPIO_ACTIVE_LOW>; + + vdd3v3-supply =3D <&vreg_l8b_e0_3p3>; + vdd1v8-supply =3D <&vreg_l15b_e0_1p8>; + + #phy-cells =3D <0>; + }; +}; + +&lpass_vamacro { + pinctrl-0 =3D <&dmic01_default>; + pinctrl-names =3D "default"; + qcom,dmic-sample-rate =3D <4800000>; + vdd-micb-supply =3D <&vreg_l1b_e0_1p8>; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp1 { + status =3D "okay"; +}; + +&mdss_dp1_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +/* Internal eDP panel */ +&mdss_dp3 { + /delete-property/ #sound-dai-cells; + + pinctrl-0 =3D <&edp0_hpd_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; + + aux-bus { + panel { + compatible =3D "edp-panel"; + enable-gpios =3D <&tlmm 18 GPIO_ACTIVE_HIGH>; + power-supply =3D <&vreg_edp_3p3>; + + pinctrl-0 =3D <&edp_bl_en>; + pinctrl-names =3D "default"; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss_dp3_out>; + }; + }; + }; + }; +}; + +&mdss_dp3_out { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; + + remote-endpoint =3D <&edp_panel_in>; +}; + +&mdss_dp3_phy { + vdda-phy-supply =3D <&vreg_l2f_e1_0p9>; + vdda-pll-supply =3D <&vreg_l4f_e1_1p2>; + + status =3D "okay"; +}; + +/* PCIe4: on-board WLAN (WCN7850) */ +&pcie4 { + pinctrl-0 =3D <&pcie4_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l1c_e1_0p82>; + vdda-pll-supply =3D <&vreg_l4f_e1_1p2>; + + status =3D "okay"; +}; + +&pcie4_port0 { + reset-gpios =3D <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 148 GPIO_ACTIVE_LOW>; + + wifi@0 { + compatible =3D "pci17cb,1107"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + vddpcie0p9-supply =3D <&vreg_pmu_pcie_0p9>; + vddpcie1p8-supply =3D <&vreg_pmu_pcie_1p8>; + }; +}; + +/* PCIe5: primary M.2 2280 NVMe */ +&pcie5 { + vddpe-3v3-supply =3D <&vreg_nvme>; + + pinctrl-0 =3D <&pcie5_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie5_phy { + vdda-phy-supply =3D <&vreg_l2f_e0_0p94>; + vdda-pll-supply =3D <&vreg_l4h_e0_1p2>; + + status =3D "okay"; +}; + +&pcie5_port0 { + reset-gpios =3D <&tlmm 152 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 154 GPIO_ACTIVE_LOW>; +}; + +/* PCIe6: optional WWAN M.2 3042 */ +&pcie6 { + vddpe-3v3-supply =3D <&vreg_wwan>; + + pinctrl-0 =3D <&pcie6_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie6_phy { + vdda-phy-supply =3D <&vreg_l1c_e1_0p82>; + vdda-pll-supply =3D <&vreg_l4f_e1_1p2>; + + status =3D "okay"; +}; + +&pcie6_port0 { + reset-gpios =3D <&tlmm 149 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 151 GPIO_ACTIVE_LOW>; +}; + +&pmh0101_gpios { + nvme_reg_en: nvme-reg-en-state { + pins =3D "gpio14"; + function =3D "normal"; + bias-disable; + }; +}; + +&pmh0110_f_e0_gpios { + misc_3p3_reg_en: misc-3p3-reg-en-state { + pins =3D "gpio6"; + function =3D "normal"; + bias-disable; + input-disable; + output-enable; + drive-push-pull; + power-source =3D <1>; /* 1.8 V */ + qcom,drive-strength =3D ; + }; +}; + +&pmk8850_rtc { + qcom,no-alarm; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/glymur/LENOVO/22A8/qcadsp8480.mbn", + "qcom/glymur/LENOVO/22A8/adsp_dtbs.elf"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/glymur/LENOVO/22A8/qccdsp8480.mbn", + "qcom/glymur/LENOVO/22A8/cdsp_dtbs.elf"; + + status =3D "okay"; +}; + +&remoteproc_soccp { + status =3D "okay"; +}; + +&swr0 { + status =3D "okay"; + + /* WSA8845, Left */ + left_spk: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrLeft"; + vdd-1p8-supply =3D <&vreg_l15b_e0_1p8>; + vdd-io-supply =3D <&vreg_l18b_e0_1p2>; + qcom,port-mapping =3D <1 2 3 7 12 14>; + }; + + /* WSA8845, Right */ + right_spk: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrRight"; + vdd-1p8-supply =3D <&vreg_l15b_e0_1p8>; + vdd-io-supply =3D <&vreg_l18b_e0_1p2>; + qcom,port-mapping =3D <4 5 6 7 13 15>; + }; +}; + +&smb2370_j_e2_eusb2_repeater { + vdd18-supply =3D <&vreg_l15b_e0_1p8>; + vdd3-supply =3D <&vreg_l7b_e0_2p79>; +}; + +&smb2370_k_e2_eusb2_repeater { + vdd18-supply =3D <&vreg_l15b_e0_1p8>; + vdd3-supply =3D <&vreg_l7b_e0_2p79>; +}; + + +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l2f_e1_0p9>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l2f_e1_0p9>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l2f_e1_0p9>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l2h_e0_0p72>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l2h_e0_0p72>; + vdda-qrefrpt5-0p9-supply =3D <&vreg_l2h_e0_0p72>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l2f_e1_0p9>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l2f_e1_0p9>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l2f_e1_0p9>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l2h_e0_0p72>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l2h_e0_0p72>; + vdda-qrefrx5-0p9-supply =3D <&vreg_l3f_e0_0p91>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3f_e0_0p91>; + vdda-qreftx0-1p2-supply =3D <&vreg_l4h_e0_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l1f_e1_0p88>; + vdda-refgen3-0p9-supply =3D <&vreg_l2f_e0_0p94>; + vdda-refgen3-1p2-supply =3D <&vreg_l4h_e0_1p2>; + vdda-refgen4-0p9-supply =3D <&vreg_l1f_e1_0p88>; + vdda-refgen4-1p2-supply =3D <&vreg_l4f_e1_1p2>; +}; + +&tlmm { + gpio-reserved-ranges =3D <4 4>, /* EC TZ Secure I3C */ + <10 2>, /* OOB UART */ + <27 1>, /* TZ trigger */ + <44 4>, /* TPM */ + <139 1>; /* TZ trigger */ + + edp_bl_en: edp-bl-en-state { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + edp_bl_reg_en: edp-bl-reg-en-state { + pins =3D "gpio19"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + edp_reg_en: edp-reg-en-state { + pins =3D "gpio70"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + edp0_hpd_default: edp0-hpd-default-state { + pins =3D "gpio119"; + function =3D "edp0_hot"; + bias-disable; + }; + + hall_int_n_default: hall-int-n-state { + pins =3D "gpio92"; + function =3D "gpio"; + bias-disable; + }; + + kybd_default: kybd-default-state { + pins =3D "gpio67"; + function =3D "gpio"; + bias-disable; + }; + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio147"; + function =3D "pcie4_clk_req_n"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio146"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie5_default: pcie5-default-state { + clkreq-n-pins { + pins =3D "gpio153"; + function =3D "pcie5_clk_req_n"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio152"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio154"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie6_default: pcie6-default-state { + clkreq-n-pins { + pins =3D "gpio150"; + function =3D "pcie6_clk_req_n"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio149"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio151"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + tpad_default: tpad-default-state { + pins =3D "gpio3"; + function =3D "gpio"; + bias-disable; + }; + + wcd_default: wcd-reset-n-active-state { + pins =3D "gpio191"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + output-low; + }; + + wcn_wlan_bt_en: wcn-wlan-bt-en-state { + pins =3D "gpio116", "gpio117"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wcn_sw_en: wcn-sw-en-state { + pins =3D "gpio94"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wwan_reg_en: wwan-reg-en-state { + pins =3D "gpio246"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; +}; + +&uart14 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn7850-bt"; + max-speed =3D <3200000>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + }; +}; + +&usb_0 { + status =3D "okay"; +}; + +&usb_0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_hs_in>; +}; + +&usb_0_hsphy { + vdd-supply =3D <&vreg_l3f_e0_0p91>; + vdda12-supply =3D <&vreg_l4h_e0_1p2>; + + phys =3D <&smb2370_j_e2_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_0_qmpphy { + vdda-phy-supply =3D <&vreg_l3f_e0_0p91>; + vdda-pll-supply =3D <&vreg_l4h_e0_1p2>; + refgen-supply =3D <&vreg_l2f_e0_0p94>; + + status =3D "okay"; +}; + +&usb_0_qmpphy_out { + remote-endpoint =3D <&pmic_glink_ss_in>; +}; + +&usb_1 { + status =3D "okay"; +}; + +&usb_1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_hs_in1>; +}; + +&usb_1_hsphy { + vdd-supply =3D <&vreg_l3f_e0_0p91>; + vdda12-supply =3D <&vreg_l4h_e0_1p2>; + + phys =3D <&smb2370_k_e2_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply =3D <&vreg_l1h_e0_0p94>; + vdda-pll-supply =3D <&vreg_l4h_e0_1p2>; + refgen-supply =3D <&vreg_l2f_e0_0p94>; + + status =3D "okay"; +}; + +&usb_1_qmpphy_out { + remote-endpoint =3D <&pmic_glink_ss_in1>; +}; + +/* Two internal USB Type-A ports through the MultiPort host controller */ +&usb_mp { + status =3D "okay"; +}; + +&usb_mp_hsphy0 { + vdd-supply =3D <&vreg_l2h_e0_0p72>; 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charset="utf-8" Allow the use of QSEECOM on the Mahua-based Lenovo ThinkPad T14s Gen 7, matching the pattern established for the Yoga Slim 7x Gen 11. Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Srinivas Kandagatla --- drivers/firmware/qcom/qcom_scm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index 882d1865f3a4..aecb22bb9662 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -2233,6 +2233,7 @@ static const struct of_device_id qcom_scm_qseecom_all= owlist[] __maybe_unused =3D { { .compatible =3D "lenovo,ideacentre-mini-01q8x10" }, { .compatible =3D "lenovo,thinkbook-16" }, { .compatible =3D "lenovo,thinkpad-t14s" }, + { .compatible =3D "lenovo,thinkpad-t14s-gen7" }, { .compatible =3D "lenovo,thinkpad-x13s", }, { .compatible =3D "lenovo,yoga-slim7x" }, { .compatible =3D "medion,sprchrgd14s1" }, --=20 2.53.0