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charset="utf-8" Correct indentation in the examples to consistent 2- or 4-spaces indentation to fix dt-check-style warnings ("example 0 [indent-consistent] indent mismatch ..."). Preferred is 4-spaces, but re-indenting entire example just for that is too much churn. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Gary Yang Reviewed-by: Michal Simek # ZynqMP --- .../pinctrl/awinic,aw9523-pinctrl.yaml | 50 +++++++++---------- .../bindings/pinctrl/cix,sky1-pinctrl.yaml | 2 +- .../bindings/pinctrl/fsl,imx7d-pinctrl.yaml | 8 +-- .../bindings/pinctrl/intel,lgm-io.yaml | 14 +++--- .../pinctrl/mediatek,mt8183-pinctrl.yaml | 4 +- .../pinctrl/mediatek,mt8195-pinctrl.yaml | 2 +- .../bindings/pinctrl/qcom,hawi-tlmm.yaml | 4 +- .../bindings/pinctrl/qcom,kaanapali-tlmm.yaml | 4 +- .../bindings/pinctrl/qcom,maili-tlmm.yaml | 4 +- .../bindings/pinctrl/semtech,sx1501q.yaml | 4 +- .../bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 46 ++++++++--------- 11 files changed, 71 insertions(+), 71 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/awinic,aw9523-pinctr= l.yaml b/Documentation/devicetree/bindings/pinctrl/awinic,aw9523-pinctrl.ya= ml index 98c310a3c63c..1c09c0fd4930 100644 --- a/Documentation/devicetree/bindings/pinctrl/awinic,aw9523-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/awinic,aw9523-pinctrl.yaml @@ -108,32 +108,32 @@ examples: #size-cells =3D <0>; =20 aw9523: gpio-expander@58 { - compatible =3D "awinic,aw9523-pinctrl"; - reg =3D <0x58>; - interrupt-parent =3D <&tlmm>; - interrupts =3D <50 IRQ_TYPE_EDGE_FALLING>; - gpio-controller; - #gpio-cells =3D <2>; - gpio-ranges =3D <&tlmm 0 0 16>; - interrupt-controller; - #interrupt-cells =3D <2>; - reset-gpios =3D <&tlmm 51 GPIO_ACTIVE_HIGH>; + compatible =3D "awinic,aw9523-pinctrl"; + reg =3D <0x58>; + interrupt-parent =3D <&tlmm>; + interrupts =3D <50 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&tlmm 0 0 16>; + interrupt-controller; + #interrupt-cells =3D <2>; + reset-gpios =3D <&tlmm 51 GPIO_ACTIVE_HIGH>; =20 - keyboard-matrix-col-pins { - pins =3D "gpio8", "gpio9", "gpio10", "gpio11", - "gpio12", "gpio13", "gpio14", "gpio15"; - function =3D "gpio"; - input-disable; - output-low; - }; + keyboard-matrix-col-pins { + pins =3D "gpio8", "gpio9", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", "gpio15"; + function =3D "gpio"; + input-disable; + output-low; + }; =20 - keyboard-matrix-row-pins { - pins =3D "gpio0", "gpio1", "gpio2", "gpio3", - "gpio4", "gpio5", "gpio6", "gpio7"; - function =3D "gpio"; - bias-pull-up; - drive-open-drain; - input-enable; - }; + keyboard-matrix-row-pins { + pins =3D "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7"; + function =3D "gpio"; + bias-pull-up; + drive-open-drain; + input-enable; + }; }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/cix,sky1-pinctrl.yam= l b/Documentation/devicetree/bindings/pinctrl/cix,sky1-pinctrl.yaml index 8ed53496c386..4ab1f00775cc 100644 --- a/Documentation/devicetree/bindings/pinctrl/cix,sky1-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/cix,sky1-pinctrl.yaml @@ -86,6 +86,6 @@ examples: pinmux =3D ; bias-pull-up; drive-strength =3D <8>; - }; + }; }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.ya= ml b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml index 948160cfbc5f..7275215918bb 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml @@ -106,8 +106,8 @@ examples: fsl,input-sel =3D <&iomuxc>; =20 pinctrl_gpio_lpsr: gpio1-grp { - fsl,pins =3D - <0x0008 0x0038 0x0000 0x0 0x0 0x59>, - <0x000C 0x003C 0x0000 0x0 0x0 0x59>; - }; + fsl,pins =3D + <0x0008 0x0038 0x0000 0x0 0x0 0x59>, + <0x000C 0x003C 0x0000 0x0 0x0 0x59>; + }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml b/= Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml index 1144ca2896e3..96c405711f65 100644 --- a/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml +++ b/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml @@ -64,13 +64,13 @@ examples: reg =3D <0xe2880000 0x100000>; =20 uart0-pins { - pins =3D <64>, /* UART_RX0 */ - <65>; /* UART_TX0 */ - function =3D "CONSOLE_UART0"; - pinmux =3D <1>, - <1>; - groups =3D "CONSOLE_UART0"; - }; + pins =3D <64>, /* UART_RX0 */ + <65>; /* UART_TX0 */ + function =3D "CONSOLE_UART0"; + pinmux =3D <1>, + <1>; + groups =3D "CONSOLE_UART0"; + }; }; =20 ... diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinc= trl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctr= l.yaml index 3db2438fadc7..4bcee7741fcd 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml @@ -221,8 +221,8 @@ examples: =20 i2c0_pins_a: i2c0-pins { pins1 { - pinmux =3D , - ; + pinmux =3D , + ; mediatek,pull-up-adv =3D <3>; drive-strength-microamp =3D <1000>; }; diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinc= trl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctr= l.yaml index 33cb71775db9..0bcafa78acb2 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml @@ -234,7 +234,7 @@ examples: - | #include #include - # + pio: pinctrl@10005000 { compatible =3D "mediatek,mt8195-pinctrl"; reg =3D <0x10005000 0x1000>, diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,hawi-tlmm.yaml = b/Documentation/devicetree/bindings/pinctrl/qcom,hawi-tlmm.yaml index 3b3961789860..2b1354e212e5 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,hawi-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,hawi-tlmm.yaml @@ -113,8 +113,8 @@ examples: #interrupt-cells =3D <2>; =20 qup-uart7-state { - pins =3D "gpio62", "gpio63"; - function =3D "qup1_se7"; + pins =3D "gpio62", "gpio63"; + function =3D "qup1_se7"; }; }; ... diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,kaanapali-tlmm.= yaml b/Documentation/devicetree/bindings/pinctrl/qcom,kaanapali-tlmm.yaml index 53534a07a1f0..ea7d4768483d 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,kaanapali-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,kaanapali-tlmm.yaml @@ -120,8 +120,8 @@ examples: #interrupt-cells =3D <2>; =20 qup-uart7-state { - pins =3D "gpio62", "gpio63"; - function =3D "qup1_se7"; + pins =3D "gpio62", "gpio63"; + function =3D "qup1_se7"; }; }; ... diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,maili-tlmm.yaml= b/Documentation/devicetree/bindings/pinctrl/qcom,maili-tlmm.yaml index 64fe90b2391b..a0b56adb3388 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,maili-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,maili-tlmm.yaml @@ -113,8 +113,8 @@ examples: #interrupt-cells =3D <2>; =20 qup-uart7-state { - pins =3D "gpio62", "gpio63"; - function =3D "qup1_se7"; + pins =3D "gpio62", "gpio63"; + function =3D "qup1_se7"; }; }; ... diff --git a/Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml= b/Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml index 39d7dad3313b..f7a7551d7f50 100644 --- a/Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml +++ b/Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml @@ -244,8 +244,8 @@ examples: interrupt-controller; =20 gpio1-cfg { - pins =3D "gpio1"; - bias-pull-up; + pins =3D "gpio1"; + bias-pull-up; }; }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.= yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml index ce66fd15ff9c..300d38f87f2d 100644 --- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml @@ -317,37 +317,37 @@ examples: #include zynqmp_firmware: zynqmp-firmware { pinctrl0: pinctrl { - compatible =3D "xlnx,zynqmp-pinctrl"; + compatible =3D "xlnx,zynqmp-pinctrl"; =20 - pinctrl_uart1_default: uart1-default { - mux { - groups =3D "uart0_4_grp", "uart0_5_grp"; - function =3D "uart0"; - }; + pinctrl_uart1_default: uart1-default { + mux { + groups =3D "uart0_4_grp", "uart0_5_grp"; + function =3D "uart0"; + }; =20 - conf { - groups =3D "uart0_4_grp"; - slew-rate =3D ; - power-source =3D ; - }; + conf { + groups =3D "uart0_4_grp"; + slew-rate =3D ; + power-source =3D ; + }; =20 - conf-rx { - pins =3D "MIO18"; - bias-pull-up; - }; + conf-rx { + pins =3D "MIO18"; + bias-pull-up; + }; =20 - conf-tx { - pins =3D "MIO19"; - bias-disable; - input-schmitt-disable; - }; - }; + conf-tx { + pins =3D "MIO19"; + bias-disable; + input-schmitt-disable; + }; + }; }; }; =20 uart1 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_uart1_default>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart1_default>; }; =20 ... --=20 2.53.0