From nobody Fri Sep 25 12:04:11 2026 Received: from sm24.hosting.reg.ru (sm24.hosting.reg.ru [31.31.198.150]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5F7030E0CC; Sun, 13 Sep 2026 06:10:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=31.31.198.150 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789279843; cv=none; b=XRSDyM7yOv+j+1JaOz9z+0G16xBFLg/WT5dCGSpdPjUU9bamtnq16Z3HMtQZ2qXAFY5UYPSc5lzgFB6sMP+A+tuiNQxTLUE+pQKTlwr76NIIHFc+2aHDu2h4ThWjZFzjsiTklOrL3h0B+4Q10vT5bD2A9lmm4ANyO40O0SBoxII= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789279843; c=relaxed/simple; bh=/wNkRgAtqJX/KY+25EYdyLTmARdOigg/VkH9BOr92ls=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BiiwYb09f0iYY8O3QMufAFC4C6PsnBS7Bb0Wfw6t/qrZZPltrrD+RGqp8XP2/boK1iWUMRLSgBA8h51w4PzHUmjiBubXUiFE7tIiC/HcHqkIe+vv0dh3x9qpsVSamlHLIjIw1OC+AiU5duYBDYtIcCvTUFfMQM1xNXz0ONKn2ok= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru; spf=none smtp.mailfrom=minlexx.ru; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b=usmHR4Gq; arc=none smtp.client-ip=31.31.198.150 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b="usmHR4Gq" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=minlexx.ru; s=dkim; h=Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Subject:Date:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=IsAidF4NXA+x5ypB+3I1fDPQq92j+t4wyvEEv1LxLZM=; b=usmHR4GqZadbysCR5ocAUaLh3H v5wO4HIEoaKQag72j2lP4/3fjPD3c1gi6GwNZpatlhPf7D8UfEfMdUT49oTEAFP4rwSOzo+bpnCjA VS2j0Z8jzwVESyL1ybJGvJ1fpZbVwzNyVavgDZiJ4T+s4HpW//YH78o1hL9G/Jh7wixg=; Received: by sm24.hosting.reg.ru with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1x5cu4-0000000Dxg1-2J9j; Sun, 13 Sep 2026 08:37:26 +0300 From: Alexey Minnekhanov Date: Sun, 13 Sep 2026 08:36:33 +0300 Subject: [PATCH 1/9] dt-bindings: vendor-prefixes: Add Shenzhen TXD Technology Co., Ltd. Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260913-nt36672a-panels-v1-1-ce097402c6ea@minlexx.ru> References: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> In-Reply-To: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: David Heidelberg , Joel Selvaraj , Chintan Patel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, Alexey Minnekhanov X-Mailer: b4 0.16.0 Add prefix for Shenzhen TXD Technology Co., Ltd., manufacturer of medium sized LCD and camera modules for mobile phones, tablets and automotive. [1] https://en.txdkj.com/ Signed-off-by: Alexey Minnekhanov --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index ba20029693734..86c502d8d1d5f 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1771,6 +1771,8 @@ patternProperties: description: Turing Machines, Inc. "^tuxedo,.*": description: TUXEDO Computers GmbH + "^txd,.*": + description: Shenzhen TXD Technology Co., Ltd. "^tyan,.*": description: Tyan Computer Corporation "^tyhx,.*": --=20 2.55.0 From nobody Fri Sep 25 12:04:11 2026 Received: from sm24.hosting.reg.ru (sm24.hosting.reg.ru [31.31.198.150]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C44353B0AE4; Sun, 13 Sep 2026 06:26:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=31.31.198.150 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789280778; cv=none; b=LBtKOrZJVvkuXGIU/LJ28mhhlXvTZYKQpUlswGDNzCrCBZrYeMu6DtCE/IA1iJDKuR36YqRQC6MV9dgKzLZFRhw/HOYGH99EYG/ZyBSYnFnrFdzdseCkYW0nc0Wy17OnMXTU99zYfK5d9/kyKFfdnsU490wIALiEEMGjM0R+JuE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789280778; c=relaxed/simple; bh=Ww/NSbPoNOKjQZHvNtfmmQY89Asgoa3abG2F8ox3NTA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZXaOZL+JlxmME8kOJUIMYt6FKavKif108cq0EDMrKRvyMi+zJQqLw5t7PZMAGu1aHASdNPz088E0AXZet5zJoXIKl//1OTBXQ3kiMRo1HDYNy/Z1ag7x6CMtroyvF/ZsYQJuwxo++ErfbKL2fsVDpBuhhn5Jw6MX6zvkLcL9xPs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru; spf=none smtp.mailfrom=minlexx.ru; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b=mvpMcS6U; arc=none smtp.client-ip=31.31.198.150 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b="mvpMcS6U" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=minlexx.ru; s=dkim; h=Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Subject:Date:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=XjeGvVaa3X9B0ScNIks/LOjOjPPjZS+X5qEnEXVkQVA=; b=mvpMcS6UrdAQHmfNBkzIPJ+6Fc i0/Kq3SpohZD0iAMFxTFU6gQiHxstsqBY+n7s8HRRW/PGor7V/xMMS9YnrOKaKDH0FhR4Qcj9k82r 5IE1NVCbeWUnpie89oUfBm9IAlx+o2+wceY6eDd/nbB+0Lb+1fze+uncKgg+MkxgyDQQ=; Received: by sm24.hosting.reg.ru with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1x5cu6-0000000Dxg1-1URL; Sun, 13 Sep 2026 08:37:30 +0300 From: Alexey Minnekhanov Date: Sun, 13 Sep 2026 08:36:34 +0300 Subject: [PATCH 2/9] dt-bindings: vendor-prefixes: Add Shenzhen Zhuohong Electronic Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260913-nt36672a-panels-v1-2-ce097402c6ea@minlexx.ru> References: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> In-Reply-To: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: David Heidelberg , Joel Selvaraj , Chintan Patel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, Alexey Minnekhanov X-Mailer: b4 0.16.0 Shenzhen Zhuohong Electronic Technology Co., Ltd. is a manufacturer of LCD/IPS displays based in Shenzhen, Mainland China. Signed-off-by: Alexey Minnekhanov --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 86c502d8d1d5f..5bfad23fd6255 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1507,6 +1507,8 @@ patternProperties: description: SGX Sensortech "^sharp,.*": description: Sharp Corporation + "^shenchao,.*": + description: Shenzhen Zhuohong Electronic Technology Co., Ltd. "^shift,.*": description: SHIFT GmbH "^shimafuji,.*": --=20 2.55.0 From nobody Fri Sep 25 12:04:11 2026 Received: from sm24.hosting.reg.ru (sm24.hosting.reg.ru [31.31.198.150]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AA4A1C5799; Sun, 13 Sep 2026 05:37:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=31.31.198.150 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789277862; cv=none; b=BHbXZXLjmVu5pezPX1bYxp16EiiCDYBXiWui1W2zAPOFkdZmSTEV8Y09yZvf8AtppYKqLMQd+1c9qdyYrBKaoFVcVwqXp/+8oQp5NHYkHoWJs03gsK1dMuKfGuuMzxaplYn3maA1R96YtBKeF5oC0Ylvcf3FykfaEd7T0L6xkuo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789277862; c=relaxed/simple; bh=ZlkByB6dsSCg1vGFiI2LFeu/MRssORg05ev9IV3F2aQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KZQJn5kp8QlIXc8qEUIg/gn6A9GeWkTdMBAKSpe7wfiOc37HgUWf+x2m+hoALAakUEQ5k7V16yEm9UBahoyy3KtM0+e8F0GjSMfOW3EoLWaNJ+VuRURo3lshBFr+ZNC6WJpj8t/aTy1t5u7hzInSj4VpgqN+c85WveIKcXGz0Dg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru; spf=none smtp.mailfrom=minlexx.ru; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b=pGF7jf1Q; arc=none smtp.client-ip=31.31.198.150 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b="pGF7jf1Q" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=minlexx.ru; s=dkim; h=Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Subject:Date:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=7dYWsdxGnuQpPz+ltIlRzQtSY4Ol6wjxycrTs1kf/Cw=; b=pGF7jf1QxG0ifmyCa3Tuwa7K6X cJurF3rSrZzxoVgpFY5nMBHtM8EV2FzFwn2bxum+ia/98vYCdPcV04jQixbeZvhdCkTETvLVIagIJ LnDOqs5FHxFK8XgSx8tILpn7AhVMpgN5mXhCNuFZ8IElT7lVKhMwsCGxHHRPW6o7CNcI=; Received: by sm24.hosting.reg.ru with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1x5cuA-0000000Dxg1-3hux; Sun, 13 Sep 2026 08:37:35 +0300 From: Alexey Minnekhanov Date: Sun, 13 Sep 2026 08:36:35 +0300 Subject: [PATCH 3/9] dt-bindings: display: novatek,nt36672a: Add 5 new panels Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260913-nt36672a-panels-v1-3-ce097402c6ea@minlexx.ru> References: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> In-Reply-To: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: David Heidelberg , Joel Selvaraj , Chintan Patel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, Alexey Minnekhanov X-Mailer: b4 0.16.0 Document 5 new panels used in 4 different smartphones produced by Xiaomi and ASUS: * Shenchao panel used in Xiaomi Redmi Note 7 (xiaomi-lavender), the exact model string is unknown * Tianma TL063FVMCA01-00 for Xiaomi Redmi Note 7 (xiaomi-lavender) * Tianma TL063FVMC43-02 for Xiaomi Redmi Note 6 Pro (xiaomi-tulip) * Tianma TL060FVXS16-00 for Xiaomi Mi A2 smartphone (xiaomi-jasmine) * TXD TXDI600YANPA-43V3 Asus Zenfone Max Pro M1 (asus-x00td) Signed-off-by: Alexey Minnekhanov --- .../devicetree/bindings/display/panel/novatek,nt36672a.yaml | 5 += ++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt3667= 2a.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.= yaml index 5d16d85117254..3671fd788a818 100644 --- a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml @@ -22,7 +22,12 @@ properties: compatible: items: - enum: + - shenchao,fhdplus-video - tianma,fhd-video + - tianma,tl060fvxs16-00 + - tianma,tl063fvmca01-00 + - tianma,tl063fvmc43-02 + - txd,txdi600yanpa-43v3 - const: novatek,nt36672a description: This indicates the panel manufacturer of the panel that is in turn using the NT36672A panel driver. This compatible string --=20 2.55.0 From nobody Fri Sep 25 12:04:11 2026 Received: from sm24.hosting.reg.ru (sm24.hosting.reg.ru [31.31.198.150]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E022123ABBF; Sun, 13 Sep 2026 05:37:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=31.31.198.150 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789277861; cv=none; b=TuUkzJhzGa2L07B0iCAToDgHcEdvNzDuSTjfbGk/pmzHqEU2jahaN8rvYfctxkR0xEo/3iBEGYlcBSOu4R/Iv8n0P5H/oyWJmaF6hg4po8691a71MnOz+0IPcFxqLwelVnmuYYP/+uiyxd8z6IyyzHPBzoYtuWeyZmmfld7iRF8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789277861; c=relaxed/simple; bh=U1lVp8kaQloX/LWpP4jy3QS2BFcDs+VgKv84PLhO+vU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pb0pASo06HkutYaECPABv6i8iWPjd78eutDgsyKnp1x4ETHcYAKNe40mA4TFqIcIy68FY0wGthkRIN6/79C0caEPMiRFfHzpnbK3wGKMMAAdtOd9YTweHVH/e49SRqXa4dZuq6dsBHYRNGInf3NCwPsZD7Od4TlvAp5jwps3MqU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru; spf=none smtp.mailfrom=minlexx.ru; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b=iCmu0pjM; arc=none smtp.client-ip=31.31.198.150 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b="iCmu0pjM" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=minlexx.ru; s=dkim; h=Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Subject:Date:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=b3p0QEWuHBXAXgvSKtH/feowvJNCBzLhkqHHOOl3Ieg=; b=iCmu0pjMcg9maWbQHefYgjMwii 9Wd/abzMg/hIxdJ/zvaTu43Pxk12sho1rXLdOsobiWyCwP1izfUMMnl/e0mWTDtP4jXdu53RyXN+T FZbNd06KTdnySvFNXA2NEj4eL+bjfD3A+u0JFTG9BV5T9QSlxC4OvTgBnvDPbhBuABRo=; Received: by sm24.hosting.reg.ru with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1x5cuF-0000000Dxg1-1rP9; Sun, 13 Sep 2026 08:37:36 +0300 From: Alexey Minnekhanov Date: Sun, 13 Sep 2026 08:36:36 +0300 Subject: [PATCH 4/9] drm/panel: novatek-nt36672a: Set driver name to novatek for consistency Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260913-nt36672a-panels-v1-4-ce097402c6ea@minlexx.ru> References: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> In-Reply-To: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: David Heidelberg , Joel Selvaraj , Chintan Patel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, Alexey Minnekhanov X-Mailer: b4 0.16.0 Since this driver should represent not only devices manufactured by Tianma Micro-electronics, but also from other companies, it makes more sense to name it according to what driver file name already is: novatek. This does not change neither module file name nor Kconfig symbol, only driver identification in dmesg. This makes it possible to e.g. grep dmesg for "novatek" and get messages from both nt36672a-based panel and Novatek touchscreen. Signed-off-by: Alexey Minnekhanov Reviewed-by: David Heidelberg --- drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/d= rm/panel/panel-novatek-nt36672a.c index 464d9ce47d87d..73bec4f47ec60 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c @@ -479,16 +479,16 @@ static void nt36672a_panel_remove(struct mipi_dsi_dev= ice *dsi) drm_panel_remove(&pinfo->base); } =20 -static const struct of_device_id tianma_fhd_video_of_match[] =3D { +static const struct of_device_id panel_nt36672a_match[] =3D { { .compatible =3D "tianma,fhd-video", .data =3D &tianma_fhd_video_panel_d= esc }, { }, }; -MODULE_DEVICE_TABLE(of, tianma_fhd_video_of_match); +MODULE_DEVICE_TABLE(of, panel_nt36672a_match); =20 static struct mipi_dsi_driver nt36672a_panel_driver =3D { .driver =3D { - .name =3D "panel-tianma-nt36672a", - .of_match_table =3D tianma_fhd_video_of_match, + .name =3D "panel-novatek-nt36672a", + .of_match_table =3D panel_nt36672a_match, }, .probe =3D nt36672a_panel_probe, .remove =3D nt36672a_panel_remove, --=20 2.55.0 From nobody Fri Sep 25 12:04:11 2026 Received: from sm24.hosting.reg.ru (sm24.hosting.reg.ru [31.31.198.150]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA07437E5F1; Sun, 13 Sep 2026 05:37:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=31.31.198.150 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789277863; cv=none; b=ZAfKshQI2r0a/y68jsSiZVjRWPiIpD6/KjGmA7V10LSjdbP4xvOZT/dEkwPk2+44Ps0IgS9Z5MfPsau9tzXafM/mR0lULOpgA3facBzx16iGj9cA3d3znM5318XKe9KCFwSrPHoGnwOFUGrjladUbJoMSE04B2H5GCNMnsQB9GQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789277863; c=relaxed/simple; bh=nN+YAuHRdrK2d4q8sNQtefTv1qOdyQd8xZ2iMEmb/gs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qT5Kea+NaIqlnKJi/czXxoma5V179d/h2FkeKI092K9/5jkEiogHB4M+HrPtb7yv7pnMfsh83yB/TC3a3W3Q2K6GLLHUppNvQ/prJSIiSWtVp8zBaJvmza7PtghDEDYb/71t8Gdoz1EXIJGU7SOSuFv5NEl22mQnH2y4h/J+oGk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru; spf=none smtp.mailfrom=minlexx.ru; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b=tdnCRLip; arc=none smtp.client-ip=31.31.198.150 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=minlexx.ru Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=minlexx.ru header.i=@minlexx.ru header.b="tdnCRLip" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=minlexx.ru; s=dkim; h=Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Subject:Date:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=+QttEVObrYR8GXWfoNvq0AB6iYbYDNJX/naKVGjPx2g=; b=tdnCRLipv4sh0Tlys5k4hJlNN4 aYhCl7qJzw5T129DWXB+pI1MkEj0uUYpHa80svGzdlM+J5R0+ohX8LUBnO4MaDrH1ZAJoBkIRoCKb 8iBlNyUMPvOJj1PqfskDufOokKGArX6sz1ROq3kKRQlRNaV+Hs6qrIwll5ZsLYjk9M3s=; Received: by sm24.hosting.reg.ru with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1x5cuH-0000000Dxg1-0HNq; Sun, 13 Sep 2026 08:37:38 +0300 From: Alexey Minnekhanov Date: Sun, 13 Sep 2026 08:36:37 +0300 Subject: [PATCH 5/9] drm/panel: novatek-nt36672a: Combine two init callbacks into one Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260913-nt36672a-panels-v1-5-ce097402c6ea@minlexx.ru> References: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> In-Reply-To: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: David Heidelberg , Joel Selvaraj , Chintan Patel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, Alexey Minnekhanov X-Mailer: b4 0.16.0 The split between .send_init_cmds_1 and _cmds_2 is completely artificial and unnecessary. Two command sets are split in between by the sequence: - exit_sleep_mode - delay - set_display_on But not every panel driver follows this "split" in their init sequence. Some may have different delay timer, or put exit_sleep_mode/display_on commands into other places in the sequence. In order to make this driver more extensible, combine two init functions into one by puting exit_sleep_mode/delay/display_on in the middle, followed by commands from cmds_2. No functional change - full init sequence with all the delays for the tianma_fhd_video panel is kept the same in the end. Signed-off-by: Alexey Minnekhanov --- drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 37 +++++++++-------------= ---- 1 file changed, 13 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/d= rm/panel/panel-novatek-nt36672a.c index 73bec4f47ec60..237a6a8699aef 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c @@ -51,8 +51,7 @@ struct nt36672a_panel_desc { enum mipi_dsi_pixel_format format; unsigned int lanes; =20 - void (*send_init_cmds_1)(struct mipi_dsi_multi_context *dsi_ctx); - void (*send_init_cmds_2)(struct mipi_dsi_multi_context *dsi_ctx); + void (*send_init_cmds)(struct mipi_dsi_multi_context *dsi_ctx); void (*send_deinit_cmds)(struct mipi_dsi_multi_context *dsi_ctx); }; =20 @@ -140,22 +139,9 @@ static int nt36672a_panel_prepare(struct drm_panel *pa= nel) =20 dsi_ctx.accum_err =3D nt36672a_panel_power_on(pinfo); =20 - /* send first part of init cmds */ - if (pinfo->desc->send_init_cmds_1) - pinfo->desc->send_init_cmds_1(&dsi_ctx); - - mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); - - /* 0x46 =3D 70 ms delay */ - mipi_dsi_msleep(&dsi_ctx, 70); - - mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); - - /* Send rest of the init cmds */ - if (pinfo->desc->send_init_cmds_2) - pinfo->desc->send_init_cmds_2(&dsi_ctx); - - mipi_dsi_msleep(&dsi_ctx, 120); + /* send init cmds */ + if (pinfo->desc->send_init_cmds) + pinfo->desc->send_init_cmds(&dsi_ctx); =20 if (dsi_ctx.accum_err < 0) gpiod_set_value(pinfo->reset_gpio, 0); @@ -192,7 +178,7 @@ static const struct drm_panel_funcs panel_funcs =3D { .get_modes =3D nt36672a_panel_get_modes, }; =20 -static void tianma_fhd_video_send_init_cmds_1(struct mipi_dsi_multi_contex= t *dsi_ctx) +static void tianma_fhd_video_send_init_cmds(struct mipi_dsi_multi_context = *dsi_ctx) { u8 reg; =20 @@ -352,15 +338,19 @@ static void tianma_fhd_video_send_init_cmds_1(struct = mipi_dsi_multi_context *dsi mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x51, 0xff); mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x53, 0x24); mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x55, 0x00); -} =20 -static void tianma_fhd_video_send_init_cmds_2(struct mipi_dsi_multi_contex= t *dsi_ctx) -{ + mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx); + /* 0x46 =3D 70 ms delay */ + mipi_dsi_msleep(dsi_ctx, 70); + mipi_dsi_dcs_set_display_on_multi(dsi_ctx); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24); mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc3, 0x01); mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xc4, 0x54); mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10); + + mipi_dsi_msleep(dsi_ctx, 120); } =20 static void tianma_fhd_video_send_deinit_cmds(struct mipi_dsi_multi_contex= t *dsi_ctx) @@ -399,8 +389,7 @@ static const struct nt36672a_panel_desc tianma_fhd_vide= o_panel_desc =3D { | MIPI_DSI_MODE_VIDEO_BURST, .format =3D MIPI_DSI_FMT_RGB888, .lanes =3D 4, - .send_init_cmds_1 =3D tianma_fhd_video_send_init_cmds_1, - .send_init_cmds_2 =3D tianma_fhd_video_send_init_cmds_2, + .send_init_cmds =3D tianma_fhd_video_send_init_cmds, .send_deinit_cmds =3D tianma_fhd_video_send_deinit_cmds, }; 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b=CiM77pIWTI5vLHnUtKfBvBYLNN Zmg5qOXTorPU4gAI9NuXHZcAnr+FSK7ylt2ngH0HPnKGu0bnRBdrlDf9fWscCNko9dyIV3w6t5iYI OWyzi1l9ypUc4jlf8Nfnk/tQIB8a5AUr+PU3ziDeWOKi0IGqm6xibUyisfvAaYaNFoKs=; Received: by sm24.hosting.reg.ru with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1x5cuI-0000000Dxg1-3DgK; Sun, 13 Sep 2026 08:37:40 +0300 From: Alexey Minnekhanov Date: Sun, 13 Sep 2026 08:36:38 +0300 Subject: [PATCH 6/9] drm/panel: novatek-nt36672a: Add 3 panels used in Xiaomi phones Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260913-nt36672a-panels-v1-6-ce097402c6ea@minlexx.ru> References: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> In-Reply-To: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: David Heidelberg , Joel Selvaraj , Chintan Patel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, Alexey Minnekhanov , Richard Acayan X-Mailer: b4 0.16.0 Add support for 3 panels used in 2 Xiaomi smartphones, all based on Qualcomm SDM636/660 SoC: * Shenchao panel used in Xiaomi Redmi Note 7 (xiaomi-lavender), the exact model string is unknown * Tianma TL063FVMCA01-00 for Xiaomi Redmi Note 7 (xiaomi-lavender) * Tianma TL063FVMC43-02 for Xiaomi Redmi Note 6 Pro (xiaomi-tulip) They all are DSI video mode panels using Novatek NT36672A controller, so they can share almost exactly the same init/off sequences with minimal differences between variants. This allows to avoid a lot of code duplication. Co-developed-by: Richard Acayan Signed-off-by: Richard Acayan Signed-off-by: Alexey Minnekhanov --- drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 166 +++++++++++++++++++++= ++++ 1 file changed, 166 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/d= rm/panel/panel-novatek-nt36672a.c index 237a6a8699aef..e6971ba6ef464 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c @@ -361,6 +361,90 @@ static void tianma_fhd_video_send_deinit_cmds(struct m= ipi_dsi_multi_context *dsi mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10); } =20 +static void lavender_tulip_init_cmds(struct mipi_dsi_multi_context *dsi_ct= x) +{ + /* + * This function supports 3 similar panels with minimal differences + * in their init sequences. We assume base to be lavender-tianma + * panel, and 2 variations (lavender-shenchao and tulip) are handled as + * differences to base. + */ + const struct device_node *node =3D dev_of_node(&dsi_ctx->dsi->dev); + bool is_shenchao =3D of_device_is_compatible(node, "shenchao,fhdplus-vide= o"); + bool is_tulip =3D of_device_is_compatible(node, "tianma,tl063fvmc43-02"); + + dsi_ctx->dsi->mode_flags |=3D MIPI_DSI_MODE_LPM; + + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x25); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x18, 0x96); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x04); + + if (is_shenchao) + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x27); + else + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20); + + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + + if (is_shenchao) + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd9, 0x10); + else + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x78, 0x01); + + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x82, 0x13); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x84, 0x31); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x88, 0x13); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8a, 0x31); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8e, 0xe4); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8f, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x90, 0x80); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x26); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xa9, 0x12); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xaa, 0x10); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xae, 0x8a); + + if (is_shenchao) + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1c, 0xfa); + + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10); + + if (is_shenchao) + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, 0x01); + + mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx); + mipi_dsi_msleep(dsi_ctx, 80); + + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, 0x01); + mipi_dsi_dcs_set_tear_on_multi(dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); + + if (is_tulip) { + mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00ff); + } else { + /* lavender tianma + shenchao specific part */ + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x03, 0x04); + mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00b8); + } + + mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2= c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00); + + mipi_dsi_dcs_set_display_on_multi(dsi_ctx); +} + +static void lavender_tulip_deinit_cmds(struct mipi_dsi_multi_context *dsi_= ctx) +{ + dsi_ctx->dsi->mode_flags &=3D ~MIPI_DSI_MODE_LPM; + + mipi_dsi_dcs_set_display_off_multi(dsi_ctx); + mipi_dsi_msleep(dsi_ctx, 20); + mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx); + mipi_dsi_msleep(dsi_ctx, 120); +} + static const struct drm_display_mode tianma_fhd_video_panel_default_mode = =3D { .clock =3D 161331, =20 @@ -393,6 +477,85 @@ static const struct nt36672a_panel_desc tianma_fhd_vid= eo_panel_desc =3D { .send_deinit_cmds =3D tianma_fhd_video_send_deinit_cmds, }; =20 +/* common for both lavender-tianma and lavender-shenchao panels */ +static const struct drm_display_mode lavender_panel_default_mode =3D { + .clock =3D (1080 + 90 + 2 + 120) * (2340 + 10 + 3 + 8) * 60 / 1000, + + .hdisplay =3D 1080, + .hsync_start =3D 1080 + 90, + .hsync_end =3D 1080 + 90 + 2, + .htotal =3D 1080 + 90 + 2 + 120, + + .vdisplay =3D 2340, + .vsync_start =3D 2340 + 10, + .vsync_end =3D 2340 + 10 + 3, + .vtotal =3D 2340 + 10 + 3 + 8, + + .type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct nt36672a_panel_desc shenchao_lavender_panel_desc =3D { + .display_mode =3D &lavender_panel_default_mode, + + .width_mm =3D 67, + .height_mm =3D 145, + + .mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_CLOCK_NON_CONTINUOUS, + .format =3D MIPI_DSI_FMT_RGB888, + .lanes =3D 4, + .send_init_cmds =3D lavender_tulip_init_cmds, + .send_deinit_cmds =3D lavender_tulip_deinit_cmds, +}; + +static const struct nt36672a_panel_desc tianma_lavender_panel_desc =3D { + .display_mode =3D &lavender_panel_default_mode, + + .width_mm =3D 67, + .height_mm =3D 145, + + .mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_CLOCK_NON_CONTINUOUS, + .format =3D MIPI_DSI_FMT_RGB888, + .lanes =3D 4, + .send_init_cmds =3D lavender_tulip_init_cmds, + .send_deinit_cmds =3D lavender_tulip_deinit_cmds, +}; + +static const struct drm_display_mode tianmaplus_e7t_tulip_mode =3D { + .clock =3D (1080 + 100 + 28 + 120) * (2280 + 10 + 3 + 8) * 60 / 1000, + + .hdisplay =3D 1080, + .hsync_start =3D 1080 + 100, + .hsync_end =3D 1080 + 100 + 28, + .htotal =3D 1080 + 100 + 28 + 120, + + .vdisplay =3D 2280, + .vsync_start =3D 2280 + 10, + .vsync_end =3D 2280 + 10 + 3, + .vtotal =3D 2280 + 10 + 3 + 8, + + .width_mm =3D 68, + .height_mm =3D 143, + + .type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct nt36672a_panel_desc tianmaplus_e7t_tulip_panel_desc = =3D { + .display_mode =3D &tianmaplus_e7t_tulip_mode, + + .width_mm =3D 68, + .height_mm =3D 143, + + .mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_CLOCK_NON_CONTINUOUS, + .format =3D MIPI_DSI_FMT_RGB888, + .lanes =3D 4, + /* tulip panel uses almost the same init/deinit sequences as lavender */ + .send_init_cmds =3D lavender_tulip_init_cmds, + .send_deinit_cmds =3D lavender_tulip_deinit_cmds, +}; + static int nt36672a_panel_add(struct nt36672a_panel *pinfo) { struct device *dev =3D &pinfo->link->dev; @@ -469,7 +632,10 @@ static void nt36672a_panel_remove(struct mipi_dsi_devi= ce *dsi) } =20 static const struct of_device_id panel_nt36672a_match[] =3D { + { .compatible =3D "shenchao,fhdplus-video", .data =3D &shenchao_lavender_= panel_desc }, { .compatible =3D "tianma,fhd-video", .data =3D &tianma_fhd_video_panel_d= esc }, + { .compatible =3D "tianma,tl063fvmca01-00", .data =3D &tianma_lavender_pa= nel_desc }, + { .compatible =3D "tianma,tl063fvmc43-02", .data =3D &tianmaplus_e7t_tuli= p_panel_desc }, { }, }; MODULE_DEVICE_TABLE(of, panel_nt36672a_match); --=20 2.55.0 From nobody Fri Sep 25 12:04:11 2026 Received: from sm24.hosting.reg.ru (sm24.hosting.reg.ru [31.31.198.150]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB58E38332F; Sun, 13 Sep 2026 05:37:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Sun, 13 Sep 2026 08:37:41 +0300 From: Alexey Minnekhanov Date: Sun, 13 Sep 2026 08:36:39 +0300 Subject: [PATCH 7/9] drm/panel: novatek-nt36672a: Add Tianma panel for Xiaomi Mi A2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260913-nt36672a-panels-v1-7-ce097402c6ea@minlexx.ru> References: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> In-Reply-To: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: David Heidelberg , Joel Selvaraj , Chintan Patel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, Alexey Minnekhanov X-Mailer: b4 0.16.0 Add support for Tianma TL060FVXS16-00 video mode panel based on Novatek NT36672A, used in Xiaomi Mi A2 smartphone (xiaomi-jasmine). It shares some code with already supported panel in this driver for xiaomi-lavender, so we can reuse the same panel deinit function. Signed-off-by: Alexey Minnekhanov --- drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 57 ++++++++++++++++++++++= ++++ 1 file changed, 57 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/d= rm/panel/panel-novatek-nt36672a.c index e6971ba6ef464..1bfa808365874 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c @@ -445,6 +445,29 @@ static void lavender_tulip_deinit_cmds(struct mipi_dsi= _multi_context *dsi_ctx) mipi_dsi_msleep(dsi_ctx, 120); } =20 +static void tianma_jasmine_init_cmds(struct mipi_dsi_multi_context *dsi_ct= x) +{ + dsi_ctx->dsi->mode_flags |=3D MIPI_DSI_MODE_LPM; + + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, 0x10); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x50); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x32, 0x2f); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10); + + mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx); + mipi_dsi_msleep(dsi_ctx, 70); + + mipi_dsi_dcs_set_display_brightness_multi(dsi_ctx, 0x00ff); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x03, 0x04); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2= c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00); + + mipi_dsi_dcs_set_display_on_multi(dsi_ctx); + usleep_range(5000, 6000); +} + static const struct drm_display_mode tianma_fhd_video_panel_default_mode = =3D { .clock =3D 161331, =20 @@ -556,6 +579,39 @@ static const struct nt36672a_panel_desc tianmaplus_e7t= _tulip_panel_desc =3D { .send_deinit_cmds =3D lavender_tulip_deinit_cmds, }; =20 +static const struct drm_display_mode tianma_jasmine_panel_default_mode =3D= { + .clock =3D (1080 + 96 + 4 + 56) * (2160 + 4 + 2 + 33) * 60 / 1000, + + .hdisplay =3D 1080, + .hsync_start =3D 1080 + 96, + .hsync_end =3D 1080 + 96 + 4, + .htotal =3D 1080 + 96 + 4 + 56, + + .vdisplay =3D 2160, + .vsync_start =3D 2160 + 4, + .vsync_end =3D 2160 + 4 + 2, + .vtotal =3D 2160 + 4 + 2 + 33, + + .width_mm =3D 68, + .height_mm =3D 136, + .type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct nt36672a_panel_desc tianma_jasmine_panel_desc =3D { + .display_mode =3D &tianma_jasmine_panel_default_mode, + + .width_mm =3D 68, + .height_mm =3D 136, + + .mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_CLOCK_NON_CONTINUOUS, + .format =3D MIPI_DSI_FMT_RGB888, + .lanes =3D 4, + .send_init_cmds =3D tianma_jasmine_init_cmds, + /* jasmine panel uses the same deinit sequence as lavender/tulip */ + .send_deinit_cmds =3D lavender_tulip_deinit_cmds, +}; + static int nt36672a_panel_add(struct nt36672a_panel *pinfo) { struct device *dev =3D &pinfo->link->dev; @@ -634,6 +690,7 @@ static void nt36672a_panel_remove(struct mipi_dsi_devic= e *dsi) static const struct of_device_id panel_nt36672a_match[] =3D { { .compatible =3D "shenchao,fhdplus-video", .data =3D &shenchao_lavender_= panel_desc }, { .compatible =3D "tianma,fhd-video", .data =3D &tianma_fhd_video_panel_d= esc }, + { .compatible =3D "tianma,tl060fvxs16-00", .data =3D &tianma_jasmine_pane= l_desc }, { .compatible =3D "tianma,tl063fvmca01-00", .data =3D &tianma_lavender_pa= nel_desc }, { .compatible =3D "tianma,tl063fvmc43-02", .data =3D &tianmaplus_e7t_tuli= p_panel_desc }, { }, --=20 2.55.0 From nobody Fri Sep 25 12:04:11 2026 Received: from sm24.hosting.reg.ru (sm24.hosting.reg.ru [31.31.198.150]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 09C0A3AB26D; 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Sun, 13 Sep 2026 08:37:42 +0300 From: Alexey Minnekhanov Date: Sun, 13 Sep 2026 08:36:40 +0300 Subject: [PATCH 8/9] drm/panel: novatek-nt36672a: Add panel for Asus Zenfone Max Pro M1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260913-nt36672a-panels-v1-8-ce097402c6ea@minlexx.ru> References: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> In-Reply-To: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: David Heidelberg , Joel Selvaraj , Chintan Patel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, Alexey Minnekhanov , iAboothahir X-Mailer: b4 0.16.0 Add support for TXD TXDI600YANPA-43V3 video mode panel based on Novatek NT36672A, used in Asus Zenfone Max Pro M1 smartphone (asus-x00td). Co-developed-by: iAboothahir Signed-off-by: iAboothahir Signed-off-by: Alexey Minnekhanov --- drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 281 +++++++++++++++++++++= ++++ 1 file changed, 281 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/d= rm/panel/panel-novatek-nt36672a.c index 1bfa808365874..954ab24c9d00a 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c @@ -468,6 +468,252 @@ static void tianma_jasmine_init_cmds(struct mipi_dsi_= multi_context *dsi_ctx) usleep_range(5000, 6000); } =20 +static void txd_x00td_init_cmds(struct mipi_dsi_multi_context *dsi_ctx) +{ + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0x9e); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x07, 0x94); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0e, 0x35); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0f, 0x24); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x6d, 0x66); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x69, 0x99); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x95, 0xf5); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x96, 0xf5); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x23); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x6c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x15, 0xe6); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0x0c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x24); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x00, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x01, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x02, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x03, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x04, 0x0b); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x0c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0xa9); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x07, 0x06); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x08, 0x04); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x09, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0a, 0x0f); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0b, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0c, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0d, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0e, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0f, 0x17); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x10, 0x15); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x11, 0x13); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x13, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x14, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x15, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0x0b); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0x0c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x18, 0xa9); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x19, 0x05); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1a, 0x03); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1b, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1c, 0x0f); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1d, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1e, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1f, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x20, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x21, 0x17); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x22, 0x15); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x23, 0x13); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x2f, 0x04); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x30, 0x08); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x31, 0x04); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x32, 0x08); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x33, 0x02); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x34, 0x02); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x35, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x37, 0x02); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x38, 0x72); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x39, 0x72); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3b, 0x40); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x3f, 0x72); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x60, 0x10); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x61, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x68, 0x83); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x78, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x79, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7a, 0x08); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7b, 0x9c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7d, 0x06); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x7e, 0x02); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x45); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x81, 0x06); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8e, 0xf0); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x90, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x92, 0x76); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x93, 0x0a); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x94, 0x0a); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x99, 0x33); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x9b, 0xff); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4, 0x04); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5, 0x04); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdc, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdd, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xde, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdf, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe0, 0x75); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe9, 0x08); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xed, 0x40); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, + 0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00, + 0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98, + 0x00, 0xac); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb1, + 0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01, + 0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22, + 0x02, 0x25); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb2, + 0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02, + 0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a, + 0x03, 0x68); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3, + 0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03, + 0xbd, 0x03, 0xd6, 0x03, 0xda); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4, + 0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00, + 0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98, + 0x00, 0xac); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5, + 0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01, + 0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22, + 0x02, 0x25); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb6, + 0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02, + 0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a, + 0x03, 0x68); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb7, + 0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03, + 0xbd, 0x03, 0xd6, 0x03, 0xda); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb8, + 0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00, + 0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98, + 0x00, 0xac); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb9, + 0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01, + 0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22, + 0x02, 0x25); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xba, + 0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02, + 0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a, + 0x03, 0x68); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xbb, + 0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03, + 0xbd, 0x03, 0xd6, 0x03, 0xda); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x21); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb0, + 0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00, + 0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98, + 0x00, 0xac); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb1, + 0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01, + 0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22, + 0x02, 0x25); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb2, + 0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02, + 0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a, + 0x03, 0x68); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb3, + 0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03, + 0xbd, 0x03, 0xd6, 0x03, 0xda); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb4, + 0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00, + 0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98, + 0x00, 0xac); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb5, + 0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01, + 0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22, + 0x02, 0x25); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb6, + 0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02, + 0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a, + 0x03, 0x68); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb7, + 0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03, + 0xbd, 0x03, 0xd6, 0x03, 0xda); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb8, + 0x00, 0x00, 0x00, 0x15, 0x00, 0x37, 0x00, + 0x54, 0x00, 0x6d, 0x00, 0x84, 0x00, 0x98, + 0x00, 0xac); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xb9, + 0x00, 0xbd, 0x00, 0xf9, 0x01, 0x25, 0x01, + 0x6b, 0x01, 0x9c, 0x01, 0xec, 0x02, 0x22, + 0x02, 0x25); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xba, + 0x02, 0x5e, 0x02, 0x9e, 0x02, 0xc9, 0x02, + 0xfd, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5a, + 0x03, 0x68); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xbb, + 0x03, 0x78, 0x03, 0x8b, 0x03, 0xa1, 0x03, + 0xbd, 0x03, 0xd6, 0x03, 0xda); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x25); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x05, 0x0c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0a, 0x81); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0b, 0xd7); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x0c, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0x82); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x21, 0x1c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x22, 0x1c); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x24, 0x76); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x25, 0x76); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5c, 0x25); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5d, 0x80); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5e, 0x80); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x5f, 0x22); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x65, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x69, 0x60); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x6b, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x71, 0x2d); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x8d, 0x04); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd7, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd8, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xd9, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xda, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdb, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xdc, 0x00); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x26); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x06, 0xc8); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x12, 0x5a); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x19, 0x0a); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1a, 0x97); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1d, 0x0a); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x1e, 0x1e); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x99, 0x20); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x27); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x13, 0x0e); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x16, 0xb0); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x17, 0xd0); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xff, 0x10); + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx); + mipi_dsi_msleep(dsi_ctx, 70); + mipi_dsi_dcs_set_display_on_multi(dsi_ctx); + mipi_dsi_usleep_range(dsi_ctx, 10000, 11000); +} + +static void txd_x00td_off(struct mipi_dsi_multi_context *dsi_ctx) +{ + mipi_dsi_dcs_set_display_off_multi(dsi_ctx); + mipi_dsi_msleep(dsi_ctx, 50); + mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx); + mipi_dsi_msleep(dsi_ctx, 120); +} + static const struct drm_display_mode tianma_fhd_video_panel_default_mode = =3D { .clock =3D 161331, =20 @@ -612,6 +858,40 @@ static const struct nt36672a_panel_desc tianma_jasmine= _panel_desc =3D { .send_deinit_cmds =3D lavender_tulip_deinit_cmds, }; =20 +static const struct drm_display_mode txd_x00td_mode =3D { + .clock =3D (1080 + 122 + 8 + 76) * (2160 + 20 + 4 + 28) * 60 / 1000, + + .hdisplay =3D 1080, + .hsync_start =3D 1080 + 122, + .hsync_end =3D 1080 + 122 + 8, + .htotal =3D 1080 + 122 + 8 + 76, + + .vdisplay =3D 2160, + .vsync_start =3D 2160 + 20, + .vsync_end =3D 2160 + 20 + 4, + .vtotal =3D 2160 + 20 + 4 + 28, + + .width_mm =3D 68, + .height_mm =3D 136, + + .type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct nt36672a_panel_desc txd_x00td_panel_desc =3D { + .display_mode =3D &txd_x00td_mode, + + .width_mm =3D 68, + .height_mm =3D 136, + + .mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_NO_EOT_PACKET | + MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, + .format =3D MIPI_DSI_FMT_RGB888, + .lanes =3D 4, + .send_init_cmds =3D txd_x00td_init_cmds, + .send_deinit_cmds =3D txd_x00td_off, +}; + static int nt36672a_panel_add(struct nt36672a_panel *pinfo) { struct device *dev =3D &pinfo->link->dev; @@ -693,6 +973,7 @@ static const struct of_device_id panel_nt36672a_match[]= =3D { { .compatible =3D "tianma,tl060fvxs16-00", .data =3D &tianma_jasmine_pane= l_desc }, { .compatible =3D "tianma,tl063fvmca01-00", .data =3D &tianma_lavender_pa= nel_desc }, { .compatible =3D "tianma,tl063fvmc43-02", .data =3D &tianmaplus_e7t_tuli= p_panel_desc }, + { .compatible =3D "txd,txdi600yanpa-43v3", .data =3D &txd_x00td_panel_des= c }, { }, }; MODULE_DEVICE_TABLE(of, panel_nt36672a_match); --=20 2.55.0 From nobody Fri Sep 25 12:04:11 2026 Received: from sm24.hosting.reg.ru (sm24.hosting.reg.ru [31.31.198.150]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 09CAE3AB284; Sun, 13 Sep 2026 05:37:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=31.31.198.150 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789277875; cv=none; b=G+oPe72/h1ERbeJwRl5Ru32a2Au9pHvkYdvFkUj1pJvTi9LaMaJ+Gi/tzh/5S5QuCjnobd/w8t5mxggAvbSSH56amQjcWHCaDcYm2TpS0JL7ndtlwFfC6bijglht1dgZS6DqmYEMAE8BcwbNRT4OzTUJYC3r9vvp9yhR63wb49s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789277875; c=relaxed/simple; bh=0BQ6xKjmIi45mmQDEUnZDOzwVStMOY+tGg4O4r/CxtA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QKIB8xqYIpz7GW7CR52sIpWikBINq2I0HIHQA4LKJpVfYqDFWriJLmLfTTWNUs9+MTF9FQ/9xFNRqhbiWThjZmXtog8n4PGPMk0QeQxZttW69NstWBtGzIa6/sAFS1L7XTWBJ1Rj1w0K46kMxB0MFcHx1lr9ElkvkARTmjyzzEg= ARC-Authentication-Results: i=1; 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b=hor6mrqLAwcCVqHHEsBHNHX0dI kUUaiJcqOP7Y4TNNgkjnvauuMj2E4sa/HhnS4F0ac3HEAPxoVMDs4gECNofwIxm68T91p3DsAkfGH SsarMuq2+8b8nAyNKVVkj6PdAa0ePmpIVBA7dAtfGs5xBz8E5768OP7RuXMWpdptZdAM=; Received: by sm24.hosting.reg.ru with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (envelope-from ) id 1x5cuN-0000000Dxg1-0eRe; Sun, 13 Sep 2026 08:37:44 +0300 From: Alexey Minnekhanov Date: Sun, 13 Sep 2026 08:36:41 +0300 Subject: [PATCH 9/9] MAINTAINERS: Add Alexey Minnekhanov as maintainer for NT36672A panel Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260913-nt36672a-panels-v1-9-ce097402c6ea@minlexx.ru> References: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> In-Reply-To: <20260913-nt36672a-panels-v1-0-ce097402c6ea@minlexx.ru> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: David Heidelberg , Joel Selvaraj , Chintan Patel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, phone-devel@vger.kernel.org, Alexey Minnekhanov X-Mailer: b4 0.16.0 List myself as maintainer of Novatek NT36672A panels driver to keep a close eye on it. Signed-off-by: Alexey Minnekhanov --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 207a6e2db70c8..8a91d04447405 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8400,6 +8400,7 @@ F: drivers/gpu/drm/panel/panel-novatek-nt36532.c =20 DRM DRIVER FOR NOVATEK NT36672A PANELS M: Sumit Semwal +M: Alexey Minnekhanov S: Maintained T: git https://gitlab.freedesktop.org/drm/misc/kernel.git F: Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml --=20 2.55.0