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[2a02:1810:b422:d400:af60:1d41:c104:7560]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49e60adaeefsm162063135e9.12.2026.09.12.08.11.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Sep 2026 08:11:38 -0700 (PDT) From: Arthur Heymans To: amd-gfx@lists.freedesktop.org Cc: harry.wentland@amd.com, sunpeng.li@amd.com, siqueira@igalia.com, alexander.deucher@amd.com, christian.koenig@amd.com, michael.mityushkin@amd.com, nicholas.kazlauskas@amd.com, qingqing.zhuo@amd.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Arthur Heymans , stable@vger.kernel.org Subject: [PATCH] drm/amd/display: Preserve eDP mode on initial ASSR failure Date: Sat, 12 Sep 2026 17:11:37 +0200 Message-ID: <20260912151137.3913987-1-arthur@aheymans.xyz> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Commit 56d8ce9d8c17 ("drm/amd/display: Apply correct panel mode when reinitializing hardware") made ASSR failure fall back to the default panel mode unless eDP mode had previously been applied. However, dc_link is zero-initialized and DP_PANEL_MODE_DEFAULT is zero. Before the first call to dp_set_panel_mode(), panel_mode therefore looks like a previously applied default mode. If ASSR setup fails during the first link training attempt, the driver incorrectly trains the eDP link using the default scrambling mode. On a Google Vilboz Chromebook running self-built coreboot firmware and PSP verstage, this leaves the panel mostly black with corrupted output along the top edge. Track whether panel_mode has actually been initialized, and only consult the saved mode after it has been applied. This retains the recovery behavior while preserving eDP mode during initial link training. Fixes: 56d8ce9d8c17 ("drm/amd/display: Apply correct panel mode when reinit= ializing hardware") Cc: stable@vger.kernel.org # v6.4+ Assisted-by: Pi:gpt-5.6-sol Signed-off-by: Arthur Heymans --- drivers/gpu/drm/amd/display/dc/dc.h | 1 + .../amd/display/dc/link/protocols/link_edp_panel_control.c | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/disp= lay/dc/dc.h index 4ecd5699ac5e..0db55a73da0c 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -1912,6 +1912,7 @@ struct dc_scratch_space { struct ddc_service *ddc; =20 enum dp_panel_mode panel_mode; + bool panel_mode_initialized; bool aux_mode; =20 /* Private to DC core */ diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_c= ontrol.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_con= trol.c index 9883216dcc9d..cd90576bc6f0 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c @@ -93,6 +93,7 @@ void dp_set_panel_mode(struct dc_link *link, enum dp_pane= l_mode panel_mode) } =20 link->panel_mode =3D panel_mode; + link->panel_mode_initialized =3D true; DC_LOG_DETECTION_DP_CAPS("%d eDP panel mode supported: %d, enabled: %d\n", link->link_index, link->dpcd_caps.panel_mode_edp, @@ -1300,7 +1301,8 @@ void edp_set_panel_assr(struct dc_link *link, struct = pipe_ctx *pipe_ctx, =20 result =3D cp_psp->funcs.enable_assr(cp_psp->handle, link); =20 - if (!result && link->panel_mode !=3D DP_PANEL_MODE_EDP) + if (!result && link->panel_mode_initialized && + link->panel_mode !=3D DP_PANEL_MODE_EDP) *panel_mode =3D DP_PANEL_MODE_DEFAULT; } } --=20 2.55.0