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Fri, 11 Sep 2026 15:15:11 -0700 (PDT) From: Valerio Setti Date: Sat, 12 Sep 2026 00:14:31 +0200 Subject: [PATCH 1/6] dt-bindings: sound: amlogic: add schemas for audin components Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260912-audin-v1-1-7fbefe928711@baylibre.com> References: <20260912-audin-v1-0-7fbefe928711@baylibre.com> In-Reply-To: <20260912-audin-v1-0-7fbefe928711@baylibre.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Jaroslav Kysela , Takashi Iwai Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Valerio Setti X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4740; i=vsetti@baylibre.com; h=from:subject:message-id; bh=i49CtTXNdvPDqvnQKB6P/xRaXz9o1Ta+9uCeSBaVc0w=; b=owGbwMvMwCV2z3ty7kUrRgbG02pJDFlLanP2vC7jUtmx8nOMoSnL/n7eYv7T77p3MbO/WOa1R I4zY41CRykLgxgXg6yYIgvL9Hu/C0rVHhonnCyAmcPKBDKEgYtTACaS4cjI8O2H11KTH4lLvz75 d6vg/NE7jSITaxbxdc8+yuUbvl2vLZThf13JYasN5lfkroRGnjyXdSuEN6S8xlJh3qkENf4/OmW fOQA= X-Developer-Key: i=vsetti@baylibre.com; a=openpgp; fpr=0497DEFB707526E13360C970DE4B936DD13A0100 Add schemas for "amlogic,meson-gx-audin" and "amlogic,meson-gx-audin-fifo". They provide I2S audio input support to the Meson GX platforms (GXBB/GXL). Signed-off-by: Valerio Setti --- .../sound/amlogic,meson-gx-audin-fifo.yaml | 52 ++++++++++++ .../bindings/sound/amlogic,meson-gx-audin.yaml | 96 ++++++++++++++++++= ++++ 2 files changed, 148 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/amlogic,meson-gx-audin= -fifo.yaml b/Documentation/devicetree/bindings/sound/amlogic,meson-gx-audin= -fifo.yaml new file mode 100644 index 000000000000..a01fe22b9786 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/amlogic,meson-gx-audin-fifo.y= aml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/amlogic,meson-gx-audin-fifo.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic GX AUDIN FIFO controller + +maintainers: + - Valerio Setti + +description: |- + AUDIN FIFO receives audio data from backend interfaces (ex: I2S, SPDIF), + stores them into a FIFO in a configurable way and then bulk copies all t= he + data in RAM when the FIFO is full. + +allOf: + - $ref: dai-common.yaml# + +properties: + $nodename: + pattern: "^audio-controller@[0-9a-f]+$" + + compatible: + items: + - enum: + - amlogic,meson-gxbb-audin-fifo + - amlogic,meson-gxl-audin-fifo + - const: amlogic,meson-gx-audin-fifo + + reg: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - "#sound-dai-cells" + +unevaluatedProperties: false + +examples: + - | + audio-controller@80 { + compatible =3D "amlogic,meson-gxbb-audin-fifo", + "amlogic,meson-gx-audin-fifo"; + reg =3D <0x80 0x1c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "AUDIN FIFO0"; + }; diff --git a/Documentation/devicetree/bindings/sound/amlogic,meson-gx-audin= .yaml b/Documentation/devicetree/bindings/sound/amlogic,meson-gx-audin.yaml new file mode 100644 index 000000000000..d8dceaf28957 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/amlogic,meson-gx-audin.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/amlogic,meson-gx-audin.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic GX AUDIN + +maintainers: + - Valerio Setti + +description: |- + AUDIN provides audio input support for the Amlogic GX based platforms + (GXBB/GXL). DT-wise it acts as parent node for FIFO child nodes, whereas + from sound subsystem point of view it is a component providing data + formatting widgets. + Supported audio formats are: I2S, SPDIF and PCM. + +allOf: + - $ref: component-common.yaml# + +properties: + $nodename: + pattern: "^audio-controller@[0-9a-f]+$" + + compatible: + items: + - enum: + - amlogic,meson-gxbb-audin + - amlogic,meson-gxl-audin + - const: amlogic,meson-gx-audin + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + + resets: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: AUDIN peripheral clock + +patternProperties: + "^audio-controller@[0-9a-f]+$": + type: object + $ref: amlogic,meson-gx-audin-fifo.yaml# + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - resets + - interrupts + - ranges + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + audio-controller@a000 { + compatible =3D "amlogic,meson-gxbb-audin", "amlogic,meson-gx-audin"; + reg =3D <0xa000 0x308>; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x0 0xa000 0x308>; + resets =3D <&reset RESET_AUDIN>; + interrupts =3D ; + sound-name-prefix =3D "AUDIN"; + clocks =3D <&clkc CLKID_I2S_SPDIF>; + + audio-controller@80 { + compatible =3D "amlogic,meson-gxbb-audin-fifo", + "amlogic,meson-gx-audin-fifo"; + reg =3D <0x80 0x1c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "AUDIN FIFO0"; + }; + }; --=20 2.47.3 From nobody Fri Sep 25 13:16:57 2026 Received: from mail-wm2-f12.google.com (mail-wm2-f12.google.com [74.125.225.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5A353A6B6C for ; Fri, 11 Sep 2026 22:15:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.225.140 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789164917; cv=none; b=IN0QmZSyH03oHZdDj/COAyg7EoOohaACt9PMJ8JNNWFd7ljG1NX/ZWd6B2z4QDBNggxRTrTNfAXZh8GCBjrM1PJ7ryQ5NGoImnFDaxC20S886UO3QYXBdQzOZ91DCpMBD8NmY/8/zfz4Wuz/rbSzrEXQi6lXNMh2Z0JQ9Vv9PO8= ARC-Message-Signature: i=1; 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Fri, 11 Sep 2026 15:15:13 -0700 (PDT) Received: from [127.0.1.1] ([151.42.87.32]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49d26c2a419sm202882745e9.7.2026.09.11.15.15.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 15:15:12 -0700 (PDT) From: Valerio Setti Date: Sat, 12 Sep 2026 00:14:32 +0200 Subject: [PATCH 2/6] ASoC: meson: add audin main module and I2S formatter Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260912-audin-v1-2-7fbefe928711@baylibre.com> References: <20260912-audin-v1-0-7fbefe928711@baylibre.com> In-Reply-To: <20260912-audin-v1-0-7fbefe928711@baylibre.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Jaroslav Kysela , Takashi Iwai Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Valerio Setti X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=12397; i=vsetti@baylibre.com; h=from:subject:message-id; bh=U38KIW8l3Mu//XwcIMEecEk/1YyGnT9t7x5OqfJMhJs=; b=owGbwMvMwCV2z3ty7kUrRgbG02pJDFlLanP94l+c3PBA9/DU6+57ct2rOvMaV3Qe2OyfpKHmz dLEULe+o5SFQYyLQVZMkYVl+r3fBaVqD40TThbAzGFlAhnCwMUpABP5f4jhf63FF8HcSQ/epJuf uGtT8jNz2k55Jr1jS9xdLD8krD7h+4fhf7m3ULHFoWIDC76Gxl8fv7GXLo91Xi68/NXPVa1edwP 3sQIA X-Developer-Key: i=vsetti@baylibre.com; a=openpgp; fpr=0497DEFB707526E13360C970DE4B936DD13A0100 Audin is the main component that provides audio input support to the Amlogic GX based platforms (GXBB/GXL). From a functional point of view it's pretty simple: - It provides input data formatters as sound widgets. Currently only I2S is supported, but other interfaces can be added in the future. - It enables the shared clock that's being used from all the components, i.e. formatters and FIFO. - It triggers the parsing of its DT child nodes that implement FIFOs. Note: the parent intentionally does not claim its register window so that the FIFO children can claim theirs. 'audin-formatter-i2s' is also added here implementing the functionalities required for the widget that's part of the audin audio component. The overall design is identical to what has been done for AIU module. Signed-off-by: Valerio Setti --- sound/soc/meson/Kconfig | 9 ++ sound/soc/meson/Makefile | 3 + sound/soc/meson/audin-formatter-i2s.c | 174 ++++++++++++++++++++++++++++++= ++++ sound/soc/meson/audin.c | 109 +++++++++++++++++++++ sound/soc/meson/audin.h | 14 +++ 5 files changed, 309 insertions(+) diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig index d9a730994a2a..f6e54615fc73 100644 --- a/sound/soc/meson/Kconfig +++ b/sound/soc/meson/Kconfig @@ -12,6 +12,14 @@ config SND_MESON_AIU Select Y or M to add support for the Audio output subsystem found in the Amlogic Meson8, Meson8b and GX SoC families =20 +config SND_MESON_AUDIN + tristate "Amlogic AUDIN" + select REGMAP_MMIO + select SND_MESON_AIU + help + Select Y or M to add support for the audio input subsystem found + in the Amlogic GX SoC family. Currently only I2S input is supported. + config SND_MESON_AXG_FIFO tristate select REGMAP_MMIO @@ -108,6 +116,7 @@ config SND_MESON_GX_SOUND_CARD tristate "Amlogic GX Sound Card Support" select SND_MESON_CARD_UTILS imply SND_MESON_AIU + imply SND_MESON_AUDIN help Select Y or M to add support for the GXBB/GXL SoC sound card =20 diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile index f9ec0ebb01f0..6a06a7b26e61 100644 --- a/sound/soc/meson/Makefile +++ b/sound/soc/meson/Makefile @@ -10,6 +10,8 @@ snd-soc-meson-aiu-y +=3D aiu-encoder-spdif.o snd-soc-meson-aiu-y +=3D aiu-fifo.o snd-soc-meson-aiu-y +=3D aiu-fifo-i2s.o snd-soc-meson-aiu-y +=3D aiu-fifo-spdif.o +snd-soc-meson-audin-y :=3D audin.o +snd-soc-meson-audin-y +=3D audin-formatter-i2s.o snd-soc-meson-axg-fifo-y :=3D axg-fifo.o snd-soc-meson-axg-frddr-y :=3D axg-frddr.o snd-soc-meson-axg-toddr-y :=3D axg-toddr.o @@ -29,6 +31,7 @@ snd-soc-meson-g12a-tohdmitx-y :=3D g12a-tohdmitx.o snd-soc-meson-t9015-y :=3D t9015.o =20 obj-$(CONFIG_SND_MESON_AIU) +=3D snd-soc-meson-aiu.o +obj-$(CONFIG_SND_MESON_AUDIN) +=3D snd-soc-meson-audin.o obj-$(CONFIG_SND_MESON_AXG_FIFO) +=3D snd-soc-meson-axg-fifo.o obj-$(CONFIG_SND_MESON_AXG_FRDDR) +=3D snd-soc-meson-axg-frddr.o obj-$(CONFIG_SND_MESON_AXG_TODDR) +=3D snd-soc-meson-axg-toddr.o diff --git a/sound/soc/meson/audin-formatter-i2s.c b/sound/soc/meson/audin-= formatter-i2s.c new file mode 100644 index 000000000000..8bbb5cdb52dc --- /dev/null +++ b/sound/soc/meson/audin-formatter-i2s.c @@ -0,0 +1,174 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2026 BayLibre, SAS. +// Author: Valerio Setti + +#include +#include +#include +#include + +#include "audin.h" +#include "gx-formatter.h" + +/* I2SIN_CTRL register and bits */ +#define AUDIN_I2SIN_CTRL 0x40 +#define AUDIN_I2SIN_CTRL_I2SIN_DIR BIT(0) +#define AUDIN_I2SIN_CTRL_I2SIN_CLK_SEL BIT(1) +#define AUDIN_I2SIN_CTRL_I2SIN_LRCLK_SEL BIT(2) +#define AUDIN_I2SIN_CTRL_I2SIN_BCLK_INV BIT(3) +#define AUDIN_I2SIN_CTRL_I2SIN_LRCLK_SKEW_MASK GENMASK(6, 4) +#define AUDIN_I2SIN_CTRL_I2SIN_LRCLK_INV BIT(7) +#define AUDIN_I2SIN_CTRL_I2SIN_SIZE_MASK GENMASK(9, 8) +#define AUDIN_I2SIN_CTRL_I2SIN_CHAN_EN_MASK GENMASK(13, 10) +#define AUDIN_I2SIN_CTRL_I2SIN_EN BIT(15) + +static struct snd_soc_dai * +audin_formatter_i2s_get_be(struct snd_soc_dapm_widget *w) +{ + struct snd_soc_dapm_path *p; + struct snd_soc_dai *be; + + snd_soc_dapm_widget_for_each_source_path(w, p) { + if (!p->connect) + continue; + + if (p->source->id =3D=3D snd_soc_dapm_dai_out) + return (struct snd_soc_dai *)p->source->priv; + + be =3D audin_formatter_i2s_get_be(p->source); + if (be) + return be; + } + + return NULL; +} + +static struct gx_stream * +audin_formatter_i2s_get_stream(struct snd_soc_dapm_widget *w) +{ + struct snd_soc_dai *be =3D audin_formatter_i2s_get_be(w); + + if (!be) + return NULL; + + return snd_soc_dai_dma_data_get_capture(be); +} + +static void audin_formatter_i2s_enable(struct regmap *map) +{ + regmap_update_bits(map, AUDIN_I2SIN_CTRL, + AUDIN_I2SIN_CTRL_I2SIN_EN, + AUDIN_I2SIN_CTRL_I2SIN_EN); +} + +static void audin_formatter_i2s_disable(struct regmap *map) +{ + regmap_update_bits(map, AUDIN_I2SIN_CTRL, + AUDIN_I2SIN_CTRL_I2SIN_EN, 0); +} + +static int audin_formatter_i2s_prepare(struct regmap *map, + const struct gx_formatter_hw *quirks, + struct gx_stream *ts) +{ + unsigned int val; + int ret; + + /* + * I2S decoder always outputs 24 bits to the FIFO according to the + * manual. The only thing we can change through + * AUDIN_I2SIN_CTRL_I2SIN_SIZE_MASK is the following: + * - 0 -> output[23:0] =3D {original[23:8],8=E2=80=99d0} + * - 1 -> output[23:0] =3D {original[23:6],6=E2=80=99d0} + * - 2 -> output[23:0] =3D {original[23:4],4=E2=80=99d0} + * - 3 -> output[23:0] =3D {original[23:0]} + * + * We use 3 here and, in case of 16 bit format, we filter unnecessary + * bytes at FIFO stage. + * Note: data is left-justified, so in case of 16 bits samples, this + * means that the LSB is to be discarded at FIFO level and the + * relevant part is in bits [23:8]. + */ + val =3D FIELD_PREP(AUDIN_I2SIN_CTRL_I2SIN_SIZE_MASK, 3); + ret =3D regmap_update_bits(map, AUDIN_I2SIN_CTRL, + AUDIN_I2SIN_CTRL_I2SIN_SIZE_MASK, val); + if (ret) + return ret; + + /* + * The manual claims that this platform supports up to 4 streams + * (8 channels), but currently only 1 stream (2 channels) has been + * tested and it's supported. + */ + val =3D FIELD_PREP(AUDIN_I2SIN_CTRL_I2SIN_CHAN_EN_MASK, 1); + ret =3D regmap_update_bits(map, AUDIN_I2SIN_CTRL, + AUDIN_I2SIN_CTRL_I2SIN_CHAN_EN_MASK, val); + if (ret) + return ret; + + /* + * Use clocks from AIU and not from the pads since we only want to + * support master mode. + */ + val =3D AUDIN_I2SIN_CTRL_I2SIN_CLK_SEL | + AUDIN_I2SIN_CTRL_I2SIN_LRCLK_SEL | + AUDIN_I2SIN_CTRL_I2SIN_DIR; + ret =3D regmap_update_bits(map, AUDIN_I2SIN_CTRL, val, val); + if (ret) + return ret; + + switch (ts->iface->fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_NF: + val =3D AUDIN_I2SIN_CTRL_I2SIN_BCLK_INV; + break; + case SND_SOC_DAIFMT_NB_IF: + val =3D AUDIN_I2SIN_CTRL_I2SIN_LRCLK_INV; + break; + case SND_SOC_DAIFMT_IB_IF: + val =3D AUDIN_I2SIN_CTRL_I2SIN_BCLK_INV | AUDIN_I2SIN_CTRL_I2SIN_LRCLK_I= NV; + break; + case SND_SOC_DAIFMT_NB_NF: + val =3D 0; + break; + default: + return -EINVAL; + } + + ret =3D regmap_update_bits(map, AUDIN_I2SIN_CTRL, + AUDIN_I2SIN_CTRL_I2SIN_LRCLK_INV | + AUDIN_I2SIN_CTRL_I2SIN_BCLK_INV, val); + if (ret) + return ret; + + switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + val =3D 1; + break; + case SND_SOC_DAIFMT_LEFT_J: + val =3D 0; + break; + default: + return -EINVAL; + } + + val =3D FIELD_PREP(AUDIN_I2SIN_CTRL_I2SIN_LRCLK_SKEW_MASK, val); + ret =3D regmap_update_bits(map, AUDIN_I2SIN_CTRL, + AUDIN_I2SIN_CTRL_I2SIN_LRCLK_SKEW_MASK, + val); + if (ret) + return ret; + + return 0; +} + +static const struct gx_formatter_ops audin_formatter_i2s_ops =3D { + .get_stream =3D audin_formatter_i2s_get_stream, + .prepare =3D audin_formatter_i2s_prepare, + .enable =3D audin_formatter_i2s_enable, + .disable =3D audin_formatter_i2s_disable, +}; + +const struct gx_formatter_driver audin_formatter_i2s_drv =3D { + .ops =3D &audin_formatter_i2s_ops, +}; diff --git a/sound/soc/meson/audin.c b/sound/soc/meson/audin.c new file mode 100644 index 000000000000..e8071323432b --- /dev/null +++ b/sound/soc/meson/audin.c @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2026 BayLibre, SAS. +// Author: Valerio Setti + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "audin.h" +#include "gx-formatter.h" + +static struct snd_soc_dapm_widget audin_dapm_widgets[] =3D { + SND_SOC_DAPM_PGA_E("I2S Formatter", SND_SOC_NOPM, 0, 0, NULL, 0, + gx_formatter_event, + (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)), +}; + +static const struct snd_soc_component_driver audin_component =3D { + .dapm_widgets =3D audin_dapm_widgets, + .num_dapm_widgets =3D ARRAY_SIZE(audin_dapm_widgets), +}; + +static const struct regmap_config audin_regmap_cfg =3D { + .reg_bits =3D 32, + .val_bits =3D 32, + .reg_stride =3D 4, + .max_register =3D 0x304, +}; + +static int meson_gx_audin_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct resource *res; + void __iomem *mmio; + struct regmap *regmap; + struct clk *clk; + int ret; + + ret =3D device_reset(dev); + if (ret) + return dev_err_probe(dev, ret, "Failed to reset device\n"); + + res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return dev_err_probe(dev, -EINVAL, "Failed to get memory resource\n"); + + /* + * Do not use devm_platform_ioremap_resource() here: it would claim the + * whole AUDIN window exclusively and the FIFO children would then fail + * to request their own sub-ranges. + */ + mmio =3D devm_ioremap(dev, res->start, resource_size(res)); + if (!mmio) + return dev_err_probe(dev, -ENOMEM, "Failed to remap memory\n"); + + regmap =3D devm_regmap_init_mmio(dev, mmio, &audin_regmap_cfg); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); + + clk =3D devm_clk_get_enabled(dev, NULL); + if (IS_ERR(clk)) + return dev_err_probe(dev, PTR_ERR(clk), "Failed to get clock\n"); + + ret =3D gx_formatter_create(dev, &audin_dapm_widgets[0], &audin_formatter= _i2s_drv, regmap); + if (ret) + return dev_err_probe(dev, ret, "Failed to allocate formatter\n"); + + ret =3D devm_snd_soc_register_component(dev, &audin_component, NULL, 0); + if (ret) + return dev_err_probe(dev, ret, "Failed to register component\n"); + + ret =3D devm_of_platform_populate(dev); + if (ret) + return dev_err_probe(dev, ret, "Failed to probe child nodes\n"); + + return 0; +} + +static void meson_gx_audin_remove(struct platform_device *pdev) +{ + gx_formatter_free(&audin_dapm_widgets[0]); +} + +static const struct of_device_id meson_gx_audin_of_match[] =3D { + { .compatible =3D "amlogic,meson-gxbb-audin" }, + { .compatible =3D "amlogic,meson-gxl-audin" }, + {} +}; +MODULE_DEVICE_TABLE(of, meson_gx_audin_of_match); + +static struct platform_driver meson_gx_audin_driver =3D { + .driver =3D { + .name =3D "meson-gx-audin", + .of_match_table =3D meson_gx_audin_of_match, + }, + .probe =3D meson_gx_audin_probe, + .remove =3D meson_gx_audin_remove, +}; +module_platform_driver(meson_gx_audin_driver); + +MODULE_DESCRIPTION("Meson GX AUDIN driver"); +MODULE_AUTHOR("Valerio Setti "); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/meson/audin.h b/sound/soc/meson/audin.h new file mode 100644 index 000000000000..29961e18190f --- /dev/null +++ b/sound/soc/meson/audin.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (c) 2026 BayLibre, SAS. + * Author: Valerio Setti + */ + +#ifndef _MESON_AUDIN_H +#define _MESON_AUDIN_H + +#include "gx-formatter.h" + +extern const struct gx_formatter_driver audin_formatter_i2s_drv; + +#endif --=20 2.47.3 From nobody Fri Sep 25 13:16:57 2026 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DE583C9EEB for ; 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Fri, 11 Sep 2026 15:15:14 -0700 (PDT) Received: from [127.0.1.1] ([151.42.87.32]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49d26c2a419sm202882745e9.7.2026.09.11.15.15.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 15:15:13 -0700 (PDT) From: Valerio Setti Date: Sat, 12 Sep 2026 00:14:33 +0200 Subject: [PATCH 3/6] ASoC: meson: add audin FIFO driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260912-audin-v1-3-7fbefe928711@baylibre.com> References: <20260912-audin-v1-0-7fbefe928711@baylibre.com> In-Reply-To: <20260912-audin-v1-0-7fbefe928711@baylibre.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Jaroslav Kysela , Takashi Iwai Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Valerio Setti X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=17768; i=vsetti@baylibre.com; h=from:subject:message-id; bh=vNQyBJeBZc6hUUZzJuEKw9fG/gfnPN3fY7SmjWA8aIo=; b=owGbwMvMwCV2z3ty7kUrRgbG02pJDFlLanN7Qt2zRZMeb2ebcC7lY2hV5FK2huM/Ve+3nVQ3d 3i1/lJaRykLgxgXg6yYIgvL9Hu/C0rVHhonnCyAmcPKBDKEgYtTACbyrp2RYepD4dMe211WdEhn hqb4+NWvnPn6mmzQjDl/X7x1NTMVfMrIcJXDfdkefmmlyWfXzGmP1RKwDk4/ZyCmEcjtF+3jd+w TLwA= X-Developer-Key: i=vsetti@baylibre.com; a=openpgp; fpr=0497DEFB707526E13360C970DE4B936DD13A0100 Add support for the frontend DAI of the capture interface which is in charge of receiving decoded data from "audin-formatter-i2s" and move them to an internal FIFO before they are block-transferred to RAM. This component could ideally handle multiple input sources (SPDIF, I2S, PCM, HDMI), but for the time being only I2S is added and has been tested. Note: due to register configuration, at boot "Input Source" is set to "SPDIF". In order to be able to test I2S it must be switched to "I2S". Signed-off-by: Valerio Setti --- sound/soc/meson/Kconfig | 5 + sound/soc/meson/Makefile | 2 + sound/soc/meson/audin-fifo.c | 466 +++++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 473 insertions(+) diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig index f6e54615fc73..b83c7c15d1e9 100644 --- a/sound/soc/meson/Kconfig +++ b/sound/soc/meson/Kconfig @@ -16,10 +16,15 @@ config SND_MESON_AUDIN tristate "Amlogic AUDIN" select REGMAP_MMIO select SND_MESON_AIU + select SND_MESON_AUDIN_FIFO help Select Y or M to add support for the audio input subsystem found in the Amlogic GX SoC family. Currently only I2S input is supported. =20 +config SND_MESON_AUDIN_FIFO + tristate + select REGMAP_MMIO + config SND_MESON_AXG_FIFO tristate select REGMAP_MMIO diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile index 6a06a7b26e61..3e373bd27645 100644 --- a/sound/soc/meson/Makefile +++ b/sound/soc/meson/Makefile @@ -12,6 +12,7 @@ snd-soc-meson-aiu-y +=3D aiu-fifo-i2s.o snd-soc-meson-aiu-y +=3D aiu-fifo-spdif.o snd-soc-meson-audin-y :=3D audin.o snd-soc-meson-audin-y +=3D audin-formatter-i2s.o +snd-soc-meson-audin-fifo-y :=3D audin-fifo.o snd-soc-meson-axg-fifo-y :=3D axg-fifo.o snd-soc-meson-axg-frddr-y :=3D axg-frddr.o snd-soc-meson-axg-toddr-y :=3D axg-toddr.o @@ -32,6 +33,7 @@ snd-soc-meson-t9015-y :=3D t9015.o =20 obj-$(CONFIG_SND_MESON_AIU) +=3D snd-soc-meson-aiu.o obj-$(CONFIG_SND_MESON_AUDIN) +=3D snd-soc-meson-audin.o +obj-$(CONFIG_SND_MESON_AUDIN_FIFO) +=3D snd-soc-meson-audin-fifo.o obj-$(CONFIG_SND_MESON_AXG_FIFO) +=3D snd-soc-meson-axg-fifo.o obj-$(CONFIG_SND_MESON_AXG_FRDDR) +=3D snd-soc-meson-axg-frddr.o obj-$(CONFIG_SND_MESON_AXG_TODDR) +=3D snd-soc-meson-axg-toddr.o diff --git a/sound/soc/meson/audin-fifo.c b/sound/soc/meson/audin-fifo.c new file mode 100644 index 000000000000..7029bd6a464a --- /dev/null +++ b/sound/soc/meson/audin-fifo.c @@ -0,0 +1,466 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2026 BayLibre, SAS. +// Author: Valerio Setti + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* FIFO registers */ +#define AUDIN_FIFO_START 0x00 +#define AUDIN_FIFO_END 0x04 +#define AUDIN_FIFO_PTR 0x08 + +/* FIFOx CTRL registers and bits */ +#define AUDIN_FIFO_CTRL 0x14 +#define AUDIN_FIFO_CTRL_EN BIT(0) +#define AUDIN_FIFO_CTRL_RST BIT(1) +#define AUDIN_FIFO_CTRL_LOAD BIT(2) +#define AUDIN_FIFO_CTRL_DIN_SEL_OFF 3 +#define AUDIN_FIFO_CTRL_ENDIAN_MASK GENMASK(10, 8) +#define AUDIN_FIFO_CTRL_CHAN_MASK GENMASK(14, 11) +#define AUDIN_FIFO_CTRL_UG BIT(15) + +/* FIFOx_CTRL1 registers and bits */ +#define AUDIN_FIFO_CTRL1 0x18 +#define AUDIN_FIFO_CTRL1_DIN_BYTE_NUM_MASK GENMASK(3, 2) +#define AUDIN_FIFO_CTRL1_DIN_POS_01_MASK GENMASK(1, 0) + +/* When the FIFO is full the data is bulk transferred to memory. */ +#define AUDIN_FIFO_LANE_SIZE 8 /* bytes */ +#define AUDIN_FIFO_I2S_BLOCK (AUDIN_FIFO_LANE_SIZE * 32) /* 256 bytes */ + +static const struct snd_pcm_hardware audin_fifo_pcm_hw =3D { + .info =3D (SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_PAUSE), + .formats =3D SNDRV_PCM_FMTBIT_S16_LE, + .rate_min =3D 5512, + .rate_max =3D 192000, + .channels_min =3D 2, + .channels_max =3D 2, + /* + * The FIFO only moves data to the memory once it is full, so its pointer + * progresses one block at a time. + */ + .period_bytes_min =3D 2 * AUDIN_FIFO_I2S_BLOCK, + .period_bytes_max =3D UINT_MAX, /* Bounded by buffer_bytes_max */ + .periods_min =3D 2, + .periods_max =3D UINT_MAX, + /* + * It's 1 MB. There is no physical constraint for this; it's only meant to + * provide some decently large buffer size where to store incoming data + * and fit various period_bytes requests. + */ + .buffer_bytes_max =3D 4096 * AUDIN_FIFO_I2S_BLOCK, +}; + +struct audin_fifo_dai_data { + /* + * The AUDIN peripheral has an IRQ to signal when data is received, but + * it cannot grant a periodic behavior. The reason is that the register + * which holds the address which triggers the IRQ must be updated + * continuously. This creates a risk of overflow if for any reason the + * ISR execution is delayed. Using a periodic timer is therefore simpler + * and more reliable. + */ + struct hrtimer polling_timer; + struct snd_soc_component *component; + struct snd_pcm_substream *substream; + unsigned int period_bytes; + unsigned int byte_rate; + unsigned int last_pos; /* Position inside the allocated read buffer. */ + bool running; +}; + +static unsigned int audin_fifo_pos(struct snd_soc_component *component, + struct snd_pcm_runtime *runtime) +{ + unsigned int ptr =3D snd_soc_component_read(component, AUDIN_FIFO_PTR); + + return ptr - lower_32_bits(runtime->dma_addr); +} + +static ktime_t audin_fifo_bytes_to_ns(struct audin_fifo_dai_data *data, + unsigned int bytes) +{ + return div_u64((u64)bytes * NSEC_PER_SEC, data->byte_rate); +} + +static int audin_fifo_dai_trigger(struct snd_pcm_substream *substream, int= cmd, + struct snd_soc_dai *dai) +{ + struct audin_fifo_dai_data *data =3D snd_soc_dai_dma_data_get_capture(dai= ); + struct snd_soc_component *component =3D dai->component; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + snd_soc_component_update_bits(component, AUDIN_FIFO_CTRL, + AUDIN_FIFO_CTRL_EN, + AUDIN_FIFO_CTRL_EN); + WRITE_ONCE(data->running, true); + hrtimer_start(&data->polling_timer, + audin_fifo_bytes_to_ns(data, data->period_bytes), + HRTIMER_MODE_REL); + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + case SNDRV_PCM_TRIGGER_STOP: + WRITE_ONCE(data->running, false); + /* + * PCM stream lock is held here. If the timer callback is running + * (i.e. it cannot be stopped) there is also hrtimer_cancel() + * in hw_free(). + */ + hrtimer_try_to_cancel(&data->polling_timer); + snd_soc_component_update_bits(component, AUDIN_FIFO_CTRL, + AUDIN_FIFO_CTRL_EN, 0); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int audin_fifo_dai_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct audin_fifo_dai_data *data =3D snd_soc_dai_dma_data_get_capture(dai= ); + struct snd_soc_component *component =3D dai->component; + struct snd_pcm_runtime *runtime =3D substream->runtime; + dma_addr_t dma_end =3D runtime->dma_addr + runtime->dma_bytes - AUDIN_FIF= O_LANE_SIZE; + unsigned int val; + + data->last_pos =3D 0; + + /* + * Setup memory boundaries. + * Note: DMA has a 32-bit mask, so it's OK to take lower 32 bits. + */ + snd_soc_component_write(component, AUDIN_FIFO_START, lower_32_bits(runtim= e->dma_addr)); + snd_soc_component_write(component, AUDIN_FIFO_PTR, lower_32_bits(runtime-= >dma_addr)); + snd_soc_component_write(component, AUDIN_FIFO_END, lower_32_bits(dma_end)= ); + + /* Load new addresses (both LOAD and UG are self-clearing). */ + val =3D AUDIN_FIFO_CTRL_LOAD | AUDIN_FIFO_CTRL_UG; + snd_soc_component_update_bits(component, AUDIN_FIFO_CTRL, val, val); + + /* Reset (RST is self-clearing). */ + snd_soc_component_update_bits(component, AUDIN_FIFO_CTRL, + AUDIN_FIFO_CTRL_RST, + AUDIN_FIFO_CTRL_RST); + + return 0; +} + +static int audin_fifo_dai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component =3D dai->component; + struct audin_fifo_dai_data *data =3D snd_soc_dai_dma_data_get_capture(dai= ); + unsigned int val; + + if (params_width(params) !=3D 16) { + dev_err(dai->dev, "Unsupported width %u\n", params_width(params)); + return -EINVAL; + } + + /* + * The I2S input decoder passes 24 bits of left-justified data + * but for the time being we only support 16 bit formatted samples + * which means that we drop the LSB. + */ + val =3D FIELD_PREP(AUDIN_FIFO_CTRL1_DIN_POS_01_MASK, 1); + snd_soc_component_update_bits(component, AUDIN_FIFO_CTRL1, + AUDIN_FIFO_CTRL1_DIN_POS_01_MASK, + val); + + /* Set sample size to 2 bytes (16 bit) */ + val =3D FIELD_PREP(AUDIN_FIFO_CTRL1_DIN_BYTE_NUM_MASK, 1); + snd_soc_component_update_bits(component, AUDIN_FIFO_CTRL1, + AUDIN_FIFO_CTRL1_DIN_BYTE_NUM_MASK, + val); + + /* + * This is a bit counterintuitive. Even though the platform has a single + * pin for I2S input which would mean that we can only support 2 + * channels, doing so would cause samples to be stored in a weird way + * into the FIFO: all the samples from the 1st channel on the 1st half + * of the FIFO, then samples from the 2nd channel in the other half. Of + * course extra work would be required to properly interleave them + * before returning to the userspace. + * Setting a single channel mode instead solves the problem: samples + * from 1st and 2nd channel are stored interleaved and sequentially in + * the FIFO. + */ + val =3D FIELD_PREP(AUDIN_FIFO_CTRL_CHAN_MASK, 1); + snd_soc_component_update_bits(component, AUDIN_FIFO_CTRL, + AUDIN_FIFO_CTRL_CHAN_MASK, val); + + /* + * FIFO is filled line by line and each of them is 8 bytes. The + * problem is that each line is filled starting from the end, + * so we need to properly reorder them before moving to the + * RAM. This is the value required to properly re-order samples stored + * in 16 bit format. + */ + val =3D FIELD_PREP(AUDIN_FIFO_CTRL_ENDIAN_MASK, 6); + snd_soc_component_update_bits(component, AUDIN_FIFO_CTRL, + AUDIN_FIFO_CTRL_ENDIAN_MASK, val); + + /* Used by the polling timer to convert a byte count into a delay. */ + data->period_bytes =3D params_period_bytes(params); + data->byte_rate =3D params_rate(params) * params_channels(params) * + params_physical_width(params) / BITS_PER_BYTE; + + data->substream =3D substream; + + return 0; +} + +static int audin_fifo_dai_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct audin_fifo_dai_data *data =3D snd_soc_dai_dma_data_get_capture(dai= ); + + WRITE_ONCE(data->running, false); + hrtimer_cancel(&data->polling_timer); + + return 0; +} + +static int audin_fifo_dai_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + int ret; + + snd_soc_set_runtime_hwparams(substream, &audin_fifo_pcm_hw); + + ret =3D snd_pcm_hw_constraint_step(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_BUFFER_BYTES, + AUDIN_FIFO_I2S_BLOCK); + if (ret < 0) { + dev_err(dai->dev, "Failed to set constraint on buffer_bytes %d\n", ret); + return ret; + } + + ret =3D snd_pcm_hw_constraint_step(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_PERIOD_BYTES, + AUDIN_FIFO_I2S_BLOCK); + if (ret < 0) { + dev_err(dai->dev, "Failed to set constraint on period_bytes %d\n", ret); + return ret; + } + + return 0; +} + +static int audin_fifo_dai_pcm_new(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_dai *dai) +{ + int ret; + + ret =3D dma_coerce_mask_and_coherent(dai->dev, DMA_BIT_MASK(32)); + if (ret) { + dev_err(dai->dev, "Failed to set DMA mask %d\n", ret); + return ret; + } + + ret =3D snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV, + dai->dev, + audin_fifo_pcm_hw.buffer_bytes_max, + audin_fifo_pcm_hw.buffer_bytes_max); + if (ret) { + dev_err(dai->dev, "Failed to set PCM managed buffer %d\n", ret); + return ret; + } + + return 0; +} + +static enum hrtimer_restart audin_fifo_timer_cb(struct hrtimer *timer) +{ + struct audin_fifo_dai_data *data =3D + container_of(timer, struct audin_fifo_dai_data, polling_timer); + struct snd_pcm_runtime *runtime =3D data->substream->runtime; + unsigned int curr_pos, delta, sleep_time; + + if (!READ_ONCE(data->running)) + return HRTIMER_NORESTART; + + curr_pos =3D audin_fifo_pos(data->component, runtime); + delta =3D (curr_pos >=3D data->last_pos) ? + curr_pos - data->last_pos : + (runtime->dma_bytes - data->last_pos) + curr_pos; + + /* Report only when the period is completed. */ + if (delta >=3D data->period_bytes) { + data->last_pos =3D curr_pos; + delta =3D delta % data->period_bytes; + snd_pcm_period_elapsed(data->substream); + } + + /* Sleep until the period is completed. */ + sleep_time =3D round_up(data->period_bytes - delta, AUDIN_FIFO_I2S_BLOCK); + hrtimer_forward_now(timer, audin_fifo_bytes_to_ns(data, sleep_time)); + + return HRTIMER_RESTART; +} + +static int audin_fifo_dai_probe(struct snd_soc_dai *dai) +{ + struct audin_fifo_dai_data *data; + + data =3D kzalloc_obj(*data); + if (!data) + return -ENOMEM; + + data->component =3D dai->component; + + hrtimer_setup(&data->polling_timer, audin_fifo_timer_cb, CLOCK_MONOTONIC, + HRTIMER_MODE_REL); + + snd_soc_dai_dma_data_set_capture(dai, data); + + return 0; +} + +static int audin_fifo_dai_remove(struct snd_soc_dai *dai) +{ + kfree(snd_soc_dai_dma_data_get_capture(dai)); + + return 0; +} + +static const struct snd_soc_dai_ops audin_fifo_dai_ops =3D { + .trigger =3D audin_fifo_dai_trigger, + .prepare =3D audin_fifo_dai_prepare, + .hw_params =3D audin_fifo_dai_hw_params, + .hw_free =3D audin_fifo_dai_hw_free, + .startup =3D audin_fifo_dai_startup, + .pcm_new =3D audin_fifo_dai_pcm_new, + .probe =3D audin_fifo_dai_probe, + .remove =3D audin_fifo_dai_remove, +}; + +static struct snd_soc_dai_driver audin_fifo_dai_drv[] =3D { + { + .name =3D "FIFO", + .capture =3D { + .stream_name =3D "Capture", + .channels_min =3D 2, + .channels_max =3D 2, + .rates =3D SNDRV_PCM_RATE_CONTINUOUS, + .rate_min =3D 5512, + .rate_max =3D 192000, + .formats =3D SNDRV_PCM_FMTBIT_S16_LE, + }, + .ops =3D &audin_fifo_dai_ops, + }, +}; + +static snd_pcm_uframes_t +audin_fifo_component_pointer(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime =3D substream->runtime; + + return bytes_to_frames(runtime, audin_fifo_pos(component, runtime)); +} + +static const char * const audin_fifo_input_sel_texts[] =3D { + "SPDIF", "I2S", "PCM", "HDMI", "Demodulator" +}; + +static SOC_ENUM_SINGLE_DECL(audin_fifo_input_sel_enum, AUDIN_FIFO_CTRL, + AUDIN_FIFO_CTRL_DIN_SEL_OFF, + audin_fifo_input_sel_texts); + +static const struct snd_kcontrol_new audin_fifo_input_sel_mux =3D + SOC_DAPM_ENUM("Input Source", audin_fifo_input_sel_enum); + +static const struct snd_soc_dapm_widget audin_fifo_dapm_widgets[] =3D { + SND_SOC_DAPM_AIF_IN("I2S IN", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, + &audin_fifo_input_sel_mux), +}; + +static const struct snd_soc_dapm_route audin_fifo_dapm_routes[] =3D { + { "SRC SEL", "I2S", "I2S IN" }, + { "Capture", NULL, "SRC SEL" }, +}; + +static const struct snd_soc_component_driver audin_fifo_component =3D { + .dapm_widgets =3D audin_fifo_dapm_widgets, + .num_dapm_widgets =3D ARRAY_SIZE(audin_fifo_dapm_widgets), + .dapm_routes =3D audin_fifo_dapm_routes, + .num_dapm_routes =3D ARRAY_SIZE(audin_fifo_dapm_routes), + .pointer =3D audin_fifo_component_pointer, +}; + +static const struct regmap_config audin_fifo_regmap_cfg =3D { + .reg_bits =3D 32, + .val_bits =3D 32, + .reg_stride =3D 4, + .max_register =3D 0x18, +}; + +static int audin_fifo_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + void __iomem *regs; + struct regmap *map; + int ret; + + regs =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(regs)) + return dev_err_probe(dev, PTR_ERR(regs), "Error ioremapping resource\n"); + + map =3D devm_regmap_init_mmio(dev, regs, &audin_fifo_regmap_cfg); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), "Failed to init regmap\n"); + + ret =3D devm_snd_soc_register_component(dev, &audin_fifo_component, + audin_fifo_dai_drv, + ARRAY_SIZE(audin_fifo_dai_drv)); + if (ret) + return dev_err_probe(dev, ret, "Failed to register component\n"); + + return 0; +} + +static const struct of_device_id audin_fifo_of_match[] =3D { + { .compatible =3D "amlogic,meson-gxbb-audin-fifo" }, + { .compatible =3D "amlogic,meson-gxl-audin-fifo" }, + {} +}; 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Fri, 11 Sep 2026 15:15:15 -0700 (PDT) Received: from [127.0.1.1] ([151.42.87.32]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49d26c2a419sm202882745e9.7.2026.09.11.15.15.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 15:15:14 -0700 (PDT) From: Valerio Setti Date: Sat, 12 Sep 2026 00:14:34 +0200 Subject: [PATCH 4/6] ASoC: meson: aiu: add I2S Capture DAI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260912-audin-v1-4-7fbefe928711@baylibre.com> References: <20260912-audin-v1-0-7fbefe928711@baylibre.com> In-Reply-To: <20260912-audin-v1-0-7fbefe928711@baylibre.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Jaroslav Kysela , Takashi Iwai Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Valerio Setti X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1725; i=vsetti@baylibre.com; h=from:subject:message-id; bh=Uvy6WjK33Ql5QDc+7YeTX2qUEcUUi+n12SinkXVNwt4=; b=owGbwMvMwCV2z3ty7kUrRgbG02pJDFlLanPN62R2qhj3RZtv5n7/dkGxo+2X1bUTYtJ8z4T+/ b708KljHaUsDGJcDLJiiiws0+/9LihVe2iccLIAZg4rE8gQBi5OAZiIpQ/D/3iO1Y+uhQl6r8y0 vMEWZraRteTfueBJYvK/nk9Ky7q69zwjw5V01nCFvvMVs85emf4ja2+hp4tZqPejMzzTP2ifKA2 MZwUA X-Developer-Key: i=vsetti@baylibre.com; a=openpgp; fpr=0497DEFB707526E13360C970DE4B936DD13A0100 Add capture stream to CPU_I2S_ENCODER making it able to handle both playback and capture streams. Captured data is formatted from "audin-formatter-i2s" widget, buffered from "audin-fifo" into an internal FIFO and then bulk transmitted into RAM when the FIFO is full. As for the naming of the stream "I2S Encoder" is kept as base following the same pattern used for the playback stream and with the goal to minimize changes. Supported format for capture is currently limited to S16_LE because it's the only one that has been tested. According to the manual also S24_LE should be supported, but this is kept as follow-up. This capture support also takes advantage of the following commits that has recently been merged: commit df3c987ab3d7 ("ASoC: meson: aiu-encoder-i2s: reflect bs quirk in hw = constraints") commit e82159384a50 ("ASoC: meson: aiu-encoder-i2s: use the core symmetric_= rate handling") They ensure bs_quirk and rate symmetry across playback and capture streams. Signed-off-by: Valerio Setti --- sound/soc/meson/aiu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/meson/aiu.c b/sound/soc/meson/aiu.c index 535fbf7c1639..14d0e20a4bd6 100644 --- a/sound/soc/meson/aiu.c +++ b/sound/soc/meson/aiu.c @@ -153,6 +153,13 @@ static struct snd_soc_dai_driver aiu_cpu_dai_drv[] =3D= { .rates =3D SNDRV_PCM_RATE_8000_192000, .formats =3D AIU_FORMATS, }, + .capture =3D { + .stream_name =3D "I2S Encoder Capture", + .channels_min =3D 2, + .channels_max =3D 2, + .rates =3D SNDRV_PCM_RATE_8000_192000, + .formats =3D SNDRV_PCM_FMTBIT_S16_LE, + }, .ops =3D &aiu_encoder_i2s_dai_ops, .symmetric_rate =3D 1, }, --=20 2.47.3 From nobody Fri Sep 25 13:16:57 2026 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A93E3D953D for ; Fri, 11 Sep 2026 22:15:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 11 Sep 2026 15:15:16 -0700 (PDT) Received: from [127.0.1.1] ([151.42.87.32]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49d26c2a419sm202882745e9.7.2026.09.11.15.15.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 15:15:15 -0700 (PDT) From: Valerio Setti Date: Sat, 12 Sep 2026 00:14:35 +0200 Subject: [PATCH 5/6] ASoC: meson: gx-card: add support for audin FIFO Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260912-audin-v1-5-7fbefe928711@baylibre.com> References: <20260912-audin-v1-0-7fbefe928711@baylibre.com> In-Reply-To: <20260912-audin-v1-0-7fbefe928711@baylibre.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Jaroslav Kysela , Takashi Iwai Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Valerio Setti X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2176; i=vsetti@baylibre.com; h=from:subject:message-id; bh=6fSYtC/gN4yRWzT4VG1S6kcjUzyFoAinugRVvinR+3A=; b=owGbwMvMwCV2z3ty7kUrRgbG02pJDFlLanPnF/HWmOcoLhLc2aG2y6DOYPfOConb106Fss1Z+ 2z95GubOkpZGMS4GGTFFFlYpt/7XVCq9tA44WQBzBxWJpAhDFycAjCRReGMDNsvL96RqhvU1Piv 1CHgfe2NXe9suU6fDf2gmDCh41u6z2JGhgk+6q2L/vmtyXV7mvuuaEL6yVSdTdcdDS9l+Rce9Jz +hB0A X-Developer-Key: i=vsetti@baylibre.com; a=openpgp; fpr=0497DEFB707526E13360C970DE4B936DD13A0100 Slightly modify "gx_card_cpu_identify()" by making the compatible matching string an input parameter. This allows to easily support also "meson-gx-audin-fifo" with minimal changes. Signed-off-by: Valerio Setti --- sound/soc/meson/gx-card.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/sound/soc/meson/gx-card.c b/sound/soc/meson/gx-card.c index 932be0a09306..132d9771e2b3 100644 --- a/sound/soc/meson/gx-card.c +++ b/sound/soc/meson/gx-card.c @@ -66,10 +66,10 @@ static int gx_card_parse_i2s(struct snd_soc_card *card, } =20 static int gx_card_cpu_identify(struct snd_soc_dai_link_component *c, - char *match) + const char *compatible_match, const char *dai_match) { - if (of_device_is_compatible(c->of_node, DT_PREFIX "aiu")) { - if (strstr(c->dai_name, match)) + if (of_device_is_compatible(c->of_node, compatible_match)) { + if (strstr(c->dai_name, dai_match)) return 1; } =20 @@ -96,21 +96,23 @@ static int gx_card_add_link(struct snd_soc_card *card, = struct device_node *np, if (ret) return ret; =20 - if (gx_card_cpu_identify(dai_link->cpus, "FIFO")) - return meson_card_set_fe_link(card, dai_link, np, true); + if (gx_card_cpu_identify(dai_link->cpus, DT_PREFIX "aiu", "FIFO")) + return meson_card_set_fe_link(card, dai_link, np, true); + if (gx_card_cpu_identify(dai_link->cpus, DT_PREFIX "meson-gx-audin-fifo",= "FIFO")) + return meson_card_set_fe_link(card, dai_link, np, false); =20 ret =3D meson_card_set_be_link(card, dai_link, np); if (ret) return ret; =20 /* Or apply codec to codec params if necessary */ - if (gx_card_cpu_identify(dai_link->cpus, "CODEC CTRL")) { + if (gx_card_cpu_identify(dai_link->cpus, DT_PREFIX "aiu", "CODEC CTRL")) { dai_link->c2c_params =3D &codec_params; dai_link->num_c2c_params =3D 1; } else { dai_link->no_pcm =3D 1; /* Check if the cpu is the i2s encoder and parse i2s data */ - if (gx_card_cpu_identify(dai_link->cpus, "I2S Encoder")) + if (gx_card_cpu_identify(dai_link->cpus, DT_PREFIX "aiu", "I2S Encoder")) ret =3D gx_card_parse_i2s(card, np, index); } =20 --=20 2.47.3 From nobody Fri Sep 25 13:16:57 2026 Received: from mail-wm2-f13.google.com (mail-wm2-f13.google.com [74.125.225.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B40A3DAAAB for ; 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Fri, 11 Sep 2026 15:15:17 -0700 (PDT) Received: from [127.0.1.1] ([151.42.87.32]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49d26c2a419sm202882745e9.7.2026.09.11.15.15.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 15:15:16 -0700 (PDT) From: Valerio Setti Date: Sat, 12 Sep 2026 00:14:36 +0200 Subject: [PATCH 6/6] arm64: dts: amlogic: gx: add nodes for audin and its FIFOs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260912-audin-v1-6-7fbefe928711@baylibre.com> References: <20260912-audin-v1-0-7fbefe928711@baylibre.com> In-Reply-To: <20260912-audin-v1-0-7fbefe928711@baylibre.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Jaroslav Kysela , Takashi Iwai Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Valerio Setti X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5356; i=vsetti@baylibre.com; h=from:subject:message-id; bh=EUGGUwRpDjNyAsnmTwsH+7qy3pCx+bRE90pl3e8XqMc=; b=owGbwMvMwCV2z3ty7kUrRgbG02pJDFlLanMn9J9aIburev1R2ddz4/cemHtN0X3PRU0urU1+S zwfLZywsqOUhUGMi0FWTJGFZfq93wWlag+NE04WwMxhZQIZwsDFKQATqZ3F8N9rQ+sXZ+ZHhp/k Dh+ZUv1toVF8w/YZodcnWK37/HJjYK4RI8O/5S9Kz3ZJbef5zJFp/PBv1d7/885bTRAS1vwe4/K u6xAjAA== X-Developer-Key: i=vsetti@baylibre.com; a=openpgp; fpr=0497DEFB707526E13360C970DE4B936DD13A0100 Add nodes to provide audio input support to Amlogic Meson GXBB/GXL platforms: - audin is the parent node that spans the entire register range and implements the data formatters. - audin_fifo are the child nodes that implement the FIFO: they receive formatted data from the interfaces and then bulk transfer it to RAM when the FIFO is full. What's missing after this to get capture support working is to connect a capture capable codec to the SoC. For example to test these changes an NXP SGTL5000 chip has been connected to and OdroidC2 (Meson GXBB) board using a custom hat board. The following additions are required on 'amlogic/meson-gxbb-odroidc2.dts' to make that hat board to work: &sound { audio-aux-devs =3D <&audin>; audio-routing =3D "AUDIN I2S Formatter", "AIU I2S Encoder Captu= re", "AUDIN FIFO0 I2S IN", "AUDIN I2S Formatter"; dai-link-1 { codec-1 { sound-dai =3D <&sgtl5000>; }; }; dai-link-2 { sound-dai =3D <&aiu AIU_CPU CPU_I2S_ENCODER>; dai-format =3D "i2s"; mclk-fs =3D <256>; codec-0 { sound-dai =3D <&sgtl5000>; }; }; dai-link-3 { sound-dai =3D <&audin_fifo0>; }; }; &audin { status =3D "okay"; }; &audin_fifo0 { status =3D "okay"; }; Then, from userspace: $ amixer sset 'AUDIN FIFO0 SRC SEL' 'I2S' $ arecord -l # find the "FIFO Capture" device $ arecord -D hw:0, -f S16_LE -r 48000 -c 2 /tmp/in.wav Signed-off-by: Valerio Setti --- arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 35 +++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 22 ++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 22 ++++++++++++++++++ 3 files changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dt= s/amlogic/meson-gx.dtsi index c1d8e81d95cb..68632ed86e8c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -436,6 +436,41 @@ watchdog@98d0 { reg =3D <0x0 0x098d0 0x0 0x10>; clocks =3D <&xtal>; }; + + audin: audio-controller@a000 { + compatible =3D "amlogic,meson-gx-audin"; + reg =3D <0x0 0xa000 0x0 0x308>; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x0 0x0 0xa000 0x308>; + interrupts =3D ; + sound-name-prefix =3D "AUDIN"; + status =3D "disabled"; + + audin_fifo0: audio-controller@80 { + compatible =3D "amlogic,meson-gx-audin-fifo"; + reg =3D <0x80 0x1c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "AUDIN FIFO0"; + status =3D "disabled"; + }; + + audin_fifo1: audio-controller@cc { + compatible =3D "amlogic,meson-gx-audin-fifo"; + reg =3D <0xcc 0x1c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "AUDIN FIFO1"; + status =3D "disabled"; + }; + + audin_fifo2: audio-controller@114 { + compatible =3D "amlogic,meson-gx-audin-fifo"; + reg =3D <0x114 0x1c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "AUDIN FIFO2"; + status =3D "disabled"; + }; + }; }; =20 gic: interrupt-controller@c4301000 { diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/= dts/amlogic/meson-gxbb.dtsi index a9c830a570cc..53cc92ebbc9f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -84,6 +84,28 @@ &aiu { resets =3D <&reset RESET_AIU>; }; =20 +&audin { + compatible =3D "amlogic,meson-gxbb-audin", + "amlogic,meson-gx-audin"; + clocks =3D <&clkc CLKID_I2S_SPDIF>; + resets =3D <&reset RESET_AUDIN>; +}; + +&audin_fifo0 { + compatible =3D "amlogic,meson-gxbb-audin-fifo", + "amlogic,meson-gx-audin-fifo"; +}; + +&audin_fifo1 { + compatible =3D "amlogic,meson-gxbb-audin-fifo", + "amlogic,meson-gx-audin-fifo"; +}; + +&audin_fifo2 { + compatible =3D "amlogic,meson-gxbb-audin-fifo", + "amlogic,meson-gx-audin-fifo"; +}; + &aobus { pinctrl_aobus: pinctrl@14 { compatible =3D "amlogic,meson-gxbb-aobus-pinctrl"; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/d= ts/amlogic/meson-gxl.dtsi index d5e0f72892f8..be8fac36fb59 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -100,6 +100,28 @@ &aiu { resets =3D <&reset RESET_AIU>; }; =20 +&audin { + compatible =3D "amlogic,meson-gxl-audin", + "amlogic,meson-gx-audin"; + clocks =3D <&clkc CLKID_I2S_SPDIF>; + resets =3D <&reset RESET_AUDIN>; +}; + +&audin_fifo0 { + compatible =3D "amlogic,meson-gxl-audin-fifo", + "amlogic,meson-gx-audin-fifo"; +}; + +&audin_fifo1 { + compatible =3D "amlogic,meson-gxl-audin-fifo", + "amlogic,meson-gx-audin-fifo"; +}; + +&audin_fifo2 { + compatible =3D "amlogic,meson-gxl-audin-fifo", + "amlogic,meson-gx-audin-fifo"; +}; + &apb { usb2_phy0: phy@78000 { compatible =3D "amlogic,meson-gxl-usb2-phy"; --=20 2.47.3