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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 00721157ae682-884895001fasm10483237b3.45.2026.09.11.07.21.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 07:21:04 -0700 (PDT) From: Shawn Guo To: Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Krishna Kurapati , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo Subject: [PATCH 1/5] arm64: dts: qcom: nord-embedded: Fix i2c9/i2c10 pin functions Date: Fri, 11 Sep 2026 22:20:36 +0800 Message-ID: <20260911142040.100263-2-shengchao.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> References: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTExMDIwMCBTYWx0ZWRfX512KPn+A2Gb7 job0syoAv59Ux2d2SKZ/+ThvubvxZI9UOmzyddv3Sgpd32U1M0v022DXc+MD/Bhy+8GTAnVWQ2f 1JdqmACBrM9+ifgOYIicJ0s9Sl1uNrbCPv7/LIfCR8rnUus2hmJpXg+jod87qDwUJUQC5s0IHCX h6Kk1jKkyQNc5xHNYajKkUapxNnfi52Oah0LFRFUYgHNCAb9FNzmIOZcfm8XJjvZlBA1kEN1ah4 aZWKoWTNwIvaCqITwJByxalnfFEmjJjGAfnk+B+1BSORDOS0NtQlPq/3XEcI1cc59KVzKFp3RDQ refq9c9Himt/+0dcHv823C+7sEp2x63RaYroVwjVfJyrXPfmN6RuDGrHdbmps6mK4i/pepSNgDS 84ILPjTs/fQ7sFO4EEbpez9Jg6YrF29lotBDop13xO0iPpDIwVV84srjIDe0b06zkBwu31IbWg8 7Bv9QZXteHtzm17/vtw== X-Proofpoint-GUID: MVuNtiKqvmRbBSxSiSV3Suerpl6Jj5eW X-Proofpoint-ORIG-GUID: MVuNtiKqvmRbBSxSiSV3Suerpl6Jj5eW X-Proofpoint-Spam-Info: AW1haW4tMjYwOTExMDIwMCBTYWx0ZWRfX4o83ymzh/ZAn t4YIJQy69e+0Bwk5rYlk5RWWFvBcQ+lhrq/ffZ+Bo/Bdh7jeLbRmCLj5KQq1LzugUAp/CE+Sl8n pkEz5csb3MpRcO3QT6gpqOJGE2miv+8= X-Authority-Analysis: v=2.4 cv=ULtIjyfy c=1 sm=1 tr=0 ts=6aa40e52 cx=c_pps a=72HoHk1woDtn7btP4rdmlg==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=asaw0DWA8FDCBGCi_ycA:9 a=kA6IBgd4cpdPkAWqgNAz:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-11_04,2026-09-11_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 phishscore=0 bulkscore=0 clxscore=1015 malwarescore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609110200 Content-Type: text/plain; charset="utf-8" The i2c9/i2c10 and uart9/uart10 pinctrl states shared the same pins and the same "qup1_se2"/"qup1_se3" function name, so the I2C states were indistinguishable from the UART ones and ended up muxing the UART lanes. i2c9 and i2c10 therefore did not work. Now that the TLMM driver names each lane pair separately, select the lane 0/1 function for I2C and the lane 2/3 function for UART. Signed-off-by: Shawn Guo Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi b/arch/arm64/boot/= dts/qcom/nord-embedded.dtsi index a03ee16c9cff..c7ac2e66632e 100644 --- a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi +++ b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi @@ -1056,14 +1056,14 @@ qup_i2c8_default: qup-i2c8-default-state { =20 qup_i2c9_default: qup-i2c9-default-state { pins =3D "gpio127", "gpio128"; - function =3D "qup1_se2"; + function =3D "qup1_se2_01"; drive-strength =3D <2>; bias-pull-up; }; =20 qup_i2c10_default: qup-i2c10-default-state { pins =3D "gpio129", "gpio130"; - function =3D "qup1_se3"; + function =3D "qup1_se3_01"; drive-strength =3D <2>; bias-pull-up; }; @@ -1461,14 +1461,14 @@ qup_uart8_default: qup-uart8-default-state { =20 qup_uart9_default: qup-uart9-default-state { pins =3D "gpio127", "gpio128"; - function =3D "qup1_se2"; + function =3D "qup1_se2_23"; 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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 00721157ae682-884895001fasm10483237b3.45.2026.09.11.07.21.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 07:21:09 -0700 (PDT) From: Shawn Guo To: Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Krishna Kurapati , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski , Shawn Guo Subject: [PATCH 2/5] arm64: dts: qcom: nord: Add the USB controller nodes Date: Fri, 11 Sep 2026 22:20:37 +0800 Message-ID: <20260911142040.100263-3-shengchao.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> References: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Info: AW1haW4tMjYwOTExMDIwMCBTYWx0ZWRfX2O6YJo7fzmOo Lswx7UzDLIma31pbWxyi0V8K94Nggv63xnNP8WeFJD82spwMQztVTWRitzl6Md27xvFZtF9FwBT n8lgMkuCqoIK9Mq/0vhOuUG7jiV/8Ok= X-Proofpoint-GUID: mT7ir60nCP5pW2QCJLSh9B8yu5obB5E8 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTExMDIwMCBTYWx0ZWRfX1M1KxYnhNe0v jekfEVCox2ffaPexcnBGcpXGu4zTMOL6cM1LaVj85qUi+HdZ1X+bO3QTu6E9jVpo/bX0LasG2fb 2k4ANaKQ3ZB/h7cc3okA7KS/ENaRWxQncYKribDzcIlotqh7gH37un8dt93ZH0+c1lGDIxmFnf8 33l48k7D10wov+0sI+iShfQuZUG7a8wt9p9JKFD+hM8Pi+jV8rr6ZE0zoGjsDoeH05H0biS0WPC Wn3JPEJl02yMlQz4NHORZC7SkL6frVNcmdjTnFUYho1QhRs9FiLsV6h8ed0j1338zG0wB2quSba xeAAPBKGyxYUENyigYtpkZ2xcd/VxV0Mq7pXKwFU/tuZJ8dK8yPGb9TCPDGJQUqTJJQGUfXKan/ jrLAgvjF7Hxa7zfGz4MOWLa8DqoZFwkQ5y1z8gFSu9vsZR5P/BVWUG++hU8W138zWDLlA4mkFYl pk1zYVa7mzYrPVWHlPA== X-Proofpoint-ORIG-GUID: mT7ir60nCP5pW2QCJLSh9B8yu5obB5E8 X-Authority-Analysis: v=2.4 cv=AfwkjHXG c=1 sm=1 tr=0 ts=6aa40e5c cx=c_pps a=g1v0Z557R90hA0UpD/5Yag==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=OACZVaEhdQEOGtIDsFAA:9 a=MFSWADHSvvjO3QEy5MdX:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-11_04,2026-09-11_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609110200 Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Add the base nodes for the three DWC3 USB controllers. These carry only the SoC-invariant properties and are disabled by default. The extension for the embedded Nord variant and relevant board files will add the platform resources and enable them. USB_2 has no SuperSpeed PHY and no 'ss_phy_irq' on this SoC, so it is capped to high-speed and told to use UTMI as its pipe clock. Signed-off-by: Bartosz Golaszewski Signed-off-by: Shawn Guo Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/nord.dtsi | 83 ++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/= nord.dtsi index 83760341456b..98967478fc3a 100644 --- a/arch/arm64/boot/dts/qcom/nord.dtsi +++ b/arch/arm64/boot/dts/qcom/nord.dtsi @@ -1736,6 +1736,89 @@ ipcc0: mailbox@9007000 { #mbox-cells =3D <2>; }; =20 + usb_2: usb@a200000 { + compatible =3D "qcom,nord-dwc3", + "qcom,snps-dwc3"; + reg =3D <0x0 0x0a200000 0x0 0xfc100>; + + interrupts-extended =3D <&intc GIC_SPI 910 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 907 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 7 IRQ_TYPE_EDGE_BOTH>; + interrupt-names =3D "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + + iommus =3D <&apps_smmu_0 0x14e0 0x0>; + + dma-coherent; + wakeup-source; + + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + + maximum-speed =3D "high-speed"; + + qcom,select-utmi-as-pipe-clk; + + status =3D "disabled"; + }; + + usb_1: usb@a400000 { + compatible =3D "qcom,nord-dwc3", + "qcom,snps-dwc3"; + reg =3D <0x0 0x0a400000 0x0 0xfc100>; + + interrupts-extended =3D <&intc GIC_SPI 917 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 918 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 41 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + + iommus =3D <&apps_smmu_0 0x15c0 0x0>; + + dma-coherent; + wakeup-source; + + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + + status =3D "disabled"; + }; + + usb_0: usb@a600000 { + compatible =3D "qcom,nord-dwc3", + "qcom,snps-dwc3"; + reg =3D <0x0 0x0a600000 0x0 0xfc100>; + + interrupts-extended =3D <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; 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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 00721157ae682-884895001fasm10483237b3.45.2026.09.11.07.21.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 07:21:14 -0700 (PDT) From: Shawn Guo To: Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Krishna Kurapati , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski , Shawn Guo Subject: [PATCH 3/5] arm64: dts: qcom: nord-embedded: Add USB resources and PHYs Date: Fri, 11 Sep 2026 22:20:38 +0800 Message-ID: <20260911142040.100263-4-shengchao.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> References: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: obJ6L8IOErlSsevTOCrru1M7kUJ49P4R X-Authority-Analysis: v=2.4 cv=PLmaavqC c=1 sm=1 tr=0 ts=6aa40e5c cx=c_pps a=g1v0Z557R90hA0UpD/5Yag==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=NOSK86ayaCRT3GQFxdkA:9 a=MFSWADHSvvjO3QEy5MdX:22 X-Proofpoint-ORIG-GUID: obJ6L8IOErlSsevTOCrru1M7kUJ49P4R X-Proofpoint-Spam-Info: AW1haW4tMjYwOTExMDIwMSBTYWx0ZWRfX0N1U8UlcweBW 1TuVgzjAoOhWY1J2/pgb+Qge6uxB4ubBYxsFAA7W1J8DPeZ2YDHvR69zYu0RbNRHe8BPxtQPFkJ rvX7dttdZ25DOArzqptKUK/NBgjVwFA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTExMDIwMSBTYWx0ZWRfX8ALNQU1vDrRw Tzaa0QmKGv4WGgaqHDQzT+wUYLYSreAymhY9i5LUo9wqWLVaC1qxAnGG9YCazGm2J+4sTLndIss WznVNFtJ8lY9zYoo4jQqerzecMuwWqgadNMtjqWmb43s1DSG9BYPNQB0dLX2EOpcP5fas3TZuJ7 kNhf5qpjm0nKk/3xTcirrGq2zfOdMg5SpbrTESNy9j6TeBghuLZGavo+6t5Xc/67ohsyf9Lnh46 cmpZZritJe0kWrkGskQ26UYOp798dk6At55/Nvhtx7m1YJKWq8vFgFivPK6BDrOLFc4bOz6FDpD V7GgD6wEGQr3VYq80s2RhJVFwE4mFZrCX0pv4qvPMHbeWoDR1kkPsk+w+C+0FkwFbowUDEE8/Ed wDvQbMLaEMPqjclDWOYEeV2i39UM+xg6OYM45gRidl9Zfhhv6gvhKQHhS8dFKFUhAcRr4zCs0Gv Hv/3pIEBcPB//b3c2aw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-11_04,2026-09-11_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 spamscore=0 phishscore=0 adultscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609110201 Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Add the platform resources for the three USB controllers on the embedded Nord variant: clocks, resets, power domains and interconnect paths. Add the eUSB2 PHY for each of the three controllers, plus the QMP combo PHYs for USB_0 and USB_1, and feed the two QMP USB3 pipe clocks back into negcc, which so far carried placeholder zeros in their place. The eUSB2 PHY of instance 2 gets no 'resets': the SoC provides only two QUSB2PHY block resets, belonging to instances 0 and 1. Instance 2 comes out of reset with the rest of the USB20 tile, driven by the controller. Signed-off-by: Bartosz Golaszewski Signed-off-by: Shawn Guo Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 307 +++++++++++++++++++- 1 file changed, 305 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi b/arch/arm64/boot/= dts/qcom/nord-embedded.dtsi index c7ac2e66632e..84ce57a07361 100644 --- a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi +++ b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include =20 @@ -842,6 +843,162 @@ hpass_ag_noc: interconnect@5fc0000 { qcom,bcm-voters =3D <&apps_bcm_voter>; }; =20 + usb_2_hsphy: phy@88e0000 { + compatible =3D "qcom,nord-snps-eusb2-phy", + "qcom,sm8550-snps-eusb2-phy"; + reg =3D <0x0 0x088e0000 0x0 0x154>; + + clocks =3D <&tcsrcc TCSR_USB2_2_CLKREF_EN>; + clock-names =3D "ref"; + + /* + * The SoC has three eUSB2 PHYs but only two QUSB2PHY block + * resets, which belong to instances 0 and 1 (usb_0 and usb_1). + * This PHY, instance 2, has none of its own: it is taken out of + * reset together with the rest of the USB20 tile by + * NE_GCC_USB20_PRIM_BCR, which the controller owns and pulses + * before touching any register. So no 'resets' here - both + * consumers would need that single reset exclusively. + */ + + #phy-cells =3D <0>; + + status =3D "disabled"; + }; + + usb_0_qmpphy: phy@88e1000 { + compatible =3D "qcom,nord-qmp-usb3-dp-phy"; + reg =3D <0x0 0x088e1000 0x0 0x3000>; + + clocks =3D <&negcc NE_GCC_USB3_PRIM_PHY_AUX_CLK>, + <&tcsrcc TCSR_USB3_0_CLKREF_EN>, + <&negcc NE_GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&negcc NE_GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names =3D "aux", + "ref", + "com_aux", + "usb3_pipe"; + + power-domains =3D <&negcc NE_GCC_USB3_PHY_GDSC>; + + resets =3D <&negcc NE_GCC_USB3_PHY_PRIM_BCR>, + <&negcc NE_GCC_USB3_DP_PHY_PRIM_BCR>; + reset-names =3D "phy", + "common"; + + #clock-cells =3D <1>; + #phy-cells =3D <1>; + + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + usb_0_qmpphy_usb_ss_out: endpoint@1 { + reg =3D <1>; + data-lanes =3D <1 0>; + }; + }; + + port@1 { + reg =3D <1>; + + usb_0_qmpphy_usb_ss_in: endpoint { + remote-endpoint =3D <&usb_0_dwc3_ss>; + }; + }; + }; + }; + + usb_1_qmpphy: phy@88e4000 { + compatible =3D "qcom,nord-qmp-usb3-dp-phy"; + reg =3D <0x0 0x088e4000 0x0 0x3000>; + + clocks =3D <&negcc NE_GCC_USB3_SEC_PHY_AUX_CLK>, + <&tcsrcc TCSR_USB3_1_CLKREF_EN>, + <&negcc NE_GCC_USB3_SEC_PHY_COM_AUX_CLK>, + <&negcc NE_GCC_USB3_SEC_PHY_PIPE_CLK>; + clock-names =3D "aux", + "ref", + "com_aux", + "usb3_pipe"; + + power-domains =3D <&negcc NE_GCC_USB3_SEC_PHY_GDSC>; + + resets =3D <&negcc NE_GCC_USB3_PHY_SEC_BCR>, + <&negcc NE_GCC_USB3_DP_PHY_SEC_BCR>; + reset-names =3D "phy", + "common"; + + #clock-cells =3D <1>; + #phy-cells =3D <1>; + + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* Same as usb_0_qmpphy above. */ + usb_1_qmpphy_usb_ss_out: endpoint@1 { + reg =3D <1>; + data-lanes =3D <1 0>; + }; + }; + + port@1 { + reg =3D <1>; + + usb_1_qmpphy_usb_ss_in: endpoint { + remote-endpoint =3D <&usb_1_dwc3_ss>; + }; + }; + }; + }; + + usb_0_hsphy: phy@88ea000 { + compatible =3D "qcom,nord-snps-eusb2-phy", + "qcom,sm8550-snps-eusb2-phy"; + reg =3D <0x0 0x088ea000 0x0 0x154>; + + clocks =3D <&tcsrcc TCSR_USB2_0_CLKREF_EN>; + clock-names =3D "ref"; + + resets =3D <&negcc NE_GCC_QUSB2PHY_PRIM_BCR>; + + #phy-cells =3D <0>; + + status =3D "disabled"; + }; + + usb_1_hsphy: phy@88eb000 { + compatible =3D "qcom,nord-snps-eusb2-phy", + "qcom,sm8550-snps-eusb2-phy"; + reg =3D <0x0 0x088eb000 0x0 0x154>; + + clocks =3D <&tcsrcc TCSR_USB2_1_CLKREF_EN>; + clock-names =3D "ref"; + + resets =3D <&negcc NE_GCC_QUSB2PHY_SEC_BCR>; + + #phy-cells =3D <0>; + + status =3D "disabled"; + }; + negcc: clock-controller@8900000 { compatible =3D "qcom,nord-negcc"; reg =3D <0x0 0x08900000 0x0 0xf4200>; @@ -850,8 +1007,8 @@ negcc: clock-controller@8900000 { <0>, <0>, <0>, - <0>, - <0>; + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, + <&usb_0_qmpphy QMP_USB43DP_USB3_PIPE_CLK>; #clock-cells =3D <1>; #reset-cells =3D <1>; #power-domain-cells =3D <1>; @@ -1881,3 +2038,149 @@ opp-403000000 { }; }; }; + +&usb_0 { + clocks =3D <&negcc NE_GCC_CNOC_USB3_PRIM_AXI_CLK>, + <&negcc NE_GCC_USB31_PRIM_MASTER_CLK>, + <&negcc NE_GCC_AGGRE_NOC_USB3_PRIM_AXI_CLK>, + <&negcc NE_GCC_USB31_PRIM_SLEEP_CLK>, + <&negcc NE_GCC_USB31_PRIM_MOCK_UTMI_CLK>, + <&tcsrcc TCSR_USB3_0_CLKREF_EN>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; + + assigned-clocks =3D <&negcc NE_GCC_USB31_PRIM_MOCK_UTMI_CLK>, + <&negcc NE_GCC_USB31_PRIM_MASTER_CLK>; + assigned-clock-rates =3D <19200000>, <200000000>; + + power-domains =3D <&negcc NE_GCC_USB31_PRIM_GDSC>; + required-opps =3D <&rpmhpd_opp_nom>; + + resets =3D <&negcc NE_GCC_USB31_PRIM_BCR>; + + interconnects =3D <&aggre1_noc_tile MASTER_USB3_0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&hscnoc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_USB3_0 QCOM_ICC_TAG_ALWAYS>; + interconnect-names =3D "usb-ddr", + "apps-usb"; + + phys =3D <&usb_0_hsphy>, + <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names =3D "usb2-phy", + "usb3-phy"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + usb_0_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg =3D <1>; + + usb_0_dwc3_ss: endpoint { + remote-endpoint =3D <&usb_0_qmpphy_usb_ss_in>; + }; + }; + }; +}; + +&usb_1 { + clocks =3D <&negcc NE_GCC_CNOC_USB3_SEC_AXI_CLK>, + <&negcc NE_GCC_USB31_SEC_MASTER_CLK>, + <&negcc NE_GCC_AGGRE_NOC_USB3_SEC_AXI_CLK>, + <&negcc NE_GCC_USB31_SEC_SLEEP_CLK>, + <&negcc NE_GCC_USB31_SEC_MOCK_UTMI_CLK>, + <&tcsrcc TCSR_USB3_1_CLKREF_EN>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; + + assigned-clocks =3D <&negcc NE_GCC_USB31_SEC_MOCK_UTMI_CLK>, + <&negcc NE_GCC_USB31_SEC_MASTER_CLK>; + assigned-clock-rates =3D <19200000>, <200000000>; + + power-domains =3D <&negcc NE_GCC_USB31_SEC_GDSC>; + required-opps =3D <&rpmhpd_opp_nom>; + + resets =3D <&negcc NE_GCC_USB31_SEC_BCR>; + + interconnects =3D <&aggre1_noc_tile MASTER_USB3_1 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&hscnoc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_USB3_1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names =3D "usb-ddr", + "apps-usb"; + + phys =3D <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names =3D "usb2-phy", + "usb3-phy"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + usb_1_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg =3D <1>; + + usb_1_dwc3_ss: endpoint { + remote-endpoint =3D <&usb_1_qmpphy_usb_ss_in>; + }; + }; + }; +}; + +&usb_2 { + clocks =3D <&negcc NE_GCC_CNOC_USB2_AXI_CLK>, + <&negcc NE_GCC_USB20_MASTER_CLK>, + <&negcc NE_GCC_AGGRE_NOC_USB2_AXI_CLK>, + <&negcc NE_GCC_USB20_SLEEP_CLK>, + <&negcc NE_GCC_USB20_MOCK_UTMI_CLK>, + <&tcsrcc TCSR_USB2_2_CLKREF_EN>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; + + assigned-clocks =3D <&negcc NE_GCC_USB20_MOCK_UTMI_CLK>, + <&negcc NE_GCC_USB20_MASTER_CLK>; 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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 00721157ae682-884895001fasm10483237b3.45.2026.09.11.07.21.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 07:21:19 -0700 (PDT) From: Shawn Guo To: Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Krishna Kurapati , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo Subject: [PATCH 4/5] arm64: dts: qcom: nord-rrd: Enable USB ports Date: Fri, 11 Sep 2026 22:20:39 +0800 Message-ID: <20260911142040.100263-5-shengchao.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> References: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: ZVQRJNbiE-YlWDjtSEGjkwCdJEu6Qg2B X-Proofpoint-ORIG-GUID: ZVQRJNbiE-YlWDjtSEGjkwCdJEu6Qg2B X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTExMDIwMCBTYWx0ZWRfX7KIbCdcZt2nI 1ibpe+Q8tu+85B3re2dw6j4AWkEqrReQ6+Sb7E2W4O2W6CfdG7TPv1BIbMLL9W2LVGPFC4HSA0d oeNewyKx0QI2Lam0BLqjVWj/tHR+WxnDJI4JVg7ISknVPdUrzwZ0J9GkwvvsC6iGOnuZcyxBRpB OnADsZM/ekaJSKNMtb7BZKw49IjAaCUXt4/6cadbeYJ6Kn2X+iGFyZHJUvRSXsKEV6Sbq62x5VR jqVZX3v5Hm8e6M+ZOMvegytN0MqI0H5t0h3EhFSTP0cMr2BOTP5MDJLkq5+tPYgfxXr1R3GvU7q 3CgRieav6N/RsiK4IOazKjC/UB9qU6lvDxBPMje/gB0OZ0P9h/B1dzFJAcimficK9tW+EC6vlPI yFVFchMdBvRF9P2qQ5TAgTLoLyybWGS+XJqRGzy46cxPIj5qV4mx3K4bZHktYpxmbg36mqmgzyL qKF6ep8Qc7Ua8vqcEiA== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTExMDIwMCBTYWx0ZWRfX0WNeeVBl+AT6 ZoftyalS4Rt7F6UXNfeg3I+dr8/0c3FlEAQhqfzaxH2bnRK03FtGW8qc8hTUa0ncuMCphxuPylP Ox033tAURSKTDsWgbog2FZeF8TYKMbo= X-Authority-Analysis: v=2.4 cv=UJFIjyfy c=1 sm=1 tr=0 ts=6aa40e62 cx=c_pps a=72HoHk1woDtn7btP4rdmlg==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=kAg6WJeHQ7d9V-TtBpYA:9 a=kA6IBgd4cpdPkAWqgNAz:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-11_04,2026-09-11_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 bulkscore=0 spamscore=0 adultscore=0 malwarescore=0 suspectscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609110200 Content-Type: text/plain; charset="utf-8" Describe the RRD USB topology. Enable i2c9 and add the two NXP PTN3222 eUSB2 repeaters for USB_0 and USB_1, supplied from vreg_l3l_1p8 and a new fixed 3.3 V pre-regulator, and reset through pmau0102_i GPIOs 9 and 10. Add the onsemi FUSB15201 Type-C controller at 0x50 with its interrupt and pinctrl state on pmau0102_i gpio8. Unlike RIDE, only port A of the controller is wired on this board, to USB_0, so a single usb-c-connector is described and port B is left out. USB_0 is configured for OTG with usb-role-switch and its HS and SS endpoints are linked to the dwc3 HS endpoint and the QMP combo PHY SS output. USB_1 is a fixed host port feeding an on-board Genesys Logic GL3590 USB 3.1 hub. Add the HS and SS hub pair as children of USB_1, linked with peer-hub, with the HS half reset via TLMM GPIO 170 and the SS half additionally supplied by a fixed 1.2 V rail. Assisted-by: LLM Signed-off-by: Shawn Guo Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/nord-rrd.dts | 169 ++++++++++++++++++++++++++ 1 file changed, 169 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/nord-rrd.dts b/arch/arm64/boot/dts/qc= om/nord-rrd.dts index c547963371b4..c2f870ac4234 100644 --- a/arch/arm64/boot/dts/qcom/nord-rrd.dts +++ b/arch/arm64/boot/dts/qcom/nord-rrd.dts @@ -6,6 +6,7 @@ /dts-v1/; =20 #include +#include #include =20 #include "nord-embedded.dtsi" @@ -53,6 +54,22 @@ bi_tcxo_ao_div2: bi-tcxo-ao-div2-clk { clock-div =3D <2>; }; }; + + vreg_per_3p3: regulator-per-3p3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_per_3p3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + + vreg_hub_1p2: regulator-hub-1p2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_hub_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-always-on; + }; }; =20 &apps_rsc { @@ -377,6 +394,86 @@ rtc@32 { }; }; =20 +&i2c9 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + usb0_repeater: redriver@43 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x43>; + #phy-cells =3D <0>; + vdd1v8-supply =3D <&vreg_l3l_1p8>; + vdd3v3-supply =3D <&vreg_per_3p3>; + reset-gpios =3D <&pmau0102_i_gpios 9 GPIO_ACTIVE_LOW>; + }; + + usb1_repeater: redriver@4f { + compatible =3D "nxp,ptn3222"; + reg =3D <0x4f>; + #phy-cells =3D <0>; + vdd1v8-supply =3D <&vreg_l3l_1p8>; + vdd3v3-supply =3D <&vreg_per_3p3>; + reset-gpios =3D <&pmau0102_i_gpios 10 GPIO_ACTIVE_LOW>; + }; + + typec@50 { + compatible =3D "onnn,fusb15201"; + reg =3D <0x50>; + interrupts-extended =3D <&pmau0102_i_gpios 8 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-0 =3D <&usb_pd_int_default>; + pinctrl-names =3D "default"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* + * Only port A of the controller is wired up on this board, to + * USB_0. Port B is left unconnected. + */ + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + label =3D "USB-C0"; + power-role =3D "dual"; + data-role =3D "dual"; + try-power-role =3D "sink"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + usb_0_con_hs: endpoint { + remote-endpoint =3D <&usb_0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + usb_0_con_ss: endpoint { + remote-endpoint =3D <&usb_0_qmpphy_usb_ss_out>; + }; + }; + }; + }; + }; +}; + +&pmau0102_i_gpios { + usb_pd_int_default: usb-pd-int-state { + pins =3D "gpio8"; + function =3D "normal"; + input-enable; + bias-pull-up; + power-source =3D <0>; + }; +}; + &qupv3_0 { firmware-name =3D "qcom/nord/qupv3fw.elf"; =20 @@ -459,3 +556,75 @@ &ufs_mem_phy { =20 status =3D "okay"; }; + +&usb_0 { + dr_mode =3D "otg"; + usb-role-switch; + + status =3D "okay"; +}; + +&usb_0_dwc3_hs { + remote-endpoint =3D <&usb_0_con_hs>; +}; + +&usb_0_hsphy { + vdd-supply =3D <&vreg_l1h_0p9>; + vdda12-supply =3D <&vreg_l2h_1p2>; + + phys =3D <&usb0_repeater>; + + status =3D "okay"; +}; + +&usb_0_qmpphy { + vdda-phy-supply =3D <&vreg_l2k_0p9>; + vdda-pll-supply =3D <&vreg_l2h_1p2>; + + status =3D "okay"; +}; + +&usb_0_qmpphy_usb_ss_out { + remote-endpoint =3D <&usb_0_con_ss>; +}; + +&usb_1 { + dr_mode =3D "host"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + status =3D "okay"; + + hub_hs: hub@1 { + compatible =3D "usb5e3,610"; + reg =3D <1>; + reset-gpios =3D <&tlmm 170 GPIO_ACTIVE_LOW>; + vdd-supply =3D <&vreg_per_3p3>; + peer-hub =3D <&hub_ss>; + }; + + hub_ss: hub@2 { + compatible =3D "usb5e3,625"; + reg =3D <2>; + vdd-supply =3D <&vreg_per_3p3>; + vdd12-supply =3D <&vreg_hub_1p2>; + peer-hub =3D <&hub_hs>; + }; +}; + +&usb_1_hsphy { + vdd-supply =3D <&vreg_l1h_0p9>; + vdda12-supply =3D <&vreg_l2h_1p2>; + + phys =3D <&usb1_repeater>; + + status =3D "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply =3D <&vreg_l2k_0p9>; + vdda-pll-supply =3D <&vreg_l2h_1p2>; + + status =3D "okay"; +}; --=20 2.43.0 From nobody Fri Sep 25 13:55:22 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EC0D3624DE for ; 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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 00721157ae682-884895001fasm10483237b3.45.2026.09.11.07.21.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 07:21:25 -0700 (PDT) From: Shawn Guo To: Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Krishna Kurapati , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo Subject: [PATCH 5/5] arm64: dts: qcom: nord-ride-embedded: Enable USB ports Date: Fri, 11 Sep 2026 22:20:40 +0800 Message-ID: <20260911142040.100263-6-shengchao.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> References: <20260911142040.100263-1-shengchao.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=Bv8IUoX5 c=1 sm=1 tr=0 ts=6aa40e67 cx=c_pps a=ngMg22mHWrP7m7pwYf9JkA==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=4Y2rR0LANONTutHxYfcA:9 a=yHXA93iunegOHmWoMUFd:22 X-Proofpoint-GUID: s61OGswOdVWLQcIchelq5bRnAy8SCTVB X-Proofpoint-Spam-Info: AW1haW4tMjYwOTExMDIwMSBTYWx0ZWRfX2AKSmt39eodt bvH5zBl/So+BBs2I4YbA8HpxZnq+3tcPuBt7kFj5piFSjniPx6JSw7Iz62mTYgj7RNGr+6riRKI vjhoQJxZ1AQScGg9sUXZ2aUKZT4cBM8= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTExMDIwMSBTYWx0ZWRfXxsovBk+EBdeL /X9leqNzFASOW6T6TWT/GOL8fGfhaEryCIFGvG5ntuWS88v/uw7Q7YPoyp6glpOHdcqzBEzdApA Rsfo3IsOLe2s9qyGevqDMmCyTdNTQPD5CVOrtR/1GJibsw5yJ9ecUgam71igFmCnR/rzE6KZztJ kHt61TgXK3ICDKJL5E5yxOnm1/AsouiuMbungdvFLcNLsMKqAAJNWetbicWo/K4tYcqJnyKVyps 6okVCHWt81ldGOLZbmJZKTVvhivl+bZZD4iTaCb0p8cT3E8eu2m0OxgUkb9wyKaWxlvccQ1BL2K c7TL+VC05nfJH8iMU771TfCwsZ3hf2H2jmSwNOi0o6esz1nPbD5rsgThNFTwGtjRmxMcNRK5Nwd ej9DNvV6WVyJzgdfXDfoFexpxl1ppT2vYhS6f0Vv7baWvsREZ/HrY94iz+Npf96qM0A1m46WCXG +dhtl9f3VHD4l4ScuOQ== X-Proofpoint-ORIG-GUID: s61OGswOdVWLQcIchelq5bRnAy8SCTVB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-11_04,2026-09-11_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 priorityscore=1501 phishscore=0 impostorscore=0 adultscore=0 clxscore=1015 spamscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609110201 Content-Type: text/plain; charset="utf-8" Wire up the board specific pieces for USB ports. Enable i2c9 and add the three NXP PTN3222 eUSB2 repeaters (one per USB port) with their 1.8 V supply and reset GPIOs on the PMIC GPIO expanders. Add the onsemi FUSB15201 dual port Type-C controller at 0x50, with its interrupt and pinctrl state on pmau0102_i gpio8. Both controller ports are wired on this board, so describe two usb-c-connector children and cross-link their HS and SS endpoints to the dwc3 HS endpoint and the QMP combo PHY SS output of USB_0 and USB_1. Both controllers therefore run in OTG mode with usb-role-switch. USB_2 has no Type-C connector, so it is configured as a fixed host port. Its VBUS is supplied by a fixed regulator gated by pmau0102_h gpio3, kept always-on since nothing switches it at runtime. Assisted-by: LLM Signed-off-by: Shawn Guo Reviewed-by: Abel Vesa --- .../boot/dts/qcom/nord-ride-embedded.dts | 211 ++++++++++++++++++ 1 file changed, 211 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts b/arch/arm64/b= oot/dts/qcom/nord-ride-embedded.dts index 09ee525764ef..f225c6d39b0a 100644 --- a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts +++ b/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts @@ -6,6 +6,7 @@ /dts-v1/; =20 #include +#include #include =20 #include "nord-embedded.dtsi" @@ -53,6 +54,24 @@ bi_tcxo_ao_div2: bi-tcxo-ao-div2-clk { clock-div =3D <2>; }; }; + + vreg_per_3p3: regulator-per-3p3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_per_3p3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + + regulator-usb2-vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "usb2_vbus"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&pmau0102_h_gpios 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; }; =20 &apps_rsc { @@ -366,6 +385,121 @@ vreg_l3l_1p8: ldo3 { }; }; =20 +&i2c9 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + usb0_repeater: redriver@43 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x43>; + #phy-cells =3D <0>; + vdd1v8-supply =3D <&vreg_l3l_1p8>; + vdd3v3-supply =3D <&vreg_per_3p3>; + reset-gpios =3D <&pmau0102_i_gpios 9 GPIO_ACTIVE_LOW>; + }; + + usb2_repeater: redriver@47 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x47>; + #phy-cells =3D <0>; + vdd1v8-supply =3D <&vreg_l3l_1p8>; + vdd3v3-supply =3D <&vreg_per_3p3>; + reset-gpios =3D <&pmau0102_l_gpios 3 GPIO_ACTIVE_LOW>; + }; + + usb1_repeater: redriver@4f { + compatible =3D "nxp,ptn3222"; + reg =3D <0x4f>; + #phy-cells =3D <0>; + vdd1v8-supply =3D <&vreg_l3l_1p8>; + vdd3v3-supply =3D <&vreg_per_3p3>; + reset-gpios =3D <&pmau0102_i_gpios 10 GPIO_ACTIVE_LOW>; + }; + + typec@50 { + compatible =3D "onnn,fusb15201"; + reg =3D <0x50>; + interrupts-extended =3D <&pmau0102_i_gpios 8 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-0 =3D <&usb_pd_int_default>; + pinctrl-names =3D "default"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + label =3D "USB-C0"; + power-role =3D "dual"; + data-role =3D "dual"; + try-power-role =3D "sink"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + usb_0_con_hs: endpoint { + remote-endpoint =3D <&usb_0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + usb_0_con_ss: endpoint { + remote-endpoint =3D <&usb_0_qmpphy_usb_ss_out>; + }; + }; + }; + }; + + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + label =3D "USB-C1"; + power-role =3D "dual"; + data-role =3D "dual"; + try-power-role =3D "sink"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + usb_1_con_hs: endpoint { + remote-endpoint =3D <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + usb_1_con_ss: endpoint { + remote-endpoint =3D <&usb_1_qmpphy_usb_ss_out>; + }; + }; + }; + }; + }; +}; + +&pmau0102_i_gpios { + usb_pd_int_default: usb-pd-int-state { + pins =3D "gpio8"; + function =3D "normal"; + input-enable; + bias-pull-up; + power-source =3D <0>; + }; +}; + &qupv3_0 { firmware-name =3D "qcom/nord/qupv3fw.elf"; =20 @@ -440,3 +574,80 @@ &ufs_mem_phy { =20 status =3D "okay"; }; + +&usb_0 { + dr_mode =3D "otg"; + usb-role-switch; + + status =3D "okay"; +}; + +&usb_0_dwc3_hs { + remote-endpoint =3D <&usb_0_con_hs>; +}; + +&usb_0_hsphy { + vdd-supply =3D <&vreg_l1h_0p9>; + vdda12-supply =3D <&vreg_l2h_1p2>; + + phys =3D <&usb0_repeater>; + + status =3D "okay"; +}; + +&usb_0_qmpphy { + vdda-phy-supply =3D <&vreg_l2k_0p9>; + vdda-pll-supply =3D <&vreg_l2h_1p2>; + + status =3D "okay"; +}; + +&usb_0_qmpphy_usb_ss_out { + remote-endpoint =3D <&usb_0_con_ss>; +}; + +&usb_1 { + dr_mode =3D "otg"; + usb-role-switch; + + status =3D "okay"; +}; + +&usb_1_dwc3_hs { + remote-endpoint =3D <&usb_1_con_hs>; +}; + +&usb_1_hsphy { + vdd-supply =3D <&vreg_l1h_0p9>; + vdda12-supply =3D <&vreg_l2h_1p2>; + + phys =3D <&usb1_repeater>; + + status =3D "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply =3D <&vreg_l2k_0p9>; + vdda-pll-supply =3D <&vreg_l2h_1p2>; + + status =3D "okay"; +}; + +&usb_1_qmpphy_usb_ss_out { + remote-endpoint =3D <&usb_1_con_ss>; +}; + +&usb_2 { + dr_mode =3D "host"; + + status =3D "okay"; +}; + +&usb_2_hsphy { + vdd-supply =3D <&vreg_l1h_0p9>; + vdda12-supply =3D <&vreg_l2h_1p2>; + + phys =3D <&usb2_repeater>; + + status =3D "okay"; +}; --=20 2.43.0