From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C47645560F; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; b=VYb7yaa8SBCVNDxXvbLhL3EgfusAom/9dwZO0XUpDWRHiUMuROuGSMh6sDGlsMbD/oo6UxeaQH0L1p9PMlquL+GyAqkDFKkyMPdqdt32GyJuHWl54ybazxl4Qif5iz+2ypGNAvUwSKN4IdH9lWywKL0/j0h8e0mRS+SZroJ+62c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; c=relaxed/simple; bh=Hp6Oz9sNuMG2k+i7B0+dNTO/+y2pO5GzZRg3Z2yhjLs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=L3DqBWRlzNCGy03BZWMX4Ph6JuZ+eSmjRXy4dyi+rUGUUJXR3KXomXlje9AN9ldKRtoiR6RT5tpgohAKPgeYGpBAn9XDUqoa2MygMFX7zlRcu957Hrw30RpkY0saTcD682B4/gQIXfcwmFjUzT4UloScgc/5A90C+8UkWmZhWww= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=q9GqzSFT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="q9GqzSFT" Received: by smtp.kernel.org (Postfix) with ESMTPS id D35EEC2BCF4; Fri, 11 Sep 2026 08:28:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789115331; bh=Hp6Oz9sNuMG2k+i7B0+dNTO/+y2pO5GzZRg3Z2yhjLs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=q9GqzSFT0gRvLjCZlMLX3TC0aec6jJEz3OMwX+UhLYI/Tk+uk2LUgMD9kv4Rz9SWQ XIjUYilEcjWvTwD4y/z85cjpupr+SRXnJyoQKNWboseeQ1lKAgkwhV63DI856DlwYL h/gBcLFvZCopvI/sd2utpXA2bJbayJ2vmJmcT5s0rKd7VlFmAWMFJTTb76lN+Ibfyq Oncb9aELeKMdj53gGRoI+uV6s9XGdVBPpbjMiPVKbz3NxmRMzHR8k3239LcjKn+idY GttkDwNVNg6YM4BjBKBsqzCBy2SuumX8hev0xLtJ3C1nBZlJVoCYKKSJ+rgOxnLv8I QeGUdwogFUiYA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id B40E9C79FA1; Fri, 11 Sep 2026 08:28:51 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 11 Sep 2026 16:28:28 +0800 Subject: [PATCH 01/10] dt-bindings: soc: amlogic: Add compatible to support more SoCs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-1-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=1253; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=cohyDpjVw0jD9doFV5tm/XEidv0ja/sUaS7qt5A3x+8=; b=+zRqxruOYTQd2GWbHMyhce6LqqsCixdgV8s7tFf1e7uXuhtRdOC4Qbns3oWiIJK2gcihR6bq4 IhjH2to1X/2CqUefRZCrhxwbaNuxHIzjijPh9TGjnL5GH1DbkKXt/oJ X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add clk-measure compatible for amlogic A5, A4, S7, S7D, S6 and A9 SoCs. Although the clk-measure IP itself has little hardware difference across SoCs, the clock inputs connected to the clk-measure block vary between SoCs. Therefore, it is difficult to fall back to the configuration used by previous SoCs. Signed-off-by: Chuan Liu --- .../bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 6 ++= ++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx= -clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,m= eson-gx-clk-measure.yaml index b1200e6940ac..125be01e3b2c 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml @@ -26,6 +26,12 @@ properties: - amlogic,s4-clk-measure - amlogic,a1-clk-measure - amlogic,t7-clk-measure + - amlogic,a5-clk-measure + - amlogic,a4-clk-measure + - amlogic,s7-clk-measure + - amlogic,s7d-clk-measure + - amlogic,s6-clk-measure + - amlogic,a9-clk-measure =20 reg: maxItems: 1 --=20 2.42.0 From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C3153B47D5; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; b=HxJsTLBi0ssMV9uZmWb5U3MOB70QVlYxK+w8rrEhwmm2apLDuxaz2Ik9hb+kxHaOd/1zf6gnczL8tZ1lkCdh1Ixof1UaET3HjG/pU4TEGrQQAfyrnwbUoOyGjYaCuaBrhADHeE57n9bcc1QDF42xpoW+qCE6y0EGmk4Mdx8NByY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; c=relaxed/simple; bh=DiPGG6/1y2xmrETzC91peDuTfVXoxRXsfQ56MzCZN9c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MwiyetUjQAZNU/TWPS8LBxFwPStNK5IbIsSSKF4cSkzHJSzEYfSdShnCK+sS6QaGFja/Nv25U7OU8Td+54CykHQjxzI7/vk0e8cNcJ1ID+YcTiL52Jr/Nzz9Bz8EDR1M2bDJ3I16pG080lTtwvlcXwroTlH1FJYDjQEbL7nGX7s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eofex1EY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eofex1EY" Received: by smtp.kernel.org (Postfix) with ESMTPS id E0FECC2BCFB; Fri, 11 Sep 2026 08:28:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789115332; bh=DiPGG6/1y2xmrETzC91peDuTfVXoxRXsfQ56MzCZN9c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=eofex1EYc4oqSgx/4d58E0WLp/L067GHsx9erfSBOfnH1liGDTxjEdex2pgV5BbAJ aVia89N4jfwihLXA4kKWdxYcnUY3mBbIWAJxlu0QYImFiSap6Zbm4VUpRYhdUY5yV0 uksOYtT4KKGOHU4C6KN1gF71RpQ5umL1uDFOn/Y9nLnNA1ZKei600idSSfFv1azyTb odeHrZ5T5C8FBkJOQIF1IcZ/vJppmRnqi8xiJuTMbA0JfMM8ghDllpzosQVLCgQ4RX R3xYvQ1UpyL9XuEwwsHHPZlDKyMvakuyYcmvl2zZnquHhHMK19fg45kjJVWSfNqpy8 7s/zeBozfP+Sw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2DE8C88E4C; Fri, 11 Sep 2026 08:28:51 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 11 Sep 2026 16:28:29 +0800 Subject: [PATCH 02/10] soc: amlogic: clk-measure: Support more measurement channels Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-2-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=1344; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=e2ydz5bLAgoXoKx1id6ARA1Qq/OeV3kWw0wR36wz9Ks=; b=Ni8daolTgIdg3jAm0A8kb0WCYbrmYnKh/C3NyycRuAnk8bFEMRQ6GS22kUNk1VOvJlgWA3y18 cdffAlfZX26DHdr5MIXWfOtqEv7rTZiJaU19Ci0uE2qA1MwYsQf5+7n X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu On S4 and C3, as well as later SoCs, the clk-measure IP expands the number of supported measurement channels from 128 to 256. Accordingly, the MSR_CLK_SRC field in the register is extended from 7 bits to 8 bits. To support both the old and new implementations, the driver now uniformly defines the valid MSR_CLK_SRC field as bits[27:20]. For SoCs where MSR_CLK_SRC is only 7 bits wide, the driver never sets bit27, and on those SoCs bit27 is read-only. Therefore, using bits[27:20] as the unified field definition does not introduce any behavioral change or compatibility issue for existing SoCs. Signed-off-by: Chuan Liu --- drivers/soc/amlogic/meson-clk-measure.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index 8a1a9fed0e74..0d4ba2555d17 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -20,7 +20,7 @@ static DEFINE_MUTEX(measure_lock); #define MSR_CONT BIT(17) /* continuous measurement */ #define MSR_INTR BIT(18) /* interrupts */ #define MSR_RUN BIT(19) -#define MSR_CLK_SRC GENMASK(26, 20) +#define MSR_CLK_SRC GENMASK(27, 20) #define MSR_BUSY BIT(31) =20 #define MSR_VAL_MASK GENMASK(15, 0) --=20 2.42.0 From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C657456291; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; b=EaiXGNK6Ew0qPCntPPIe0bsctTnGNyGzcrXFwWf+eDvKgiUu20wLOheRCt/PEjYZhd70867Jd23B3Bm7ERbqlKXA7E4QB6qSxCH02SAiS9VuQqJAJX3TWScHG5L0YBJOrdinDuwoI0WAc9butkiS1BVJN79rfQy8l29YNnlICwg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; c=relaxed/simple; bh=eJkqtBGQ/7TKhSCuMCycIghkCs+WlIRU8wV/kylkqvQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EKZmlo9qFrYsThZ/81txnI2dwlI/o9yUOrMZUx4PYxZuj++YVD/0mHwV2vdAAk6e6HL3bzqT5+pTaa+hpYtgp77WG8ARsCmXod8LEgyBaSZx4PS2/LJa7jqL5jeJYk4uaCNUwYCxfYgyakRP2whahIvBuWxUKVqnQSiSYd6yRoI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=aAI6BryJ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="aAI6BryJ" Received: by smtp.kernel.org (Postfix) with ESMTPS id EF9BDC2BCFC; Fri, 11 Sep 2026 08:28:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789115332; bh=eJkqtBGQ/7TKhSCuMCycIghkCs+WlIRU8wV/kylkqvQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=aAI6BryJUPIiv6kE6FVtm6r/i/6vRBD+9/E/SI+03QFxi3Jyy5jkPuhbbvDBRQvzz PwwRSqzRId00PBdVEQ0v4far5MGe8LAu32XIWmZS2Xdw7iHZfP+r7/aD5hIXD2L8f3 DrOGW+Os/y/G/DCe5p3M9ShL+QJISLVgbSMpwEMRr0FX6OzrFyhBo9H+Mql3qW/krp 9sRwA9lRX02fUH78A7kZ3MEclf/WmSWlNosCRQnGqCeH6SJ4b++jwWpQFUM6cg2G7P 230djhcyKYLFTWZ1/xuMLozusZVAKc3M+ueswxp6JIbxK6MIh8zoRoH5n3keoVme9V vPdKA3QmbQ2hw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D56A5C88E53; Fri, 11 Sep 2026 08:28:51 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 11 Sep 2026 16:28:30 +0800 Subject: [PATCH 03/10] soc: amlogic: clk-measure: Add support for more SoCs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-3-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=33166; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=yR422cl1cnn4YUORmCTCPG3/1J3UWU66a190i6ETbFo=; b=qvv3xJlKqnUfyVGvxIVxiUu6RuMXe01x5zmTD8PrlcIkfOthn5iq+xjM9PRFMe+V5giqUSuPL iHc5qsIR+c/BmYC8alsYUXuPX8wC/cpu7GrmrgQ0oxDD4V/YEG+dadW X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add clk-measure driver support for Amlogic A5, A4, S7, S7D, S6 and A9 SoCs. Signed-off-by: Chuan Liu --- drivers/soc/amlogic/meson-clk-measure.c | 897 ++++++++++++++++++++++++++++= ++++ 1 file changed, 897 insertions(+) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index 0d4ba2555d17..671e0c3753de 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -1041,6 +1041,843 @@ static const struct meson_msr_id clk_msr_t7[] =3D { CLK_MSR_ID(222, "enc0") }; =20 +static const struct meson_msr_id clk_msr_a5[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(3, "dspa"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(11, "mpll0"), + CLK_MSR_ID(12, "mpll1"), + CLK_MSR_ID(13, "mpll2"), + CLK_MSR_ID(14, "mpll3"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(16, "sys_oscin32k_i"), + CLK_MSR_ID(17, "rtc_pll"), + CLK_MSR_ID(18, "mpll_clk_test_out"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "gp1_pll"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "nna_axi"), + CLK_MSR_ID(26, "nna_core"), + CLK_MSR_ID(27, "rtc_sec_pulse_out"), + CLK_MSR_ID(28, "rtc_osc_clk_out"), + CLK_MSR_ID(30, "mod_eth_phy_ref_clk"), + CLK_MSR_ID(31, "mod_eth_tx_clk"), + CLK_MSR_ID(35, "mod_eth_rx_clk_rmii"), + CLK_MSR_ID(79, "rama_clk"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(112, "ts"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "spicc1"), + CLK_MSR_ID(118, "spicc0"), + CLK_MSR_ID(119, "o_mst_sclk_vad"), + CLK_MSR_ID(120, "o_mst_mclk_vad"), + CLK_MSR_ID(121, "o_pdm_sysclk"), + CLK_MSR_ID(122, "mod_audio_pdm_dclk_o"), + CLK_MSR_ID(123, "o_vad_clk"), + CLK_MSR_ID(124, "earcrx_dmac_clk"), + CLK_MSR_ID(125, "earcrx_cmdc_clk"), + CLK_MSR_ID(126, "earctx_dmac_clk"), + CLK_MSR_ID(127, "earctx_cmdc_clk"), + CLK_MSR_ID(128, "tohdmitx_bclk"), + CLK_MSR_ID(129, "tohdmitx_mclk"), + CLK_MSR_ID(130, "tohdmitx_spdif_clk"), + CLK_MSR_ID(131, "toacodec_bclk"), + CLK_MSR_ID(132, "toacodec_mclk"), + CLK_MSR_ID(133, "spdifout_b_mst_clk"), + CLK_MSR_ID(134, "spdifout_mst_clk"), + CLK_MSR_ID(135, "spdifin_mst_clk"), + CLK_MSR_ID(136, "audio_mclk"), + CLK_MSR_ID(137, "vad_clk"), + CLK_MSR_ID(138, "tdmout_d_sclk"), + CLK_MSR_ID(139, "tdmout_c_sclk"), + CLK_MSR_ID(140, "tdmout_b_sclk"), + CLK_MSR_ID(141, "tdmout_a_sclk"), + CLK_MSR_ID(142, "tdminb_lb_sclk"), + CLK_MSR_ID(143, "tdmin_lb_sclk"), + CLK_MSR_ID(144, "tdmin_d_sclk"), + CLK_MSR_ID(145, "tdmin_c_sclk"), + CLK_MSR_ID(146, "tdmin_b_sclk"), + CLK_MSR_ID(147, "tdmin_a_sclk"), + CLK_MSR_ID(148, "resampleb_clk"), + CLK_MSR_ID(149, "resamplea_clk"), + CLK_MSR_ID(150, "pdmb_sysclk"), + CLK_MSR_ID(151, "pdmb_dclk"), + CLK_MSR_ID(152, "pdm_sysclk"), + CLK_MSR_ID(153, "pdm_dclk"), + CLK_MSR_ID(154, "alockerb_out_clk"), + CLK_MSR_ID(155, "alockerb_in_clk"), + CLK_MSR_ID(156, "alocker_out_clk"), + CLK_MSR_ID(157, "alocker_in_clk"), + CLK_MSR_ID(158, "audio_mst_clk[34]"), + CLK_MSR_ID(159, "audio_mst_clk[35]"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(176, "rng_ring_osc_clk[0]"), + CLK_MSR_ID(177, "rng_ring_osc_clk[1]"), + CLK_MSR_ID(178, "rng_ring_osc_clk[2]"), + CLK_MSR_ID(179, "rng_ring_osc_clk[3]"), + CLK_MSR_ID(180, "dmc_osc_ring(LVT16)"), + CLK_MSR_ID(181, "dsp_osc_ring(SVT16)"), + CLK_MSR_ID(182, "axi_srama_osc_ring(SVT16)"), + CLK_MSR_ID(183, "nna_osc_ring[0](ULVT20)"), + CLK_MSR_ID(184, "nna_osc_ring[1](LVT16)"), + CLK_MSR_ID(185, "sys_cpu_osc_ring[0](ULVT16)"), + CLK_MSR_ID(186, "sys_cpu_osc_ring[1](ULVT20)"), + CLK_MSR_ID(187, "sys_cpu_osc_ring[2](ULVT16)"), + CLK_MSR_ID(188, "sys_cpu_osc_ring[3](LVT16)"), + CLK_MSR_ID(189, "axi_sramb_osc_ring(SVT16)"), +}; + +static const struct meson_msr_id clk_msr_a4[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(3, "p22_usb2_ckout"), + CLK_MSR_ID(4, "p21_usb2_ckout"), + CLK_MSR_ID(5, "p20_usb2_ckout"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(8, "eth_mpll_test"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(16, "sys_oscin32k_i"), + CLK_MSR_ID(17, "rtc_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "gp1_pll"), + CLK_MSR_ID(22, "eth_mppll_50m_ckout"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(27, "rtc_sec_pulse_out"), + CLK_MSR_ID(28, "rtc_osc_clk_out"), + CLK_MSR_ID(30, "mod_eth_phy_ref_clk"), + CLK_MSR_ID(31, "mod_eth_tx_clk"), + CLK_MSR_ID(32, "eth_125m"), + CLK_MSR_ID(33, "eth_rmii"), + CLK_MSR_ID(34, "co_clkin_to_mac"), + CLK_MSR_ID(35, "mod_eth_rx_clk_rmii"), + CLK_MSR_ID(36, "co_rx_clk"), + CLK_MSR_ID(37, "co_tx_clk"), + CLK_MSR_ID(38, "eth_phy_rxclk"), + CLK_MSR_ID(39, "eth_phy_plltxclk"), + CLK_MSR_ID(40, "ephy_test_clk"), + CLK_MSR_ID(41, "audio_core"), + CLK_MSR_ID(51, "cts_vout_venc_clk_ph"), + CLK_MSR_ID(52, "cts_vout_venc_clk"), + CLK_MSR_ID(106, "deskew_pll_test_clk"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(112, "ts"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "spicc1"), + CLK_MSR_ID(118, "spicc0"), + CLK_MSR_ID(119, "o_mst_sclk_vad"), + CLK_MSR_ID(120, "o_mst_mclk_vad"), + CLK_MSR_ID(121, "o_pdm_sysclk"), + CLK_MSR_ID(122, "mod_audio_pdm_dclk_o"), + CLK_MSR_ID(123, "o_vad_clk"), + CLK_MSR_ID(124, "earcrx_dmac_clk"), + CLK_MSR_ID(125, "earcrx_cmdc_clk"), + CLK_MSR_ID(126, "earctx_dmac_clk"), + CLK_MSR_ID(127, "earctx_cmdc_clk"), + CLK_MSR_ID(128, "tohdmitx_bclk"), + CLK_MSR_ID(129, "tohdmitx_mclk"), + CLK_MSR_ID(130, "tohdmitx_spdif_clk"), + CLK_MSR_ID(131, "toacodec_bclk"), + CLK_MSR_ID(132, "toacodec_mclk"), + CLK_MSR_ID(133, "spdifout_b_mst_clk"), + CLK_MSR_ID(134, "spdifout_mst_clk"), + CLK_MSR_ID(135, "spdifin_mst_clk"), + CLK_MSR_ID(136, "audio_mclk"), + CLK_MSR_ID(137, "vad_clk"), + CLK_MSR_ID(138, "tdmout_d_sclk"), + CLK_MSR_ID(139, "tdmout_c_sclk"), + CLK_MSR_ID(140, "tdmout_b_sclk"), + CLK_MSR_ID(141, "tdmout_a_sclk"), + CLK_MSR_ID(142, "tdminb_lb_sclk"), + CLK_MSR_ID(143, "tdmin_lb_sclk"), + CLK_MSR_ID(144, "tdmin_d_sclk"), + CLK_MSR_ID(145, "tdmin_c_sclk"), + CLK_MSR_ID(146, "tdmin_b_sclk"), + CLK_MSR_ID(147, "tdmin_a_sclk"), + CLK_MSR_ID(148, "resampleb_clk"), + CLK_MSR_ID(149, "resamplea_clk"), + CLK_MSR_ID(150, "pdmb_sysclk"), + CLK_MSR_ID(151, "pdmb_dclk"), + CLK_MSR_ID(152, "pdm_sysclk"), + CLK_MSR_ID(153, "pdm_dclk"), + CLK_MSR_ID(154, "alockerb_out_clk"), + CLK_MSR_ID(155, "alockerb_in_clk"), + CLK_MSR_ID(156, "alocker_out_clk"), + CLK_MSR_ID(157, "alocker_in_clk"), + CLK_MSR_ID(158, "audio_mst_clk[34]"), + CLK_MSR_ID(159, "audio_mst_clk[35]"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(170, "AU_ADC_CLK_G128X"), + CLK_MSR_ID(171, "AU_ADC_CLK_TO_GPIO"), + CLK_MSR_ID(172, "AU_DAC1_CLK_G128X"), + CLK_MSR_ID(173, "AU_DAC1_CLK_TO_GPIO"), + CLK_MSR_ID(176, "rng_ring_osc_clk[0]"), + CLK_MSR_ID(177, "rng_ring_osc_clk[1]"), + CLK_MSR_ID(178, "rng_ring_osc_clk[2]"), + CLK_MSR_ID(179, "rng_ring_osc_clk[3]"), + CLK_MSR_ID(180, "sys_cpu_osc_ring[0](ULVT16)"), + CLK_MSR_ID(181, "sys_cpu_osc_ring[1](ULVT20)"), + CLK_MSR_ID(182, "sys_cpu_osc_ring[2](ULVT16)"), + CLK_MSR_ID(183, "sys_cpu_osc_ring[3](ULVT16)"), + CLK_MSR_ID(184, "sys_cpu_osc_ring[4](ULVT16)"), + CLK_MSR_ID(185, "am_ring_osc_clk_out_top[0](SVT16)"), + CLK_MSR_ID(186, "am_ring_osc_clk_out_top[1](LVT20)"), +}; + +static const struct meson_msr_id clk_msr_s7[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(5, "mali"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(8, "cecb"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(11, "p21_usb2_ckout"), + CLK_MSR_ID(12, "p20_usb2_ckout"), + CLK_MSR_ID(13, "eth_mpll_test"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(18, "gp1_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "hifi1_pll"), + CLK_MSR_ID(22, "eth_mppll_50m_ckout"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "mod_Tsin_A_CLK_IN"), + CLK_MSR_ID(32, "eth_125m"), + CLK_MSR_ID(33, "eth_rmii"), + CLK_MSR_ID(34, "co_clkin_to_mac"), + CLK_MSR_ID(36, "co_rx_clk"), + CLK_MSR_ID(37, "co_tx_clk"), + CLK_MSR_ID(38, "eth_phy_rxclk"), + CLK_MSR_ID(39, "eth_phy_plltxclk"), + CLK_MSR_ID(40, "ephy_test_clk"), + CLK_MSR_ID(49, "hdmi_vx1_pix_clk"), + CLK_MSR_ID(50, "vid_pll"), + CLK_MSR_ID(51, "enci"), + CLK_MSR_ID(52, "encp"), + CLK_MSR_ID(53, "encl"), + CLK_MSR_ID(54, "vdac"), + CLK_MSR_ID(55, "cdac"), + CLK_MSR_ID(57, "lcd_an_clk_ph2"), + CLK_MSR_ID(58, "lcd_an_clk_ph3"), + CLK_MSR_ID(59, "hdmitx_pixel"), + CLK_MSR_ID(60, "vdin_meas"), + CLK_MSR_ID(61, "vpu"), + CLK_MSR_ID(62, "vpu_clkb"), + CLK_MSR_ID(63, "vpu_clkb_tmp"), + CLK_MSR_ID(64, "vpu_clkc"), + CLK_MSR_ID(65, "vid_lock"), + CLK_MSR_ID(66, "vapb"), + CLK_MSR_ID(67, "ge2d"), + CLK_MSR_ID(76, "hdmitx_tmds"), + CLK_MSR_ID(77, "hdmitx_sys"), + CLK_MSR_ID(78, "hdmitx_fe"), + CLK_MSR_ID(80, "hdmitx_prif"), + CLK_MSR_ID(81, "hdmitx_200m"), + CLK_MSR_ID(82, "hdmitx_aud"), + CLK_MSR_ID(84, "audio_tohdmitx_mclk"), + CLK_MSR_ID(85, "audio_tohdmitx_bclk"), + CLK_MSR_ID(86, "audio_tohdmitx_lrclk"), + CLK_MSR_ID(87, "audio_tohdmitx_spdif_clk"), + CLK_MSR_ID(88, "htx_aes_clk"), + CLK_MSR_ID(93, "vdec"), + CLK_MSR_ID(99, "hevcf"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(110, "sc"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(114, "sd_emmc_b"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(118, "spicc"), + CLK_MSR_ID(121, "ts"), + CLK_MSR_ID(130, "o_vad_clk"), + CLK_MSR_ID(131, "au_dac_clk_x128"), + CLK_MSR_ID(132, "audio_locker_in_clk"), + CLK_MSR_ID(133, "audio_locker_out_clk"), + CLK_MSR_ID(134, "audio_tdmout_c_sclk"), + CLK_MSR_ID(135, "audio_tdmout_b_sclk"), + CLK_MSR_ID(136, "audio_tdmout_a_sclk"), + CLK_MSR_ID(137, "audio_tdmin_lb_sclk"), + CLK_MSR_ID(138, "audio_tdmin_c_sclk"), + CLK_MSR_ID(139, "audio_tdmin_b_sclk"), + CLK_MSR_ID(140, "audio_tdmin_a_sclk"), + CLK_MSR_ID(141, "audio_resamplea_clk"), + CLK_MSR_ID(142, "audio_pdm_sysclk"), + CLK_MSR_ID(143, "audio_spdifout_b_mst_clk"), + CLK_MSR_ID(144, "audio_spdifout_mst_clk"), + CLK_MSR_ID(145, "audio_spdifin_mst_clk"), + CLK_MSR_ID(147, "audio_resampleb_clk"), + CLK_MSR_ID(160, "pwm_j"), + CLK_MSR_ID(161, "pwm_i"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(176, "rng_ring_clk[0]"), + CLK_MSR_ID(177, "rng_ring_clk[1]"), + CLK_MSR_ID(178, "rng_ring_clk[2]"), + CLK_MSR_ID(179, "rng_ring_clk[3]"), + CLK_MSR_ID(180, "osc_ring_clk[0](a55 core0 14_slvt)"), + CLK_MSR_ID(181, "osc_ring_clk[1](a55 core1 14_slvt)"), + CLK_MSR_ID(182, "osc_ring_clk[2](a55 core2 14_slvt)"), + CLK_MSR_ID(183, "osc_ring_clk[3](a55 core3 14_slvt)"), + CLK_MSR_ID(184, "osc_ring_clk[4](a55_pwr[0] 16_slvt)"), + CLK_MSR_ID(185, "osc_ring_clk[5](a55_pwr[1] 14_lvt)"), + CLK_MSR_ID(186, "osc_ring_clk[6](a55_pwr[2] 14_rvt)"), + CLK_MSR_ID(187, "osc_ring_clk[7](mali[1] 14_lvt)"), + CLK_MSR_ID(188, "osc_ring_clk[8](mali[1] 14_rvt)"), + CLK_MSR_ID(189, "osc_ring_clk[9](dos[0] 16_lvt)"), + CLK_MSR_ID(190, "osc_ring_clk[10](dos[1] 14_rvt)"), + CLK_MSR_ID(191, "osc_ring_clk[11](ddr[0] 9t_14_lvt)"), + CLK_MSR_ID(192, "osc_ring_clk[12](top[0] 16_rvt)"), +}; + +static const struct meson_msr_id clk_msr_s7d[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(4, "mali_stack"), + CLK_MSR_ID(5, "mali"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(8, "cecb"), + CLK_MSR_ID(9, "mali_aclkm"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(11, "p21_usb2_ckout"), + CLK_MSR_ID(12, "p20_usb2_ckout"), + CLK_MSR_ID(13, "eth_mpll_test"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(18, "gp1_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "hifi1_pll"), + CLK_MSR_ID(22, "eth_mppll_50m_ckout"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "mod_Tsin_A_CLK_IN"), + CLK_MSR_ID(26, "mod_Tsin_B_CLK_IN"), + CLK_MSR_ID(31, "earcrx_pll_clk_out"), + CLK_MSR_ID(32, "eth_125m"), + CLK_MSR_ID(33, "eth_rmii"), + CLK_MSR_ID(34, "co_clkin_to_mac"), + CLK_MSR_ID(36, "co_rx_clk"), + CLK_MSR_ID(37, "co_tx_clk"), + CLK_MSR_ID(38, "eth_phy_rxclk"), + CLK_MSR_ID(39, "eth_phy_plltxclk"), + CLK_MSR_ID(40, "ephy_test_clk"), + CLK_MSR_ID(49, "hdmi_vx1_pix_clk"), + CLK_MSR_ID(50, "vid_pll"), + CLK_MSR_ID(51, "enci"), + CLK_MSR_ID(52, "encp"), + CLK_MSR_ID(53, "encl"), + CLK_MSR_ID(54, "vdac"), + CLK_MSR_ID(55, "cdac"), + CLK_MSR_ID(57, "lcd_an_clk_ph2"), + CLK_MSR_ID(58, "lcd_an_clk_ph3"), + CLK_MSR_ID(59, "hdmitx_pixel"), + CLK_MSR_ID(60, "vdin_meas"), + CLK_MSR_ID(61, "vpu"), + CLK_MSR_ID(62, "vpu_clkb"), + CLK_MSR_ID(63, "vpu_clkb_tmp"), + CLK_MSR_ID(64, "vpu_clkc"), + CLK_MSR_ID(65, "vid_lock"), + CLK_MSR_ID(66, "vapb"), + CLK_MSR_ID(67, "ge2d"), + CLK_MSR_ID(76, "hdmitx_tmds"), + CLK_MSR_ID(77, "hdmitx_sys"), + CLK_MSR_ID(78, "hdmitx_fe"), + CLK_MSR_ID(80, "hdmitx_prif"), + CLK_MSR_ID(81, "hdmitx_200m"), + CLK_MSR_ID(82, "hdmitx_aud"), + CLK_MSR_ID(84, "audio_tohdmitx_mclk"), + CLK_MSR_ID(85, "audio_tohdmitx_bclk"), + CLK_MSR_ID(86, "audio_tohdmitx_lrclk"), + CLK_MSR_ID(87, "audio_tohdmitx_spdif_clk"), + CLK_MSR_ID(88, "htx_aes_clk"), + CLK_MSR_ID(89, "amfc"), + CLK_MSR_ID(93, "vdec"), + CLK_MSR_ID(97, "hcodec"), + CLK_MSR_ID(99, "hevcf"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(110, "sc"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(112, "aux_adc_clk_to_gpio"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(114, "sd_emmc_b"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "aux_clk_o"), + CLK_MSR_ID(118, "spicc"), + CLK_MSR_ID(121, "ts"), + CLK_MSR_ID(130, "o_vad_clk"), + CLK_MSR_ID(131, "au_dac_clk_x128"), + CLK_MSR_ID(132, "audio_locker_in_clk"), + CLK_MSR_ID(133, "audio_locker_out_clk"), + CLK_MSR_ID(134, "audio_tdmout_c_sclk"), + CLK_MSR_ID(135, "audio_tdmout_b_sclk"), + CLK_MSR_ID(136, "audio_tdmout_a_sclk"), + CLK_MSR_ID(137, "audio_tdmin_lb_sclk"), + CLK_MSR_ID(138, "audio_tdmin_c_sclk"), + CLK_MSR_ID(139, "audio_tdmin_b_sclk"), + CLK_MSR_ID(140, "audio_tdmin_a_sclk"), + CLK_MSR_ID(141, "audio_resamplea_clk"), + CLK_MSR_ID(142, "audio_pdm_sysclk"), + CLK_MSR_ID(143, "audio_spdifout_b_mst_clk"), + CLK_MSR_ID(144, "audio_spdifout_mst_clk"), + CLK_MSR_ID(145, "audio_spdifin_mst_clk"), + CLK_MSR_ID(146, "mod_audio_pdm_dclk_o"), + CLK_MSR_ID(147, "audio_resampleb_clk"), + CLK_MSR_ID(160, "pwm_j"), + CLK_MSR_ID(161, "pwm_i"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(176, "rng_ring_clk[0]"), + CLK_MSR_ID(177, "rng_ring_clk[1]"), + CLK_MSR_ID(178, "rng_ring_clk[2]"), + CLK_MSR_ID(179, "rng_ring_clk[3]"), + CLK_MSR_ID(180, "osc_ring_clk[0](a55 core0 14_slvt)"), + CLK_MSR_ID(181, "osc_ring_clk[1](a55 core1 14_slvt)"), + CLK_MSR_ID(182, "osc_ring_clk[2](a55 core2 14_slvt)"), + CLK_MSR_ID(183, "osc_ring_clk[3](a55 core3 14_slvt)"), + CLK_MSR_ID(184, "osc_ring_clk[4](a55_pwr[0] 16_slvt)"), + CLK_MSR_ID(185, "osc_ring_clk[5](a55_pwr[1] 14_lvt)"), + CLK_MSR_ID(186, "osc_ring_clk[6](a55_pwr[2] 14_rvt)"), + CLK_MSR_ID(187, "osc_ring_clk[7](mali[1] 14_lvt)"), + CLK_MSR_ID(188, "osc_ring_clk[8](mali[1] 14_rvt)"), + CLK_MSR_ID(189, "osc_ring_clk[9](dos[0] 16_lvt)"), + CLK_MSR_ID(190, "osc_ring_clk[10](dos[1] 14_rvt)"), + CLK_MSR_ID(191, "osc_ring_clk[11](ddr[0] 9t_14_lvt)"), + CLK_MSR_ID(192, "osc_ring_clk[12](top[0] 16_rvt)"), +}; + +static const struct meson_msr_id clk_msr_s6[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(3, "dspa"), + CLK_MSR_ID(4, "mali_stack"), + CLK_MSR_ID(5, "mali"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(7, "mali_aclkm"), + CLK_MSR_ID(8, "cecb"), + CLK_MSR_ID(9, "gp2_pll"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(11, "p21_usb2_ckout"), + CLK_MSR_ID(12, "p20_usb2_ckout"), + CLK_MSR_ID(13, "eth_mpll_test"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(18, "gp1_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "hifi1_pll"), + CLK_MSR_ID(22, "eth_mppll_50m_ckout"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "mod_Tsin_A_CLK_IN"), + CLK_MSR_ID(26, "ext_Tsin_B_CLK_IN"), + CLK_MSR_ID(27, "mod_Tsin_C_CLK_IN"), + CLK_MSR_ID(28, "mod_Tsin_D_CLK_IN"), + CLK_MSR_ID(29, "dsi_pll_div_clk_out"), + CLK_MSR_ID(30, "dsi_pll_clk"), + CLK_MSR_ID(32, "eth_125m"), + CLK_MSR_ID(33, "eth_rmii"), + CLK_MSR_ID(34, "co_clkin_to_mac"), + CLK_MSR_ID(36, "co_rx_clk"), + CLK_MSR_ID(37, "co_tx_clk"), + CLK_MSR_ID(38, "eth_phy_rxclk"), + CLK_MSR_ID(39, "eth_phy_plltxclk"), + CLK_MSR_ID(40, "ephy_test_clk"), + CLK_MSR_ID(49, "hdmi_vx1_pix_clk"), + CLK_MSR_ID(50, "vid_pll"), + CLK_MSR_ID(51, "enci"), + CLK_MSR_ID(52, "encp"), + CLK_MSR_ID(53, "encl"), + CLK_MSR_ID(54, "vdac"), + CLK_MSR_ID(55, "cdac"), + CLK_MSR_ID(57, "lcd_an_clk_ph2"), + CLK_MSR_ID(58, "lcd_an_clk_ph3"), + CLK_MSR_ID(59, "hdmitx_pixel"), + CLK_MSR_ID(60, "vdin_meas"), + CLK_MSR_ID(61, "vpu"), + CLK_MSR_ID(62, "vpu_clkb"), + CLK_MSR_ID(63, "vpu_clkb_tmp"), + CLK_MSR_ID(64, "vpu_clkc"), + CLK_MSR_ID(65, "vid_lock"), + CLK_MSR_ID(66, "vapb"), + CLK_MSR_ID(67, "ge2d"), + CLK_MSR_ID(70, "mipi_dsi_meas"), + CLK_MSR_ID(71, "mipi_dsi_phy"), + CLK_MSR_ID(72, "mipi_csi_phy"), + CLK_MSR_ID(73, "csi2_adapt"), + CLK_MSR_ID(74, "cts_csi2_data"), + CLK_MSR_ID(75, "mipi_csi_phy_out"), + CLK_MSR_ID(76, "hdmitx_tmds"), + CLK_MSR_ID(77, "hdmitx_sys"), + CLK_MSR_ID(78, "hdmitx_fe"), + CLK_MSR_ID(79, "rama_clk"), + CLK_MSR_ID(80, "hdmitx_prif"), + CLK_MSR_ID(81, "hdmitx_200m"), + CLK_MSR_ID(82, "hdmitx_aud"), + CLK_MSR_ID(84, "audio_tohdmitx_mclk"), + CLK_MSR_ID(85, "audio_tohdmitx_bclk"), + CLK_MSR_ID(86, "audio_tohdmitx_lrclk"), + CLK_MSR_ID(87, "audio_tohdmitx_spdif_clk"), + CLK_MSR_ID(88, "htx_aes_clk"), + CLK_MSR_ID(89, "amfc"), + CLK_MSR_ID(93, "vdec"), + CLK_MSR_ID(99, "hevcf"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(108, "cmpr"), + CLK_MSR_ID(109, "dewarpa"), + CLK_MSR_ID(110, "sc"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(114, "sd_emmc_b"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "aux_clk_o"), + CLK_MSR_ID(118, "spicc"), + CLK_MSR_ID(121, "ts"), + CLK_MSR_ID(130, "o_vad_clk"), + CLK_MSR_ID(132, "audio_locker_in_clk"), + CLK_MSR_ID(133, "audio_locker_out_clk"), + CLK_MSR_ID(134, "audio_tdmout_c_sclk"), + CLK_MSR_ID(135, "audio_tdmout_b_sclk"), + CLK_MSR_ID(136, "audio_tdmout_a_sclk"), + CLK_MSR_ID(137, "audio_tdmin_lb_sclk"), + CLK_MSR_ID(138, "audio_tdmin_c_sclk"), + CLK_MSR_ID(139, "audio_tdmin_b_sclk"), + CLK_MSR_ID(140, "audio_tdmin_a_sclk"), + CLK_MSR_ID(141, "audio_resamplea_clk"), + CLK_MSR_ID(142, "audio_pdm_sysclk"), + CLK_MSR_ID(143, "audio_spdifout_b_mst_clk"), + CLK_MSR_ID(144, "audio_spdifout_mst_clk"), + CLK_MSR_ID(145, "audio_spdifin_mst_clk"), + CLK_MSR_ID(147, "audio_resampleb_clk"), + CLK_MSR_ID(148, "pcie_pipe_clk"), + CLK_MSR_ID(149, "pcie_ref_clk"), + CLK_MSR_ID(150, "pcie_upcrx_cdrclk"), + CLK_MSR_ID(151, "pcie_upcrx_clk_sync_b20"), + CLK_MSR_ID(152, "pcie_u3p2pll1_clk_div16"), + CLK_MSR_ID(153, "pcie_u3p2pll0_clkout"), + CLK_MSR_ID(154, "pcie_ref_clk_p"), + CLK_MSR_ID(160, "pwm_j"), + CLK_MSR_ID(161, "pwm_i"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(175, "rng_ring_clk[0]"), + CLK_MSR_ID(176, "rng_ring_clk[1]"), + CLK_MSR_ID(177, "rng_ring_clk[2]"), + CLK_MSR_ID(178, "rng_ring_clk[3]"), + CLK_MSR_ID(179, "rng_ring_clk[4]"), + CLK_MSR_ID(180, "am_ring_osc_clk_out[0]"), + CLK_MSR_ID(181, "am_ring_osc_clk_out[1]"), + CLK_MSR_ID(182, "am_ring_osc_clk_out[2]"), + CLK_MSR_ID(183, "am_ring_osc_clk_out[3]"), + CLK_MSR_ID(184, "am_ring_osc_clk_out[4]"), + CLK_MSR_ID(185, "am_ring_osc_clk_out[5]"), + CLK_MSR_ID(186, "am_ring_osc_clk_out[6]"), + CLK_MSR_ID(187, "am_ring_osc_clk_out[7]"), + CLK_MSR_ID(188, "am_ring_osc_clk_out[8]"), + CLK_MSR_ID(189, "am_ring_osc_clk_out[9]"), + CLK_MSR_ID(190, "am_ring_osc_clk_out[10]"), + CLK_MSR_ID(191, "am_ring_osc_clk_out[11]"), + CLK_MSR_ID(192, "am_ring_osc_clk_out[12]"), + CLK_MSR_ID(193, "am_ring_osc_clk_out[13]"), + CLK_MSR_ID(194, "am_ring_osc_clk_out[14]"), + CLK_MSR_ID(195, "am_ring_osc_clk_out[15]"), + CLK_MSR_ID(196, "am_ring_osc_clk_out[16]"), + CLK_MSR_ID(197, "nna"), + CLK_MSR_ID(198, "vc9000e_axi"), + CLK_MSR_ID(199, "vc9000e_core"), + CLK_MSR_ID(201, "pcie_tl"), + CLK_MSR_ID(204, "u3p2pll1_clk_div16"), + CLK_MSR_ID(205, "u3p2pll0_clkout"), + CLK_MSR_ID(206, "upctx_clk_sync_b20"), + CLK_MSR_ID(207, "upcrx_carclk"), + CLK_MSR_ID(208, "usb_pipe_clk"), + CLK_MSR_ID(209, "earcrx_pll_out"), + CLK_MSR_ID(210, "mclk_pll_clk") +}; + +static struct meson_msr_id clk_msr_a9[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(3, "dspa"), + CLK_MSR_ID(4, "mali_stack"), + CLK_MSR_ID(5, "mali"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(7, "a78_clk_div16"), + CLK_MSR_ID(8, "dsu_clk_div16"), + CLK_MSR_ID(9, "isp"), + CLK_MSR_ID(10, "gp2_pll"), + CLK_MSR_ID(11, "fclk_div5"), + CLK_MSR_ID(12, "u2drd_usb2_ckout"), + CLK_MSR_ID(13, "pre0_hdmirx_aud_pll_clk"), + CLK_MSR_ID(14, "hrx20_pll_clk_test"), + CLK_MSR_ID(15, "u2h_usb2_ckout"), + CLK_MSR_ID(16, "fclk_50m"), + CLK_MSR_ID(17, "u3drd_b_usb2_ckout"), + CLK_MSR_ID(18, "gp1_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "hifi1_pll"), + CLK_MSR_ID(22, "csi_phy"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "mod_Tsin_A_CLK_IN"), + CLK_MSR_ID(26, "exit_Tsin_B_CLK_IN"), + CLK_MSR_ID(27, "u3p2pll1_0_clk_div16"), + CLK_MSR_ID(28, "u3p2pll1_1_clk_div16"), + CLK_MSR_ID(29, "upcrx0_cdrclk"), + CLK_MSR_ID(30, "upcrx1_cdrclk"), + CLK_MSR_ID(31, "hdmirx_aud_sck"), + CLK_MSR_ID(32, "uptx0_clk_sync_b20"), + CLK_MSR_ID(33, "uptx1_clk_sync_b20"), + CLK_MSR_ID(34, "lp_pll_clk0"), + CLK_MSR_ID(35, "lp_pll_clk1"), + CLK_MSR_ID(36, "u3hsg_PCIE_PIPE_PCLK"), + CLK_MSR_ID(37, "u3hsg_upcrx_cdrclk"), + CLK_MSR_ID(38, "u3hsg_upctx_clk_sync_b20"), + CLK_MSR_ID(39, "u3hsg_upcrxpll_clk_test"), + CLK_MSR_ID(40, "hdmirx_acr_lclk"), + CLK_MSR_ID(41, "i3c"), + CLK_MSR_ID(42, "hdmirx_aud_pll"), + CLK_MSR_ID(43, "hdmirx_acr_ref"), + CLK_MSR_ID(44, "hdmirx_meter"), + CLK_MSR_ID(45, "hdmirx_hdcp2x"), + CLK_MSR_ID(46, "hdmirx_5m"), + CLK_MSR_ID(47, "hdmirx_2m"), + CLK_MSR_ID(48, "hdmirx_cfg"), + CLK_MSR_ID(49, "hdmi_vx1_pix_clk"), + CLK_MSR_ID(50, "vid_pll"), + CLK_MSR_ID(51, "encoder0_if_clk"), + CLK_MSR_ID(52, "encoder1"), + CLK_MSR_ID(53, "encoder0"), + CLK_MSR_ID(54, "vdac"), + CLK_MSR_ID(55, "mali_aclkm"), + CLK_MSR_ID(56, "vid1_pll"), + CLK_MSR_ID(57, "lcd_an_ph2"), + CLK_MSR_ID(58, "lcd_an_ph3"), + CLK_MSR_ID(59, "hdmitx_pixel"), + CLK_MSR_ID(60, "vdin_meas"), + CLK_MSR_ID(61, "vpu"), + CLK_MSR_ID(62, "vpu_clkb"), + CLK_MSR_ID(63, "vpu_clkb_tmp"), + CLK_MSR_ID(64, "u3p2_upcrxpll_fst_pll_clk"), + CLK_MSR_ID(65, "vid_lock"), + CLK_MSR_ID(66, "vapb"), + CLK_MSR_ID(67, "ge2d"), + CLK_MSR_ID(68, "cve"), + CLK_MSR_ID(69, "vge"), + CLK_MSR_ID(70, "dsi0_meas"), + CLK_MSR_ID(71, "dsi1_meas"), + CLK_MSR_ID(72, "mipi_csi_phy_clk_out[0]"), + CLK_MSR_ID(73, "mipi_csi_phy_clk_out[1]"), + CLK_MSR_ID(74, "mipi_csi_phy_clk_out[2]"), + CLK_MSR_ID(75, "mipi_csi_phy_clk_out[3]"), + CLK_MSR_ID(76, "hdmitx_tmds"), + CLK_MSR_ID(77, "hdmitx_sys"), + CLK_MSR_ID(78, "hdmitx_fe"), + CLK_MSR_ID(80, "hdmitx_prif"), + CLK_MSR_ID(81, "hdmitx_200m"), + CLK_MSR_ID(82, "hdmitx_aud"), + CLK_MSR_ID(83, "hdmitx1_pixel"), + CLK_MSR_ID(84, "hdmitx1_fe"), + CLK_MSR_ID(85, "gic"), + CLK_MSR_ID(86, "lvds0_fifo_clk"), + CLK_MSR_ID(87, "lvds1_fifo_clk"), + CLK_MSR_ID(88, "htx_aes_clk"), + CLK_MSR_ID(89, "amfc"), + CLK_MSR_ID(90, "a_clk_sync_dig"), + CLK_MSR_ID(91, "b_clk_sync_dig"), + CLK_MSR_ID(92, "u3dp_upcrx_cdrclk"), + CLK_MSR_ID(93, "u3dp_upctx_clk_sync_b20"), + CLK_MSR_ID(94, "u3dp_upcrxpll_clk_test"), + CLK_MSR_ID(95, "u3dp_upcrpll_fst_pll_clk"), + CLK_MSR_ID(96, "u3dp_usb2_ckout"), + CLK_MSR_ID(97, "hcodec"), + CLK_MSR_ID(99, "hevcf"), + CLK_MSR_ID(104, "spisg2"), + CLK_MSR_ID(105, "spisg1"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(108, "cmpr"), + CLK_MSR_ID(109, "dewarpa"), + CLK_MSR_ID(110, "sc"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(112, "glb"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(114, "sd_emmc_b"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "aux_clk_o"), + CLK_MSR_ID(118, "spisg0"), + CLK_MSR_ID(121, "ts"), + CLK_MSR_ID(122, "usb_48m"), + CLK_MSR_ID(123, "usb_250m"), + CLK_MSR_ID(124, "eth_125m"), + CLK_MSR_ID(125, "eth_rmii"), + CLK_MSR_ID(126, "hrx20_tmds20_clk"), + CLK_MSR_ID(127, "hrx20_cable_clk"), + CLK_MSR_ID(128, "hdmirx_vid_clk"), + CLK_MSR_ID(129, "hdmirx_aud_clk"), + CLK_MSR_ID(130, "dptx_apb2"), + CLK_MSR_ID(131, "dptx_aud"), + CLK_MSR_ID(132, "audio_todptx_bclk"), + CLK_MSR_ID(133, "audio_txhdmitx_bclk"), + CLK_MSR_ID(134, "audio_txhdmitx_mclk"), + CLK_MSR_ID(135, "audio_txhdmitx_spdif_clk"), + CLK_MSR_ID(136, "mclk_0_pre"), + CLK_MSR_ID(137, "mclk1_0_pre"), + CLK_MSR_ID(138, "pixel0_pll_clkout"), + CLK_MSR_ID(139, "pixel1_pll_clkout"), + CLK_MSR_ID(140, "tcon_clk_out0"), + CLK_MSR_ID(141, "tcon_clk_out1"), + CLK_MSR_ID(142, "audio_todptx_spdif_clk"), + CLK_MSR_ID(143, "audio_todptx_mclk"), + CLK_MSR_ID(144, "dptx_lnk_clk"), + CLK_MSR_ID(145, "edptx_lnk_clk_tx"), + CLK_MSR_ID(146, "mod_audio_pdm_dclk_o_ao"), + CLK_MSR_ID(147, "vid2_pll"), + CLK_MSR_ID(151, "can1_filter"), + CLK_MSR_ID(152, "can0_filter"), + CLK_MSR_ID(153, "can1_pe"), + CLK_MSR_ID(154, "can0_pe"), + CLK_MSR_ID(155, "o_sed_clk"), + CLK_MSR_ID(156, "pwm_n"), + CLK_MSR_ID(157, "pwm_m"), + CLK_MSR_ID(158, "pwm_l"), + CLK_MSR_ID(159, "pwm_k"), + CLK_MSR_ID(160, "pwm_j"), + CLK_MSR_ID(161, "pwm_i"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(170, "rng_ring_osc_clk[0]"), + CLK_MSR_ID(171, "rng_ring_osc_clk[1]"), + CLK_MSR_ID(172, "rng_ring_osc_clk[2]"), + CLK_MSR_ID(173, "rng_ring_osc_clk[3]"), + CLK_MSR_ID(174, "rng_ring_osc_clk[4]"), + CLK_MSR_ID(175, "sys_cpu_osc_ring_clk[0]"), + CLK_MSR_ID(176, "sys_cpu_osc_ring_clk[1]"), + CLK_MSR_ID(177, "sys_cpu_osc_ring_clk[2]"), + CLK_MSR_ID(178, "sys_cpu_osc_ring_clk[3]"), + CLK_MSR_ID(179, "sys_cpu_osc_ring_clk[4]"), + CLK_MSR_ID(180, "sys_cpu_osc_ring_clk[5]"), + CLK_MSR_ID(181, "sys_cpu_osc_ring_clk[6]"), + CLK_MSR_ID(182, "sys_cpu_osc_ring_clk[7]"), + CLK_MSR_ID(183, "sys_cpu_osc_ring_clk[8]"), + CLK_MSR_ID(184, "sys_cpu_osc_ring_clk[9]"), + CLK_MSR_ID(185, "osc_ring_clk_gpu[0]"), + CLK_MSR_ID(186, "osc_ring_clk_gpu[1]"), + CLK_MSR_ID(187, "osc_ring_clk_vpu"), + CLK_MSR_ID(188, "osc_ring_clk_dos[0]"), + CLK_MSR_ID(189, "osc_ring_clk_dos[1]"), + CLK_MSR_ID(190, "osc_ring_clk_vge"), + CLK_MSR_ID(191, "osc_ring_clk_nna[0]"), + CLK_MSR_ID(192, "osc_ring_clk_nna[1]"), + CLK_MSR_ID(193, "osc_ring_clk_top[0]"), + CLK_MSR_ID(194, "osc_ring_clk_top[1]"), + CLK_MSR_ID(195, "nna"), + CLK_MSR_ID(200, "pcie1_tl"), + CLK_MSR_ID(201, "pcie0_tl"), + CLK_MSR_ID(202, "pp"), + CLK_MSR_ID(203, "pwm_a(ao)"), + CLK_MSR_ID(204, "pwm_b(ao)"), + CLK_MSR_ID(205, "pwm_c(ao)"), + CLK_MSR_ID(206, "pwm_d(ao)"), + CLK_MSR_ID(207, "pwm_e(ao)"), + CLK_MSR_ID(208, "pwm_f(ao)"), + CLK_MSR_ID(209, "pwm_g(ao)"), + CLK_MSR_ID(210, "ao_cec"), + CLK_MSR_ID(211, "sec_pulse_out"), + CLK_MSR_ID(212, "osc_clk_out"), + CLK_MSR_ID(213, "earcrx_pll_clk_out"), + CLK_MSR_ID(215, "o_pd_sysclk"), + CLK_MSR_ID(216, "o_earcrx_dmac_clk"), + CLK_MSR_ID(217, "o_earcrx_cmdc_clk"), + CLK_MSR_ID(218, "o_earctx_dmac_clk"), + CLK_MSR_ID(219, "o_earctx_cmdc_clk"), + CLK_MSR_ID(220, "o_earctx_ana_dmac_clk_a2d"), + CLK_MSR_ID(221, "o_tohdmi_dp_tx_a_bclk"), + CLK_MSR_ID(222, "o_tohdmi_dp_tx_a_mclk"), + CLK_MSR_ID(223, "o_tohdmi_dp_tx_a_spdif_clk"), + CLK_MSR_ID(224, "o_tohdmi_dp_tx_b_bclk"), + CLK_MSR_ID(225, "o_tohdmi_dp_tx_b_mclk"), + CLK_MSR_ID(226, "o_tohdmi_dp_tx_b_spdif_clk"), + CLK_MSR_ID(227, "o_toacodec_dac_bclk"), + CLK_MSR_ID(228, "o_toacodec_dac_mclk"), + CLK_MSR_ID(229, "o_spdifout_b_mst_clk"), + CLK_MSR_ID(230, "o_spdifout_mst_clk"), + CLK_MSR_ID(231, "o_spdifin_mst_clk"), + CLK_MSR_ID(232, "o_audio_mclk"), + CLK_MSR_ID(233, "o_vad_clk"), + CLK_MSR_ID(234, "o_tdmout_d_sclk"), + CLK_MSR_ID(235, "o_tdmout_c_sclk"), + CLK_MSR_ID(236, "o_tdmout_b_sclk"), + CLK_MSR_ID(237, "o_tdmout_a_sclk"), + CLK_MSR_ID(238, "o_tdminb_lb_sclk"), + CLK_MSR_ID(239, "o_tdmin_lb_sclk"), + CLK_MSR_ID(240, "o_tdmin_d_sclk"), + CLK_MSR_ID(241, "o_tdmin_c_sclk"), + CLK_MSR_ID(242, "o_tdmin_b_sclk"), + CLK_MSR_ID(243, "o_tdmin_a_sclk"), + CLK_MSR_ID(244, "o_resampleb_clk"), + CLK_MSR_ID(245, "o_resamplea_clk"), + CLK_MSR_ID(246, "o_pdmb_sysclk"), + CLK_MSR_ID(247, "o_pdmb_dclk"), + CLK_MSR_ID(248, "o_pdm_sysclk"), + CLK_MSR_ID(249, "o_pdm_dclk"), + CLK_MSR_ID(250, "c_alockerb_out_clk"), + CLK_MSR_ID(251, "c_alockerb_in_clk"), + CLK_MSR_ID(252, "c_alocker_out_clk"), + CLK_MSR_ID(253, "c_alocker_in_clk"), + CLK_MSR_ID(254, "o_resample_c_clk") +}; + static int meson_measure_id(struct meson_msr_id *clk_msr_id, unsigned int duration) { @@ -1303,6 +2140,42 @@ static const struct meson_msr_data clk_msr_t7_data = =3D { .reg =3D &msr_reg_offset_v2, }; =20 +static const struct meson_msr_data clk_msr_a5_data =3D { + .msr_table =3D (void *)clk_msr_a5, + .msr_count =3D ARRAY_SIZE(clk_msr_a5), + .reg =3D &msr_reg_offset_v2, +}; + +static const struct meson_msr_data clk_msr_a4_data =3D { + .msr_table =3D (void *)clk_msr_a4, + .msr_count =3D ARRAY_SIZE(clk_msr_a4), + .reg =3D &msr_reg_offset_v2, +}; + +static const struct meson_msr_data clk_msr_s7_data =3D { + .msr_table =3D (void *)clk_msr_s7, + .msr_count =3D ARRAY_SIZE(clk_msr_s7), + .reg =3D &msr_reg_offset_v2, +}; + +static const struct meson_msr_data clk_msr_s7d_data =3D { + .msr_table =3D (void *)clk_msr_s7d, + .msr_count =3D ARRAY_SIZE(clk_msr_s7d), + .reg =3D &msr_reg_offset_v2, +}; + +static const struct meson_msr_data clk_msr_s6_data =3D { + .msr_table =3D (void *)clk_msr_s6, + .msr_count =3D ARRAY_SIZE(clk_msr_s6), + .reg =3D &msr_reg_offset_v2, +}; + +static const struct meson_msr_data clk_msr_a9_data =3D { + .msr_table =3D (void *)clk_msr_a9, + .msr_count =3D ARRAY_SIZE(clk_msr_a9), + .reg =3D &msr_reg_offset_v2, +}; + static const struct of_device_id meson_msr_match_table[] =3D { { .compatible =3D "amlogic,meson-gx-clk-measure", @@ -1344,6 +2217,30 @@ static const struct of_device_id meson_msr_match_tab= le[] =3D { .compatible =3D "amlogic,t7-clk-measure", .data =3D &clk_msr_t7_data, }, + { + .compatible =3D "amlogic,a5-clk-measure", + .data =3D &clk_msr_a5_data, + }, + { + .compatible =3D "amlogic,a4-clk-measure", + .data =3D &clk_msr_a4_data, + }, + { + .compatible =3D "amlogic,s7-clk-measure", + .data =3D &clk_msr_s7_data, + }, + { + .compatible =3D "amlogic,s7d-clk-measure", + .data =3D &clk_msr_s7d_data, + }, + { + .compatible =3D "amlogic,s6-clk-measure", + .data =3D &clk_msr_s6_data, + }, + { + .compatible =3D "amlogic,a9-clk-measure", + .data =3D &clk_msr_a9_data, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, meson_msr_match_table); --=20 2.42.0 From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C270255E43; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; 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linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-4-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=2725; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=5uBs1UfvmnA5lnpZwSQY5T4qwPJESJ7rRb5slRMsFVc=; b=JVJO2L04VaSRAj9p4DlTVpEhj7Oc8SfFhQNBiLAj70lEMEHCCrNhMpEqse4WnslvTcQB797/b ss8Z7L1FEKSAKUoYdBymScEpxiwE+H9Oalhx+kSDFLrtjJCJFMd6qx+ X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu The original CLK_MSR_ID macro uses __id as the designated array index. This can waste memory when defining struct meson_msr_id arrays. For example: static const struct meson_msr_id clk_msr_foo[] =3D { CLK_MSR_ID(255, NULL), }; Although the array contains only one valid entry, it occupies space for 256 elements because the designated initializer forces the array size to match the highest index. The driver does not rely on the array index when accessing measurement IDs. Instead, the measurement ID is obtained from the id field of struct meson_msr_id. Therefore, removing the designated array index from CLK_MSR_ID does not affect the current driver behavior while significantly reducing unnecessary memory usage. Compared with before and after modification, the memory size is reduced by 24.76%: $ scripts/bloat-o-meter pre_meson-clk-measure.o meson-clk-measure.o add/remove: 0/0 grow/shrink: 0/15 up/down: 0/-16224 (-16224) Function old new delta clk_msr_sm1 3072 3048 -24 clk_msr_a1 1488 1272 -216 clk_msr_g12a 2952 2712 -240 clk_msr_gx 1992 1608 -384 clk_msr_m8 1536 1104 -432 clk_msr_a9 6120 5544 -576 clk_msr_t7 5352 4632 -720 clk_msr_axg 2640 1704 -936 clk_msr_s6 5064 3672 -1392 clk_msr_c3 4896 3264 -1632 clk_msr_s7d 4632 2880 -1752 clk_msr_s4 5376 3576 -1800 clk_msr_a4 4488 2544 -1944 clk_msr_s7 4632 2664 -1968 clk_msr_a5 4560 2352 -2208 Total: Before=3D65527, After=3D49303, chg -24.76% Signed-off-by: Chuan Liu --- drivers/soc/amlogic/meson-clk-measure.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index 671e0c3753de..f2562a37e8cf 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -55,7 +55,7 @@ struct meson_msr { }; =20 #define CLK_MSR_ID(__id, __name) \ - [__id] =3D {.id =3D __id, .name =3D __name,} + {.id =3D __id, .name =3D __name,} =20 static const struct meson_msr_id clk_msr_m8[] =3D { CLK_MSR_ID(0, "ring_osc_out_ee0"), --=20 2.42.0 From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F34845D1BF; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; b=TWW0cB4HEA6BDsKCoTFOR//Z6UlCXZjnGju/Ujde1a1Woua3WSHC8aeuOj93sz2MKKfc4FC72g/3OUa2dCo+fz9U4R/oGorsvuxttK1GPs3rmPdbQ1FNd7y7IaFZOPjb6WrUu6FeD+GC8tMl8bZCespQ745o0c/G396o/E3JGi4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Fri, 11 Sep 2026 08:28:51 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 11 Sep 2026 16:28:32 +0800 Subject: [PATCH 05/10] arm64: dts: amlogic: a5: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-5-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=735; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=m5R5k55AN/MNKbp84EDgUAXLk3E5z1TMK4ptSdMbBlo=; b=0fMq4ekz7cyIsYeXCLx8O+Z7BW28Z+B98QJBNy2y/oT6QK3XNsW5Y2vxm8ql2K+WrW8fICR+K wBwNuWwoLhnBAVuDggT1iruQgPBslaGFdHkAsNSj7eirfby9dHsETxy X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for A5 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a5.dtsi index 2b12d8284594..0be176ace337 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi @@ -157,4 +157,9 @@ gpio_intc: interrupt-controller@4080 { amlogic,channel-interrupts =3D <10 11 12 13 14 15 16 17 18 19 20 21>; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,a5-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; --=20 2.42.0 From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F22B45C719; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; b=lOI5rsuHPxS6XMvy/Mq0vS6NKwwnbuNmUxrbXiIAyq9+hde5mfkwYMTHdpso77Cpe5ckyvgrKM7L4QIERY2APw3nMkdrTUcOQu5ZMw+bQ239YQTiY7DC6Vph3Lpya1HRgMxRX71UwZPE65C9FJaUobmrAPLtbV8kL1cbyQn5PJk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; c=relaxed/simple; bh=mLj7YUC9Fm6rKKu4LSYfjTh/ywFy6caKOyKBr+t9m/g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=r4u2t4mO+DQmdby2KjTC9lfGG2NYmHSj0RroJjqXafmL5wh6m6t+izUXLhEN2Kmt889QfEI0pxdS/HJudqtJcSiJF+jaLEckuUBJgpwV9cf2yl4VeThu5PrMdVQKmDzYQnUdnIZK96VGFyFY7lRZS/AM5m2EkaqCe/XVJERtgvU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=BQCf8WHC; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="BQCf8WHC" Received: by smtp.kernel.org (Postfix) with ESMTPS id 21584C32782; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789115332; bh=mLj7YUC9Fm6rKKu4LSYfjTh/ywFy6caKOyKBr+t9m/g=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=BQCf8WHCLPPG2RGkrT1lBlKbJOpvqAYedFdAgc1xKUH2ztTvCKCmZZCOqPVNVTSW3 2LejBiw7vel4xHLJOpKPoP5aNb479HNjhkRRg5ShArEftFCntVOc03QDsztDEQavO4 51m+efxdju84tX2mRaleEKUrf5wCk2hboFH1k5526AUMqz/ScoC1b+1Z5f8r/l7fO7 lNft58WH/fpqlUlBzZJX/ivHelCynsPKAUkf5j0c1+1RucOhXdJviGvXxTjj+8Niui ZYNbTeyN/C3Ph23ABHS76yb9SJrmfb/fZ0TG4FxxtO5UY1WD495xVan8KJJ9ciosqZ m1/S5IcLx+Lcw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F1BDC88E4D; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 11 Sep 2026 16:28:33 +0800 Subject: [PATCH 06/10] arm64: dts: amlogic: a4: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-6-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=797; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=wRifO0cIF3hQCIdhhi4prrj9RKNwhA6uX1mJAaHO3Ik=; b=dxkN7FUuyreM7FYjTV0v/C+Gvt+Bo4jl3ToXJg5NNEAaHVCFaZ1oG9La/uhAq8aCP8Jr5SfbG G1xgkY7azqEByX3TbJY5Kbmxe8BTAjKk1LMj+073q1HmHAIZ6EvLK/v X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for A4 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a4.dtsi index fce45933fa28..762754b33f23 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -207,6 +207,11 @@ gpio_intc: interrupt-controller@4080 { <10 11 12 13 14 15 16 17 18 19 20 21>; }; =20 + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,a4-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; + ao_pinctrl: pinctrl@8e700 { compatible =3D "amlogic,pinctrl-a4"; #address-cells =3D <2>; --=20 2.42.0 From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F0F745C70F; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; b=i1AU/ApiGfgDrT4mEoAjvfZqZv8E/uaVRbHTwS4BkQr8u7lVsHG6F+YDVIPjbRTQu/hfja8tbisJlJV5a4vpjG7PQi2Y1zfG/ZH04moM5wQSKsPBBdtyNQnxuUblRe/BY1f5J4psZ1OzUpZZPDphkLXR5CkIwJJqNVvCkh87a4o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; c=relaxed/simple; bh=ASdPmlELWfdb/Y/YJ4rVHsEqniNVnoU71S6yuvMaeDA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gcEpps/qgnxUKJuFr3CNh4/61vG1Q2tvIRiEdQuJffNSV17jMiHcLLFEbr5X+uG8MrDVCWx1d1Osp9jSWncJ9ds1yuCglJQy7cOzTKFcZYZumFBeBcrWYE0jTHLQUA/tNWKuEHUU10x3xaf2Qoe+6kbnt79xlfTCyvICFwRCZmo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KppIjkc3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KppIjkc3" Received: by smtp.kernel.org (Postfix) with ESMTPS id 30936C4AF0D; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789115332; bh=ASdPmlELWfdb/Y/YJ4rVHsEqniNVnoU71S6yuvMaeDA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=KppIjkc3Ey3qNP05A5ATH37K53I3DnEZ5DU+4A+G07s18UXuk780jHcDYgHixxe09 AumAq9BYru8fpRU1AS6JIVu4DN+TnTQqu6zGbBVNErCErZVI7K5+eBB+4y8Um5qgYu AUODr1UJo7jM1d1ibOKJOCagsu0RLVecTSPo9ErhDxuDXHBKV9zpb5FjDtjk/Kd0Oi xG32pQiitQMoePxOOzKs5rJDNXpXMcV638bBJKrVniTKCua6nWuwR6Or+GJyszGOQ2 JteDSpECQChX4f1rNnlGSduAWg4JnUpJ9WdFn/Iuq+pA/s7r+2xnba3JHqDMnH7O2V gDUhZOmpJQiYg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E9AFC88E53; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 11 Sep 2026 16:28:34 +0800 Subject: [PATCH 07/10] arm64: dts: amlogic: s7: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-7-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=725; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=g+jOIpaICoW8GinTHQ5X1UmJpEi/mHf2rXG4N1xQzYo=; b=jBoQhEkWh+cODoW1/QU+/Cii70cHo4qDdgNTjWFcVZNRN8DquG2R3AjAfd3k2RUObSja2setn q3V83Y//pNQB9YOkf87zm3ICaORQYI5UsiSQtmaWTadt5pqCMJM4Tpo X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for S7 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s7.dtsi index a3faf4d188e1..64440df4f542 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi @@ -239,6 +239,11 @@ ao-secure@10220 { reg =3D <0x0 0x10220 0x0 0x140>; amlogic,has-chip-id; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,s7-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; }; }; --=20 2.42.0 From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F06845C704; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; b=t50P69rh6yFapyPYqfLLdICSGRERctWEPN3a22CHB23EGsXedyknKklexZ8RLLmD6YE5O/obqJWarw2LLtjwQgigyJARQUs2utPObDgjpRsZEhscwgvOcwwZmT1d+V8S3beITHuP1Psq3ZjJ4waHDYxIXBU2CDT6n0nIaD0Bag4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; c=relaxed/simple; bh=d9gRokGuXMnRj4EGFfmt+XQXkpFvGjH7tDqGf3GPJhI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cZ/i1jxl3XB2007ECo4TXahjyUd+pN85W8MlKQWgJL0WyIT71Xecv0KyoTGmRNRzwOUIi+vQvQF63IRLaoHK89CzcjAWorz/hrLDdUjp7H3G7mJqjcTocVTFl9IuzqmUF5CxuOKJgE1uoQm4NTRBOexGgOsPm6a3SYu1/LYozGs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RBAItL4E; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RBAItL4E" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3E1F1C32786; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789115332; bh=d9gRokGuXMnRj4EGFfmt+XQXkpFvGjH7tDqGf3GPJhI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=RBAItL4EiM2w+F3HGB/si/RZQE/CjCgEQwQ3SvOwEe4+lZ+S4rDCh+1r3C3jYq7sm lP2pQVWC6pzMMm2vWJphnjwkAOXGWeZ71tR+fBb6PqaPoXJ6FrEnIZvWX3wQul+bKu R82dwBiY7lJ0I25H2kQTNrLlF8ZVExBTxwAJKAFLRXkfAmoI8XDGHETOTg0q1IX1l/ BArOerJGVEKoZgm4DpbzlQ2LT8wHKmdygjUISKOYyio285JpDEp3wjnqTCRcHNgEJ3 u7EThFobH6SgMBZz4G1U0Fdx0j6Mou34oPNGpCOrHxgK1h0DQjOiEaa5QWjXwNjvmb u6GhknDgOvuhg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D5A6C88E54; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 11 Sep 2026 16:28:35 +0800 Subject: [PATCH 08/10] arm64: dts: amlogic: s7d: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-8-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=732; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=pLxRAmolmQ/S413sGcYNxtsPZfazg1P2W2c2iMu9cJc=; b=5jEF9+NW5uv6CsNF/LzrnrBni98XNjLVUd3mokEMOltHexGMhim45lH6pshmEUkWDO0hu1wnH UNomb5cyUyKDMFpwdox98lFHyws2wCMmz5QHTXM5dWvVD6B20XWhem6 X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for S7D SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi b/arch/arm64/boot= /dts/amlogic/amlogic-s7d.dtsi index 0c4417bcd682..5593ff9e07eb 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi @@ -212,6 +212,11 @@ ao-secure@10220 { reg =3D <0x0 0x10220 0x0 0x140>; amlogic,has-chip-id; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,s7d-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; }; }; --=20 2.42.0 From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79B5F45D5E2; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; b=NsUON1oKmK6NOHWlYb6X6/8YovrmXC7b17AoFiT/ZYA7bwAuGnp9VXsoy+Ytx6iP9z6yWMA4p9T66XD8SwJrAkC13EXlkmGcsYhoLvGOACo5AyqsB5cY7zd9RkDfCKgERvgoEA8wb2/faUuqfUMyGLCgh6GsS1Yj/TZcwOYsnvA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; c=relaxed/simple; bh=AfQRWYlOA9oYn7pKhRYTtSAvICG/ajPN7ML72cUReh4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fxbHSAYN6xEefyFaqfFwBpxuFdMsL4Nnd7bTSUtDB17v4Ld3hpkv1WwD7q+C4g6Y5CBJHNTqjUdYN+ayy57xmiKHX1rbZ7c9BKVmfrcjuSkj12HhffCswLZ+of1mo6SneYpT0r2Kc6SfPHffdcaE9smUBU0yTUfEa5f8y1mO+Q8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZxYRTzTb; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZxYRTzTb" Received: by smtp.kernel.org (Postfix) with ESMTPS id 4C059C4AF0F; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789115332; bh=AfQRWYlOA9oYn7pKhRYTtSAvICG/ajPN7ML72cUReh4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ZxYRTzTb7qRXk2BM+h7pOcSQEXwwl6BA+sp1K/pwwpcqBRSdAO3Cox+SWIIchGy33 d5JXIQNxzNpBw3Kds/SoWwTvtFS66jHYqFj8GysRq1XXLBhRE0niAA5JSXoBGQmObv WzBv3a5LRusFJwifLGY8yjUqeBHpcHVbkrrTaykGR9pdrXqU43BMoBXQQXcJ2tGpFe ZcApo7s8j/xRgFUsS5n5MfvqPW//uZqY70C4WOmPKKd8cWK383FWLR3QqFTyjQZpEz 4j8fbv/+H6rgJNpjeB/q1Df2NUTazWfXjc9ksYWgmdnwuzAW0yHK18aK98fY+Sk2Ct n9Xt7Jw2Vh+VQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BE4DC88E4D; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 11 Sep 2026 16:28:36 +0800 Subject: [PATCH 09/10] arm64: dts: amlogic: s6: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-9-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=725; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=9SDzhFYgFeR3zBxYK2Jcmr4Ssvx78QFB8BdBwjoaCo8=; b=+crIwXhW12Tmd+RRIn9A3IFp0PomUDH1P4dVF+bhnXDviUtnxRsDKqtAmOKAwQpMmw+DP0bkl A9rw6yglxz6C3Xh7H3NMFaAmgNspq8J/c0AeQYISK7Okkb40tC6IC/L X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for S6 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s6.dtsi index ab3acef2b147..b0a1a05297ce 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi @@ -217,6 +217,11 @@ ao-secure@10220 { reg =3D <0x0 0x10220 0x0 0x140>; amlogic,has-chip-id; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,s6-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; }; }; --=20 2.42.0 From nobody Fri Sep 25 14:34:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 843B145D904; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; cv=none; b=jo+HvzNtv2PsOUBX88yj8vMPx//cNxLl4MHG+SHno4+90ilLUzsvM+hQWzWne/7ipJ7/+4VW5gQhO9ZEYgdBBBH3C42SRMMW+DF5ytt3wjTq45VVvjW0OD4HWsWkgQVnK1GmWN8vHWc4mDX7kyHKz+g4N/Ke21mhn6nsznLCNhg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789115332; c=relaxed/simple; bh=CVrPnrs8qwQFVuAK2JblKtBbOLQAR+miyXJpO2WE03c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uPexBhJGxgD72cEIdDiNpTxTneRCmOKKE50DNGhd2SruGluIcbIw3j2PDzr9VNWRUKOfzMJhG1dtuYGtkJaf1e6lczKav5p4/svfTmDsUyyAnG+5/OO6+naEE4OWep4B2OZ/r94ku/45QIKzswQGf4WVYqOXj/nqKIkVZbg2ikY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fEYJWFyG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fEYJWFyG" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5ABBAC2BCFB; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789115332; bh=CVrPnrs8qwQFVuAK2JblKtBbOLQAR+miyXJpO2WE03c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=fEYJWFyGEEtcoC/BK/muvqXm9IqSbdNvHkHSbwHXLnIAdGwwvKSFxQ5KSlHalM77i n/uiNVBNiFTQ46tz0g1MhkwdsiA9URYYfWn5AM6QwuMCBpdk/xKKJI85uS8nyWMIPc j3OjN1eO1v8wGN52ecJ6/x6R8Y84LeGMJho0UNOSNpoUDXRYn2TgAskQkMvjwDw6s9 RK9LF8qFAEzvwWIpJBXeirxt3SX+3V0NudRXIu/Qrkj1fxXSHeUZS4TykkuLnA2hNd l0d0lGid8TzWmrxltT9oyF/WdvoVDWvX9liNfqpzlopRMKQgeSMKrtg8lPR8rSTLbp At3f25PirF+fQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49D1DC88E53; Fri, 11 Sep 2026 08:28:52 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Fri, 11 Sep 2026 16:28:37 +0800 Subject: [PATCH 10/10] arm64: dts: amlogic: a9: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-more-socs-to-support-clk_measure-v1-10-940e269aa52f@amlogic.com> References: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> In-Reply-To: <20260911-more-socs-to-support-clk_measure-v1-0-940e269aa52f@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789115329; l=796; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=4DgrEoOMoCExjYXex82UD7PxEvK6o2H5kIyRyw8MyZw=; b=QAIblCVinkXyTUiFlM1L93hjc1ME8nF9bCDbxdu2+xRWd81XUrv+cNkPMFLuMHCoGKOruwAxh DdY4BtQWr2MCHv04gvadU0BnSbG0rKJv+EfA0DQty+ZTlyNrvvKQKAZ X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for A9 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a9.dtsi index b0e0fadeed82..91f4cf319b0d 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi @@ -185,6 +185,11 @@ gpio_intc: interrupt-controller@4080 { amlogic,channel-interrupts =3D <10 11 12 13 14 15 16 17 18 19 20 21>; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,a9-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; =20 gic: interrupt-controller@ff800000 { --=20 2.42.0