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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33ba4e9a3casm5471657eec.12.2026.09.11.03.28.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 03:28:55 -0700 (PDT) From: Yuanfang Zhang Date: Fri, 11 Sep 2026 03:28:52 -0700 Subject: [PATCH] coresight: handle runtime PM resume failures Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-b4-coresight-runtime-pm-failures-v1-1-acdf49756e11@qti.qualcomm.com> X-B4-Tracking: v=1; b=H4sIAOPXo2oC/x2NSQqAMAwAvyI5G2iLC/oV8VA11YBWSa0I4t8tH mcOMw8EEqYAbfaA0MWBd59A5xmMi/UzIU+JwShTqUZrHAocd6HA83KiRH/yRnhs6CyvMXmslTO lakxtaYCUOYQc3/+i69/3A3QR8ftyAAAA X-Change-ID: 20260911-b4-coresight-runtime-pm-failures-70f250927aeb To: Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue Cc: kernel@oss.qualcomm.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Yuanfang Zhang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789122535; l=10711; i=yuanfang@qti.qualcomm.com; s=20250814; h=from:subject:message-id; bh=prgnis7GOywHrLI4Gw6b1Du/gpVpGDzh7dABj60kp3I=; b=RZqAyHsdCRu7ZdV2WOrNsOBgZ6rC7W7PfdWNwS7MTzK4pgOoaM7tphS/7+46nw4R49XT7gZM9 fOrKAVb0EK3AF4Lj55xh5CueGXfOOdz4vem3GtD8JBcDfmMZiaKr5DO X-Developer-Key: i=yuanfang@qti.qualcomm.com; a=ed25519; pk=9oS/FoPW5k0CsqSDDrPlnV+kVIOUaAe0O5pr4M1wHgY= X-Proofpoint-GUID: tQYiYshh8CiNpt7aV9uJjPP6pUfzDtwF X-Authority-Analysis: v=2.4 cv=PLmaavqC c=1 sm=1 tr=0 ts=6aa3d7ea cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=AmsXAa7n7-pT3CpYTX8A:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-ORIG-GUID: tQYiYshh8CiNpt7aV9uJjPP6pUfzDtwF X-Proofpoint-Spam-Info: AW1haW4tMjYwOTExMDE0NiBTYWx0ZWRfX26PJ0X4U5lV2 Jav+sewnCupqO7haQNX3kyjXsdKZ05QQNh97jE8M6cgwf0A/6YWe6UV8U1M/KKrrjckGSzzjUGM eLvXr5mP8/cH10qFUzvU+WQOrJ6/cSQ= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTExMDE0NiBTYWx0ZWRfX0mCUpi99jb4x Lt4uvC3gwwljx4jB1bUft0KyPSwGs0r11BHmnaeOYou0x2YVq+CCkiUVSJPaRXVUzkZnu8urtSs sZ+r16D7oYrVX9v7MOtppWtLT6aKaxZAPyYz4U+UIJ1vsXaYA0Qe5xfOg0LeooQpDuGomgCUzJ/ 72dysM3Dg1oljkF1HVgNDOQK4AZ9ELkEcNeOVyZWl31+gVd4GGrhdXjj9HEums1vWkC6fXSegne hv15Ar+8I1j+XdpRK1oBkcd+7AIE9td0q/hFT/Edj6yYF5Gzibv02HlDEOWPFekgz/Bdzb9fOh6 maVopjGsMgc6gJQcKfB/MoYky6Nq5O3YRq1MFmzXDYe/3ixEhM398HqXBCzO5I/7aXKCSkZWbNJ 9+Puy16ETvPToFcz2J1igQxqH/RhbF6t9gI5JjmuXG+Qq/W4uZZOn+50+BHxN4NM/ee6d6OvOk/ C7DZ4vnuT3iAwI9TL6g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-11_03,2026-09-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 spamscore=0 phishscore=0 adultscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609110146 When a CoreSight component's parent power domain, such as a CPU cluster genpd, fails to power on, runtime resume returns a negative error. Several call sites ignored that error and continued to access registers on an unpowered device, risking an external abort. Replace the remaining pm_runtime_get_sync() calls with pm_runtime_resume_and_get(), which restores the runtime PM usage count when resume fails. Abort before accessing hardware and propagate the error to the caller. In coresight_get_ref(), unwind the module and device references. In debug_enable_func(), roll back the CPUs that resumed successfully before the failure. Finally, release the mode acquired by stm_enable() if its runtime resume fails. Signed-off-by: Yuanfang Zhang Reviewed-by: Leo Yan Reviewed-by: Ulf Hansson --- This patch converts the remaining CoreSight pm_runtime_get_sync() users to pm_runtime_resume_and_get(), propagates resume failures before hardware access, and completes the related module, device, CPU and mode unwind paths. --- drivers/hwtracing/coresight/coresight-core.c | 13 ++++++++++--- drivers/hwtracing/coresight/coresight-cpu-debug.c | 10 +++++----- drivers/hwtracing/coresight/coresight-cti-sysfs.c | 10 ++++++++-- drivers/hwtracing/coresight/coresight-etm3x-sysfs.c | 10 ++++++++-- drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 5 ++++- drivers/hwtracing/coresight/coresight-funnel.c | 5 ++++- drivers/hwtracing/coresight/coresight-stm.c | 7 ++++++- drivers/hwtracing/coresight/coresight-sysfs.c | 11 +++++++++-- 8 files changed, 54 insertions(+), 17 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtraci= ng/coresight/coresight-core.c index 928488a216d4eafa3cdb5f882ae5f44ddaff0448..ff93a017dbe22b01236ac2e5021= da9b82890e72c 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -822,14 +822,16 @@ struct coresight_device *coresight_get_sink_by_id(u32= id) * * @csdev: The coresight device to get a reference on. * - * Return true in successful case and power up the device. - * Return false when failed to get reference of module. + * Return true on success and power up the device. + * Return false if a reference cannot be obtained or the device cannot be + * powered up. */ static bool coresight_get_ref(struct coresight_device *csdev) { struct device *dev =3D &csdev->dev; struct device *parent =3D csdev->dev.parent; struct device_driver *drv; + int ret; =20 /* Make sure csdev can't go away */ get_device(dev); @@ -843,9 +845,14 @@ static bool coresight_get_ref(struct coresight_device = *csdev) goto err_module; =20 /* Make sure the device is powered on */ - pm_runtime_get_sync(parent); + ret =3D pm_runtime_resume_and_get(parent); + if (ret < 0) + goto err_pm; + return true; =20 +err_pm: + module_put(drv->owner); err_module: put_device(parent); put_device(dev); diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hw= tracing/coresight/coresight-cpu-debug.c index 3a806c1d50eafb4249ab516ef846e437831b9681..39602d610e5b22ec4f165dbb126= a7c06aea08eb0 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -429,19 +429,19 @@ static int debug_enable_func(void) if (!drvdata) continue; =20 - ret =3D pm_runtime_get_sync(drvdata->dev); + ret =3D pm_runtime_resume_and_get(drvdata->dev); if (ret < 0) goto err; - else - cpumask_set_cpu(cpu, &mask); + + cpumask_set_cpu(cpu, &mask); } =20 return 0; =20 err: /* - * If pm_runtime_get_sync() has failed, need rollback on - * all the other CPUs that have been enabled before that. + * If runtime resume has failed, roll back all the other CPUs + * that have been enabled before that. */ for_each_cpu(cpu, &mask) { drvdata =3D per_cpu(debug_drvdata, cpu); diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hw= tracing/coresight/coresight-cti-sysfs.c index 3fe2c916d228808233ef19e9213a0cc0ce3cf297..6886b8713368058b9cf33ab7faf= b5f87e23c1ec9 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -167,8 +167,11 @@ static ssize_t coresight_cti_reg_show(struct device *d= ev, struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cs_off_attribute *cti_attr =3D container_of(attr, struct cs_off_at= tribute, attr); u32 val =3D 0; + int ret; =20 - pm_runtime_get_sync(dev->parent); + ret =3D pm_runtime_resume_and_get(dev->parent); + if (ret < 0) + return ret; =20 scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) val =3D cti_read_single_reg(drvdata, cti_attr->off); @@ -185,11 +188,14 @@ static __maybe_unused ssize_t coresight_cti_reg_store= (struct device *dev, struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cs_off_attribute *cti_attr =3D container_of(attr, struct cs_off_at= tribute, attr); unsigned long val =3D 0; + int ret; =20 if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - pm_runtime_get_sync(dev->parent); + ret =3D pm_runtime_resume_and_get(dev->parent); + if (ret < 0) + return ret; =20 scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) cti_write_single_reg(drvdata, cti_attr->off, val); diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/= hwtracing/coresight/coresight-etm3x-sysfs.c index b3c67e96a82a4995515457d1ac0a5b183b162f0f..b34e282ec4a5f37f7de1d2ff118= 042b47368acd7 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c @@ -47,8 +47,11 @@ static ssize_t etmsr_show(struct device *dev, { unsigned long flags, val; struct etm_drvdata *drvdata =3D dev_get_drvdata(dev->parent); + int ret; =20 - pm_runtime_get_sync(dev->parent); + ret =3D pm_runtime_resume_and_get(dev->parent); + if (ret < 0) + return ret; spin_lock_irqsave(&drvdata->spinlock, flags); CS_UNLOCK(drvdata->csa.base); =20 @@ -933,13 +936,16 @@ static ssize_t seq_curr_state_show(struct device *dev, unsigned long val, flags; struct etm_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etm_config *config =3D &drvdata->config; + int ret; =20 if (!coresight_get_mode(drvdata->csdev)) { val =3D config->seq_curr_state; goto out; } =20 - pm_runtime_get_sync(dev->parent); + ret =3D pm_runtime_resume_and_get(dev->parent); + if (ret < 0) + return ret; spin_lock_irqsave(&drvdata->spinlock, flags); =20 CS_UNLOCK(drvdata->csa.base); diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/= hwtracing/coresight/coresight-etm4x-sysfs.c index cc6cdd3ae29d502a2e67f07400de957b6dc71af6..55e05c20b302d4bf55c4df30c9e= e6d6a1b5f1031 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -2457,10 +2457,13 @@ static ssize_t coresight_etm4x_reg_show(struct devi= ce *dev, { u32 val, offset; struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); + int ret; =20 offset =3D coresight_etm4x_attr_to_offset(d_attr); =20 - pm_runtime_get_sync(dev->parent); + ret =3D pm_runtime_resume_and_get(dev->parent); + if (ret < 0) + return ret; val =3D etmv4_cross_read(drvdata, offset); pm_runtime_put_sync(dev->parent); =20 diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 0abc11f0690c5272ebd55df9e98544e3b401cfe6..5824a1e4d046a3caf5b32ed1d85= 26b8bd7e9ca76 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -190,9 +190,12 @@ static ssize_t funnel_ctrl_show(struct device *dev, struct device_attribute *attr, char *buf) { u32 val; + int ret; struct funnel_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - pm_runtime_get_sync(dev->parent); + ret =3D pm_runtime_resume_and_get(dev->parent); + if (ret < 0) + return ret; =20 val =3D get_funnel_ctrl_hw(drvdata); =20 diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index 4e860519a73f6fff640090cf58298b89a31e6359..b9f15990ed994ea827c8e237d76= 4e74d8d231ddd 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -196,6 +196,7 @@ static int stm_enable(struct coresight_device *csdev, s= truct perf_event *event, __maybe_unused struct coresight_path *path) { struct stm_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); + int ret; =20 if (mode !=3D CS_MODE_SYSFS) return -EINVAL; @@ -205,7 +206,11 @@ static int stm_enable(struct coresight_device *csdev, = struct perf_event *event, return -EBUSY; } =20 - pm_runtime_get_sync(csdev->dev.parent); + ret =3D pm_runtime_resume_and_get(csdev->dev.parent); + if (ret < 0) { + coresight_set_mode(csdev, CS_MODE_DISABLED); + return ret; + } =20 spin_lock(&drvdata->spinlock); stm_enable_hw(drvdata); diff --git a/drivers/hwtracing/coresight/coresight-sysfs.c b/drivers/hwtrac= ing/coresight/coresight-sysfs.c index 4b010f8bc4c08da31b3d295be6c37b6d941629d2..5849dfbd9d0bd3ad10734919f78= bc39cc968539c 100644 --- a/drivers/hwtracing/coresight/coresight-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-sysfs.c @@ -17,8 +17,12 @@ ssize_t coresight_simple_show_pair(struct device *_dev, struct coresight_device *csdev =3D container_of(_dev, struct coresight_de= vice, dev); struct cs_pair_attribute *cs_attr =3D container_of(attr, struct cs_pair_a= ttribute, attr); u64 val; + int ret; + + ret =3D pm_runtime_resume_and_get(_dev->parent); + if (ret < 0) + return ret; =20 - pm_runtime_get_sync(_dev->parent); val =3D csdev_access_relaxed_read_pair(&csdev->access, cs_attr->lo_off, c= s_attr->hi_off); pm_runtime_put_sync(_dev->parent); return sysfs_emit(buf, "0x%llx\n", val); @@ -31,8 +35,11 @@ ssize_t coresight_simple_show32(struct device *_dev, struct coresight_device *csdev =3D container_of(_dev, struct coresight_de= vice, dev); struct cs_off_attribute *cs_attr =3D container_of(attr, struct cs_off_att= ribute, attr); u64 val; + int ret; =20 - pm_runtime_get_sync(_dev->parent); + ret =3D pm_runtime_resume_and_get(_dev->parent); + if (ret < 0) + return ret; val =3D csdev_access_relaxed_read32(&csdev->access, cs_attr->off); pm_runtime_put_sync(_dev->parent); return sysfs_emit(buf, "0x%llx\n", val); --- base-commit: 08df884136f1c1197bab2a27814404fd329d9aac change-id: 20260911-b4-coresight-runtime-pm-failures-70f250927aeb Best regards, --=20 Yuanfang Zhang