From nobody Fri Sep 25 13:55:00 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B7344A5C28; Fri, 11 Sep 2026 16:59:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145957; cv=none; b=Ko8HX+DE0s+9adlN/XL/aixNQtlU7Bw2PnjDa2+0jV4siDTAEKiXm0FQXjxrYg7MlWvqMiHaHaNp88R9WrnQDSYuGVB9+W5tBlr2qJQLss1DoCWjqlQzeqUylhAcrCLURpYR+K/+GiiMkOaAr2+jDoPawAJoINgZYypmexPv/Ac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145957; c=relaxed/simple; bh=IdOJLA73Cf6tiU+JKWKZdEv0XqkU6UkmQAdXKUD5Q38=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mhRuNG9Pp3XCr8BDAMDtXiOVOSyb/bd0DrTgLZxu/FaHpc6lS9oyllf9oKsDXvE+N//2GTz3mYySz6B4CTQTmSSz9dyxDb3LXOKZf1pXYTwcWGQ0y2AvKldaMdQsKXHTr8iY2qEPULfU4oe602o9h3/SV6BRkh6Lrda5FN79qfY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=QO96gQgv; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="QO96gQgv" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1789145940; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xRh1SLhMiStwGt9nJg+3zWmBJZsQViVNXNAHf567sjs=; b=QO96gQgvJK3AcAfDBNzqVilkvuyE1sq07mFRJ3aH+WgzpTZfcHKsfHY918Li9ziYcjjS2F hjHve62MjiDeNkL/S7BoRIDT9o4BK/jGLTPFoTyITakpZQ5/rqB9WO+vZQb3Tzu/YKspJo V1DIQ9dVy6yYgg39kg8bvbVoipzTfbo= Date: Fri, 11 Sep 2026 18:58:38 +0200 Subject: [PATCH v2 1/7] dt-bindings: arm: cpus: Add Apple A18 Pro CPU core compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-apple-a18-pro-initial-devicetrees-v2-1-08d06cf011d4@cyberchaos.dev> References: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> In-Reply-To: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski Add "apple,tahiti-e" and "apple,tahiti-p" compatibles for the A18 Pro efficiency and performance CPU cores respectively. As with the M4 cores, there is no longer a generational codename, so we assign the core compatible based on SoC codename ("Tahiti") plus core type (E-Core / P-Core). Acked-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian Reviewed-by: Sven Peter --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentatio= n/devicetree/bindings/arm/cpus.yaml index c328e9fb9843..5d79da63301b 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -95,6 +95,8 @@ properties: - apple,mistral - apple,monsoon - apple,sawtooth + - apple,tahiti-e + - apple,tahiti-p - apple,twister - apple,typhoon - arm,arm710t --=20 2.55.0 From nobody Fri Sep 25 13:55:00 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7E9B4A49B7; Fri, 11 Sep 2026 16:59:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145957; cv=none; b=H8FYUoC94/S/5XzIKGlRG93wao9y7FuIalINBUOX9TzAuBA8pjTWVvA5wjMP66Kq4Va3cGGkt9z1kw8p6aYPfa1pOcrDuUFdgMo2MxW2s7g//mdxXR+vV1sSVfeB8ibbsccpyd1y/oRSJCjbsuVq0BvQHdy8QzhOWhXp8efvqaI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145957; c=relaxed/simple; bh=HEOk+is60Uy9u6TV1NWAbR58EenA9GLzvkQ1i3IYToA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qY7yD0d/sUWBnAAhw364mR1FdAmW3xER63nC4/0stktZvERngHncQTPpKhoO2/Id0WTddK8bLY/FaIpqNe7qd35WFRsVt74LommVla+sTrHRijbYJbRLaaLVp2u6rO12jf9B0EjlMBUQb1rTnAjXBw2eo8SBmjO4ZtVsmLG7SeQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=k0OyU8Rl; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="k0OyU8Rl" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1789145941; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Bh/XeWBXrRsKcF+6gWaZNgHDZVV2xBCMBMTiM1LQKWs=; b=k0OyU8RlMuHRcmpShIIr49ExlBTqbu5LV4imCzl4WC0MPt67zYrEhtA7QRfyWYwQZ3VGEm 9+CHlbeYF6EmfdDzqh6hsd5cw6pKxEhMKNaBRAlzxF/AUfQ4QhEzZiknxxcA5NiBJ1hccZ J4UR4fzGPuThrtu1WD+/t1SB+CubDYY= Date: Fri, 11 Sep 2026 18:58:39 +0200 Subject: [PATCH v2 2/7] dt-bindings: arm: apple: apple,pmgr: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-apple-a18-pro-initial-devicetrees-v2-2-08d06cf011d4@cyberchaos.dev> References: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> In-Reply-To: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The PMGR blocks on the Apple silicon A18 Pro SoC (t8140) is compatible with the M1-M4 SoCs. Add "apple,t8140-pmgr" as A18 Pro specific compatible. Signed-off-by: Yureka Lilian Acked-by: Rob Herring (Arm) Reviewed-by: Sven Peter --- Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/= Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml index da660fa13f77..bf21a5b3a4ac 100644 --- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml +++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml @@ -42,6 +42,7 @@ properties: - apple,t6031-pmgr - apple,t8122-pmgr - apple,t8132-pmgr + - apple,t8140-pmgr - const: apple,t8103-pmgr - const: syscon - const: simple-mfd --=20 2.55.0 From nobody Fri Sep 25 13:55:00 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 896A449EC7D; Fri, 11 Sep 2026 16:59:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145959; cv=none; b=XWVpZ0sqNUZn482PNpQStT26G+gT2AmpbhplyreJ43AxB/djH9uiXFq3XlCIBIkB5SdBdhXcVjRmrx9EpW4ExQe7wRmJmr4jPoj7cnkoU+L0NcZ/3iAEZtEIZCJ9nz29TZzMcS2ymbyTdDxphtYekTH377A1IKTa+JGKfHn7jgk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145959; c=relaxed/simple; bh=tEPA6uRdYuQ6PY6zBqXkquvyO5/4DfLy75Cass7/Zyw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BZTzXnGjutgUEVqCwNXEF7zQ/d4PlJCWd/AeqOTN01A1EnEqtzg5wY04cIDtFKcoK5IplLuQigKegFm++OeAO9lu0pN7TEdeI8DCL50MM9QDtlOo5Q30nycWpIvM4q+Xs+/64ThhVouzhEtn4H+moi5yRFqyo6W7QlBQ4eNvnEk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=IT0nrZF7; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="IT0nrZF7" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1789145942; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MnQifhsyepgUfl4SRUFqkKt3aBBkCt2ItCLaLcqAOuc=; b=IT0nrZF7k0tEGme7tgwWM2SCxTJGZyHK5qH6adO8N1YSNJ/tpM16ssbJahST+5DJo9EicZ 1muwf9ZIS5iTOUflgiXFyphPAVwnKEmd74dDo7vQLRrO4L4BqVjfSoMVuMn8YVXVTqd3Gh 85zYOHu2sT0+yXZtGb5recRzU3jg9XY= Date: Fri, 11 Sep 2026 18:58:40 +0200 Subject: [PATCH v2 3/7] dt-bindings: arm: power: apple,pmgr-pwrstate: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-apple-a18-pro-initial-devicetrees-v2-3-08d06cf011d4@cyberchaos.dev> References: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> In-Reply-To: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The device power state management of the PMGR blocks on the Apple silicon A18 Pro SoC (t8140) is compatible with the M1-M4 SoCs. Add "apple,t8140-pmgr-pwrstate" as A18 Pro specific compatible. Signed-off-by: Yureka Lilian Acked-by: Rob Herring (Arm) Reviewed-by: Sven Peter --- Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.ya= ml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml index b24ea8e54e11..dcffdd12c8c7 100644 --- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -49,6 +49,7 @@ properties: - apple,t6031-pmgr-pwrstate - apple,t8122-pmgr-pwrstate - apple,t8132-pmgr-pwrstate + - apple,t8140-pmgr-pwrstate - const: apple,t8103-pmgr-pwrstate =20 reg: --=20 2.55.0 From nobody Fri Sep 25 13:55:00 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2DE2B4A68BB; Fri, 11 Sep 2026 16:59:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145956; cv=none; b=g1oOHj4PhiKIFRWjAAoegVeosxLZ8v6bOT75N7TOgvErep14XKTrxK0tJjv+wrjEX8nkZqNns21rWovbTDtSYoUM2hCdYDSO9c3bkFjrdbqHkYvJtvBkHccyTSZ4dyXKrKwSM6l7FpDfYDBsvX94C3/PxDs3VFZaDRKfN5XEkLk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145956; c=relaxed/simple; bh=/OmSYrm0FCFYc9hbupI51jfnKBd1bG7XnXmGhQ5kzOU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UVsna6CEs73EIFSlgwqoHVxwsHdMh5SPzVdbz+hCtEJGuMNt/61bGsI0dc7beUgrUHXeRCUiD9Gj2e7X4M0C9HxaQuHKnJj+QTuUVcAbdaxLk53qxMFdhoeacZBvBlqgFkNlj0mmwW0jN6wg3O6Rlhi2uEeKeGu3iozuwmnsY7k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=wRXIqfgV; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="wRXIqfgV" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1789145943; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hfhvNN0fjj6swoLbh/0FaAvtFZVMTHuJaXk4F3s84AQ=; b=wRXIqfgVb6Yz/3qh2s6mH3u2Iv7yH6hudX87vP7mOAVSY4N1RhJJwNJ2ljrFJqhnYl4mQe +h0jCZ4a324UVKw8/OsdqqcG+UYRc7BTU40dUtSM+G/X1ay7ZvEJ1ZM6YJUHMVBb3a332G bcfWEJQe45LuI9Iuocf4EmaL5sjleQA= Date: Fri, 11 Sep 2026 18:58:41 +0200 Subject: [PATCH v2 4/7] dt-bindings: interrupt-controller: apple,aic2: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-apple-a18-pro-initial-devicetrees-v2-4-08d06cf011d4@cyberchaos.dev> References: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> In-Reply-To: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The Apple t8140 (A18 Pro) SoC uses an AIC3 as interrupt controller, same as the M1-M4 SoCs. Signed-off-by: Yureka Lilian Acked-by: Rob Herring (Arm) Reviewed-by: Sven Peter --- Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml | 1= + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic= 2.yaml index 1cb886785173..e3cadc5ad39d 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -46,6 +46,7 @@ properties: - apple,t6030-aic3 - apple,t6031-aic3 - apple,t8132-aic3 + - apple,t8140-aic3 - const: apple,t8122-aic3 - const: apple,t8122-aic3 =20 --=20 2.55.0 From nobody Fri Sep 25 13:55:00 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8113D4A68A0; Fri, 11 Sep 2026 16:59:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145972; cv=none; b=aoYhp6R7FtzH4KeS2q5q8FH1ixp4nsAffuPLr93ebhNeOt2RmbMeKC0rojP24HWeMpXna1dmqz6f5GY06ffwIBqamUAl4V+sseAYtX/hn1JO6LokZ8zNqGBynBcBhAEj+E6WdO+5gd4uo3PYk1TR5qnN6BCMvaSzIhwf/YVoiyo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145972; c=relaxed/simple; bh=CXj+icXWNtP+kWIdP0einQIx1r24LE2szcQxXlI1FL4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Dw6QRvLkTG186DlaH9U1OTBDoarjHp6crtWXbvZiHXQ8wGRKJ0UBMY3wROtVYtniFRb55vkMR4BCpi7FommPuQxkiakkrdzzJz6IFkLIrUVIR2qA8FuPRxP3/m88AljaeDp95iH0Cw0RpYs9WEFXJWkZIQVJIEt0mtRHvU0iG8s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=2ow8XYnl; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="2ow8XYnl" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1789145944; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=03++u1hMJUN4CZOnETD7tedBCxAbjIXy0LEGbGeWhRE=; b=2ow8XYnlexIJTa++XuE6SrigvBbIqOQNk/EaVKNguwGKckb1wqBunE+9Qu9U/VqIUE8MY5 vl1AyOhE40hmaFQjEMshux7J76r3mAs6rN5uCTvI+ehsChbGpG+NvcmcwCxhSPjsGNFDZF KywPxcUCYNzr2I41U9zlyaRLa0F1M+Q= Date: Fri, 11 Sep 2026 18:58:42 +0200 Subject: [PATCH v2 5/7] dt-bindings: watchdog: apple,wdt: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-apple-a18-pro-initial-devicetrees-v2-5-08d06cf011d4@cyberchaos.dev> References: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> In-Reply-To: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The watchdog on the Apple t8140 (A18 Pro) SoC is compatible with the M1-M4 SoCs. Add "apple,t8140-wdt" as SoC specific compatible. Signed-off-by: Yureka Lilian Acked-by: Rob Herring (Arm) Reviewed-by: Sven Peter --- Documentation/devicetree/bindings/watchdog/apple,wdt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml b/Do= cumentation/devicetree/bindings/watchdog/apple,wdt.yaml index ca4cf01db59f..1af924157f7c 100644 --- a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml @@ -22,6 +22,7 @@ properties: - apple,t6031-wdt - apple,t8122-wdt - apple,t8132-wdt + - apple,t8140-wdt - const: apple,t8103-wdt - items: - enum: --=20 2.55.0 From nobody Fri Sep 25 13:55:00 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8733D4A8A1F; Fri, 11 Sep 2026 16:59:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145982; cv=none; b=crMCcu/xqsWM7y3XFqT97yzrfGu3gV0FSzGWTLEE0UxMEasBjmxxiUEzcjnGfEGgqTmNAbwRFhOG2jYw2FWLUZdsQLxDgcdoS/5wjO9L2co62/avb0/KRsyTtVxXdaFwLwsQhevnO1u1jm6q8BiKcHIADaDssLKEbj6/gNQscrE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145982; c=relaxed/simple; bh=czeNJJdVNPL8UxOkum6nDyYjfN+WvmL6awgYK1zopGg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pTBFrQKiIPfs1iXZ1FrsioIxcrvc55B78Y9x3NF7k+V9orMsV9YV3sxiYXLOwqPiGibYjfsZb/ggZ0g8bGfF55QiOy6KOfinKqLxlhwjvADXHzxgj1CSrec680St8YfHw6QWD8LjaOHOmjwtuvxtSJ2BfsQuEFY25SyWwvNSNHg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=QYU6ec2D; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="QYU6ec2D" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1789145945; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QhaWFx61kHNCtJzO3v3Zb7ybhjB0BIEw4dr94SHhlkY=; b=QYU6ec2D+zraPFgfIUKBDhDG6DSmlD0le3Jh7cacdIo/7Sra2+QoxG65wsYQDJq2SIbpQC //yWU98B2G5WunZ/S1LeRpK20mnDOBY1sqNsxHu/jliXPgSGMiH/wlZF3D+BbUyYvfbZ3U fqw+x+gAk0/o96pTDg3ZziDeDu/i+c8= Date: Fri, 11 Sep 2026 18:58:43 +0200 Subject: [PATCH v2 6/7] dt-bindings: arm: apple: Add A18 Pro based devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-apple-a18-pro-initial-devicetrees-v2-6-08d06cf011d4@cyberchaos.dev> References: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> In-Reply-To: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The MacBook Neo is the first MacBook to use an A-Series Apple Silicon SoC. The MacBook Neo is overall similar to the M4 series devices. The iPhone 16 Pro is based on the same SoC, but Apple does not allow users running a custom OS on this device. Signed-off-by: Yureka Lilian Acked-by: Rob Herring (Arm) Reviewed-by: Sven Peter --- Documentation/devicetree/bindings/arm/apple.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 5d87a4fef193..7c3e7131a5e7 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -82,6 +82,10 @@ description: | - iPhone 8 Plus - iPhone X =20 + Devices based on the "A18 Pro" SoC: + + - MacBook Neo (A18 Pro, 2026) + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -300,6 +304,13 @@ properties: - const: apple,t8015 - const: apple,arm-platform =20 + - description: Apple A18 Pro SoC based platforms + items: + - enum: + - apple,j700 # MacBook Neo (A18 Pro, 2026) + - const: apple,t8140 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.55.0 From nobody Fri Sep 25 13:55:00 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70AB04A5EA8; Fri, 11 Sep 2026 16:59:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145969; cv=none; b=D8m5gjC4j8/NW0ntRVgOP2fpbRkLKpGzKSYFuROiTIeevF5xT+UlbWqlMzCFZ7vZhGbHffbSpQ6t74Vs+LokDxoWRUDpq5pPpIegYoEyKjwRh2YB1dHwI/vu8bkfW8lUZKZ7npOX0PmeBgXRDY8ivz+29j2j/6lRGzCmjgyBET4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789145969; c=relaxed/simple; bh=orbFqWCYx6BVu/cxBBrD5OpuIgbGYEayn2hOEnNLU/Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uQuuDFbuVKxq3EJKyR6qHTUuaJ0R1C2RgPtO1khadRa2X8EiPOv7DANPD5EWcMAeV6uddUvrGMZDqnoNlIumJ9THBSs6RPytI1t1eH5rdQqW80CXBV90xuZYkWiTSXNi0nFQJjL3CuXGIG5hGjk3eu/QOscc6rtSU59ANG0HDoY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=Ykte0YaZ; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="Ykte0YaZ" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1789145946; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+fhviTU5QVUP0OJ0YKEIWmBRz83Jwby6aVLM0ywJygY=; b=Ykte0YaZBT8fUla3SBhhgX8tEL+m4wdUetS0EsYVOhgyhQXnggxFcIgtk4RhDiqL5OSxor naokARm9FdyEGvkUX0QH9NNYGqE0q9VfxACJbQ36BP/ValjF8+C5BJnJmedhLYa4HAbm8u 8/pZ9Sfw2SdcXxiTLKtoVvS2kbWSpW8= Date: Fri, 11 Sep 2026 18:58:44 +0200 Subject: [PATCH v2 7/7] arm64: dts: apple: Add minimal MacBook Neo device tree Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260911-apple-a18-pro-initial-devicetrees-v2-7-08d06cf011d4@cyberchaos.dev> References: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> In-Reply-To: <20260911-apple-a18-pro-initial-devicetrees-v2-0-08d06cf011d4@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian Added a device tree for the MacBook Neo, which uses the t8140 SoC (A18 Pro) also found in the iPhone 16 Pro. The device tree has a minimal set of devices limited to CPU cores, interrupt controller, watchdog, serial and framebuffer. Using the macOS 26.6.2 iBoot/firmware, the machine reliably boots on a single core using the stock kernel. Booting with smp requires avoiding the wfi and wfit instructions in the idle loop and `delay()` respectively, since those instructions cause a loss of architectural state on the secondary cores. Signed-off-by: Yureka Lilian Reviewed-by: Sven Peter --- arch/arm64/boot/dts/apple/Makefile | 1 + arch/arm64/boot/dts/apple/t8140-j700.dts | 53 ++ arch/arm64/boot/dts/apple/t8140-pmgr.dtsi | 777 ++++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t8140.dtsi | 205 ++++++++ 4 files changed, 1036 insertions(+) diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index 62999574a36b..4f31beeb11ac 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -109,3 +109,4 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j624.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j713.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j715.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j773g.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8140-j700.dtb diff --git a/arch/arm64/boot/dts/apple/t8140-j700.dts b/arch/arm64/boot/dts= /apple/t8140-j700.dts new file mode 100644 index 000000000000..8e386ae7350c --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8140-j700.dts @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Neo (A18 Pro, 2026) + * + * target-type: J700 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8140.dtsi" + +/ { + model =3D "Apple MacBook Neo (A18 Pro, 2026)"; + compatible =3D "apple,j700", "apple,t8140", "apple,arm-platform"; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + + status =3D "disabled"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0x2 0>; /* To be filled by loader */ + }; + + reserved-memory { + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + /* To be filled by loader */ + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8140-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t8140-pmgr.dtsi new file mode 100644 index 000000000000..dd43520394ac --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8140-pmgr.dtsi @@ -0,0 +1,777 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for the Apple T8140 "A18 Pro" SoC + * + * Copyright The Asahi Linux Contributors + */ + +&pmgr { + ps_sep_aon: power-controller@60 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + label =3D "sep_aon"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_msg: power-controller@108 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + label =3D "msg"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_aic: power-controller@110 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + label =3D "aic"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_dwi: power-controller@118 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x118 4>; + label =3D "dwi"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_gpio: power-controller@120 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + label =3D "gpio"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pmc: power-controller@138 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x138 4>; + label =3D "pmc"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm0: power-controller@140 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x140 4>; + label =3D "pms_fpwm0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm1: power-controller@148 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + label =3D "pms_fpwm1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm2: power-controller@150 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x150 4>; + label =3D "pms_fpwm2"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm3: power-controller@158 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + label =3D "pms_fpwm3"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm4: power-controller@160 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x160 4>; + label =3D "pms_fpwm4"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_c1ppt: power-controller@168 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x168 4>; + label =3D "pms_c1ppt"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_soc_rc: power-controller@170 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x170 4>; + label =3D "soc_rc"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_soc_dpe: power-controller@178 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x178 4>; + label =3D "soc_dpe"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_pmgr_soc_ocla: power-controller@180 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x180 4>; + label =3D "pmgr_soc_ocla"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ispsens0: power-controller@188 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x188 4>; + label =3D "ispsens0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ispsens1: power-controller@190 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x190 4>; + label =3D "ispsens1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ap_tmm: power-controller@1a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1a0 4>; + label =3D "ap_tmm"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_afggfxni0: power-controller@1b8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b8 4>; + label =3D "afggfxni0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_gfx: power-controller@1f0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1f0 4>; + label =3D "gfx"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_jpg: power-controller@230 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x230 4>; + label =3D "jpg"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_msr: power-controller@238 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x238 4>; + label =3D "msr"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_venc0_sys: power-controller@240 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x240 4>; + label =3D "venc0_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_prores: power-controller@250 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x250 4>; + label =3D "prores"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_apcie_gp: power-controller@258 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x258 4>; + label =3D "apcie_gp"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_isp_sys: power-controller@268 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x268 4>; + label =3D "isp_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ans: power-controller@278 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x278 4>; + label =3D "ans"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_disp_sys: power-controller@280 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x280 4>; + label =3D "disp_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_dispext0_sys: power-controller@288 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x288 4>; + label =3D "dispext0_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ane_sys: power-controller@290 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x290 4>; + label =3D "ane_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_msr_ase_core: power-controller@298 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x298 4>; + label =3D "msr_ase_core"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_msr>; + #reset-cells =3D <0>; + }; + + ps_apcie_sys_gp: power-controller@2a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a0 4>; + label =3D "apcie_sys_gp"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_sio_cpu: power-controller@2a8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a8 4>; + label =3D "sio_cpu"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_fpwm0: power-controller@2b0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b0 4>; + label =3D "fpwm0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_fpwm1: power-controller@2b8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b8 4>; + label =3D "fpwm1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_fpwm2: power-controller@2c0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c0 4>; + label =3D "fpwm2"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c0: power-controller@2c8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c8 4>; + label =3D "i2c0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c1: power-controller@2d0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d0 4>; + label =3D "i2c1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c2: power-controller@2d8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d8 4>; + label =3D "i2c2"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c3: power-controller@2e0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e0 4>; + label =3D "i2c3"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c4: power-controller@2e8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e8 4>; + label =3D "i2c4"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_spi_p: power-controller@2f0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f0 4>; + label =3D "spi_p"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_uart_p: power-controller@2f8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f8 4>; + label =3D "uart_p"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_dpa_p: power-controller@300 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x300 4>; + label =3D "dpa_p"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_aes: power-controller@308 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x308 4>; + label =3D "aes"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_apcie_st: power-controller@310 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x310 4>; + label =3D "apcie_st"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_ans>; + #reset-cells =3D <0>; + }; + + ps_disp_fe: power-controller@318 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x318 4>; + label =3D "disp_fe"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_disp_sys>; + #reset-cells =3D <0>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_dispext0_fe: power-controller@320 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x320 4>; + label =3D "dispext0_fe"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_dispext0_sys>; + #reset-cells =3D <0>; + }; + + ps_dispext0_cpu: power-controller@328 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x328 4>; + label =3D "dispext0_cpu"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_dispext0_fe>; + #reset-cells =3D <0>; + + status =3D "disabled"; /* Locked, don't touch it */ + }; + + ps_spi0: power-controller@330 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x330 4>; + label =3D "spi0"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_spi1: power-controller@338 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x338 4>; + label =3D "spi1"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_spi2: power-controller@340 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x340 4>; + label =3D "spi2"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_spi3: power-controller@348 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x348 4>; + label =3D "spi3"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_qspi: power-controller@350 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x350 4>; + label =3D "qspi"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_uart_n: power-controller@358 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x358 4>; + label =3D "uart_n"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart0: power-controller@360 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x360 4>; + label =3D "uart0"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart1: power-controller@368 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x368 4>; + label =3D "uart1"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart2: power-controller@370 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x370 4>; + label =3D "uart2"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart3: power-controller@378 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x378 4>; + label =3D "uart3"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart4: power-controller@380 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x380 4>; + label =3D "uart4"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart5: power-controller@388 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x388 4>; + label =3D "uart5"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_dpa0: power-controller@390 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x390 4>; + label =3D "dpa0"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_dpa_p>; + #reset-cells =3D <0>; + }; + + ps_dpa1: power-controller@398 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x398 4>; + label =3D "dpa1"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_dpa_p>; + #reset-cells =3D <0>; + }; + + ps_apcie_sys_st: power-controller@3a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a0 4>; + label =3D "apcie_sys_st"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_ans>, <&ps_apcie_st>; + #reset-cells =3D <0>; + }; + + ps_apcie_phy_sw: power-controller@3c0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c0 4>; + label =3D "apcie_phy_sw"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_apcie_sys_st>, <&ps_apcie_sys_gp>; + #reset-cells =3D <0>; + }; + + ps_pmp: power-controller@3d0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d0 4>; + label =3D "pmp"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_pms_sram: power-controller@3d8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d8 4>; + label =3D "pms_sram"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_atc0_usb_aon: power-controller@3e0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e0 4>; + label =3D "atc0_usb_aon"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_atc0_common: power-controller@3e8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e8 4>; + label =3D "atc0_common"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_atc0_usb_aon>; + #reset-cells =3D <0>; + }; + + ps_atc0_usb: power-controller@3f0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f0 4>; + label =3D "atc0_usb"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_atc0_common>; + #reset-cells =3D <0>; + }; + + ps_sep: power-controller@c00 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc00 4>; + label =3D "sep"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_venc0_dma: power-controller@8000 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8000 4>; + label =3D "venc0_dma"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_sys>; + #reset-cells =3D <0>; + }; + + ps_venc0_pipe4: power-controller@8008 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8008 4>; + label =3D "venc0_pipe4"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_dma>; + #reset-cells =3D <0>; + }; + + ps_venc0_pipe5: power-controller@8010 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8010 4>; + label =3D "venc0_pipe5"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_dma>; + #reset-cells =3D <0>; + }; + + ps_venc0_me0: power-controller@8018 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8018 4>; + label =3D "venc0_me0"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_dma>; + #reset-cells =3D <0>; + }; + + ps_venc0_me1: power-controller@8020 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8020 4>; + label =3D "venc0_me1"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_me0>; + #reset-cells =3D <0>; + }; +}; + +&pmgr_mini { + ps_debug_gated: power-controller@0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x0 4>; + label =3D "debug_gated"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_spmi0: power-controller@58 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x58 4>; + label =3D "nub_spmi0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_spmi1: power-controller@60 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + label =3D "nub_spmi1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_spmi_a0: power-controller@68 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x68 4>; + label =3D "nub_spmi_a0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_aon_nogate: power-controller@78 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x78 4>; + label =3D "nub_aon_nogate"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_ocla: power-controller@80 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x80 4>; + label =3D "nub_ocla"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_gpio: power-controller@88 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x88 4>; + label =3D "nub_gpio"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_fabric: power-controller@a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa0 4>; + label =3D "nub_fabric"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_sram: power-controller@a8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa8 4>; + label =3D "nub_sram"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_debug_switch: power-controller@b0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb0 4>; + label =3D "debug_switch"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_smc_i2cm0: power-controller@8028 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8028 4>; + label =3D "smc_i2cm0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_smc_i2cm1: power-controller@8030 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8030 4>; + label =3D "smc_i2cm1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_smc_i2cm2: power-controller@8038 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8038 4>; + label =3D "smc_i2cm2"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8140.dtsi b/arch/arm64/boot/dts/app= le/t8140.dtsi new file mode 100644 index 000000000000..ee7804dc2301 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8140.dtsi @@ -0,0 +1,205 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T8140 "A18 Pro" SoC + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include + +/ { + compatible =3D "apple,t8140", "apple,arm-platform"; + + #address-cells =3D <2>; + #size-cells =3D <2>; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu_e0>; + }; + + core1 { + cpu =3D <&cpu_e1>; + }; + + core2 { + cpu =3D <&cpu_e2>; + }; + + core3 { + cpu =3D <&cpu_e3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu_p0>; + }; + + core1 { + cpu =3D <&cpu_p1>; + }; + }; + }; + + cpu_e0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-e"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x10000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x20000>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e1: cpu@1 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-e"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x10000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x20000>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e2: cpu@2 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-e"; + reg =3D <0x0 0x2>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x10000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x20000>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e3: cpu@3 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-e"; + reg =3D <0x0 0x3>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x10000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x20000>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_p0: cpu@10100 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-p"; + reg =3D <0x0 0x10100>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x20000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x30000>; + next-level-cache =3D <&l2_cache_1>; + }; + + cpu_p1: cpu@10101 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-p"; + reg =3D <0x0 0x10101>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x20000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x30000>; + next-level-cache =3D <&l2_cache_1>; + }; + + l2_cache_0: l2-cache-0 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-size =3D <0x400000>; + cache-unified; + }; + + l2_cache_1: l2-cache-1 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-size =3D <0x1000000>; + cache-unified; + }; + }; + + soc: soc { + compatible =3D "simple-bus"; + ranges; + #address-cells =3D <2>; + nonposted-mmio; + #size-cells =3D <2>; + + pmgr: power-management@300700000 { + compatible =3D "apple,t8140-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + reg =3D <0x3 0x700000 0 0x14000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + /* child nodes are added in t8140-pmgr.dtsi */ + }; + + aic: interrupt-controller@301000000 { + compatible =3D "apple,t8140-aic3", "apple,t8122-aic3"; + reg =3D <0x3 0x01000000 0x0 0x1cc000>, + <0x3 0x01040000 0x0 0x4000>; + reg-names =3D "core", "event"; + #interrupt-cells =3D <3>; + interrupt-controller; + power-domains =3D <&ps_aic>; + }; + + pmgr_mini: power-management@308280000 { + compatible =3D "apple,t8140-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + reg =3D <0x3 0x8280000 0 0xc000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + /* child nodes are added in t8140-pmgr.dtsi */ + }; + + wdt: watchdog@3082b0000 { + compatible =3D "apple,t8140-wdt", "apple,t8103-wdt"; + reg =3D <0x3 0x082b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + serial0: serial@385200000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x3 0x85200000 0x0 0x1000>; + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupt-parent =3D <&aic>; + interrupts =3D ; + power-domains =3D <&ps_uart0>; + reg-io-width =3D <4>; + + status =3D "disabled"; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + ; + interrupt-names =3D "phys", "virt", "hyp-phys", "hyp-virt"; + }; +}; + +#include "t8140-pmgr.dtsi" --=20 2.55.0