From nobody Fri Sep 25 16:56:49 2026 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5EF1E47ACF5; Thu, 10 Sep 2026 11:54:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041268; cv=none; b=uS/Ds14E4XfR/i8pXyojLA07vIGQFMj7gdSSTRLDzcrP58tsYlPCrCsQyRiT14oMgvrLB9Y6HyNXj+Ps7wT4h6w458P+Lkz6xOUL5cqCSZcKLUKS+qbhIugZkHRsS8qG4T0nyxJXB0yQV7/Wi0jmkjls0t6BJRgonf/EWC3A09M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041268; c=relaxed/simple; bh=tTXDCM2k+g6tGK/capTs1+AXF1GoPjlGkiMLBJER8Hs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=OvezRA8St/ZNijD0OKMhi5y39cDGkjz/azvkZFf7SFPm06sM73xGbRWKbXRC9WWHnnpnC3BblFETtHKNQ53IgQtlRHY4pBpHXJMX1BQdU23I1P9mnAlDlecpG44s8AxOkrdCqjAfBe3Mi4KVGgZS3Tjm9LA/DoGWj4Es9yziuZM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=210.0.225.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com Received: from zhaoxin.com (unknown [127.0.0.1]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgf0YWJzbKSsm; Thu, 10 Sep 2026 19:54:22 +0800 (CST) Received: from zhaoxin.com (unknown [10.28.208.166]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgc5qCMzb0tj9; Thu, 10 Sep 2026 19:54:20 +0800 (CST) Received: from ewan-server.tailb932da.ts.net (ewan-server.tailb932da.ts.net [10.28.24.2]) by zhaoxin.com (8.30) with ESMTP23c8df9234e54c3a91491374cb4650e2 Thu, 10 Sep 2026 19:54:20 +0800 X-Eyou-Smtpauth: ewanhai-oc@zhaoxin.com X-Eyou-EnvelopeSender: ewanhai-oc@zhaoxin.com X-Eyou-From: Ewan Hai From: "=?UTF-8?B?RXdhbiBIYWktb2M=?=" To: Sean Christopherson , Paolo Bonzini Cc: Shuah Khan , Frank Zhu , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, ewanhai@zhaoxin.com, cobechen@zhaoxin.com Subject: [PATCH v2 1/9] KVM: selftests: Add Zhaoxin CPU detection support Date: Thu, 10 Sep 2026 19:54:06 +0800 Message-Id: <20260910115414.3015260-2-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> References: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Eyou-Sender: Content-Type: text/plain; charset="utf-8" From: Frank Zhu Add helpers to detect Zhaoxin CPUs using the "CentaurHauls" and " Shanghai " vendor strings. KVM handles Zhaoxin CPUs with its VMX backend. Add host_cpu_is_intel_compatible for selftests that exercise behavior shared by Intel and Zhaoxin CPUs, while retaining host_cpu_is_zhaoxin for Zhaoxin-specific behavior. Signed-off-by: Frank Zhu --- tools/testing/selftests/kvm/include/x86/processor.h | 8 ++++++++ tools/testing/selftests/kvm/lib/x86/processor.c | 6 ++++++ 2 files changed, 14 insertions(+) diff --git a/tools/testing/selftests/kvm/include/x86/processor.h b/tools/te= sting/selftests/kvm/include/x86/processor.h index 6e6f70035..5d2be3399 100644 --- a/tools/testing/selftests/kvm/include/x86/processor.h +++ b/tools/testing/selftests/kvm/include/x86/processor.h @@ -23,6 +23,8 @@ extern bool host_cpu_is_intel; extern bool host_cpu_is_amd; extern bool host_cpu_is_hygon; extern bool host_cpu_is_amd_compatible; +extern bool host_cpu_is_zhaoxin; +extern bool host_cpu_is_intel_compatible; extern u64 guest_tsc_khz; extern struct kvm_mmu guest_mmu; =20 @@ -782,6 +784,12 @@ static inline bool this_cpu_is_hygon(void) return this_cpu_vendor_string_is("HygonGenuine"); } =20 +static inline bool this_cpu_is_zhaoxin(void) +{ + return this_cpu_vendor_string_is("CentaurHauls") || + this_cpu_vendor_string_is(" Shanghai "); +} + static inline u32 __this_cpu_has(u32 function, u32 index, u8 reg, u8 lo, u= 8 hi) { u32 gprs[4]; diff --git a/tools/testing/selftests/kvm/lib/x86/processor.c b/tools/testin= g/selftests/kvm/lib/x86/processor.c index d31fa81ea..a183cf005 100644 --- a/tools/testing/selftests/kvm/lib/x86/processor.c +++ b/tools/testing/selftests/kvm/lib/x86/processor.c @@ -26,6 +26,8 @@ bool host_cpu_is_amd; bool host_cpu_is_intel; bool host_cpu_is_hygon; bool host_cpu_is_amd_compatible; +bool host_cpu_is_zhaoxin; +bool host_cpu_is_intel_compatible; bool is_forced_emulation_enabled; u64 guest_tsc_khz; struct kvm_mmu guest_mmu; @@ -819,6 +821,8 @@ void kvm_arch_vm_post_create(struct kvm_vm *vm, unsigne= d int nr_vcpus) sync_global_to_guest(vm, host_cpu_is_amd); sync_global_to_guest(vm, host_cpu_is_hygon); sync_global_to_guest(vm, host_cpu_is_amd_compatible); + sync_global_to_guest(vm, host_cpu_is_zhaoxin); + sync_global_to_guest(vm, host_cpu_is_intel_compatible); sync_global_to_guest(vm, is_forced_emulation_enabled); sync_global_to_guest(vm, pmu_errata_mask); =20 @@ -1444,6 +1448,8 @@ void kvm_selftest_arch_init(void) host_cpu_is_amd =3D this_cpu_is_amd(); host_cpu_is_hygon =3D this_cpu_is_hygon(); host_cpu_is_amd_compatible =3D host_cpu_is_amd || host_cpu_is_hygon; + host_cpu_is_zhaoxin =3D this_cpu_is_zhaoxin(); + host_cpu_is_intel_compatible =3D host_cpu_is_intel || host_cpu_is_zhaoxin; is_forced_emulation_enabled =3D kvm_is_forced_emulation_enabled(); =20 kvm_init_pmu_errata(); --=20 2.34.1 From nobody Fri Sep 25 16:56:49 2026 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5ECB745D901; Thu, 10 Sep 2026 11:54:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041268; cv=none; b=uHgkirf1lpsT73n7/jH6OQ1tMbt9xvHE/FPWgfjl0O/grabTFCCjOZt3irB2ed9++wyal4AWc6Qhrs8z0CbSBAIuYtaofyO0rwlItp5lPLl/yCKOw4PpNK9SWi3EZH2V8jK94Sedty9PxqGpgH4KG5/3/sEV06Te4kwWadWxcNY= ARC-Message-Signature: i=1; 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Thu, 10 Sep 2026 19:54:21 +0800 (CST) Received: from ewan-server.tailb932da.ts.net (ewan-server.tailb932da.ts.net [10.28.24.2]) by zhaoxin.com (8.30) with ESMTP0ae0167815692b8cef0d94c23f3e50e2 Thu, 10 Sep 2026 19:54:20 +0800 X-Eyou-Smtpauth: ewanhai-oc@zhaoxin.com X-Eyou-EnvelopeSender: ewanhai-oc@zhaoxin.com X-Eyou-From: Ewan Hai From: "=?UTF-8?B?RXdhbiBIYWktb2M=?=" To: Sean Christopherson , Paolo Bonzini Cc: Shuah Khan , Frank Zhu , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, ewanhai@zhaoxin.com, cobechen@zhaoxin.com Subject: [PATCH v2 2/9] KVM: selftests: Use host_cpu_is_intel_compatible for mediated PMU Date: Thu, 10 Sep 2026 19:54:07 +0800 Message-Id: <20260910115414.3015260-3-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> References: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Eyou-Sender: Content-Type: text/plain; charset="utf-8" From: Frank Zhu kvm_is_mediated_pmu_enabled() returns kvm_amd's enable_mediated_pmu module parameter unless the host CPU is Intel. Zhaoxin CPUs implement VMX-compatible virtualization and are handled by KVM's VMX backend, so on Zhaoxin hosts the helper wrongly reports kvm_amd's parameter. Gate the check on host_cpu_is_intel_compatible so that Zhaoxin CPUs, like Intel CPUs, query kvm_intel's enable_mediated_pmu instead. This does not change behavior on Intel, and AMD and other non-Intel- compatible CPUs still fall back to kvm_amd's parameter. Signed-off-by: Frank Zhu --- tools/testing/selftests/kvm/include/x86/processor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/include/x86/processor.h b/tools/te= sting/selftests/kvm/include/x86/processor.h index 5d2be3399..df368232c 100644 --- a/tools/testing/selftests/kvm/include/x86/processor.h +++ b/tools/testing/selftests/kvm/include/x86/processor.h @@ -1454,7 +1454,7 @@ static inline bool kvm_is_pmu_enabled(void) =20 static inline bool kvm_is_mediated_pmu_enabled(void) { - if (host_cpu_is_intel) + if (host_cpu_is_intel_compatible) return get_kvm_intel_param_bool("enable_mediated_pmu"); =20 return get_kvm_amd_param_bool("enable_mediated_pmu"); --=20 2.34.1 From nobody Fri Sep 25 16:56:49 2026 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5EE4E476CF1; Thu, 10 Sep 2026 11:54:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041267; cv=none; b=l9JhV80DQ+2gKEfPEcSTqUynMyX31VHjPLTm53/uEGl5snr4YR03SMnVViGLe6BUapTJDmy6ji+k4iXZXQrfb+Bl8r3f4D6Lz10lKrnOTMlF0665xw/Y35MDFsyb6s7NwGEmmm14i4RLNSVOkPjDy/bmYg1jEBCTeNnWq9yZE98= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041267; c=relaxed/simple; bh=fmF2RIlJj4fCUlE/+4C6JdTPW6Tucs27fKJP9LhOfjM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=evv5IhNDDIBv0eTrRU7kF2eg7RzE6Q54pHpeoisUdDz85Rm+g6lYX0EtQzPv3wp+lqbM7qPNKChvcyL7N6cHOdCIwfEn4S+rXFQ2tibiNeTjQC0SgLjg+1o1LjR7wGDQMuVotw5Rm03hG19GWsn4SOJAQIEa8y7Lh8Z1Ko3z5eI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=210.0.225.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com Received: from zhaoxin.com (unknown [127.0.0.1]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgf0sZMzbKSss; Thu, 10 Sep 2026 19:54:22 +0800 (CST) Received: from zhaoxin.com (unknown [10.28.208.166]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgd69nqzbKSsm; Thu, 10 Sep 2026 19:54:21 +0800 (CST) Received: from ewan-server.tailb932da.ts.net (ewan-server.tailb932da.ts.net [10.28.24.2]) by zhaoxin.com (8.30) with ESMTPa08fc640d01ae08631bd445c109f50e2 Thu, 10 Sep 2026 19:54:21 +0800 X-Eyou-Smtpauth: ewanhai-oc@zhaoxin.com X-Eyou-EnvelopeSender: ewanhai-oc@zhaoxin.com X-Eyou-From: Ewan Hai From: "=?UTF-8?B?RXdhbiBIYWktb2M=?=" To: Sean Christopherson , Paolo Bonzini Cc: Shuah Khan , Frank Zhu , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, ewanhai@zhaoxin.com, cobechen@zhaoxin.com Subject: [PATCH v2 3/9] KVM: selftests: nx_huge_pages_test: Add TDP detection for Zhaoxin CPUs Date: Thu, 10 Sep 2026 19:54:08 +0800 Message-Id: <20260910115414.3015260-4-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> References: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Eyou-Sender: Content-Type: text/plain; charset="utf-8" From: Frank Zhu Update the kvm_is_tdp_enabled() function to include Zhaoxin CPUs when checking for EPT (Extended Page Tables) support. This ensures that Zhaoxin CPUs use the appropriate TDP (Two-Dimensional Paging) parameter check, similar to Intel CPUs. The change modifies the condition to check for both Intel and Zhaoxin CPUs before querying the EPT parameter, maintaining compatibility with existing Intel systems while extending support to Zhaoxin CPU systems. Signed-off-by: Frank Zhu --- tools/testing/selftests/kvm/lib/x86/processor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/lib/x86/processor.c b/tools/testin= g/selftests/kvm/lib/x86/processor.c index a183cf005..bd50c1265 100644 --- a/tools/testing/selftests/kvm/lib/x86/processor.c +++ b/tools/testing/selftests/kvm/lib/x86/processor.c @@ -160,7 +160,7 @@ static void sregs_dump(FILE *stream, struct kvm_sregs *= sregs, u8 indent) =20 bool kvm_is_tdp_enabled(void) { - if (host_cpu_is_intel) + if (host_cpu_is_intel_compatible) return get_kvm_intel_param_bool("ept"); else return get_kvm_amd_param_bool("npt"); --=20 2.34.1 From nobody Fri Sep 25 16:56:49 2026 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5EBE04BFE91; Thu, 10 Sep 2026 11:54:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041268; cv=none; b=e3voI/5vdHeW/41qIS5lhUY5qmz8zr7WGl3TD+8dePxy/o/ZepU1hox8mCJ4yELCpK2Vw8XeO6I2aDzGilgitoySnlj9R5wddvns0KlNZYQdJ1EQJZGQ88zPJ4KCnDz7ixVpVhqlmRnBtdOqBDtqIMErqRSjIndOUS6ishKcxx0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041268; c=relaxed/simple; bh=JL+3joFHPxgYeoVZXrOjXNbhKKHvBdYhlRhoPrFlHhw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Won4OunP8S4Bq+lpl1ppE/0jFobO1JnvAy6/5UhDATrH/ksTkMBWLMMB69dAy/xQgCzrTqTg6lodrSHEyWNrRPsRoPopEdwenACdgpVDnpHUR96QV0SNpkuH/mrZng1ghPRZccFKdEDnYR5aMtOFrCIKJ5ukoxB1OOI7luR0OHQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=210.0.225.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com Received: from zhaoxin.com (unknown [127.0.0.1]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgf1BHczbKSst; Thu, 10 Sep 2026 19:54:22 +0800 (CST) Received: from zhaoxin.com (unknown [10.28.208.166]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgd68GZzb0tj9; Thu, 10 Sep 2026 19:54:21 +0800 (CST) Received: from ewan-server.tailb932da.ts.net (ewan-server.tailb932da.ts.net [10.28.24.2]) by zhaoxin.com (8.30) with ESMTP290e8292dce8b0d7e4fdbe0a94d750e2 Thu, 10 Sep 2026 19:54:21 +0800 X-Eyou-Smtpauth: ewanhai-oc@zhaoxin.com X-Eyou-EnvelopeSender: ewanhai-oc@zhaoxin.com X-Eyou-From: Ewan Hai From: "=?UTF-8?B?RXdhbiBIYWktb2M=?=" To: Sean Christopherson , Paolo Bonzini Cc: Shuah Khan , Frank Zhu , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, ewanhai@zhaoxin.com, cobechen@zhaoxin.com Subject: [PATCH v2 4/9] KVM: selftests: vmx_exception_with_invalid_guest_state: Support Zhaoxin CPUs Date: Thu, 10 Sep 2026 19:54:09 +0800 Message-Id: <20260910115414.3015260-5-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> References: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Eyou-Sender: Content-Type: text/plain; charset="utf-8" From: Frank Zhu The vmx_exception_with_invalid_guest_state test currently requires an Intel CPU. However, Zhaoxin CPUs also support VMX and the relevant invalid guest state handling under KVM. Update the test requirement to allow execution on Zhaoxin platforms in addition to Intel, enabling broader coverage of VMX-related error paths. Signed-off-by: Frank Zhu --- .../selftests/kvm/x86/vmx_exception_with_invalid_guest_state.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/x86/vmx_exception_with_invalid_gue= st_state.c b/tools/testing/selftests/kvm/x86/vmx_exception_with_invalid_gue= st_state.c index 2cae86d9d..08a0caa9c 100644 --- a/tools/testing/selftests/kvm/x86/vmx_exception_with_invalid_guest_stat= e.c +++ b/tools/testing/selftests/kvm/x86/vmx_exception_with_invalid_guest_stat= e.c @@ -109,7 +109,7 @@ int main(int argc, char *argv[]) struct kvm_vcpu *vcpu; struct kvm_vm *vm; =20 - TEST_REQUIRE(host_cpu_is_intel); + TEST_REQUIRE(host_cpu_is_intel_compatible); TEST_REQUIRE(!kvm_is_unrestricted_guest_enabled()); =20 vm =3D vm_create_with_one_vcpu(&vcpu, guest_code); --=20 2.34.1 From nobody Fri Sep 25 16:56:49 2026 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EC85A47F2CB; Thu, 10 Sep 2026 11:54:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041270; cv=none; b=McYPrXBRY3ZEgjhQRvd7GZEiJfkOOEjJ+s2RRpM48TJdbb/ZuNqm3EOxv3d0B0nPDNdh/IZtYRnHWMvbkBuw4iwv8g9kHS/LdumFPN94z0FOm8NHIa6NnPd17Z5/v66Q7Wi0VeNsLbXBHaoevM/gsLr+n0vV9iDXy4k5J1kygxw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041270; c=relaxed/simple; bh=AXS2t2pnpKQ8X41YuO34w5QbpEIpeQqHxTUCN4B5oaE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=shPMbFyJDDP5wpAgmhsxzb8uC2MBASKKDI4lq+nUiUcSb2jt0hGZo4S2/veGBQNc479kVIkOR/sYwk/69q0hdgotcKCSfWUMjg0++78+Pe5IgaEoPaPjgbQyfy1vo7eKzTuiqkHVUuot1wQCPwUhFv4xuV9wzcmag4xv76lINFk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=210.0.225.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com Received: from zhaoxin.com (unknown [127.0.0.1]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgj0ZJHzbKSt2; Thu, 10 Sep 2026 19:54:25 +0800 (CST) Received: from zhaoxin.com (unknown [10.28.208.166]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgf6flczb0tj9; Thu, 10 Sep 2026 19:54:22 +0800 (CST) Received: from ewan-server.tailb932da.ts.net (ewan-server.tailb932da.ts.net [10.28.24.2]) by zhaoxin.com (8.30) with ESMTPebf2f47cf2d09d27d59131a3eeef50e2 Thu, 10 Sep 2026 19:54:21 +0800 X-Eyou-Smtpauth: ewanhai-oc@zhaoxin.com X-Eyou-EnvelopeSender: ewanhai-oc@zhaoxin.com X-Eyou-From: Ewan Hai From: "=?UTF-8?B?RXdhbiBIYWktb2M=?=" To: Sean Christopherson , Paolo Bonzini Cc: Shuah Khan , Frank Zhu , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, ewanhai@zhaoxin.com, cobechen@zhaoxin.com Subject: [PATCH v2 5/9] KVM: selftests: fix_hypercall_test: Add Zhaoxin CPU support Date: Thu, 10 Sep 2026 19:54:10 +0800 Message-Id: <20260910115414.3015260-6-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> References: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Eyou-Sender: Content-Type: text/plain; charset="utf-8" From: Frank Zhu Zhaoxin CPUs use VMCALL as the native hypercall instruction. Use host_cpu_is_intel_compatible so that fix_hypercall_test selects the VMX hypercall path on Zhaoxin CPUs. Signed-off-by: Frank Zhu --- tools/testing/selftests/kvm/x86/fix_hypercall_test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/x86/fix_hypercall_test.c b/tools/t= esting/selftests/kvm/x86/fix_hypercall_test.c index 4931ec227..f11fcc520 100644 --- a/tools/testing/selftests/kvm/x86/fix_hypercall_test.c +++ b/tools/testing/selftests/kvm/x86/fix_hypercall_test.c @@ -48,7 +48,7 @@ static void guest_main(void) const u8 *other_hypercall_insn; u64 ret; =20 - if (host_cpu_is_intel) { + if (host_cpu_is_intel_compatible) { native_hypercall_insn =3D vmx_vmcall; other_hypercall_insn =3D svm_vmmcall; } else if (host_cpu_is_amd_compatible) { --=20 2.34.1 From nobody Fri Sep 25 16:56:49 2026 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8460348094A; Thu, 10 Sep 2026 11:54:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041271; cv=none; b=nlcB10LiUA5tcxpx61VjMJG2oI2p8pg2z7muA5WBo6e4X504dAoxoqWE+rv+er1qZjB8rbl3ylbtD/mGduST0Az/l35nAhI6mzOFv0oXgSc4EAkUyz6cDfu3ItgnosK5pz4cxBUxg0SLhORwwFMhZ6YXm9x8iDfLXZ0hQ26Arc8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041271; c=relaxed/simple; bh=Pd4ATw6gTHfY7Lv8ZYbBNlu+6nxrHVMa+m6WOUrQ8Pw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NoshjGI2+jA75tpbEThTJdUPc3wYms/lsnDqjeHE8RB3IrJnvH3bTKqC3qiTU1pp6R88L99hjWUgZzxrOZxHoEjPWOm5yPiZVuLJCRmu2iEmFtPw/DqnrYz09Vo6Utr29iX4hwi06i/ZJUjXt/iY9wTTAkz21rWdD8rKHMugyc8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=210.0.225.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com Received: from zhaoxin.com (unknown [127.0.0.1]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgj0ZBRzbKSsx; Thu, 10 Sep 2026 19:54:25 +0800 (CST) Received: from zhaoxin.com (unknown [10.28.208.166]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgf5sZszb0tj9; Thu, 10 Sep 2026 19:54:22 +0800 (CST) Received: from ewan-server.tailb932da.ts.net (ewan-server.tailb932da.ts.net [10.28.24.2]) by zhaoxin.com (8.30) with ESMTPc912bb700f5899f2adcbc011148850e2 Thu, 10 Sep 2026 19:54:22 +0800 X-Eyou-Smtpauth: ewanhai-oc@zhaoxin.com X-Eyou-EnvelopeSender: ewanhai-oc@zhaoxin.com X-Eyou-From: Ewan Hai From: "=?UTF-8?B?RXdhbiBIYWktb2M=?=" To: Sean Christopherson , Paolo Bonzini Cc: Shuah Khan , Frank Zhu , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, ewanhai@zhaoxin.com, cobechen@zhaoxin.com Subject: [PATCH v2 6/9] KVM: selftests: Skip PERF_CAPABILITIES vCPU checks without PDCM Date: Thu, 10 Sep 2026 19:54:11 +0800 Message-Id: <20260910115414.3015260-7-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> References: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Eyou-Sender: Content-Type: text/plain; charset="utf-8" From: Frank Zhu KVM allows userspace to query MSR_IA32_PERF_CAPABILITIES through KVM_GET_MSRS even when PDCM is not exposed in KVM_GET_SUPPORTED_CPUID. However, vCPU accesses to the MSR fail without PDCM. Keep the feature MSR query, but skip its checks when KVM does not expose PDCM, allowing feature_msrs_test to continue checking the remaining feature MSRs. Signed-off-by: Frank Zhu --- tools/testing/selftests/kvm/x86/feature_msrs_test.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tools/testing/selftests/kvm/x86/feature_msrs_test.c b/tools/te= sting/selftests/kvm/x86/feature_msrs_test.c index 158550701..9602e29bf 100644 --- a/tools/testing/selftests/kvm/x86/feature_msrs_test.c +++ b/tools/testing/selftests/kvm/x86/feature_msrs_test.c @@ -54,6 +54,19 @@ static void test_feature_msr(u32 msr) if (is_kvm_controlled_msr(msr)) return; =20 + /* + * KVM allows userspace to query MSR_IA32_PERF_CAPABILITIES as a + * feature MSR even if KVM doesn't expose PDCM, but vCPU accesses to + * the MSR will fail in that case. Skip the vCPU checks so that the + * remaining feature MSRs can be tested. + */ + if (msr =3D=3D MSR_IA32_PERF_CAPABILITIES && + !kvm_cpu_has(X86_FEATURE_PDCM)) { + printf("KVM does not expose PDCM, skipping vCPU checks for " + "MSR_IA32_PERF_CAPABILITIES (0x%x).\n", msr); + return; + } + /* * More goofy behavior. KVM reports the host CPU's actual revision ID, * but initializes the vCPU's revision ID to an arbitrary value. --=20 2.34.1 From nobody Fri Sep 25 16:56:49 2026 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 83466480321; Thu, 10 Sep 2026 11:54:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041273; cv=none; b=U0VWJjIHRsiSAo5a/llPCWwSuS3orVCjNdi2UtMR7q7udpUGzl+/R4YQ1qVe0siLHGho8AQQckVT0xp7MUXlE030IOM9aHg6pHe/WEhkYEuQH1tGi5GgGflPclqEN86O3h+EQRdBTvJ1kI/qWCad3Doy1842OejTLYgT3WMLUQM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041273; c=relaxed/simple; bh=uqNNboBSxUGGzuZYGyCpRAjBDMAc6NAxfl0r51Kr9bY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=evFkqpZpT3/CV+rc+gmrN1FRUCvJBGCN0kugki1DZWi22Q6GrUt1YNjRBQOYU/liIQYciK0sy4cg2Cep2f8gOWCWzucfzll+66+GsuYSmVvyt5ftJ82I5XOXj4gcv1YSIcXQHsIdfC7dE0VqTAK0WUNUkmBdGhRtJ3kOfxjCV0g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=210.0.225.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com Received: from zhaoxin.com (unknown [127.0.0.1]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgj0ZDSzbKSt0; Thu, 10 Sep 2026 19:54:25 +0800 (CST) Received: from zhaoxin.com (unknown [10.28.208.166]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgg5t1CzbKSsl; Thu, 10 Sep 2026 19:54:23 +0800 (CST) Received: from ewan-server.tailb932da.ts.net (ewan-server.tailb932da.ts.net [10.28.24.2]) by zhaoxin.com (8.30) with ESMTPfbf124a4b3ff5aeb3c4c11f53ca350e2 Thu, 10 Sep 2026 19:54:22 +0800 X-Eyou-Smtpauth: ewanhai-oc@zhaoxin.com X-Eyou-EnvelopeSender: ewanhai-oc@zhaoxin.com X-Eyou-From: Ewan Hai From: "=?UTF-8?B?RXdhbiBIYWktb2M=?=" To: Sean Christopherson , Paolo Bonzini Cc: Shuah Khan , Frank Zhu , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, ewanhai@zhaoxin.com, cobechen@zhaoxin.com Subject: [PATCH v2 7/9] KVM: selftests: feature_msrs_test: Extend MSR_IA32_UCODE_REV quirk to Zhaoxin Date: Thu, 10 Sep 2026 19:54:12 +0800 Message-Id: <20260910115414.3015260-8-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> References: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Eyou-Sender: Content-Type: text/plain; charset="utf-8" From: Frank Zhu Zhaoxin CPUs use KVM's VMX backend and therefore observe the same KVM-defined initial value as Intel vCPUs. Update feature_msrs_test to expect 0x100000000ULL for Zhaoxin vCPUs. Signed-off-by: Frank Zhu --- tools/testing/selftests/kvm/x86/feature_msrs_test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/x86/feature_msrs_test.c b/tools/te= sting/selftests/kvm/x86/feature_msrs_test.c index 9602e29bf..bb339709d 100644 --- a/tools/testing/selftests/kvm/x86/feature_msrs_test.c +++ b/tools/testing/selftests/kvm/x86/feature_msrs_test.c @@ -72,7 +72,7 @@ static void test_feature_msr(u32 msr) * but initializes the vCPU's revision ID to an arbitrary value. */ if (msr =3D=3D MSR_IA32_UCODE_REV) - reset_value =3D host_cpu_is_intel ? 0x100000000ULL : 0x01000065; + reset_value =3D host_cpu_is_intel_compatible ? 0x100000000ULL : 0x010000= 65; =20 /* * For quirked MSRs, KVM's ABI is to initialize the vCPU's value to the --=20 2.34.1 From nobody Fri Sep 25 16:56:49 2026 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EC79847F2CA; Thu, 10 Sep 2026 11:54:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041270; cv=none; b=YQlZH8Ynos7VkpeEUA2ARZ7UROg5cmT9atBwKlMWhGFqOPHkbnsiKRieHrsuetvSPUZQKRGTgHKtffKl1U9eaGTulj+aGNKJtUV33D775sHQgRvv1IRe+5iuvSjNINiFH2tLh4ZTvP4GiRZaezXdrpoHlxN9SomhEWegUT9OGqk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041270; c=relaxed/simple; bh=tocnf8CTwAWGZ2XA3c7AjDvg5yobaOOcv2htQLsGZC4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TSKO9uJwc1/fkk+pic7HclvMZgY39fuafVyJXhM4uEYZOpZ78yRlhPEqhHzLiw7btBZqFUrGCtBRTTy7X1uUNAV6Z76Li7VV0TZ174/TpbNxicwM+W9S/tj1T8bFYNFpXHcreTCTT+bskFHYlt8wektcDGYF4Oy9XPADZayuI+8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=210.0.225.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com Received: from zhaoxin.com (unknown [127.0.0.1]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgj0ZBwzbKSsy; Thu, 10 Sep 2026 19:54:25 +0800 (CST) Received: from zhaoxin.com (unknown [10.28.208.166]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgg5sxlzb0tj9; Thu, 10 Sep 2026 19:54:23 +0800 (CST) Received: from ewan-server.tailb932da.ts.net (ewan-server.tailb932da.ts.net [10.28.24.2]) by zhaoxin.com (8.30) with ESMTP92d2bbcfff25a0d599b8a407667b50e2 Thu, 10 Sep 2026 19:54:23 +0800 X-Eyou-Smtpauth: ewanhai-oc@zhaoxin.com X-Eyou-EnvelopeSender: ewanhai-oc@zhaoxin.com X-Eyou-From: Ewan Hai From: "=?UTF-8?B?RXdhbiBIYWktb2M=?=" To: Sean Christopherson , Paolo Bonzini Cc: Shuah Khan , Frank Zhu , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, ewanhai@zhaoxin.com, cobechen@zhaoxin.com Subject: [PATCH v2 8/9] KVM: selftests: nested_exceptions_test: Add Zhaoxin CPU support Date: Thu, 10 Sep 2026 19:54:13 +0800 Message-Id: <20260910115414.3015260-9-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> References: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Eyou-Sender: Content-Type: text/plain; charset="utf-8" From: Frank Zhu When vectoring an injected #SS through the empty L2 IDT, Zhaoxin CPUs report the resulting #GP with the IDT bit set and EXT clear. Zhaoxin sets EXT only for interrupt delivery and selected guest-mode events; #SS delivery is not one of those cases. Expect error code 0x62 when running the test on Zhaoxin CPUs. Signed-off-by: Frank Zhu --- tools/testing/selftests/kvm/x86/nested_exceptions_test.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/x86/nested_exceptions_test.c b/too= ls/testing/selftests/kvm/x86/nested_exceptions_test.c index aeec3121c..78c27fa7c 100644 --- a/tools/testing/selftests/kvm/x86/nested_exceptions_test.c +++ b/tools/testing/selftests/kvm/x86/nested_exceptions_test.c @@ -38,6 +38,7 @@ */ #define GP_ERROR_CODE_AMD ((SS_VECTOR * 8) | ERROR_CODE_IDT_FLAG) #define GP_ERROR_CODE_INTEL ((SS_VECTOR * 8) | ERROR_CODE_IDT_FLAG | ERROR= _CODE_EXT_FLAG) +#define GP_ERROR_CODE_ZHAOXIN ((SS_VECTOR * 8) | ERROR_CODE_IDT_FLAG) =20 /* * Intel and AMD both shove '0' into the error code on #DF, regardless of = what @@ -139,7 +140,8 @@ static void l1_vmx_code(struct vmx_pages *vmx) */ GUEST_ASSERT_EQ(vmwrite(EXCEPTION_BITMAP, INTERCEPT_SS_GP_DF), 0); vmx_run_l2(l2_ss_pending_test, SS_VECTOR, (u16)SS_ERROR_CODE); - vmx_run_l2(l2_ss_injected_gp_test, GP_VECTOR, GP_ERROR_CODE_INTEL); + vmx_run_l2(l2_ss_injected_gp_test, GP_VECTOR, + host_cpu_is_zhaoxin ? GP_ERROR_CODE_ZHAOXIN : GP_ERROR_CODE_INTEL); =20 GUEST_ASSERT_EQ(vmwrite(EXCEPTION_BITMAP, INTERCEPT_SS_DF), 0); vmx_run_l2(l2_ss_injected_df_test, DF_VECTOR, DF_ERROR_CODE); --=20 2.34.1 From nobody Fri Sep 25 16:56:49 2026 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 90AC548095B; Thu, 10 Sep 2026 11:54:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041271; cv=none; b=sQOSnkanRK/2rUGiIFHUNnMuwUGC1tu/asLdg0t30PLx5xhuTq9vmd4SqLiyBhC3ijT26NbbecHTF5AyAcbE+Qbvll2hvu1oJQanS832UdNwWKr+meubiFDVTUPMGPb/QcDYmOe58iqillKDbBQGBdK+nqnIpSqbdKJjWt+sHMk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789041271; c=relaxed/simple; bh=GVz/0+2wXhOgOylyIOhn5wJcNTCxzKxd7Ss+VaLJn4c=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cZz82fO6V5yzEaZHn7UdfgW0gHld+WLPHqJ8G2heRw3HRAd94AMs7gogvEDnV5Jdg4jCTu54vlmlR/vN0IjUNZphUd9Ig1KXod+mkTNcJyasUYY/euRZxhRxc1n19NB9Clc0TUy80c+2dBPMNIYKQz3nwDrLUf6NeRSyCWqHmhY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=210.0.225.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com Received: from zhaoxin.com (unknown [127.0.0.1]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgj0ZFZzbKSt1; Thu, 10 Sep 2026 19:54:25 +0800 (CST) Received: from zhaoxin.com (unknown [10.28.208.166]) by mx1.zhaoxin.com (MTA) with ESMTP id 4hgbgh5y8hzb0tj9; Thu, 10 Sep 2026 19:54:24 +0800 (CST) Received: from ewan-server.tailb932da.ts.net (ewan-server.tailb932da.ts.net [10.28.24.2]) by zhaoxin.com (8.30) with ESMTPda0b0659b9d7789122ef7a8f548450e2 Thu, 10 Sep 2026 19:54:23 +0800 X-Eyou-Smtpauth: ewanhai-oc@zhaoxin.com X-Eyou-EnvelopeSender: ewanhai-oc@zhaoxin.com X-Eyou-From: Ewan Hai From: "=?UTF-8?B?RXdhbiBIYWktb2M=?=" To: Sean Christopherson , Paolo Bonzini Cc: Shuah Khan , Frank Zhu , kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, ewanhai@zhaoxin.com, cobechen@zhaoxin.com Subject: [PATCH v2 9/9] KVM: selftests: vmx_apic_access_test: Check APIC virtualization support Date: Thu, 10 Sep 2026 19:54:14 +0800 Message-Id: <20260910115414.3015260-10-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> References: <20260910115414.3015260-1-ewanhai-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Eyou-Sender: Content-Type: text/plain; charset="utf-8" From: Frank Zhu Not all CPUs that support VMX necessarily support the "virtualize APIC accesses" secondary processor-based VM-execution control. For example, some Zhaoxin CPUs lack this feature. Add a capability check before running the test to properly skip on unsupported hardware instead of failing. Add kvm_cpu_has_vmx_apic_access_virt() helper to vmx.c, following the same pattern as kvm_cpu_has_ept(). Signed-off-by: Frank Zhu --- tools/testing/selftests/kvm/include/x86/vmx.h | 1 + tools/testing/selftests/kvm/lib/x86/vmx.c | 15 +++++++++++++++ .../selftests/kvm/x86/vmx_apic_access_test.c | 1 + 3 files changed, 17 insertions(+) diff --git a/tools/testing/selftests/kvm/include/x86/vmx.h b/tools/testing/= selftests/kvm/include/x86/vmx.h index 04f5e34de..b196651bd 100644 --- a/tools/testing/selftests/kvm/include/x86/vmx.h +++ b/tools/testing/selftests/kvm/include/x86/vmx.h @@ -557,6 +557,7 @@ bool load_vmcs(struct vmx_pages *vmx); bool ept_1g_pages_supported(void); =20 bool kvm_cpu_has_ept(void); +bool kvm_cpu_has_vmx_apic_access_virt(void); void vm_enable_ept(struct kvm_vm *vm); void prepare_virtualize_apic_accesses(struct vmx_pages *vmx, struct kvm_vm= *vm); =20 diff --git a/tools/testing/selftests/kvm/lib/x86/vmx.c b/tools/testing/self= tests/kvm/lib/x86/vmx.c index 089e1a8af..e512191f1 100644 --- a/tools/testing/selftests/kvm/lib/x86/vmx.c +++ b/tools/testing/selftests/kvm/lib/x86/vmx.c @@ -390,6 +390,21 @@ bool kvm_cpu_has_ept(void) return ctrl & SECONDARY_EXEC_ENABLE_EPT; } =20 +bool kvm_cpu_has_vmx_apic_access_virt(void) +{ + u64 ctrl; + + if (!kvm_cpu_has(X86_FEATURE_VMX)) + return false; + + ctrl =3D kvm_get_feature_msr(MSR_IA32_VMX_TRUE_PROCBASED_CTLS) >> 32; + if (!(ctrl & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)) + return false; + + ctrl =3D kvm_get_feature_msr(MSR_IA32_VMX_PROCBASED_CTLS2) >> 32; + return ctrl & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES; +} + void prepare_virtualize_apic_accesses(struct vmx_pages *vmx, struct kvm_vm= *vm) { vmx->apic_access =3D (void *)vm_alloc_page(vm); diff --git a/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c b/tools= /testing/selftests/kvm/x86/vmx_apic_access_test.c index 463f73aa9..a1b6da4c0 100644 --- a/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c +++ b/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c @@ -78,6 +78,7 @@ int main(int argc, char *argv[]) struct kvm_vm *vm; =20 TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_VMX)); + TEST_REQUIRE(kvm_cpu_has_vmx_apic_access_virt()); =20 vm =3D vm_create_with_one_vcpu(&vcpu, l1_guest_code); =20 --=20 2.34.1