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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260910-ad7768-gpio-v8-1-6aaaa15adeb3@analog.com> References: <20260910-ad7768-gpio-v8-0-6aaaa15adeb3@analog.com> In-Reply-To: <20260910-ad7768-gpio-v8-0-6aaaa15adeb3@analog.com> To: Michael Walle , Linus Walleij , Bartosz Golaszewski CC: , , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Cameron , Andy Shevchenko , Janani Sunil , Janani Sunil X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789061359; l=2016; i=janani.sunil@analog.com; s=20260903; h=from:subject:message-id; bh=SUPdCQ9y6smqEBkTRXfO7L9iuHWsQz6QNl0nLGK1rLY=; b=Y+0kLstCd9ouo1GJvMyWf/gfwQjNxP96JYCzN/jARi++0ihz/CVtzdSIfruBhuTk5nC+YAZpB ksiP+x5sVLFC0HPj6ikDZBtsune4Ub+E2si/+iuAdV3CedHxSk3PnIn X-Developer-Key: i=janani.sunil@analog.com; a=ed25519; pk=0UJo4rLJeMHBMco/+wcMHzXI7nV8k1T72+XQlBNV4Rw= X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTEwMDIxNCBTYWx0ZWRfXxerk5UiByZbm nkP1dZtZl8WQK/LyR2pAX9XtXiyMr7odktBOXlu5/DC6gAoZX0NdhFDS83D4Ev/lDCf6WuyXtKE 8PwDgita8F23bA+sM9/ODuxBhPkJRvOdBrwvr+3u4SAHwvtQLWO1iM6julm3wC6Yfg9q3TuXZS2 v8WaZLmTZcaas+bpvk7G9h7dB3qhn9ERDFi5ZhD6SVUj+xwvdrpuTZZIK9rr2xG5PnCwwiDnh9S mcbwM8NpvKVsGf4lCBXUtwzV8l52WeV2GdvX2a6q0/hogZGCjfNW6Ws0CGXolSnD7uGgDURt6YG F+XesKDF/LHPs5q5f2AhRcmOinrATlME7OXs/FaJLBbImHVaghQgNILUglkChMr4fFoWf60RM/o OPsZJjBD5LIkqSjoaD1hj299VZaJh9TssgMWvWHJMMRwztv2eyUQoYAcC9IY1TQolAZbhJP6yJJ 2qcViy1Q/t6YjRBg4Gg== X-Authority-Analysis: v=2.4 cv=GoTXaU1C c=1 sm=1 tr=0 ts=6aa2e8fc cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0sLvza09kfJOxVLZPwjg:22 a=OmVn7CZJonkx5R5zMQLL:22 a=VwQbUJbxAAAA:8 a=QyXUC8HyAAAA:8 a=gAnH3GRIAAAA:8 a=h95pfnyYhxuxbSzySfwA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTEwMDIxNCBTYWx0ZWRfX3D8eBVKWTdX2 XljK+1/3QC0xrLstxUWyBbfp97A2Zx40RGjIrxHJLR5m+62v0VzmLFZ/jSRWoOdAR5wxLJa0iib Eg7g19B12w0VL0yiR7InLTpXssmTa02xFDwT+nV81fVZhZqOG8mB X-Proofpoint-GUID: Yho0zWQM9YlGNtmUhBmRly2hITTySJup X-Proofpoint-ORIG-GUID: Yho0zWQM9YlGNtmUhBmRly2hITTySJup X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-10_05,2026-09-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 priorityscore=1501 spamscore=0 clxscore=1015 impostorscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609100214 Use regmap_test_bits() when reading a single GPIO value from a normal register and when reading the direction bit. Reviewed-by: Linus Walleij Reviewed-by: Michael Walle Reviewed-by: Andy Shevchenko Signed-off-by: Janani Sunil --- drivers/gpio/gpio-regmap.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-regmap.c b/drivers/gpio/gpio-regmap.c index fb21396e1d02..ae6fa42b00a4 100644 --- a/drivers/gpio/gpio-regmap.c +++ b/drivers/gpio/gpio-regmap.c @@ -95,11 +95,11 @@ static int gpio_regmap_get(struct gpio_chip *chip, unsi= gned int offset) if (ret) return ret; =20 + if (gpio->reg_dat_base !=3D gpio->reg_set_base) + return regmap_test_bits(gpio->regmap, reg, mask); + /* ensure we don't spoil any register cache with pin input values */ - if (gpio->reg_dat_base =3D=3D gpio->reg_set_base) - ret =3D regmap_read_bypassed(gpio->regmap, reg, &val); - else - ret =3D regmap_read(gpio->regmap, reg, &val); + ret =3D regmap_read_bypassed(gpio->regmap, reg, &val); if (ret) return ret; =20 @@ -183,7 +183,7 @@ static int gpio_regmap_get_direction(struct gpio_chip *= chip, unsigned int offset) { struct gpio_regmap *gpio =3D gpiochip_get_data(chip); - unsigned int base, val, reg, mask; + unsigned int base, reg, mask; int invert, ret; =20 if (gpio_regmap_fixed_direction(gpio, offset)) { @@ -212,14 +212,14 @@ static int gpio_regmap_get_direction(struct gpio_chip= *chip, if (ret) return ret; =20 - ret =3D regmap_read(gpio->regmap, reg, &val); - if (ret) + ret =3D regmap_test_bits(gpio->regmap, reg, mask); + if (ret < 0) return ret; =20 - if (!!(val & mask) ^ invert) + if (ret ^ invert) return GPIO_LINE_DIRECTION_OUT; - else - return GPIO_LINE_DIRECTION_IN; + + return GPIO_LINE_DIRECTION_IN; } =20 static int gpio_regmap_try_direction_fixed(struct gpio_regmap *gpio, --=20 2.43.0 From nobody Fri Sep 25 16:03:28 2026 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EAA455D866; Thu, 10 Sep 2026 17:29:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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GPIO register accesses must resume that device first. Add an optional pm_dev field and acquire it before register translation or access. Release it using runtime autosuspend after each operation. Keep the device active across the complete direction-output sequence and propagate failure when setting the initial output value. Reviewed-by: Andy Shevchenko Reviewed-by: Michael Walle Signed-off-by: Janani Sunil Reviewed-by: Linus Walleij --- drivers/gpio/gpio-regmap.c | 80 +++++++++++++++++++++++++++++++++++++++++= ---- include/linux/gpio/regmap.h | 2 ++ 2 files changed, 76 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-regmap.c b/drivers/gpio/gpio-regmap.c index ae6fa42b00a4..2f5f45b84cc9 100644 --- a/drivers/gpio/gpio-regmap.c +++ b/drivers/gpio/gpio-regmap.c @@ -6,11 +6,13 @@ */ =20 #include +#include #include #include #include #include #include +#include #include #include #include @@ -23,6 +25,8 @@ struct gpio_regmap { struct device *parent; struct regmap *regmap; + struct device *pm_dev; + struct gpio_chip gpio_chip; =20 int reg_stride; @@ -79,6 +83,33 @@ static int gpio_regmap_simple_xlate(struct gpio_regmap *= gpio, return 0; } =20 +static int gpio_regmap_runtime_get(struct gpio_regmap *gpio) +{ + if (!gpio->pm_dev) + return 0; + + return pm_runtime_get_active(gpio->pm_dev, RPM_TRANSPARENT); +} + +static void gpio_regmap_runtime_put(struct gpio_regmap *gpio) +{ + if (!gpio->pm_dev) + return; + + pm_runtime_put_autosuspend(gpio->pm_dev); +} + +DEFINE_GUARD(gpio_regmap_runtime, struct gpio_regmap *, + gpio_regmap_runtime_get(_T), gpio_regmap_runtime_put(_T)) +DEFINE_GUARD_COND(gpio_regmap_runtime, _try, + gpio_regmap_runtime_get(_T), _RET =3D=3D 0) + +#define GPIO_REGMAP_RUNTIME_ACQUIRE(_gpio, _var) \ + ACQUIRE(gpio_regmap_runtime_try, _var)(_gpio) + +#define GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(_var_ptr) \ + ACQUIRE_ERR(gpio_regmap_runtime, _var_ptr) + static int gpio_regmap_get(struct gpio_chip *chip, unsigned int offset) { struct gpio_regmap *gpio =3D gpiochip_get_data(chip); @@ -91,7 +122,13 @@ static int gpio_regmap_get(struct gpio_chip *chip, unsi= gned int offset) else base =3D gpio_regmap_addr(gpio->reg_set_base); =20 - ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_GET_OP, base, offset, ®= , &mask); + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_GET_OP, base, offset, + ®, &mask); if (ret) return ret; =20 @@ -114,7 +151,13 @@ static int gpio_regmap_set(struct gpio_chip *chip, uns= igned int offset, unsigned int reg, mask, mask_val; int ret; =20 - ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_OP, base, offset, ®= , &mask); + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_OP, base, offset, + ®, &mask); if (ret) return ret; =20 @@ -146,6 +189,11 @@ static int gpio_regmap_set_with_clear(struct gpio_chip= *chip, unsigned int base, reg, mask, value =3D 0; int ret; =20 + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + if (val) base =3D gpio_regmap_addr(gpio->reg_set_base); else @@ -208,7 +256,13 @@ static int gpio_regmap_get_direction(struct gpio_chip = *chip, return -ENOTSUPP; } =20 - ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_GET_DIR_OP, base, offset, = ®, &mask); + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_GET_DIR_OP, base, offset, + ®, &mask); if (ret) return ret; =20 @@ -262,7 +316,13 @@ static int gpio_regmap_set_direction(struct gpio_chip = *chip, return -ENOTSUPP; } =20 - ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_DIR_OP, base, offset, = ®, &mask); + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_DIR_OP, base, offset, + ®, &mask); if (ret) return ret; =20 @@ -293,6 +353,11 @@ static int gpio_regmap_direction_output(struct gpio_ch= ip *chip, struct gpio_regmap *gpio =3D gpiochip_get_data(chip); int ret; =20 + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + /* * First check if this is gonna work on a fixed direction line, * if it doesn't (i.e. this is a fixed input line), then do not @@ -304,7 +369,9 @@ static int gpio_regmap_direction_output(struct gpio_chi= p *chip, return ret; } =20 - gpio_regmap_set(chip, offset, value); + ret =3D gpio_regmap_set(chip, offset, value); + if (ret) + return ret; =20 return gpio_regmap_set_direction(chip, offset, true); } @@ -399,6 +466,7 @@ struct gpio_regmap *gpio_regmap_register(const struct g= pio_regmap_config *config gpio->reg_clr_base =3D config->reg_clr_base; gpio->reg_dir_in_base =3D config->reg_dir_in_base; gpio->reg_dir_out_base =3D config->reg_dir_out_base; + gpio->pm_dev =3D config->pm_dev; =20 chip =3D &gpio->gpio_chip; chip->parent =3D config->parent; @@ -406,7 +474,7 @@ struct gpio_regmap *gpio_regmap_register(const struct g= pio_regmap_config *config chip->base =3D -1; chip->names =3D config->names; chip->label =3D config->label ?: dev_name(config->parent); - chip->can_sleep =3D regmap_might_sleep(config->regmap); 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Register an auxiliary gpio-regmap driver and use the parent device for runtime PM. The device has separate input-state and output-latch registers. Add a reg_mask_xlate() callback that checks the line direction and reads the programmed output latch for output lines while retaining input-state reads for input lines. Reviewed-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Janani Sunil --- drivers/gpio/Kconfig | 12 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-ad7768.c | 121 +++++++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 134 insertions(+) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index a48586bb8edb..07b7f8ab0ccb 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1818,6 +1818,18 @@ endmenu menu "Auxiliary Bus GPIO drivers" depends on AUXILIARY_BUS =20 +config GPIO_AD7768 + tristate "Analog Devices AD7768 GPIO support" + depends on AD7768 + depends on GPIOLIB + select GPIO_REGMAP + help + Say yes here to expose the AD7768 utility pins as GPIOs when the + device tree node is marked as a GPIO controller. + + To compile this driver as a module, choose M here: the module will be + called gpio-ad7768. + config GPIO_LTC4283 tristate "Analog Devices LTC4283 GPIO support" depends on SENSORS_LTC4283 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index dc9e6d643b5b..ce56e9b3f55d 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_GPIO_104_IDI_48) +=3D gpio-104-idi-48.o obj-$(CONFIG_GPIO_104_IDIO_16) +=3D gpio-104-idio-16.o obj-$(CONFIG_GPIO_74X164) +=3D gpio-74x164.o obj-$(CONFIG_GPIO_74XX_MMIO) +=3D gpio-74xx-mmio.o +obj-$(CONFIG_GPIO_AD7768) +=3D gpio-ad7768.o obj-$(CONFIG_GPIO_ADNP) +=3D gpio-adnp.o obj-$(CONFIG_GPIO_ADP5520) +=3D gpio-adp5520.o obj-$(CONFIG_GPIO_ADP5585) +=3D gpio-adp5585.o diff --git a/drivers/gpio/gpio-ad7768.c b/drivers/gpio/gpio-ad7768.c new file mode 100644 index 000000000000..c37e1ac30612 --- /dev/null +++ b/drivers/gpio/gpio-ad7768.c @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Analog Devices AD7768 GPIO auxiliary driver + * + * Copyright 2026 Analog Devices Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define AD7768_REG_GPIO_CONTROL 0x0E +#define AD7768_GPIO_UGPIO_ENABLE BIT(7) + +#define AD7768_REG_GPIO_WRITE 0x0F +#define AD7768_REG_GPIO_READ 0x10 + +#define AD7768_NUM_GPIOS 5 +#define AD7768_FILTER_GPIO 4 + +static int ad7768_gpio_init_valid_mask(struct gpio_chip *gc, + unsigned long *valid_mask, + unsigned int ngpios) +{ + if (ngpios > AD7768_FILTER_GPIO && + fwnode_property_match_string(gc->fwnode, "clock-names", "mclk") < 0) + __clear_bit(AD7768_FILTER_GPIO, valid_mask); + + return 0; +} + +static int ad7768_gpio_reg_mask_xlate(struct gpio_regmap *gpio, + enum gpio_regmap_operation op, + unsigned int base, unsigned int offset, + unsigned int *reg, unsigned int *mask) +{ + struct regmap *regmap =3D gpio_regmap_get_drvdata(gpio); + int ret; + + *reg =3D base; + *mask =3D BIT(offset); + + if (op !=3D GPIO_REGMAP_GET_OP) + return 0; + + /* + * AD7768 has separate input-state and output-latch registers. For an + * output line, report the programmed value from the output latch; + * input lines continue to use the input-state register. + */ + ret =3D regmap_test_bits(regmap, AD7768_REG_GPIO_CONTROL, *mask); + if (ret < 0) + return ret; + if (ret) + *reg =3D AD7768_REG_GPIO_WRITE; + + return 0; +} + +static int ad7768_gpio_probe(struct auxiliary_device *adev, + const struct auxiliary_device_id *id) +{ + struct gpio_regmap_config config; + struct device *dev =3D &adev->dev; + struct device *parent =3D dev->parent; + struct regmap *map; + int ret; + + map =3D dev_get_regmap(parent, NULL); + if (!map) + return -ENODEV; + + PM_RUNTIME_ACQUIRE_AUTOSUSPEND(parent, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D regmap_set_bits(map, AD7768_REG_GPIO_CONTROL, AD7768_GPIO_UGPIO_E= NABLE); + if (ret) + return ret; + + config =3D (struct gpio_regmap_config) { + .parent =3D dev, + .regmap =3D map, + .label =3D dev_name(parent), + .ngpio =3D AD7768_NUM_GPIOS, + .reg_dat_base =3D AD7768_REG_GPIO_READ, + .reg_set_base =3D AD7768_REG_GPIO_WRITE, + .reg_dir_out_base =3D AD7768_REG_GPIO_CONTROL, + .pm_dev =3D parent, + .fwnode =3D dev_fwnode(parent), + .reg_mask_xlate =3D ad7768_gpio_reg_mask_xlate, + .init_valid_mask =3D ad7768_gpio_init_valid_mask, + .drvdata =3D map, + }; + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &config)); +} + +static const struct auxiliary_device_id ad7768_gpio_ids[] =3D { + { .name =3D "ad7768.gpio" }, + { } +}; +MODULE_DEVICE_TABLE(auxiliary, ad7768_gpio_ids); + +static struct auxiliary_driver ad7768_gpio_driver =3D { + .probe =3D ad7768_gpio_probe, + .id_table =3D ad7768_gpio_ids, +}; +module_auxiliary_driver(ad7768_gpio_driver); + +MODULE_AUTHOR("Janani Sunil "); +MODULE_DESCRIPTION("Analog Devices AD7768 GPIO auxiliary driver"); +MODULE_LICENSE("GPL"); --=20 2.43.0