From nobody Fri Sep 25 18:20:31 2026 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D2D23AEB26 for ; Wed, 9 Sep 2026 19:06:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788980766; cv=none; b=fdkOQOzbUZ5/GSaq5e3nFtjc0/PIN/QREe4Ytc4Wko3omiW5bWniqN05BU6XN9kNjaJ5rTSEdDvjLPGhVFt3H0+lUt5ItiN+94C0jHaOgoDtYRC/7wwRZnmS3dEIVur3c1bbohOCXmiCivKipG/FLM1fG2zSY/+nzMDB+kLNnnI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788980766; c=relaxed/simple; bh=PrCuKQUu2VDRHJu+oaiMa73L6JdPJjLtIWK+FO6vlls=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FP0oVHd6nJN5qhPDo0LOWJLrFe6DOzznSI0k0Wd6HXsxn029pCQfAENeeRwKom2rsFz+JbZ41LGeOtTBf7jI34d631Xd+J0PBjzBnRPxRq+HcPUUkZLrDHIzhD3fSPzuuNAngY4vAGuQVa3qkgmotRSPhNqdHJUZExQby6dTK3k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=cJ0opQYU; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cJ0opQYU" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-2cfbbdfa60bso55301855ad.3 for ; Wed, 09 Sep 2026 12:06:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1788980763; x=1789585563; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=gkHhS8aThLlQeC5rFidveAGqpgcQbvxDn2Wylr5Mluc=; b=cJ0opQYUuLqzogOSrGT8CotBhyhAidGEgJ7CSb7Rwf7eYBMTsshAgo2P2AneE7u5/L BP3FmtCTkGL2M6rF20f3ocBjHjy4f2SvVxkzXwFfYW9ixDNtcOfDMoEJiW+Hq+aoGYzT fLAU9BXj2nV9fNx0EGPF2o/1/PcQ5BHyKn58W3+BC3W57/kszzspvSTFn5AO2xTMi/UN Iq3th4AZZyBp4TsK5OX8liL4akbOsPlSlzEuDPb02pFZRrCHkEUZ5uBuj0kUucbbJjp0 RpPXqBjIcLbqYW/mAd50Tk6VK3o7vA8WXIZXKSvW+V4JogwzV7sQgklJ0czDg0swzaeN +hRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788980763; x=1789585563; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=gkHhS8aThLlQeC5rFidveAGqpgcQbvxDn2Wylr5Mluc=; b=fsHCQWG073kKYiE39WhVUNvilS7uI2dOtL3NW4t8rAnXeqylq/ij1aaMMEsLFX1Dea 0jzIksq7XdfiH7UCq70qgmfG36bl9ypYHoLDoFNieShDWSAo0SfKT6dYkTIKxhFTD6IR YSsiDsJdY8BuSlpWFMMDZjzMhadq8/P1Phi2TS4rk5hDm0Ot2bKRCQd50ow+zAdEFtyA V6GCtkuqQYaulHA8jw8BPlyJ35m5eq1O/ogqGYqIXlfDsS8meHR99bG9Ck9JEXVBOi1w 4jQqrrpLxs8ldhjmfdRIHT247MY+7ijGov9vB4KRVsExGbHO6i3hfnu7OKY0N524O0iK SNcg== X-Forwarded-Encrypted: i=1; AKwUvBzfihNMo+Osa9bxmxQZAlAT4ql5jfB+eLjGIlRwGge009jJKy86F6wkqJZwhCoxh5v1viUvGxm5jZSPU3g=@vger.kernel.org X-Gm-Message-State: AFuF++kgwJhjev5RmBTEsCAEl2h1Q7qyWYKQNsHG1j/sc/1B4uAVAiZY vPRgYdtqcesmuiL+R3xxxAFheYc/GTXH4Aec1YzYidLP3n/IsbTyOL8D X-Gm-Gg: AYBFou2ar9nX4LbDoa+XxdPl9pOVUOb8Ggd1jVPhcgc8tgupq1fZy4wMfPAks7XmvGN pU11HLZg5BMcEAuyZCHp2ULS+r3bv3iCvvkr87v5ydGCt2kSXieYscekCP/tDKpg9379nNt58v/ oxhM/24ZSt7vu3v8ZrI+FrcGXv2w9AKfzQUI70vG5PFbf6yUClGGbJrWJfwQixGQ2buMSDnEuYi 0q1o09r4PkEc3nf+lCGUi4HLpHv/W10fYeNJ/cpXtI/YwByt2rEfNf4kyl5UBNjgdPxUhdT0oTV Bey78XjqmToNaMqjdcW16VRz8wyAwmYnbQDk2sKecPZYzyBHh6TGCFK5gFaip4aZS7W/enUEi26 uI4U/DRou91AWm+PWVn+7A9MnPC1trqdjv6al4cSOghsB1+5MjH8gVbEv7PF+Mwk7ADAsdfhdsq z0I549sLqHBcF6LKLUr2CvHotlZU/3Dy/eq1pooO9liSKCij+8cgvgBx5edd+2xK4U7uPtkmzQC hV5LQK5s1dzGTtYFqZITRcQ X-Received: by 2002:a17:902:db07:b0:2db:5ea1:8b04 with SMTP id d9443c01a7336-2db5ea18e2amr268532465ad.5.1788980762972; Wed, 09 Sep 2026 12:06:02 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76a0:d30::4d0:7b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2dcffa9827dsm13988515ad.66.2026.09.09.12.06.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Sep 2026 12:06:02 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/7] net: dsa: motorcomm: Split xMII and SERDES port masks Date: Thu, 10 Sep 2026 03:05:29 +0800 Message-ID: <20260909190541.466476-2-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260909190541.466476-1-mmyangfl@gmail.com> References: <20260909190541.466476-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace external_mask with xmii_mask and serdes_mask, and advertise the interface modes it actually supports. Also move struct yt921x_info into chip.h for future use. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 39 ++++++++++++-------------------- drivers/net/dsa/motorcomm/chip.h | 18 +++++++++++++++ 2 files changed, 32 insertions(+), 25 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index d663af010f43..64fdc5109cc6 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -96,18 +96,6 @@ static const struct yt921x_mib_desc yt921x_mib_descs[] = =3D { MIB_DESC(1, YT921X_MIB_DATA_TX_OAM, "TxOAM"), }; =20 -struct yt921x_info { - const char *name; - u16 major; - /* Unknown, seems to be plain enumeration */ - u8 mode; - u8 extmode; - /* Ports with integral GbE PHYs, not including MCU Port 10 */ - u16 internal_mask; - /* TODO: see comments in yt921x_dsa_phylink_get_caps() */ - u16 external_mask; -}; - #define YT921X_PORT_MASK_INTn(port) BIT(port) #define YT921X_PORT_MASK_INT0_n(n) GENMASK((n) - 1, 0) #define YT921X_PORT_MASK_EXT0 BIT(8) @@ -117,37 +105,44 @@ static const struct yt921x_info yt921x_infos[] =3D { { "YT9215SC", YT9215_MAJOR, 1, 0, YT921X_PORT_MASK_INT0_n(5), + YT921X_PORT_MASK_EXT1, YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, }, { "YT9215S", YT9215_MAJOR, 2, 0, YT921X_PORT_MASK_INT0_n(5), - YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT0, }, { "YT9215RB", YT9215_MAJOR, 3, 0, YT921X_PORT_MASK_INT0_n(5), YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + 0, }, { "YT9214NB", YT9215_MAJOR, 3, 2, YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3), - YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT0, }, { "YT9213NB", YT9215_MAJOR, 3, 3, YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3), YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT1, }, { "YT9218N", YT9218_MAJOR, 0, 0, YT921X_PORT_MASK_INT0_n(8), 0, + 0, }, { "YT9218MB", YT9218_MAJOR, 1, 0, YT921X_PORT_MASK_INT0_n(8), YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, }, {} }; @@ -4026,15 +4021,10 @@ yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, = int port, */ __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); - } else if (info->external_mask & BIT(port)) { - /* TODO: external ports may support SERDES only, XMII only, or - * SERDES + XMII depending on the chip. However, we can't get - * the accurate config table due to lack of document, thus - * we simply declare SERDES + XMII and rely on the correctness - * of devicetree for now. - */ + return; + } =20 - /* SERDES */ + if (BIT(port) & info->serdes_mask) { __set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces); /* REVSGMII (SGMII in PHY role) should go here, once @@ -4047,9 +4037,8 @@ yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, in= t port, __set_bit(PHY_INTERFACE_MODE_2500BASEX, config->supported_interfaces); config->mac_capabilities |=3D MAC_2500FD; - - /* XMII */ - + } + if (BIT(port) & info->xmii_mask) { /* Not tested. To add support for XMII: * - Add proper interface modes below * - Handle them in yt921x_port_config() diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index 83cd454955dd..bc2641ded101 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -960,6 +960,24 @@ struct yt921x_reg_ops { int (*write)(void *context, u32 reg, u32 val); }; =20 +struct yt921x_info { + const char *name; + u16 major; + /* Unknown, seems to be plain enumeration */ + u8 mode; + u8 extmode; + /* Ports with integral GbE PHYs, not including MCU Port 10 */ + u16 internal_mask; + /* Note: xmii_mask and serdes_mask may overlap */ + u16 xmii_mask; + u16 serdes_mask; +}; + +static inline u16 yt921x_info_ports_mask(const struct yt921x_info *info) +{ + return info->internal_mask | info->xmii_mask | info->serdes_mask; +} + struct yt921x_priv { struct dsa_switch ds; =20 --=20 2.53.0 From nobody Fri Sep 25 18:20:31 2026 Received: from mail-pl1-f181.google.com (mail-pl1-f181.google.com [209.85.214.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1EE93AFAF1 for ; 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Wed, 09 Sep 2026 12:06:05 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76a0:d30::4d0:7b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2dcffa9827dsm13988515ad.66.2026.09.09.12.06.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Sep 2026 12:06:05 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/7] net: dsa: motorcomm: Check port type with runtime info Date: Thu, 10 Sep 2026 03:05:30 +0800 Message-ID: <20260909190541.466476-3-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260909190541.466476-1-mmyangfl@gmail.com> References: <20260909190541.466476-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The yt921x_port_is_internal/external() macros hardcoded the port layout: they treat ports 8 and 9 as external on every chip and count the dummy ports as internal. Drop them and identify the port type using chip info and runtime configuration. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 36 ++++++++++++++++++++++---------- drivers/net/dsa/motorcomm/chip.h | 11 +++++----- 2 files changed, 31 insertions(+), 16 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 64fdc5109cc6..946949a3aba8 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -3743,6 +3743,7 @@ yt921x_dsa_port_set_apptrust(struct dsa_switch *ds, i= nt port, const u8 *sel, =20 static int yt921x_port_down(struct yt921x_priv *priv, int port) { + const struct yt921x_info *info =3D priv->info; u32 mask; int res; =20 @@ -3751,12 +3752,13 @@ static int yt921x_port_down(struct yt921x_priv *pri= v, int port) if (res) return res; =20 - if (yt921x_port_is_external(port)) { + if (BIT(port) & info->serdes_mask) { mask =3D YT921X_SERDES_LINK; res =3D yt921x_reg_clear_bits(priv, YT921X_SERDESn(port), mask); if (res) return res; - + } + if (BIT(port) & info->xmii_mask) { mask =3D YT921X_XMII_LINK; res =3D yt921x_reg_clear_bits(priv, YT921X_XMIIn(port), mask); if (res) @@ -3771,6 +3773,8 @@ yt921x_port_up(struct yt921x_priv *priv, int port, un= signed int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause) { + const struct yt921x_info *info =3D priv->info; + struct yt921x_port *pp =3D &priv->ports[port]; u32 mask; u32 ctrl; int res; @@ -3805,7 +3809,10 @@ yt921x_port_up(struct yt921x_priv *priv, int port, u= nsigned int mode, if (res) return res; =20 - if (yt921x_port_is_external(port)) { + if (!(BIT(port) & (info->serdes_mask | info->xmii_mask))) + return 0; + + if (pp->serdes) { mask =3D YT921X_SERDES_SPEED_M; switch (speed) { case SPEED_10: @@ -3841,7 +3848,7 @@ yt921x_port_up(struct yt921x_priv *priv, int port, un= signed int mode, mask, ctrl); if (res) return res; - + } else { mask =3D YT921X_XMII_LINK; res =3D yt921x_reg_set_bits(priv, YT921X_XMIIn(port), mask); if (res) @@ -3881,17 +3888,16 @@ static int yt921x_port_config(struct yt921x_priv *priv, int port, unsigned int mode, phy_interface_t interface) { + const struct yt921x_info *info =3D priv->info; + struct yt921x_port *pp =3D &priv->ports[port]; struct device *dev =3D to_device(priv); u32 mask; u32 ctrl; int res; =20 - if (!yt921x_port_is_external(port)) { - if (interface !=3D PHY_INTERFACE_MODE_INTERNAL) { - dev_err(dev, "Wrong mode %d on port %d\n", - interface, port); - return -EINVAL; - } + if (BIT(port) & info->internal_mask) { + if (interface !=3D PHY_INTERFACE_MODE_INTERNAL) + goto err; return 0; } =20 @@ -3901,6 +3907,9 @@ yt921x_port_config(struct yt921x_priv *priv, int port= , unsigned int mode, case PHY_INTERFACE_MODE_100BASEX: case PHY_INTERFACE_MODE_1000BASEX: case PHY_INTERFACE_MODE_2500BASEX: + if (!(BIT(port) & info->serdes_mask)) + goto err; + mask =3D YT921X_SERDES_CTRL_PORTn(port); res =3D yt921x_reg_set_bits(priv, YT921X_SERDES_CTRL, mask); if (res) @@ -3933,13 +3942,18 @@ yt921x_port_config(struct yt921x_priv *priv, int po= rt, unsigned int mode, if (res) return res; =20 + pp->serdes =3D true; break; /* add XMII support here */ default: - return -EINVAL; + goto err; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next 3/7] net: dsa: motorcomm: Fix port control/status register bit field names Date: Thu, 10 Sep 2026 03:05:31 +0800 Message-ID: <20260909190541.466476-4-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260909190541.466476-1-mmyangfl@gmail.com> References: <20260909190541.466476-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Review and fix the incorrectness in the bit field names. No behavior changed. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 3 ++- drivers/net/dsa/motorcomm/chip.h | 7 ++++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 946949a3aba8..53d0a85e9310 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -3747,7 +3747,8 @@ static int yt921x_port_down(struct yt921x_priv *priv,= int port) u32 mask; int res; =20 - mask =3D YT921X_PORT_LINK | YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_MAC_EN; + mask =3D YT921X_PORT_CTRL_LINK_AN | YT921X_PORT_RX_MAC_EN | + YT921X_PORT_TX_MAC_EN; res =3D yt921x_reg_clear_bits(priv, YT921X_PORTn_CTRL(port), mask); if (res) return res; diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index 6f0123d219e0..e87daf8c650b 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -94,11 +94,12 @@ #define YT921X_SERDES_SPEED_1000 YT921X_SERDES_SPEED(2) #define YT921X_SERDES_SPEED_10000 YT921X_SERDES_SPEED(3) #define YT921X_SERDES_SPEED_2500 YT921X_SERDES_SPEED(4) -#define YT921X_PORTn_CTRL(port) (0x80100 + 4 * (port)) +#define YT921X_PORTn_CTRL(port) (0x80100 + 4 * (port)) /* Bit 7-0 shared= with PORT_STATUS */ #define YT921X_PORT_CTRL_PAUSE_AN BIT(10) +#define YT921X_PORT_CTRL_LINK_AN BIT(9) +#define YT921X_PORT_CTRL_HALF_PAUSE BIT(8) /* Half-duplex back pressure= mode */ #define YT921X_PORTn_STATUS(port) (0x80200 + 4 * (port)) -#define YT921X_PORT_LINK BIT(9) /* CTRL: auto negotiation */ -#define YT921X_PORT_HALF_PAUSE BIT(8) /* Half-duplex back pressure mod= e */ +#define YT921X_PORT_LINK BIT(8) #define YT921X_PORT_DUPLEX_FULL BIT(7) #define YT921X_PORT_RX_PAUSE BIT(6) #define YT921X_PORT_TX_PAUSE BIT(5) --=20 2.53.0 From nobody Fri Sep 25 18:20:31 2026 Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B1EE3AFAF1 for ; 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Wed, 09 Sep 2026 12:06:12 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76a0:d30::4d0:7b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2dcffa9827dsm13988515ad.66.2026.09.09.12.06.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Sep 2026 12:06:11 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next 4/7] net: dsa: motorcomm: Introduce yt921x_speed Date: Thu, 10 Sep 2026 03:05:32 +0800 Message-ID: <20260909190541.466476-5-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260909190541.466476-1-mmyangfl@gmail.com> References: <20260909190541.466476-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" FIELD_PREP values cannot be used as case labels. Introduce enum for future use. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 62 ++++---------------------------- drivers/net/dsa/motorcomm/chip.h | 61 +++++++++++++++++++++++-------- 2 files changed, 52 insertions(+), 71 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 53d0a85e9310..0635359787db 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -3776,29 +3776,15 @@ yt921x_port_up(struct yt921x_priv *priv, int port, = unsigned int mode, { const struct yt921x_info *info =3D priv->info; struct yt921x_port *pp =3D &priv->ports[port]; + int ps =3D ethtool_speed_to_yt921x(speed); u32 mask; u32 ctrl; int res; =20 - switch (speed) { - case SPEED_10: - ctrl =3D YT921X_PORT_SPEED_10; - break; - case SPEED_100: - ctrl =3D YT921X_PORT_SPEED_100; - break; - case SPEED_1000: - ctrl =3D YT921X_PORT_SPEED_1000; - break; - case SPEED_2500: - ctrl =3D YT921X_PORT_SPEED_2500; - break; - case SPEED_10000: - ctrl =3D YT921X_PORT_SPEED_10000; - break; - default: + if (ps =3D=3D YT921X_SPEED_NUM) return -EINVAL; - } + + ctrl =3D YT921X_PORT_SPEED(ps); if (duplex =3D=3D DUPLEX_FULL) ctrl |=3D YT921X_PORT_DUPLEX_FULL; if (tx_pause) @@ -3815,25 +3801,7 @@ yt921x_port_up(struct yt921x_priv *priv, int port, u= nsigned int mode, =20 if (pp->serdes) { mask =3D YT921X_SERDES_SPEED_M; - switch (speed) { - case SPEED_10: - ctrl =3D YT921X_SERDES_SPEED_10; - break; - case SPEED_100: - ctrl =3D YT921X_SERDES_SPEED_100; - break; - case SPEED_1000: - ctrl =3D YT921X_SERDES_SPEED_1000; - break; - case SPEED_2500: - ctrl =3D YT921X_SERDES_SPEED_2500; - break; - case SPEED_10000: - ctrl =3D YT921X_SERDES_SPEED_10000; - break; - default: - return -EINVAL; - } + ctrl =3D YT921X_SERDES_SPEED(ps); mask |=3D YT921X_SERDES_DUPLEX_FULL; if (duplex =3D=3D DUPLEX_FULL) ctrl |=3D YT921X_SERDES_DUPLEX_FULL; @@ -3855,25 +3823,7 @@ yt921x_port_up(struct yt921x_priv *priv, int port, u= nsigned int mode, if (res) return res; =20 - switch (speed) { - case SPEED_10: - ctrl =3D YT921X_MDIO_POLLING_SPEED_10; - break; - case SPEED_100: - ctrl =3D YT921X_MDIO_POLLING_SPEED_100; - break; - case SPEED_1000: - ctrl =3D YT921X_MDIO_POLLING_SPEED_1000; - break; - case SPEED_2500: - ctrl =3D YT921X_MDIO_POLLING_SPEED_2500; - break; - case SPEED_10000: - ctrl =3D YT921X_MDIO_POLLING_SPEED_10000; - break; - default: - return -EINVAL; - } + ctrl =3D YT921X_MDIO_POLLING_SPEED(ps); if (duplex =3D=3D DUPLEX_FULL) ctrl |=3D YT921X_MDIO_POLLING_DUPLEX_FULL; ctrl |=3D YT921X_MDIO_POLLING_LINK; diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index e87daf8c650b..dd121ef2cbf5 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -89,11 +89,6 @@ #define YT921X_SERDES_DUPLEX_FULL BIT(3) #define YT921X_SERDES_SPEED_M GENMASK(2, 0) #define YT921X_SERDES_SPEED(x) FIELD_PREP(YT921X_SERDES_SPEED_M, (x)) -#define YT921X_SERDES_SPEED_10 YT921X_SERDES_SPEED(0) -#define YT921X_SERDES_SPEED_100 YT921X_SERDES_SPEED(1) -#define YT921X_SERDES_SPEED_1000 YT921X_SERDES_SPEED(2) -#define YT921X_SERDES_SPEED_10000 YT921X_SERDES_SPEED(3) -#define YT921X_SERDES_SPEED_2500 YT921X_SERDES_SPEED(4) #define YT921X_PORTn_CTRL(port) (0x80100 + 4 * (port)) /* Bit 7-0 shared= with PORT_STATUS */ #define YT921X_PORT_CTRL_PAUSE_AN BIT(10) #define YT921X_PORT_CTRL_LINK_AN BIT(9) @@ -107,11 +102,6 @@ #define YT921X_PORT_TX_MAC_EN BIT(3) #define YT921X_PORT_SPEED_M GENMASK(2, 0) #define YT921X_PORT_SPEED(x) FIELD_PREP(YT921X_PORT_SPEED_M, (x)) -#define YT921X_PORT_SPEED_10 YT921X_PORT_SPEED(0) -#define YT921X_PORT_SPEED_100 YT921X_PORT_SPEED(1) -#define YT921X_PORT_SPEED_1000 YT921X_PORT_SPEED(2) -#define YT921X_PORT_SPEED_10000 YT921X_PORT_SPEED(3) -#define YT921X_PORT_SPEED_2500 YT921X_PORT_SPEED(4) #define YT921X_PON_STRAP_FUNC 0x80320 #define YT921X_PON_STRAP_VAL 0x80324 #define YT921X_PON_STRAP_CAP 0x80328 @@ -122,11 +112,16 @@ #define YT921X_MDIO_POLLING_LINK BIT(3) #define YT921X_MDIO_POLLING_SPEED_M GENMASK(2, 0) #define YT921X_MDIO_POLLING_SPEED(x) FIELD_PREP(YT921X_MDIO_POLLING_SP= EED_M, (x)) -#define YT921X_MDIO_POLLING_SPEED_10 YT921X_MDIO_POLLING_SPEED(0) -#define YT921X_MDIO_POLLING_SPEED_100 YT921X_MDIO_POLLING_SPEED(1) -#define YT921X_MDIO_POLLING_SPEED_1000 YT921X_MDIO_POLLING_SPEED(2) -#define YT921X_MDIO_POLLING_SPEED_10000 YT921X_MDIO_POLLING_SPEED(3) -#define YT921X_MDIO_POLLING_SPEED_2500 YT921X_MDIO_POLLING_SPEED(4) + +enum yt921x_speed { + YT921X_SPEED_10, + YT921X_SPEED_100, + YT921X_SPEED_1000, + YT921X_SPEED_10000, + YT921X_SPEED_2500, + YT921X_SPEED_NUM +}; + #define YT921X_SENSOR 0x8036c #define YT921X_SENSOR_TEMP BIT(18) #define YT921X_TEMP 0x80374 @@ -1009,4 +1004,40 @@ struct yt921x_priv { struct yt921x_acl_blk *acl_blks[YT921X_ACL_BLK_NUM]; }; =20 +static inline int ethtool_speed_to_yt921x(int speed) +{ + switch (speed) { + case SPEED_10: + return YT921X_SPEED_10; + case SPEED_100: + return YT921X_SPEED_100; + case SPEED_1000: + return YT921X_SPEED_1000; + case SPEED_2500: + return YT921X_SPEED_2500; + case SPEED_10000: + return YT921X_SPEED_10000; + default: + return YT921X_SPEED_NUM; + } +} + +static inline int yt921x_speed_to_ethtool(int speed) +{ + switch (speed) { + case YT921X_SPEED_10: + return SPEED_10; + case YT921X_SPEED_100: + return SPEED_100; + case YT921X_SPEED_1000: + return SPEED_1000; + case YT921X_SPEED_2500: + return SPEED_2500; + case YT921X_SPEED_10000: + return SPEED_10000; + default: + return SPEED_UNKNOWN; + } +} + #endif --=20 2.53.0 From nobody Fri Sep 25 18:20:31 2026 Received: from mail-pj2-f12.google.com (mail-pj2-f12.google.com [74.125.227.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D34A3AD53F for ; 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Wed, 09 Sep 2026 12:06:15 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76a0:d30::4d0:7b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2dcffa9827dsm13988515ad.66.2026.09.09.12.06.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Sep 2026 12:06:15 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next 5/7] net: dsa: motorcomm: Hoist port_to_priv helper into chip.h Date: Thu, 10 Sep 2026 03:05:33 +0800 Message-ID: <20260909190541.466476-6-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260909190541.466476-1-mmyangfl@gmail.com> References: <20260909190541.466476-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" yt921x_poll_mib() open-codes the same container_of_const() expression that leds.c defines as to_yt921x_priv(). Move the macro to chip.h as yt921x_port_to_priv() so both files use one definition. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 3 +-- drivers/net/dsa/motorcomm/chip.h | 3 +++ drivers/net/dsa/motorcomm/leds.c | 14 ++++++-------- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 0635359787db..beeb08f2b000 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -603,9 +603,8 @@ static void yt921x_poll_mib(struct work_struct *work) { struct yt921x_port *pp =3D container_of_const(work, struct yt921x_port, mib_read.work); - struct yt921x_priv *priv =3D (void *)(pp - pp->index) - - offsetof(struct yt921x_priv, ports); unsigned long delay =3D YT921X_STATS_INTERVAL_JIFFIES; + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int port =3D pp->index; int res; =20 diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index dd121ef2cbf5..b9a9e9d22d4b 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -1004,6 +1004,9 @@ struct yt921x_priv { struct yt921x_acl_blk *acl_blks[YT921X_ACL_BLK_NUM]; }; =20 +#define yt921x_port_to_priv(pp) \ + container_of_const((pp), struct yt921x_priv, ports[(pp)->index]) + static inline int ethtool_speed_to_yt921x(int speed) { switch (speed) { diff --git a/drivers/net/dsa/motorcomm/leds.c b/drivers/net/dsa/motorcomm/l= eds.c index 87a6b9cf6068..dd5b3684250d 100644 --- a/drivers/net/dsa/motorcomm/leds.c +++ b/drivers/net/dsa/motorcomm/leds.c @@ -12,8 +12,6 @@ #define to_yt921x_led(led_cdev) \ container_of_const((led_cdev), struct yt921x_led, cdev) #define to_yt921x_port(led) ((led)->port) -#define to_yt921x_priv(pp) \ - container_of_const((pp), struct yt921x_priv, ports[(pp)->index]) #define to_device(priv) ((priv)->ds.dev) =20 static u32 yt921x_led_regaddr(struct yt921x_priv *priv, int port, int grou= p) @@ -321,7 +319,7 @@ yt921x_cled_brightness_set_blocking(struct led_classdev= *led_cdev, { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int res; =20 mutex_lock(&priv->reg_lock); @@ -337,7 +335,7 @@ yt921x_cled_blink_set(struct led_classdev *led_cdev, un= signed long *delay_on, { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int res; =20 mutex_lock(&priv->reg_lock); @@ -353,7 +351,7 @@ yt921x_cled_hw_control_get_device(struct led_classdev *= led_cdev) { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); struct dsa_port *dp; =20 dp =3D dsa_to_port(&priv->ds, pp->index); @@ -374,7 +372,7 @@ yt921x_cled_hw_control_is_supported(struct led_classdev= *led_cdev, { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); =20 if (yt921x_led_trigger_is_supported(priv, pp->index, led->group, flags)) return 0; @@ -386,7 +384,7 @@ yt921x_cled_hw_control_get(struct led_classdev *led_cde= v, unsigned long *flagsp) { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int res; =20 mutex_lock(&priv->reg_lock); @@ -401,7 +399,7 @@ yt921x_cled_hw_control_set(struct led_classdev *led_cde= v, unsigned long flags) { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int res; =20 mutex_lock(&priv->reg_lock); --=20 2.53.0 From nobody Fri Sep 25 18:20:31 2026 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 534D23AEF2E for ; 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Wed, 09 Sep 2026 12:06:18 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76a0:d30::4d0:7b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2dcffa9827dsm13988515ad.66.2026.09.09.12.06.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Sep 2026 12:06:18 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next 6/7] net: dsa: motorcomm: Split MDIO bus module Date: Thu, 10 Sep 2026 03:05:34 +0800 Message-ID: <20260909190541.466476-7-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260909190541.466476-1-mmyangfl@gmail.com> References: <20260909190541.466476-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Split it in order to be used in other modules. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/Makefile | 1 + drivers/net/dsa/motorcomm/chip.c | 269 +------------------------- drivers/net/dsa/motorcomm/chip.h | 21 -- drivers/net/dsa/motorcomm/mdio_bus.c | 278 +++++++++++++++++++++++++++ drivers/net/dsa/motorcomm/mdio_bus.h | 37 ++++ 5 files changed, 317 insertions(+), 289 deletions(-) create mode 100644 drivers/net/dsa/motorcomm/mdio_bus.c create mode 100644 drivers/net/dsa/motorcomm/mdio_bus.h diff --git a/drivers/net/dsa/motorcomm/Makefile b/drivers/net/dsa/motorcomm= /Makefile index aeb12cb91f93..f7cce7eabbb8 100644 --- a/drivers/net/dsa/motorcomm/Makefile +++ b/drivers/net/dsa/motorcomm/Makefile @@ -2,4 +2,5 @@ obj-$(CONFIG_NET_DSA_YT921X) +=3D yt921x.o yt921x-objs :=3D chip.o yt921x-$(CONFIG_NET_DSA_YT921X_LEDS) +=3D leds.o +yt921x-objs +=3D mdio_bus.o yt921x-objs +=3D smi.o diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index beeb08f2b000..85a31389050b 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -27,6 +27,7 @@ =20 #include "chip.h" #include "leds.h" +#include "mdio_bus.h" #include "smi.h" =20 struct yt921x_mib_desc { @@ -271,274 +272,6 @@ static const struct yt921x_reg_ops yt921x_reg_ops_mdi= o =3D { =20 /* TODO: SPI/I2C */ =20 -static int yt921x_intif_wait(struct yt921x_priv *priv) -{ - u32 val =3D 0; - - return yt921x_reg_wait(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START, - &val); -} - -static int -yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) -{ - struct device *dev =3D to_device(priv); - u32 mask; - u32 ctrl; - u32 val; - int res; - - res =3D yt921x_intif_wait(priv); - if (res) - return res; - - mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | - YT921X_MBUS_CTRL_OP_M; - ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | - YT921X_MBUS_CTRL_READ; - res =3D yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START); - if (res) - return res; - - res =3D yt921x_intif_wait(priv); - if (res) - return res; - res =3D yt921x_reg_read(priv, YT921X_INT_MBUS_DIN, &val); - if (res) - return res; - - if ((u16)val !=3D val) - dev_info(dev, - "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n", - __func__, port, reg, val); - *valp =3D (u16)val; - return 0; -} - -static int -yt921x_intif_write(struct yt921x_priv *priv, int port, int reg, u16 val) -{ - u32 mask; - u32 ctrl; - int res; - - res =3D yt921x_intif_wait(priv); - if (res) - return res; - - mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | - YT921X_MBUS_CTRL_OP_M; - ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | - YT921X_MBUS_CTRL_WRITE; - res =3D yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_DOUT, val); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START); - if (res) - return res; - - return yt921x_intif_wait(priv); -} - -static int yt921x_mbus_int_read(struct mii_bus *mbus, int port, int reg) -{ - struct yt921x_priv *priv =3D mbus->priv; - u16 val; - int res; - - if (port >=3D YT921X_PORT_NUM) - return U16_MAX; - - mutex_lock(&priv->reg_lock); - res =3D yt921x_intif_read(priv, port, reg, &val); - mutex_unlock(&priv->reg_lock); - - if (res) - return res; - return val; -} - -static int -yt921x_mbus_int_write(struct mii_bus *mbus, int port, int reg, u16 data) -{ - struct yt921x_priv *priv =3D mbus->priv; - int res; - - if (port >=3D YT921X_PORT_NUM) - return -ENODEV; - - mutex_lock(&priv->reg_lock); - res =3D yt921x_intif_write(priv, port, reg, data); - mutex_unlock(&priv->reg_lock); - - return res; -} - -static int -yt921x_mbus_int_init(struct yt921x_priv *priv, struct device_node *mnp) -{ - struct device *dev =3D to_device(priv); - struct mii_bus *mbus; - int res; - - mbus =3D devm_mdiobus_alloc(dev); - if (!mbus) - return -ENOMEM; - - mbus->name =3D "YT921x internal MDIO bus"; - snprintf(mbus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); - mbus->priv =3D priv; - mbus->read =3D yt921x_mbus_int_read; - mbus->write =3D yt921x_mbus_int_write; - mbus->parent =3D dev; - mbus->phy_mask =3D (u32)~GENMASK(YT921X_PORT_NUM - 1, 0); - - res =3D devm_of_mdiobus_register(dev, mbus, mnp); - if (res) - return res; - - priv->mbus_int =3D mbus; - - return 0; -} - -static int yt921x_extif_wait(struct yt921x_priv *priv) -{ - u32 val =3D 0; - - return yt921x_reg_wait(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START, - &val); -} - -static int -yt921x_extif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) -{ - struct device *dev =3D to_device(priv); - u32 mask; - u32 ctrl; - u32 val; - int res; - - res =3D yt921x_extif_wait(priv); - if (res) - return res; - - mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | - YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M; - ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | - YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_READ; - res =3D yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START); - if (res) - return res; - - res =3D yt921x_extif_wait(priv); - if (res) - return res; - res =3D yt921x_reg_read(priv, YT921X_EXT_MBUS_DIN, &val); - if (res) - return res; - - if ((u16)val !=3D val) - dev_info(dev, - "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n", - __func__, port, reg, val); - *valp =3D (u16)val; - return 0; -} - -static int -yt921x_extif_write(struct yt921x_priv *priv, int port, int reg, u16 val) -{ - u32 mask; - u32 ctrl; - int res; - - res =3D yt921x_extif_wait(priv); - if (res) - return res; - - mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | - YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M; - ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | - YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_WRITE; - res =3D yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_DOUT, val); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START); - if (res) - return res; - - return yt921x_extif_wait(priv); -} - -static int yt921x_mbus_ext_read(struct mii_bus *mbus, int port, int reg) -{ - struct yt921x_priv *priv =3D mbus->priv; - u16 val; - int res; - - mutex_lock(&priv->reg_lock); - res =3D yt921x_extif_read(priv, port, reg, &val); - mutex_unlock(&priv->reg_lock); - - if (res) - return res; - return val; -} - -static int -yt921x_mbus_ext_write(struct mii_bus *mbus, int port, int reg, u16 data) -{ - struct yt921x_priv *priv =3D mbus->priv; - int res; - - mutex_lock(&priv->reg_lock); - res =3D yt921x_extif_write(priv, port, reg, data); - mutex_unlock(&priv->reg_lock); - - return res; -} - -static int -yt921x_mbus_ext_init(struct yt921x_priv *priv, struct device_node *mnp) -{ - struct device *dev =3D to_device(priv); - struct mii_bus *mbus; - int res; - - mbus =3D devm_mdiobus_alloc(dev); - if (!mbus) - return -ENOMEM; - - mbus->name =3D "YT921x external MDIO bus"; - snprintf(mbus->id, MII_BUS_ID_SIZE, "%s@ext", dev_name(dev)); - mbus->priv =3D priv; - /* TODO: c45? */ - mbus->read =3D yt921x_mbus_ext_read; - mbus->write =3D yt921x_mbus_ext_write; - mbus->parent =3D dev; - - res =3D devm_of_mdiobus_register(dev, mbus, mnp); - if (res) - return res; - - priv->mbus_ext =3D mbus; - - return 0; -} - /* Read and handle overflow of 32bit MIBs. MIB buffer must be zeroed befor= e. */ static int yt921x_read_mib(struct yt921x_priv *priv, int port) { diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index b9a9e9d22d4b..21132a147d6b 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -243,27 +243,6 @@ enum yt921x_speed { #define YT9218_SYS_CLK_167M 0 #define YT921X_SYS_CLK_143M 1 =20 -#define YT921X_EXT_MBUS_OP 0x6a000 -#define YT921X_INT_MBUS_OP 0xf0000 -#define YT921X_MBUS_OP_START BIT(0) -#define YT921X_EXT_MBUS_CTRL 0x6a004 -#define YT921X_INT_MBUS_CTRL 0xf0004 -#define YT921X_MBUS_CTRL_PORT_M GENMASK(25, 21) -#define YT921X_MBUS_CTRL_PORT(x) FIELD_PREP(YT921X_MBUS_CTRL_PORT_M, (= x)) -#define YT921X_MBUS_CTRL_REG_M GENMASK(20, 16) -#define YT921X_MBUS_CTRL_REG(x) FIELD_PREP(YT921X_MBUS_CTRL_REG_M, (x)) -#define YT921X_MBUS_CTRL_TYPE_M GENMASK(11, 8) /* wild guess */ -#define YT921X_MBUS_CTRL_TYPE(x) FIELD_PREP(YT921X_MBUS_CTRL_TYPE_M, (= x)) -#define YT921X_MBUS_CTRL_TYPE_C22 YT921X_MBUS_CTRL_TYPE(4) -#define YT921X_MBUS_CTRL_OP_M GENMASK(3, 2) /* wild guess */ -#define YT921X_MBUS_CTRL_OP(x) FIELD_PREP(YT921X_MBUS_CTRL_OP_M, (x)) -#define YT921X_MBUS_CTRL_WRITE YT921X_MBUS_CTRL_OP(1) -#define YT921X_MBUS_CTRL_READ YT921X_MBUS_CTRL_OP(2) -#define YT921X_EXT_MBUS_DOUT 0x6a008 -#define YT921X_INT_MBUS_DOUT 0xf0008 -#define YT921X_EXT_MBUS_DIN 0x6a00c -#define YT921X_INT_MBUS_DIN 0xf000c - #define YT921X_PORTn_EGR(port) (0x100000 + 4 * (port)) #define YT921X_PORT_EGR_TPID_CTAG_M GENMASK(5, 4) #define YT921X_PORT_EGR_TPID_CTAG(x) FIELD_PREP(YT921X_PORT_EGR_TPID_C= TAG_M, (x)) diff --git a/drivers/net/dsa/motorcomm/mdio_bus.c b/drivers/net/dsa/motorco= mm/mdio_bus.c new file mode 100644 index 000000000000..ba70343f3f33 --- /dev/null +++ b/drivers/net/dsa/motorcomm/mdio_bus.c @@ -0,0 +1,278 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2026 David Yang + */ + +#include + +#include "chip.h" +#include "mdio_bus.h" +#include "smi.h" + +#define to_device(priv) ((priv)->ds.dev) + +static int yt921x_intif_wait(struct yt921x_priv *priv) +{ + u32 val =3D 0; + + return yt921x_reg_wait(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START, + &val); +} + +static int +yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) +{ + struct device *dev =3D to_device(priv); + u32 mask; + u32 ctrl; + u32 val; + int res; + + res =3D yt921x_intif_wait(priv); + if (res) + return res; + + mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | + YT921X_MBUS_CTRL_OP_M; + ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | + YT921X_MBUS_CTRL_READ; + res =3D yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START); + if (res) + return res; + + res =3D yt921x_intif_wait(priv); + if (res) + return res; + res =3D yt921x_reg_read(priv, YT921X_INT_MBUS_DIN, &val); + if (res) + return res; + + if ((u16)val !=3D val) + dev_info(dev, + "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n", + __func__, port, reg, val); + *valp =3D (u16)val; + return 0; +} + +static int +yt921x_intif_write(struct yt921x_priv *priv, int port, int reg, u16 val) +{ + u32 mask; + u32 ctrl; + int res; + + res =3D yt921x_intif_wait(priv); + if (res) + return res; + + mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | + YT921X_MBUS_CTRL_OP_M; + ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | + YT921X_MBUS_CTRL_WRITE; + res =3D yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_DOUT, val); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START); + if (res) + return res; + + return yt921x_intif_wait(priv); +} + +static int yt921x_mbus_int_read(struct mii_bus *mbus, int port, int reg) +{ + struct yt921x_priv *priv =3D mbus->priv; + u16 val; + int res; + + if (port >=3D YT921X_PORT_NUM) + return U16_MAX; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_intif_read(priv, port, reg, &val); + mutex_unlock(&priv->reg_lock); + + if (res) + return res; + return val; +} + +static int +yt921x_mbus_int_write(struct mii_bus *mbus, int port, int reg, u16 data) +{ + struct yt921x_priv *priv =3D mbus->priv; + int res; + + if (port >=3D YT921X_PORT_NUM) + return -ENODEV; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_intif_write(priv, port, reg, data); + mutex_unlock(&priv->reg_lock); + + return res; +} + +int yt921x_mbus_int_init(struct yt921x_priv *priv, struct device_node *mnp) +{ + struct device *dev =3D to_device(priv); + struct mii_bus *mbus; + int res; + + mbus =3D devm_mdiobus_alloc(dev); + if (!mbus) + return -ENOMEM; + + mbus->name =3D "YT921x internal MDIO bus"; + snprintf(mbus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); + mbus->priv =3D priv; + mbus->read =3D yt921x_mbus_int_read; + mbus->write =3D yt921x_mbus_int_write; + mbus->parent =3D dev; + mbus->phy_mask =3D (u32)~GENMASK(YT921X_PORT_NUM - 1, 0); + + res =3D devm_of_mdiobus_register(dev, mbus, mnp); + if (res) + return res; + + priv->mbus_int =3D mbus; + + return 0; +} + +static int yt921x_extif_wait(struct yt921x_priv *priv) +{ + u32 val =3D 0; + + return yt921x_reg_wait(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START, + &val); +} + +static int +yt921x_extif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) +{ + struct device *dev =3D to_device(priv); + u32 mask; + u32 ctrl; + u32 val; + int res; + + res =3D yt921x_extif_wait(priv); + if (res) + return res; + + mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | + YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M; + ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | + YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_READ; + res =3D yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START); + if (res) + return res; + + res =3D yt921x_extif_wait(priv); + if (res) + return res; + res =3D yt921x_reg_read(priv, YT921X_EXT_MBUS_DIN, &val); + if (res) + return res; + + if ((u16)val !=3D val) + dev_info(dev, + "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n", + __func__, port, reg, val); + *valp =3D (u16)val; + return 0; +} + +static int +yt921x_extif_write(struct yt921x_priv *priv, int port, int reg, u16 val) +{ + u32 mask; + u32 ctrl; + int res; + + res =3D yt921x_extif_wait(priv); + if (res) + return res; + + mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | + YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M; + ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | + YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_WRITE; + res =3D yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_DOUT, val); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START); + if (res) + return res; + + return yt921x_extif_wait(priv); +} + +static int yt921x_mbus_ext_read(struct mii_bus *mbus, int port, int reg) +{ + struct yt921x_priv *priv =3D mbus->priv; + u16 val; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_extif_read(priv, port, reg, &val); + mutex_unlock(&priv->reg_lock); + + if (res) + return res; + return val; +} + +static int +yt921x_mbus_ext_write(struct mii_bus *mbus, int port, int reg, u16 data) +{ + struct yt921x_priv *priv =3D mbus->priv; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_extif_write(priv, port, reg, data); + mutex_unlock(&priv->reg_lock); + + return res; +} + +int yt921x_mbus_ext_init(struct yt921x_priv *priv, struct device_node *mnp) +{ + struct device *dev =3D to_device(priv); + struct mii_bus *mbus; + int res; + + mbus =3D devm_mdiobus_alloc(dev); + if (!mbus) + return -ENOMEM; + + mbus->name =3D "YT921x external MDIO bus"; + snprintf(mbus->id, MII_BUS_ID_SIZE, "%s@ext", dev_name(dev)); + mbus->priv =3D priv; + /* TODO: c45? */ + mbus->read =3D yt921x_mbus_ext_read; + mbus->write =3D yt921x_mbus_ext_write; + mbus->parent =3D dev; + + res =3D devm_of_mdiobus_register(dev, mbus, mnp); + if (res) + return res; + + priv->mbus_ext =3D mbus; + + return 0; +} diff --git a/drivers/net/dsa/motorcomm/mdio_bus.h b/drivers/net/dsa/motorco= mm/mdio_bus.h new file mode 100644 index 000000000000..261a71c637f5 --- /dev/null +++ b/drivers/net/dsa/motorcomm/mdio_bus.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (c) 2026 David Yang + */ + +#ifndef _YT_MDIO_BUS_H +#define _YT_MDIO_BUS_H + +#include + +#define YT921X_EXT_MBUS_OP 0x6a000 +#define YT921X_INT_MBUS_OP 0xf0000 +#define YT921X_MBUS_OP_START BIT(0) +#define YT921X_EXT_MBUS_CTRL 0x6a004 +#define YT921X_INT_MBUS_CTRL 0xf0004 +#define YT921X_MBUS_CTRL_PORT_M GENMASK(25, 21) +#define YT921X_MBUS_CTRL_PORT(x) FIELD_PREP(YT921X_MBUS_CTRL_PORT_M, (= x)) +#define YT921X_MBUS_CTRL_REG_M GENMASK(20, 16) +#define YT921X_MBUS_CTRL_REG(x) FIELD_PREP(YT921X_MBUS_CTRL_REG_M, (x)) +#define YT921X_MBUS_CTRL_TYPE_M GENMASK(11, 8) /* wild guess */ +#define YT921X_MBUS_CTRL_TYPE(x) FIELD_PREP(YT921X_MBUS_CTRL_TYPE_M, (= x)) +#define YT921X_MBUS_CTRL_TYPE_C22 YT921X_MBUS_CTRL_TYPE(4) +#define YT921X_MBUS_CTRL_OP_M GENMASK(3, 2) /* wild guess */ +#define YT921X_MBUS_CTRL_OP(x) FIELD_PREP(YT921X_MBUS_CTRL_OP_M, (x)) +#define YT921X_MBUS_CTRL_WRITE YT921X_MBUS_CTRL_OP(1) +#define YT921X_MBUS_CTRL_READ YT921X_MBUS_CTRL_OP(2) +#define YT921X_EXT_MBUS_DOUT 0x6a008 +#define YT921X_INT_MBUS_DOUT 0xf0008 +#define YT921X_EXT_MBUS_DIN 0x6a00c +#define YT921X_INT_MBUS_DIN 0xf000c + +struct yt921x_priv; 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Wed, 09 Sep 2026 12:06:21 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76a0:d30::4d0:7b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2dcffa9827dsm13988515ad.66.2026.09.09.12.06.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Sep 2026 12:06:21 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next 7/7] net: dsa: motorcomm: Add SerDes PCS Date: Thu, 10 Sep 2026 03:05:35 +0800 Message-ID: <20260909190541.466476-8-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260909190541.466476-1-mmyangfl@gmail.com> References: <20260909190541.466476-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Support in-band negotiation of the SerDes ports. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/Makefile | 1 + drivers/net/dsa/motorcomm/chip.c | 78 ++++++---- drivers/net/dsa/motorcomm/chip.h | 8 +- drivers/net/dsa/motorcomm/mdio_bus.c | 28 +++- drivers/net/dsa/motorcomm/mdio_bus.h | 14 ++ drivers/net/dsa/motorcomm/pcs-921x.c | 209 +++++++++++++++++++++++++++ drivers/net/dsa/motorcomm/pcs.h | 13 ++ 7 files changed, 323 insertions(+), 28 deletions(-) create mode 100644 drivers/net/dsa/motorcomm/pcs-921x.c create mode 100644 drivers/net/dsa/motorcomm/pcs.h diff --git a/drivers/net/dsa/motorcomm/Makefile b/drivers/net/dsa/motorcomm= /Makefile index f7cce7eabbb8..1d2c1b3064c4 100644 --- a/drivers/net/dsa/motorcomm/Makefile +++ b/drivers/net/dsa/motorcomm/Makefile @@ -3,4 +3,5 @@ obj-$(CONFIG_NET_DSA_YT921X) +=3D yt921x.o yt921x-objs :=3D chip.o yt921x-$(CONFIG_NET_DSA_YT921X_LEDS) +=3D leds.o yt921x-objs +=3D mdio_bus.o +yt921x-objs +=3D pcs-921x.o yt921x-objs +=3D smi.o diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 85a31389050b..4780bb190ede 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -28,6 +28,7 @@ #include "chip.h" #include "leds.h" #include "mdio_bus.h" +#include "pcs.h" #include "smi.h" =20 struct yt921x_mib_desc { @@ -3516,6 +3517,10 @@ yt921x_port_up(struct yt921x_priv *priv, int port, u= nsigned int mode, if (ps =3D=3D YT921X_SPEED_NUM) return -EINVAL; =20 + mask =3D YT921X_PORT_SPEED_M | YT921X_PORT_TX_MAC_EN | + YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_PAUSE | + YT921X_PORT_RX_PAUSE | YT921X_PORT_DUPLEX_FULL | + YT921X_PORT_CTRL_LINK_AN; ctrl =3D YT921X_PORT_SPEED(ps); if (duplex =3D=3D DUPLEX_FULL) ctrl |=3D YT921X_PORT_DUPLEX_FULL; @@ -3524,7 +3529,9 @@ yt921x_port_up(struct yt921x_priv *priv, int port, un= signed int mode, if (rx_pause) ctrl |=3D YT921X_PORT_RX_PAUSE; ctrl |=3D YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_MAC_EN; - res =3D yt921x_reg_write(priv, YT921X_PORTn_CTRL(port), ctrl); + if (pp->serdes && pp->inband) + ctrl |=3D YT921X_PORT_CTRL_LINK_AN; + res =3D yt921x_reg_update_bits(priv, YT921X_PORTn_CTRL(port), mask, ctrl); if (res) return res; =20 @@ -3544,7 +3551,8 @@ yt921x_port_up(struct yt921x_priv *priv, int port, un= signed int mode, if (rx_pause) ctrl |=3D YT921X_SERDES_RX_PAUSE; mask |=3D YT921X_SERDES_LINK; - ctrl |=3D YT921X_SERDES_LINK; + if (!pp->inband) + ctrl |=3D YT921X_SERDES_LINK; res =3D yt921x_reg_update_bits(priv, YT921X_SERDESn(port), mask, ctrl); if (res) @@ -3575,7 +3583,6 @@ yt921x_port_config(struct yt921x_priv *priv, int port= , unsigned int mode, struct yt921x_port *pp =3D &priv->ports[port]; struct device *dev =3D to_device(priv); u32 mask; - u32 ctrl; int res; =20 if (BIT(port) & info->internal_mask) { @@ -3603,28 +3610,6 @@ yt921x_port_config(struct yt921x_priv *priv, int por= t, unsigned int mode, if (res) return res; =20 - mask =3D YT921X_SERDES_MODE_M; - switch (interface) { - case PHY_INTERFACE_MODE_SGMII: - ctrl =3D YT921X_SERDES_MODE_SGMII; - break; - case PHY_INTERFACE_MODE_100BASEX: - ctrl =3D YT921X_SERDES_MODE_100BASEX; - break; - case PHY_INTERFACE_MODE_1000BASEX: - ctrl =3D YT921X_SERDES_MODE_1000BASEX; - break; - case PHY_INTERFACE_MODE_2500BASEX: - ctrl =3D YT921X_SERDES_MODE_2500BASEX; - break; - default: - return -EINVAL; - } - res =3D yt921x_reg_update_bits(priv, YT921X_SERDESn(port), - mask, ctrl); - if (res) - return res; - pp->serdes =3D true; break; /* add XMII support here */ @@ -3639,6 +3624,24 @@ yt921x_port_config(struct yt921x_priv *priv, int por= t, unsigned int mode, return -EINVAL; } =20 +static struct phylink_pcs * +yt921x_phylink_mac_select_pcs(struct phylink_config *config, + phy_interface_t interface) +{ + struct dsa_port *dp =3D dsa_phylink_to_port(config); + struct yt921x_priv *priv =3D to_yt921x_priv(dp->ds); + + switch (interface) { + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_100BASEX: + case PHY_INTERFACE_MODE_1000BASEX: + case PHY_INTERFACE_MODE_2500BASEX: + return &priv->ports[dp->index].pcs; + default: + return NULL; + } +} + static void yt921x_phylink_mac_link_down(struct phylink_config *config, unsigned int m= ode, phy_interface_t interface) @@ -4226,6 +4229,11 @@ static int yt921x_chip_setup(struct yt921x_priv *pri= v) if (res) return res; =20 + res =3D yt921x_reg_clear_bits(priv, YT921X_SERDES_CTRL, + YT921X_SERDES_CTRL_TEST); + if (res) + return res; + return 0; } =20 @@ -4235,6 +4243,8 @@ static int yt921x_dsa_setup(struct dsa_switch *ds) struct device *dev =3D to_device(priv); struct device_node *np =3D dev->of_node; struct device_node *child; + unsigned long mask; + int port; int res; =20 mutex_lock(&priv->reg_lock); @@ -4268,6 +4278,23 @@ static int yt921x_dsa_setup(struct dsa_switch *ds) return -ENODEV; } =20 + mask =3D priv->info->serdes_mask; + for_each_set_bit(port, &mask, YT921X_PORT_NUM) { + struct yt921x_port *pp =3D &priv->ports[port]; + + pp->pcs.ops =3D &yt921x_phylink_pcs_ops; + pp->pcs.poll =3D true; + + __set_bit(PHY_INTERFACE_MODE_SGMII, + pp->pcs.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_100BASEX, + pp->pcs.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_1000BASEX, + pp->pcs.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_2500BASEX, + pp->pcs.supported_interfaces); + } + mutex_lock(&priv->reg_lock); res =3D yt921x_chip_setup(priv); mutex_unlock(&priv->reg_lock); @@ -4285,6 +4312,7 @@ static int yt921x_dsa_setup(struct dsa_switch *ds) } =20 static const struct phylink_mac_ops yt921x_phylink_mac_ops =3D { + .mac_select_pcs =3D yt921x_phylink_mac_select_pcs, .mac_link_down =3D yt921x_phylink_mac_link_down, .mac_link_up =3D yt921x_phylink_mac_link_up, .mac_config =3D yt921x_phylink_mac_config, diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index 21132a147d6b..42905e35928b 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -42,7 +42,7 @@ #define YT921X_PVID_SEL 0x80014 #define YT921X_PVID_SEL_SVID_PORTn(port) BIT(port) #define YT921X_SERDES_CTRL 0x80028 -#define YT921X_SERDES_CTRL_PORTn_TEST(port) BIT((port) - 3) +#define YT921X_SERDES_CTRL_TEST BIT(6) #define YT921X_SERDES_CTRL_PORTn(port) BIT((port) - 8) #define YT921X_IO_LEVEL 0x80030 #define YT9215_IO_LEVEL_NORMAL_M GENMASK(5, 4) @@ -910,6 +910,8 @@ struct yt921x_port { =20 /* SerDes in use */ bool serdes:1; + /* Link from in-band status (PHYLINK_PCS_NEG_INBAND) */ + bool inband:1; /* BR_HAIRPIN_MODE */ bool hairpin:1; /* BR_ISOLATED */ @@ -929,8 +931,12 @@ struct yt921x_port { =20 struct yt921x_led *leds[YT921X_LED_GROUP_NUM]; #endif + + struct phylink_pcs pcs; }; =20 +#define pcs_to_yt921x_port(_pcs) container_of((_pcs), struct yt921x_port, = pcs) + struct yt921x_reg_ops { int (*read)(void *context, u32 reg, u32 *valp); int (*write)(void *context, u32 reg, u32 val); diff --git a/drivers/net/dsa/motorcomm/mdio_bus.c b/drivers/net/dsa/motorco= mm/mdio_bus.c index ba70343f3f33..5a47ed7bff99 100644 --- a/drivers/net/dsa/motorcomm/mdio_bus.c +++ b/drivers/net/dsa/motorcomm/mdio_bus.c @@ -19,8 +19,7 @@ static int yt921x_intif_wait(struct yt921x_priv *priv) &val); } =20 -static int -yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) +int yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *va= lp) { struct device *dev =3D to_device(priv); u32 mask; @@ -86,6 +85,31 @@ yt921x_intif_write(struct yt921x_priv *priv, int port, i= nt reg, u16 val) return yt921x_intif_wait(priv); } =20 +int +yt921x_intif_modify_changed(struct yt921x_priv *priv, int port, int reg, + u16 mask, u16 val) +{ + int res; + u16 v; + u16 u; + + res =3D yt921x_intif_read(priv, port, reg, &v); + if (res) + return res; + + u =3D v; + u &=3D ~mask; + u |=3D val; + if (u =3D=3D v) + return 0; + + res =3D yt921x_intif_write(priv, port, reg, u); + if (res) + return res; + + return 1; +} + static int yt921x_mbus_int_read(struct mii_bus *mbus, int port, int reg) { struct yt921x_priv *priv =3D mbus->priv; diff --git a/drivers/net/dsa/motorcomm/mdio_bus.h b/drivers/net/dsa/motorco= mm/mdio_bus.h index 261a71c637f5..d859226fede8 100644 --- a/drivers/net/dsa/motorcomm/mdio_bus.h +++ b/drivers/net/dsa/motorcomm/mdio_bus.h @@ -31,6 +31,20 @@ =20 struct yt921x_priv; =20 +int yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *va= lp); +int yt921x_intif_modify_changed(struct yt921x_priv *priv, int port, int re= g, + u16 mask, u16 val); + +static inline int +yt921x_intif_modify(struct yt921x_priv *priv, int port, int reg, u16 mask, + u16 val) +{ + int res; + + res =3D yt921x_intif_modify_changed(priv, port, reg, mask, val); + return res >=3D 0 ? 0 : res; +} + int yt921x_mbus_int_init(struct yt921x_priv *priv, struct device_node *mnp= ); int yt921x_mbus_ext_init(struct yt921x_priv *priv, struct device_node *mnp= ); =20 diff --git a/drivers/net/dsa/motorcomm/pcs-921x.c b/drivers/net/dsa/motorco= mm/pcs-921x.c new file mode 100644 index 000000000000..eef6e79c099b --- /dev/null +++ b/drivers/net/dsa/motorcomm/pcs-921x.c @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2026 David Yang + */ + +#include "chip.h" +#include "mdio_bus.h" +#include "pcs.h" +#include "smi.h" + +#define to_device(priv) ((priv)->ds.dev) + +static int +yt921x_serdes_config(struct yt921x_priv *priv, int port, unsigned int neg_= mode, + phy_interface_t interface, + const unsigned long *advertising) +{ + bool inband =3D neg_mode & PHYLINK_PCS_NEG_INBAND; + struct yt921x_port *pp =3D &priv->ports[port]; + bool changed =3D false; + u16 bmcr; + u32 mask; + u32 ctrl; + int adv; + int res; + + switch (interface) { + case PHY_INTERFACE_MODE_SGMII: + ctrl =3D YT921X_SERDES_MODE_SGMII; + break; + case PHY_INTERFACE_MODE_100BASEX: + ctrl =3D YT921X_SERDES_MODE_100BASEX; + break; + case PHY_INTERFACE_MODE_1000BASEX: + ctrl =3D YT921X_SERDES_MODE_1000BASEX; + break; + case PHY_INTERFACE_MODE_2500BASEX: + ctrl =3D YT921X_SERDES_MODE_2500BASEX; + break; + default: + return -EOPNOTSUPP; + } + + res =3D yt921x_reg_update_bits(priv, YT921X_SERDESn(port), + YT921X_SERDES_MODE_M, ctrl); + if (res) + return res; + + mask =3D YT921X_PORT_CTRL_LINK_AN | YT921X_PORT_CTRL_PAUSE_AN; + ctrl =3D 0; + if (inband) + ctrl |=3D YT921X_PORT_CTRL_LINK_AN; + if (neg_mode =3D=3D PHYLINK_PCS_NEG_INBAND_ENABLED) + ctrl |=3D YT921X_PORT_CTRL_PAUSE_AN; + res =3D yt921x_reg_update_bits(priv, YT921X_PORTn_CTRL(port), mask, ctrl); + if (res) + return res; + + if (inband) { + res =3D yt921x_reg_clear_bits(priv, YT921X_SERDESn(port), + YT921X_SERDES_LINK); + if (res) + return res; + } + + adv =3D phylink_mii_c22_pcs_encode_advertisement(interface, advertising); + if (adv >=3D 0) { + res =3D yt921x_intif_modify_changed(priv, port, MII_ADVERTISE, + U16_MAX, adv); + if (res < 0) + return res; + + changed =3D !!res; + } + + bmcr =3D neg_mode =3D=3D PHYLINK_PCS_NEG_INBAND_ENABLED ? BMCR_ANENABLE := 0; + res =3D yt921x_intif_modify_changed(priv, port, MII_BMCR, + BMCR_ANENABLE | BMCR_ISOLATE, bmcr); + if (res < 0) + return res; + + /* If the ANENABLE bit was changed, the PHY will restart negotiation, + * so we don't need to flag a change to trigger its own restart. + */ + if (res) + changed =3D false; + + pp->inband =3D inband; + return changed; +} + +static unsigned int +yt921x_phylink_pcs_inband_caps(struct phylink_pcs *pcs, + phy_interface_t interface) +{ + return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE; +} + +static void +yt921x_phylink_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mod= e, + struct phylink_link_state *state) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + struct device *dev =3D to_device(priv); + int port =3D pp->index; + u16 bmsr; + u16 lpa; + int res; + + mutex_lock(&priv->reg_lock); + + res =3D yt921x_intif_read(priv, port, MII_BMSR, &bmsr); + if (res) + goto out; + + res =3D yt921x_intif_read(priv, port, MII_LPA, &lpa); + +out: + mutex_unlock(&priv->reg_lock); + + if (res) { + dev_err(dev, "Failed to %s PCS port %d: %i\n", "get state of", + port, res); + state->link =3D false; + return; + } + + phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); +} + +static void yt921x_phylink_pcs_an_restart(struct phylink_pcs *pcs) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + struct device *dev =3D to_device(priv); + int port =3D pp->index; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_intif_modify(priv, port, MII_BMCR, BMCR_ANRESTART, + BMCR_ANRESTART); + mutex_unlock(&priv->reg_lock); + + if (res) + dev_err(dev, "Failed to %s PCS port %d: %i\n", "restart", + port, res); +} + +static void yt921x_phylink_pcs_disable(struct phylink_pcs *pcs) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + struct device *dev =3D to_device(priv); + int port =3D pp->index; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_intif_modify(priv, port, MII_BMCR, BMCR_PDOWN, + BMCR_PDOWN); + mutex_unlock(&priv->reg_lock); + + if (res) + dev_err(dev, "Failed to %s PCS port %d: %i\n", "power down", + port, res); +} + +static int yt921x_phylink_pcs_enable(struct phylink_pcs *pcs) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + int port =3D pp->index; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_intif_modify(priv, port, MII_BMCR, + BMCR_PDOWN | BMCR_ANRESTART, BMCR_ANRESTART); + mutex_unlock(&priv->reg_lock); + + return res; +} + +static int +yt921x_phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, + phy_interface_t interface, + const unsigned long *advertising, + bool permit_pause_to_mac) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + int port =3D pp->index; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_serdes_config(priv, port, neg_mode, interface, + advertising); + mutex_unlock(&priv->reg_lock); + + return res; +} + +const struct phylink_pcs_ops yt921x_phylink_pcs_ops =3D { + .pcs_inband_caps =3D yt921x_phylink_pcs_inband_caps, + .pcs_get_state =3D yt921x_phylink_pcs_get_state, + .pcs_an_restart =3D yt921x_phylink_pcs_an_restart, + .pcs_disable =3D yt921x_phylink_pcs_disable, + .pcs_enable =3D yt921x_phylink_pcs_enable, + .pcs_config =3D yt921x_phylink_pcs_config, +}; diff --git a/drivers/net/dsa/motorcomm/pcs.h b/drivers/net/dsa/motorcomm/pc= s.h new file mode 100644 index 000000000000..42426558086a --- /dev/null +++ b/drivers/net/dsa/motorcomm/pcs.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (c) 2026 David Yang + */ + +#ifndef _YT_PCS_H +#define _YT_PCS_H + +#include + +extern const struct phylink_pcs_ops yt921x_phylink_pcs_ops; + +#endif --=20 2.53.0