From nobody Fri Sep 25 18:24:27 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C52FE58123E; Wed, 9 Sep 2026 14:33:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788964435; cv=none; b=EOAidjks1yZ+RPYw8qZxE0AtQTyC6BY89moD+Pb0GVCZtsOashMi3+FwIY2F/enOmE83WPYSfEfuP2wQN5i4a8n2ni2kvnK0BvioXgIqdcsLL/NTkMA7tXKi0xedeMwmDS3OExDlhK0aDAfwy+LLv7gi0bz9v8xHAzKFhRiRkGw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788964435; c=relaxed/simple; bh=rssftvIB7JoeWgPHfSiz0eTsk9hUcMMvgkEOARy/pIY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YehKCmi95wykpbEL9Pb71ox0KHyvuzFSZsLTSW7+SH82YN1cqUSR3kjS1Yi9K9O5SvpcRED9welomQ6klSnT+8ma1v8X2nJ/XodY73l+xpPfsM616KNlo7zoCMclHHbVoQoTctGwr8ENiKWgyaoRUXmWfYt28MgYMUBki3gohGk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kAdba5f+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kAdba5f+" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7355DC2BCF6; Wed, 9 Sep 2026 14:33:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788964435; bh=rssftvIB7JoeWgPHfSiz0eTsk9hUcMMvgkEOARy/pIY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=kAdba5f+RakFKdpMriPx1K93vIY7A5TJlvMhh9DExtsyDexUCDVEZ418E4+NoahYY B+E6TRxpMZE2szTyFudEjcHwoWMqIC66u9usikNxZXkdY2/XsNi8NMSHxRoAlpglF6 XIxrLtBeIkXvjoZ2UTBtKPxllGpu7rlVUfuXk+e/JbF1PL+E1IVU0940hfWm/eyNUg +EVveEAWOp/hYZqxk86WoK0S2FPa7wGAWa/iH6bunGbxF5TunBTQabun3ZhrIAddlm RU8ymDtID0PhONxXkPI0q19A+uDlt8JhqaBJXM3k2me9MN4WnOMiEuMlItMB+uoVpx Hu8hzilLcI5AQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D8DAC79FB7; Wed, 9 Sep 2026 14:33:55 +0000 (UTC) From: =?utf-8?q?=E5=AE=89=E5=AE=B9_via_B4_Relay?= Date: Wed, 09 Sep 2026 22:33:22 +0800 Subject: [PATCH v3 1/5] arm64: dts: rockchip: Reset the NanoPi Zero2 PHY from the MDIO bus Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260909-r28s-upstream-v3-1-ee3e1a34a353@proton.me> References: <20260909-r28s-upstream-v3-0-ee3e1a34a353@proton.me> In-Reply-To: <20260909-r28s-upstream-v3-0-ee3e1a34a353@proton.me> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Chukun Pan , jensen , Andrey Korshunov , Diederik de Haas , =?utf-8?q?=E5=AE=89=E5=AE=B9?= X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2540; i=HystericalDragons@proton.me; h=from:subject:message-id; bh=Uf1K3l1f7dmnIbSjn3YINB58f9z+/Y2KTLHOEJQ3J20=; b=owGbwMvMwCUmepz3XUtTHjvjabUkhqyFeYF5wTYZZufNc3dv9ruWplDnsHhyx9trYu0Lv3zrE u3q4vToKGVhEONikBVTZJHdVB0ptCp6ZhGL1HGYOaxMIEMYuDgFYCIvgxkZukw3NQa+aF/TeMRv 6UcLK3PfqOgfIS5GTAs2Tt2+6M6XWwz/tH+27+k/yZp+dYfyf4YzmlpG4X+yPcw2WyzvS5Y0qw9 kBwA= X-Developer-Key: i=HystericalDragons@proton.me; a=openpgp; fpr=1DB27B5912AA5B9972041AC715C70DEE84826E07 X-Endpoint-Received: by B4 Relay for HystericalDragons@proton.me/default with auth_id=1004 X-Original-From: =?utf-8?q?=E5=AE=89=E5=AE=B9?= Reply-To: HystericalDragons@proton.me From: =E5=AE=89=E5=AE=B9 The RGMII PHY reset is described in the PHY node, where it is applied too late to be of use. __of_mdiobus_register() registers the bus before walking its children, and for a PHY node without an explicit ethernet-phy-idAAAA.BBBB compatible, fwnode_mdiobus_register_phy() calls get_phy_device() to read the PHY ID over the bus before phy_device_register() gets as far as requesting reset-gpios. A PHY that the bootloader left in reset is therefore never found: mdio_bus stmmac-0: MDIO device at address 1 is missing. This happens with mainline U-Boot (generic-rk3528), which does not touch the pin, and leaves the port dead. Describe the reset on the MDIO bus instead. __mdiobus_register() asserts and releases the bus level reset-gpios before any device on the bus is registered, so the PHY responds whatever state the bootloader left it in. There is only one PHY on mdio1, so a bus wide reset is equivalent. The pin is muxed by the GPIO request itself, but keep gmac1_rstn_l described: move it to the MAC, as the MDIO bus has no device of its own to apply pinctrl to. Fixes: b944112abef4 ("arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2") Reported-by: Andrey Korshunov Closes: https://lore.kernel.org/r/20260909134716.879-1-razor1702@gmail.com Signed-off-by: =E5=AE=89=E5=AE=B9 Tested-by: Andrey Korshunov --- arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-nanopi-zero2.dts index 97d85124d2..f3e543d261 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts @@ -215,7 +215,7 @@ &gmac1 { phy-supply =3D <&vcc_3v3>; pinctrl-names =3D "default"; pinctrl-0 =3D <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, - <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>; + <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>; status =3D "okay"; }; =20 @@ -242,14 +242,13 @@ hym8563: rtc@51 { }; =20 &mdio1 { + reset-delay-us =3D <20000>; + reset-gpios =3D <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; + reset-post-delay-us =3D <100000>; + rgmii_phy: ethernet-phy@1 { compatible =3D "ethernet-phy-ieee802.3-c22"; reg =3D <0x1>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&gmac1_rstn_l>; - reset-assert-us =3D <20000>; - reset-deassert-us =3D <100000>; - reset-gpios =3D <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; }; }; =20 --=20 2.55.0 From nobody Fri Sep 25 18:24:27 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C51A05678C2; Wed, 9 Sep 2026 14:33:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788964435; cv=none; b=UJ5cJfbKxEhzmLial0m8H0RsofC6lmBnC0tbMtVRh7oAO6uef57scPFRjhO2o9cAt8+hZU+f9/fS/t0IRSRcJ72+BXZApqdkX89nUIh+SnugbUvFOFOzLfnZrkuNclo3HKcLtqXMluj367cai2rLUFaaIASM5uiz1ZQOH5wFP+s= ARC-Message-Signature: i=1; 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b=MIexx9cVy7xGow76/SZeKfZHD0bZaN92Lz8u260VU6kk5oGWWDNAQnZhgm6zCFj0U KKcSy/HzsepwFMAPe2quls+aFTsqYUCvQ3pk2MPezEdIsc0Kn7ZFzXSR5yBPDtwlnn 4bDowvWTrzDLypaHuKE4Gbmb/yyLnrxNHXB9zk6n+fIM/ex56taQFs+1cd40pm3Qq0 R9rV8B2U/GrwkoxPaQibv0W2X8akOUWnaY+WDNMwtJIjDM/To3YS65QZ9+53YEuW7Z 3INbK1cFqr59EvzY2Mk7CT/lr/bGORH2oGtiPGaCGYZjxep6oOuHJNumFruWYtaDB/ Vtg1jVLXSrRWg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65563C79FBF; Wed, 9 Sep 2026 14:33:55 +0000 (UTC) From: =?utf-8?q?=E5=AE=89=E5=AE=B9_via_B4_Relay?= Date: Wed, 09 Sep 2026 22:33:23 +0800 Subject: [PATCH v3 2/5] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260909-r28s-upstream-v3-2-ee3e1a34a353@proton.me> References: <20260909-r28s-upstream-v3-0-ee3e1a34a353@proton.me> In-Reply-To: <20260909-r28s-upstream-v3-0-ee3e1a34a353@proton.me> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Chukun Pan , jensen , Andrey Korshunov , Diederik de Haas , Conor Dooley , =?utf-8?q?=E5=AE=89=E5=AE=B9?= X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=973; i=HystericalDragons@proton.me; h=from:subject:message-id; bh=Al+UNS9q6dX1IoEkQ1GzieWtXOTRL+F7n2qKNKypKz8=; b=owGbwMvMwCUmepz3XUtTHjvjabUkhqyFeYE5T7cwyzTMcrwvk2Sezah6Lip800b/L6Kr+bnf3 7nNLSPSUcrCIMbFICumyCK7qTpSaFX0zCIWqeMwc1iZQIYwcHEKwEROnWP4H6twYqnoMdddQmfv aKlp969MMC13FGA5qhoUGNr0ZcZeI4Z/ljdSjjY0PS35WK54XC3eoqmv7vEj5pd3DlyVENrkc30 5DwA= X-Developer-Key: i=HystericalDragons@proton.me; a=openpgp; fpr=1DB27B5912AA5B9972041AC715C70DEE84826E07 X-Endpoint-Received: by B4 Relay for HystericalDragons@proton.me/default with auth_id=1004 X-Original-From: =?utf-8?q?=E5=AE=89=E5=AE=B9?= Reply-To: HystericalDragons@proton.me From: =E5=AE=89=E5=AE=B9 The NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC. Acked-by: Conor Dooley Signed-off-by: =E5=AE=89=E5=AE=B9 --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 81744fbee9..709e2cc44d 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -347,6 +347,11 @@ properties: - friendlyarm,nanopi-r2s-plus - const: rockchip,rk3328 =20 + - description: FriendlyElec NanoPi R28S + items: + - const: friendlyarm,nanopi-r28s + - const: rockchip,rk3528 + - description: FriendlyElec NanoPi R3S items: - const: friendlyarm,nanopi-r3s --=20 2.55.0 From nobody Fri Sep 25 18:24:27 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D1088583ACD; Wed, 9 Sep 2026 14:33:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788964435; cv=none; b=bvzGr+ucH4Uxn6RreDseaY/DIB/vsEdgPztPKTRkw8oIgf9tPtoBPJHhwPe4N+S3GpQH/Yxt+GO65NZSPH+sfAnGRtF1NTxznAPETwfbpr8lPNhrAELVPN/TUHDYeDFmrmbpoe9MS39zwZf+gW8IzKbhiXNc72e4SDsNCh960WE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788964435; c=relaxed/simple; bh=/dnOAFjgD65a7rUyG2CJOGISPWKerYPROIlApAsgdHI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GixUKUKysUdvvd2i+h648Qv/cXr9axWIczMdhF4YN4Wv4TN/Ytq6QMSif7RILQmDriLqsuWNmCOq7lSKPF3iEuF+elzJEtCIv2tU6fcrKpcpHLpnWbdxSN1IU0panqNr6lbZBMTuxKleU0zbSAkA3NP2FUQfGSmKXyYh6xr1/ps= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=q0yegp4e; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="q0yegp4e" Received: by smtp.kernel.org (Postfix) with ESMTPS id 94765C2BCFD; Wed, 9 Sep 2026 14:33:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788964435; bh=/dnOAFjgD65a7rUyG2CJOGISPWKerYPROIlApAsgdHI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=q0yegp4eXhqDI0eDxJEYXGMHva/6LrtosbPjcwGCd9BA8ZvQ1jMyEIaiWe6yl+e7i 5p19PzzxpQaNE/c00LoM7ZmlHqJn8VUvrkYb5aJHiEkEj3yo58aL6TB79Bgtt5sIbz JmTUdU6aYVaup+UXm51fYGkXyVZiBy4zmpPbQJlHNqgxQBhVGlr+JzuwJc9xYJ6xef cS3r1s8FceNMd51rg8cKKOYTIvn+iYuKkJIpRz95VfKYiN4BHyy02Rm8gafd484du6 z0w6wAXppwHYr5x9WHuRbLNXt2k8qCS0LEjVEOBN4VXIP4fuxdn0JlIL4vO1Uul9Go Wc0vlNjzizK8w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F79CC79FB6; Wed, 9 Sep 2026 14:33:55 +0000 (UTC) From: =?utf-8?q?=E5=AE=89=E5=AE=B9_via_B4_Relay?= Date: Wed, 09 Sep 2026 22:33:24 +0800 Subject: [PATCH v3 3/5] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260909-r28s-upstream-v3-3-ee3e1a34a353@proton.me> References: <20260909-r28s-upstream-v3-0-ee3e1a34a353@proton.me> In-Reply-To: <20260909-r28s-upstream-v3-0-ee3e1a34a353@proton.me> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Chukun Pan , jensen , Andrey Korshunov , Diederik de Haas , =?utf-8?q?=E5=AE=89=E5=AE=B9?= X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=14536; i=HystericalDragons@proton.me; h=from:subject:message-id; bh=iYz8xllcFQzGi4761RTF8pt6XBa8xMjvrefO2RwP2jk=; b=owGbwMvMwCUmepz3XUtTHjvjabUkhqyFeYHramsK82oubGvf8V47aG7nyzyTxadT9/xn5t6z+ P0NsUS3jlIWBjEuBlkxRRbZTdWRQquiZxaxSB2HmcPKBDKEgYtTACYi8IHhn6ZpYdxU+U6rg5dP BuWcfbtvo+lEzYuPt5QHLio/82Dl4VWMDB+SftjEvz92W/cB45/sennHf7sPWV5yXZe3eUvDRZO SB9wA X-Developer-Key: i=HystericalDragons@proton.me; a=openpgp; fpr=1DB27B5912AA5B9972041AC715C70DEE84826E07 X-Endpoint-Received: by B4 Relay for HystericalDragons@proton.me/default with auth_id=1004 X-Original-From: =?utf-8?q?=E5=AE=89=E5=AE=B9?= Reply-To: HystericalDragons@proton.me From: =E5=AE=89=E5=AE=B9 The FriendlyElec NanoPi Zero2 and the NanoPi R28S share their power tree, storage, RGMII Ethernet, RTC and debug console. Move those parts into rk3528-nanopi.dtsi so the NanoPi R28S can reuse them, and leave only the board specific nodes in the NanoPi Zero2 devicetree. Suggested-by: Chukun Pan Signed-off-by: =E5=AE=89=E5=AE=B9 --- .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 270 +----------------= --- arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi | 278 +++++++++++++++++= ++++ 2 files changed, 279 insertions(+), 269 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-nanopi-zero2.dts index f3e543d261..48e4273872 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts @@ -2,41 +2,13 @@ =20 /dts-v1/; =20 -#include #include -#include -#include "rk3528.dtsi" +#include "rk3528-nanopi.dtsi" =20 / { model =3D "FriendlyElec NanoPi Zero2"; compatible =3D "friendlyarm,nanopi-zero2", "rockchip,rk3528"; =20 - aliases { - ethernet0 =3D &gmac1; - i2c1 =3D &i2c1; - mmc0 =3D &sdhci; - mmc1 =3D &sdmmc; - serial0 =3D &uart0; - }; - - chosen { - stdout-path =3D "serial0:1500000n8"; - }; - - adc-keys-0 { - compatible =3D "adc-keys"; - io-channels =3D <&saradc 0>; - io-channel-names =3D "buttons"; - keyup-threshold-microvolt =3D <1800000>; - poll-interval =3D <100>; - - button-maskrom { - label =3D "MASK"; - linux,code =3D ; - press-threshold-microvolt =3D <0>; - }; - }; - adc-keys-1 { compatible =3D "adc-keys"; io-channels =3D <&saradc 1>; @@ -83,66 +55,6 @@ vcc0v6_ddr: regulator-0v6-vcc-ddr { vin-supply =3D <&vcc5v0_sys>; }; =20 - vdd_0v9: regulator-0v9-vdd { - compatible =3D "regulator-fixed"; - regulator-name =3D "vdd_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <900000>; - regulator-max-microvolt =3D <900000>; - vin-supply =3D <&vcc5v0_sys>; - }; - - vcc_ddr: regulator-1v1-vcc-ddr { - compatible =3D "regulator-fixed"; - regulator-name =3D "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <1100000>; - regulator-max-microvolt =3D <1100000>; - vin-supply =3D <&vcc5v0_sys>; - }; - - vcc_1v8: regulator-1v8-vcc { - compatible =3D "regulator-fixed"; - regulator-name =3D "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - vin-supply =3D <&vcc_3v3>; - }; - - vcc_3v3: regulator-3v3-vcc { - compatible =3D "regulator-fixed"; - regulator-name =3D "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - vin-supply =3D <&vcc5v0_sys>; - }; - - vcc3v3_sd: regulator-3v3-vcc-sd { - compatible =3D "regulator-fixed"; - gpios =3D <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&sdmmc_pwren_l>; - regulator-name =3D "vcc3v3_sd"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - vin-supply =3D <&vcc_3v3>; - }; - - vcc5v0_sys: regulator-5v0-vcc-sys { - compatible =3D "regulator-fixed"; - regulator-name =3D "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - }; - usb2_host_5v: regulator-5v0-usb2-host { compatible =3D "regulator-fixed"; enable-active-high; @@ -154,111 +66,9 @@ usb2_host_5v: regulator-5v0-usb2-host { regulator-max-microvolt =3D <5000000>; vin-supply =3D <&vcc5v0_sys>; }; - - vccio_sd: regulator-vccio-sd { - compatible =3D "regulator-gpio"; - gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&sdmmc_vol_ctrl_h>; - regulator-name =3D "vccio_sd"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - states =3D <1800000 0x0>, <3300000 0x1>; - vin-supply =3D <&vcc5v0_sys>; - }; - - vdd_arm: regulator-vdd-arm { - compatible =3D "pwm-regulator"; - pwms =3D <&pwm1 0 5000 PWM_POLARITY_INVERTED>; - pwm-supply =3D <&vcc5v0_sys>; - regulator-name =3D "vdd_arm"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <746000>; - regulator-max-microvolt =3D <1201000>; - regulator-settling-time-up-us =3D <250>; - }; - - vdd_logic: regulator-vdd-logic { - compatible =3D "pwm-regulator"; - pwms =3D <&pwm2 0 5000 PWM_POLARITY_INVERTED>; - pwm-supply =3D <&vcc5v0_sys>; - regulator-name =3D "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <705000>; - regulator-max-microvolt =3D <1006000>; - regulator-settling-time-up-us =3D <250>; - }; -}; - -&cpu0 { - cpu-supply =3D <&vdd_arm>; -}; - -&cpu1 { - cpu-supply =3D <&vdd_arm>; -}; - -&cpu2 { - cpu-supply =3D <&vdd_arm>; -}; - -&cpu3 { - cpu-supply =3D <&vdd_arm>; -}; - -&gmac1 { - clock_in_out =3D "output"; - phy-handle =3D <&rgmii_phy>; - phy-mode =3D "rgmii-id"; - phy-supply =3D <&vcc_3v3>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, - <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>; - status =3D "okay"; -}; - -&gpu { - mali-supply =3D <&vdd_logic>; - status =3D "okay"; -}; - -&i2c1 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c1m0_xfer>; - status =3D "okay"; - - hym8563: rtc@51 { - compatible =3D "haoyu,hym8563"; - reg =3D <0x51>; - #clock-cells =3D <0>; - interrupt-parent =3D <&gpio4>; - interrupts =3D ; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&rtc_int_l>; - wakeup-source; - }; -}; - -&mdio1 { - reset-delay-us =3D <20000>; - reset-gpios =3D <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; - reset-post-delay-us =3D <100000>; - - rgmii_phy: ethernet-phy@1 { - compatible =3D "ethernet-phy-ieee802.3-c22"; - reg =3D <0x1>; - }; }; =20 &pinctrl { - ethernet { - gmac1_rstn_l: gmac1-rstn-l { - rockchip,pins =3D <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - leds { led1: led1 { rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; @@ -269,22 +79,6 @@ led_sys: led-sys { }; }; =20 - rtc { - rtc_int_l: rtc-int-l { - rockchip,pins =3D <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdmmc { - sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { - rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sdmmc_pwren_l: sdmmc-pwren-l { - rockchip,pins =3D <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - usb { usb20_host1_pwren: usb20-host1-pwren { rockchip,pins =3D <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; @@ -292,52 +86,6 @@ usb20_host1_pwren: usb20-host1-pwren { }; }; =20 -&pwm1 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pwm1m0_pins>; - status =3D "okay"; -}; - -&pwm2 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pwm2m0_pins>; - status =3D "okay"; -}; - -&saradc { - vref-supply =3D <&vcc_1v8>; - status =3D "okay"; -}; - -&sdhci { - bus-width =3D <8>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - no-sd; - no-sdio; - non-removable; - vmmc-supply =3D <&vcc_3v3>; - vqmmc-supply =3D <&vcc_1v8>; - status =3D "okay"; -}; - -&sdmmc { - bus-width =3D <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - sd-uhs-sdr104; - vmmc-supply =3D <&vcc3v3_sd>; - vqmmc-supply =3D <&vccio_sd>; - status =3D "okay"; -}; - -&uart0 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&uart0m0_xfer>; - status =3D "okay"; -}; - &usb_host0_ehci { status =3D "okay"; }; @@ -346,23 +94,7 @@ &usb_host0_ohci { status =3D "okay"; }; =20 -&usb_host0_xhci { - extcon =3D <&usb2phy>; - maximum-speed =3D "high-speed"; - phys =3D <&usb2phy_otg>; - phy-names =3D "usb2-phy"; - status =3D "okay"; -}; - -&usb2phy { - status =3D "okay"; -}; - &usb2phy_host { phy-supply =3D <&usb2_host_5v>; status =3D "okay"; }; - -&usb2phy_otg { - status =3D "okay"; -}; diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi b/arch/arm64/b= oot/dts/rockchip/rk3528-nanopi.dtsi new file mode 100644 index 0000000000..1980d14d6f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi @@ -0,0 +1,278 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Common parts of the FriendlyElec RK3528 boards: NanoPi Zero2 and NanoPi= R28S. + */ + +#include +#include +#include "rk3528.dtsi" + +/ { + aliases { + ethernet0 =3D &gmac1; + i2c1 =3D &i2c1; + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc; + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:1500000n8"; + }; + + adc-keys-0 { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 0>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-maskrom { + label =3D "MASK"; + linux,code =3D ; + press-threshold-microvolt =3D <0>; + }; + }; + + vdd_0v9: regulator-0v9-vdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_ddr: regulator-1v1-vcc-ddr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_1v8: regulator-1v8-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc_3v3: regulator-3v3-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc3v3_sd: regulator-3v3-vcc-sd { + compatible =3D "regulator-fixed"; + gpios =3D <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_pwren_l>; + regulator-name =3D "vcc3v3_sd"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc5v0_sys: regulator-5v0-vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; + + vccio_sd: regulator-vccio-sd { + compatible =3D "regulator-gpio"; + gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_vol_ctrl_h>; + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + states =3D <1800000 0x0>, <3300000 0x1>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vdd_arm: regulator-vdd-arm { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm1 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_arm"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <746000>; + regulator-max-microvolt =3D <1201000>; + regulator-settling-time-up-us =3D <250>; + }; + + vdd_logic: regulator-vdd-logic { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm2 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <705000>; + regulator-max-microvolt =3D <1006000>; + regulator-settling-time-up-us =3D <250>; + }; +}; + +&cpu0 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_arm>; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy>; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&vcc_3v3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, + <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_logic>; + status =3D "okay"; +}; + +&i2c1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1m0_xfer>; + status =3D "okay"; + + hym8563: rtc@51 { + compatible =3D "haoyu,hym8563"; + reg =3D <0x51>; + #clock-cells =3D <0>; + interrupt-parent =3D <&gpio4>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rtc_int_l>; + wakeup-source; + }; +}; + +&mdio1 { + reset-delay-us =3D <20000>; + reset-gpios =3D <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; + reset-post-delay-us =3D <100000>; + + rgmii_phy: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + }; +}; + +&pinctrl { + ethernet { + gmac1_rstn_l: gmac1-rstn-l { + rockchip,pins =3D <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + rtc_int_l: rtc-int-l { + rockchip,pins =3D <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_pwren_l: sdmmc-pwren-l { + rockchip,pins =3D <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm1m0_pins>; + status =3D "okay"; +}; + +&pwm2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm2m0_pins>; + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc3v3_sd>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +&uart0 { + pinctrl-names =3D "default"; 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a=openpgp-sha256; l=4990; i=HystericalDragons@proton.me; h=from:subject:message-id; bh=j++VVr66sof9dIz+MZMFxHmP6yNpmBPeXTV3BFcBNuk=; b=owGbwMvMwCUmepz3XUtTHjvjabUkhqyFeYFpdgJvgzkVfHkSaphMf5c+XPAqzua2ydYfu1dna yxZNXF5RykLgxgXg6yYIovspupIoVXRM4tYpI7DzGFlAhnCwMUpABN5oMDI8FLqW9TGacvqDbxd P6r8ZszlKQg5Gvae/TTXJ97zhScDlzMyTKwXft9qNFtC8VbX/L2sN8/+MXaL5+bLzkuJm6T94N0 FLgA= X-Developer-Key: i=HystericalDragons@proton.me; a=openpgp; fpr=1DB27B5912AA5B9972041AC715C70DEE84826E07 X-Endpoint-Received: by B4 Relay for HystericalDragons@proton.me/default with auth_id=1004 X-Original-From: =?utf-8?q?=E5=AE=89=E5=AE=B9?= Reply-To: HystericalDragons@proton.me From: =E5=AE=89=E5=AE=B9 The NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC, designed and developed by FriendlyElec. It shares most of its design with the NanoPi Zero2, so it builds on the common rk3528-nanopi.dtsi. Specification: - Rockchip RK3528 - 1GB RAM - eMMC socket (optional) - MicroSD slot - 1x 1000Base-T (GMAC1, Realtek RTL8211F) - 1x 1000Base-T (PCIe, Realtek RTL8111H) - AICSemi AIC8800D80 SDIO WiFi - 3x LEDs (SYS, LAN, WAN) - 1x USB 2.0 Type-C, peripheral only, shared with the 5V power input - User and MaskROM buttons - Haoyu HYM8563 RTC - 1x USB Type-C debug UART (onboard WCH CH340E) Assisted-by: LLM Signed-off-by: =E5=AE=89=E5=AE=B9 --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts | 145 +++++++++++++++++= ++++ 2 files changed, 146 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index b677914cd3..51a9889088 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-vicharak-vaaman.d= tb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-armsom-sige1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-hinlink-h28k.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-nanopi-r28s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-nanopi-zero2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-radxa-e20c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-rock-2a.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts b/arch/arm= 64/boot/dts/rockchip/rk3528-nanopi-r28s.dts new file mode 100644 index 0000000000..6ad45d91cb --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. + * Copyright (c) 2026 FriendlyElec Computer Tech. Co., Ltd. + * Copyright (c) 2026 =E5=AE=89=E5=AE=B9 + */ + +/dts-v1/; + +#include +#include "rk3528-nanopi.dtsi" + +/ { + model =3D "FriendlyElec NanoPi R28S"; + compatible =3D "friendlyarm,nanopi-r28s", "rockchip,rk3528"; + + aliases { + mmc2 =3D &sdio0; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <&usr_btn>; + pinctrl-names =3D "default"; + + button-user { + debounce-interval =3D <50>; + gpios =3D <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + label =3D "USER"; + linux,code =3D ; + wakeup-source; + }; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-0 =3D <&led1>, <&led2>, <&led_sys>; + pinctrl-names =3D "default"; + + led-lan { + color =3D ; + default-state =3D "off"; + function =3D LED_FUNCTION_LAN; + gpios =3D <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "netdev"; + }; + + led-sys { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_HEARTBEAT; + gpios =3D <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + + led-wan { + color =3D ; + default-state =3D "off"; + function =3D LED_FUNCTION_WAN; + gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "netdev"; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + pinctrl-0 =3D <&pwr_wf>; + pinctrl-names =3D "default"; + post-power-on-delay-ms =3D <100>; + reset-gpios =3D <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + }; +}; + +&combphy { + status =3D "okay"; +}; + +&pcie { + pinctrl-0 =3D <&pcie_eth_perstb>; + pinctrl-names =3D "default"; + reset-gpios =3D <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc_3v3>; + + status =3D "okay"; +}; + +&pinctrl { + gpio-keys { + usr_btn: usr-btn { + rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + led1: led1 { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led2: led2 { + rockchip,pins =3D <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_sys: led-sys { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie_eth_perstb: pcie-eth-perstb { + rockchip,pins =3D <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifi { + pwr_wf: pwr-wf { + rockchip,pins =3D <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sdio0 { + bus-width =3D <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq =3D <&sdio_pwrseq>; + non-removable; + sd-uhs-sdr104; + vqmmc-supply =3D <&vcc_1v8>; + + status =3D "okay"; +}; + +&uart2 { + pinctrl-0 =3D <&uart2m1_xfer>, <&uart2m1_ctsn>, <&uart2m1_rtsn>; + pinctrl-names =3D "default"; + uart-has-rtscts; + + status =3D "okay"; +}; + +&usb_host0_xhci { + /* Type-C port, shared with the 5V power input */ + dr_mode =3D "peripheral"; +}; --=20 2.55.0 From nobody Fri Sep 25 18:24:27 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 309135908B9; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260909-r28s-upstream-v3-5-ee3e1a34a353@proton.me> References: <20260909-r28s-upstream-v3-0-ee3e1a34a353@proton.me> In-Reply-To: <20260909-r28s-upstream-v3-0-ee3e1a34a353@proton.me> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Chukun Pan , jensen , Andrey Korshunov , Diederik de Haas , =?utf-8?q?=E5=AE=89=E5=AE=B9?= X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4985; i=HystericalDragons@proton.me; h=from:subject:message-id; bh=Dx8JcLzyZT+3t40Yo8VLHukY1rcwOrhijfk5CDwzcYM=; b=owGbwMvMwCUmepz3XUtTHjvjabUkhqyFeYE7JdWva/W4qp3d+23SVVPXZafqJcsLzBN33Zij9 7zK9mJQRykLgxgXg6yYIovspupIoVXRM4tYpI7DzGFlAhnCwMUpABPZZcfwm82k4GDV/Emnb8i8 nLFiVVn0j+zz0WdEazScD7FsUP92zI+R4eaXS3cN3RfbX3Z2tN3bHW41r/GnWYewgeLUidfPJzE U8gMA X-Developer-Key: i=HystericalDragons@proton.me; a=openpgp; fpr=1DB27B5912AA5B9972041AC715C70DEE84826E07 X-Endpoint-Received: by B4 Relay for HystericalDragons@proton.me/default with auth_id=1004 X-Original-From: =?utf-8?q?=E5=AE=89=E5=AE=B9?= Reply-To: HystericalDragons@proton.me From: =E5=AE=89=E5=AE=B9 scripts/dtc/dt-check-style --mode=3Dstrict reports two deviations from Documentation/devicetree/bindings/dts-coding-style.rst in the shared NanoPi RK3528 devicetree and in the NanoPi Zero2 board devicetree: "pinctrl-0" has to sort before "pinctrl-names", and "status" has to be preceded by a blank line when the node has content before it. Sort the properties and add the missing blank lines. The generated devicetree blobs are unchanged. The remaining findings of the tool are left alone, as they contradict the established practice in arch/arm64/boot/dts/rockchip: "model" before "compatible", "regulator-name" before the other regulator properties, "regulator-min-microvolt" before "regulator-max-microvolt", "pwms" before "pwm-supply" and "linux,code" before "wakeup-source" or "press-threshold-microvolt". Suggested-by: Diederik de Haas Signed-off-by: =E5=AE=89=E5=AE=B9 --- .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 5 +++-- arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi | 26 +++++++++++++++---= ---- 2 files changed, 21 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-nanopi-zero2.dts index 48e4273872..96c537da6a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts @@ -25,8 +25,8 @@ button-recovery { =20 leds { compatible =3D "gpio-leds"; - pinctrl-names =3D "default"; pinctrl-0 =3D <&led1>, <&led_sys>; + pinctrl-names =3D "default"; =20 led-0 { color =3D ; @@ -59,8 +59,8 @@ usb2_host_5v: regulator-5v0-usb2-host { compatible =3D "regulator-fixed"; enable-active-high; gpios =3D <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names =3D "default"; pinctrl-0 =3D <&usb20_host1_pwren>; + pinctrl-names =3D "default"; regulator-name =3D "usb2_host_5v"; regulator-min-microvolt =3D <5000000>; regulator-max-microvolt =3D <5000000>; @@ -96,5 +96,6 @@ &usb_host0_ohci { =20 &usb2phy_host { phy-supply =3D <&usb2_host_5v>; + status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi b/arch/arm64/b= oot/dts/rockchip/rk3528-nanopi.dtsi index 1980d14d6f..45e31b90a7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi @@ -77,8 +77,8 @@ vcc_3v3: regulator-3v3-vcc { vcc3v3_sd: regulator-3v3-vcc-sd { compatible =3D "regulator-fixed"; gpios =3D <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; - pinctrl-names =3D "default"; pinctrl-0 =3D <&sdmmc_pwren_l>; + pinctrl-names =3D "default"; regulator-name =3D "vcc3v3_sd"; regulator-min-microvolt =3D <3300000>; regulator-max-microvolt =3D <3300000>; @@ -97,8 +97,8 @@ vcc5v0_sys: regulator-5v0-vcc-sys { vccio_sd: regulator-vccio-sd { compatible =3D "regulator-gpio"; gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - pinctrl-names =3D "default"; pinctrl-0 =3D <&sdmmc_vol_ctrl_h>; + pinctrl-names =3D "default"; regulator-name =3D "vccio_sd"; regulator-min-microvolt =3D <1800000>; regulator-max-microvolt =3D <3300000>; @@ -152,20 +152,23 @@ &gmac1 { phy-handle =3D <&rgmii_phy>; phy-mode =3D "rgmii-id"; phy-supply =3D <&vcc_3v3>; - pinctrl-names =3D "default"; pinctrl-0 =3D <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>; + pinctrl-names =3D "default"; + status =3D "okay"; }; =20 &gpu { mali-supply =3D <&vdd_logic>; + status =3D "okay"; }; =20 &i2c1 { - pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c1m0_xfer>; + pinctrl-names =3D "default"; + status =3D "okay"; =20 hym8563: rtc@51 { @@ -174,8 +177,8 @@ hym8563: rtc@51 { #clock-cells =3D <0>; interrupt-parent =3D <&gpio4>; interrupts =3D ; - pinctrl-names =3D "default"; pinctrl-0 =3D <&rtc_int_l>; + pinctrl-names =3D "default"; wakeup-source; }; }; @@ -216,19 +219,22 @@ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { }; =20 &pwm1 { - pinctrl-names =3D "default"; pinctrl-0 =3D <&pwm1m0_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; }; =20 &pwm2 { - pinctrl-names =3D "default"; pinctrl-0 =3D <&pwm2m0_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; }; =20 &saradc { vref-supply =3D <&vcc_1v8>; + status =3D "okay"; }; =20 @@ -241,6 +247,7 @@ &sdhci { non-removable; vmmc-supply =3D <&vcc_3v3>; vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; }; =20 @@ -252,12 +259,14 @@ &sdmmc { sd-uhs-sdr104; vmmc-supply =3D <&vcc3v3_sd>; vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; }; =20 &uart0 { - pinctrl-names =3D "default"; pinctrl-0 =3D <&uart0m0_xfer>; + pinctrl-names =3D "default"; + status =3D "okay"; }; =20 @@ -266,6 +275,7 @@ &usb_host0_xhci { maximum-speed =3D "high-speed"; phys =3D <&usb2phy_otg>; phy-names =3D "usb2-phy"; + status =3D "okay"; }; =20 --=20 2.55.0