From nobody Fri Sep 25 18:21:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7F9558F064; Wed, 9 Sep 2026 14:18:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788963538; cv=none; b=tS7Q/sgBdcZc4hgEcGPXEL9Ne1H5flPMAzmhjfyreoSjgKONFZsbOHuOztCxFWvpIb6PljD2dSSYh988WGHDF5mDCKOX6kay3Tu3BftLIxZlaZxMNBlXU8KXSlI2l/vLpwFOqVuoeX3lsYGRbSIZjr/Kqmbgo3Pgm5tTU6zkwIE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788963538; c=relaxed/simple; bh=eDY/84fI9eAZWaZK0CBpq5Ugke+3c7uiIu2GomKkXNY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=o24Sb6C5m7g+QPZAwKzn/KLLGpn+AJUMyiDr0o5RDXpQCBUnl+ZE0NXpFAgukK1l9ytdX2tTIxmqwX0V6uQKC+BgKvLdpEywD63D6TLNkiCy9gKls4zXtctdsnxPdukEj0YB2sMPKR3xkRDMOlndqjaOIJcDREvKC+/8GPXc+yg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=Tl4muBXN; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="Tl4muBXN" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1788963536; x=1820499536; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=eDY/84fI9eAZWaZK0CBpq5Ugke+3c7uiIu2GomKkXNY=; b=Tl4muBXN+KwvwcxMSHY/m07KibhYRpkmlvnXZti4sdeQ3zlq8INV9PJU yUz1SOUCo8odplwOG4j7LnluIPfIjKeH8hCnvDD9VLDJXXHhpbgbG3WD7 LT3Y1slDUDwxwF4XuVk75f/v/Ti7odKav6Yrd2DrI2VlSaJKoQXj45QEJ rK+/1x5P8+zCd4It+3twRpUeEeYScaPBRIpttUsWNiN0+ZUdnAWvuK7fa i5XbH3VEmxtTjJ0+nWbEAtW9qNNrhBg4Ydwzn++PqGOsx2Dnlr7fA+j3G waPaMgu3tyFvMWjwKaBb8rPVfnR6Bn2CQNQ22qF3BUPR1G0OwU++esItH g==; X-CSE-ConnectionGUID: TO8dTwVXQf6DsVxWun5fMg== X-CSE-MsgGUID: vW5HHvqATk6Ndqse01TJtg== X-IronPort-AV: E=Sophos;i="6.25,270,1779174000"; d="scan'208";a="73313016" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 09 Sep 2026 07:18:55 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Wed, 9 Sep 2026 07:18:55 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 9 Sep 2026 07:18:53 -0700 From: Ariana Lazar Date: Wed, 9 Sep 2026 17:18:44 +0300 Subject: [PATCH v5 01/10] iio: dac: mcp47feb02: initialize dac_data field in channel data struct at probe Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260909-mcp47feb02_refactor-v5-1-8b67bcab93d1@microchip.com> References: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> In-Reply-To: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788963530; l=1234; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=eDY/84fI9eAZWaZK0CBpq5Ugke+3c7uiIu2GomKkXNY=; b=e3nfkzO5LxVkhU1DChWZlpm+BL7PbC9z3MY2JPbYH4uXIsP/w/SYJ0dx+x2mT79pn+7a034cS j0i72xq6BCPDQonYlcP+OZ/IQqBpJXsWUXJzLu2BmsAAUJyw9jCl6HJ X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Prevent operations which use cache from overwriting default hardware values with zeros by reading active DAC registers during probe to correctly initialize the channel struct DAC values. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index a823c2a673a26d70e5829cb587034da435af0451..7502959d98eab27941d58b6b961= e6e3dee4222e6 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -1020,7 +1020,12 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb= 02_data *data) gain_ch =3D gain_ch & MCP47FEB02_GAIN_BITS_MASK; for_each_set_bit(i, &data->active_channels_mask, data->phys_channels) { struct device *dev =3D regmap_get_device(data->regmap); - unsigned int pd_tmp; + unsigned int pd_tmp, dac_val; + + ret =3D regmap_read(data->regmap, REG_ADDR(i), &dac_val); + if (ret) + return ret; + data->chdata[i].dac_data =3D dac_val; =20 data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; data->chdata[i].use_2x_gain =3D (gain_ch >> i) & MCP47FEB02_GAIN_BIT_MA= SK; --=20 2.43.0 From nobody Fri Sep 25 18:21:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8F4858F068; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260909-mcp47feb02_refactor-v5-2-8b67bcab93d1@microchip.com> References: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> In-Reply-To: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788963530; l=1709; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=dhaukSEkzUciDMy5eVXi8NEag21yuue0hUkXjr4iBwM=; b=fYRKNREgoOR6K17sWYV7wMT3VOdGw58VYC7x1GSg3299SMYV8/f6tXBiQ46+KJEJ22Io/ttMs mtyaVkN8ZylAj+JehJxoBoEqWIGle9/vMqZ3vuo5Zhu57f4DcNhsP25 X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= As per MCP47FXBX48 Datasheet, in the format of the Gain Control and System Status Register each DAC channel has one bit to control its gain, starting at bit 8, while bits 0-7 contain status or unimplemented bits. The previous formula didn't initialize correctly all channels, being replaced by the already defined macro used in write operations where needed in the rest of the driver implementation. DAC_GAIN_MASK(i) extracts the gain control bit for each active channel correctly ine one step. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 7502959d98eab27941d58b6b961e6e3dee4222e6..bf78618ac2c896b94e494a1ce76= ef5b3e520f482 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -1017,7 +1017,6 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) if (ret) return ret; =20 - gain_ch =3D gain_ch & MCP47FEB02_GAIN_BITS_MASK; for_each_set_bit(i, &data->active_channels_mask, data->phys_channels) { struct device *dev =3D regmap_get_device(data->regmap); unsigned int pd_tmp, dac_val; @@ -1028,7 +1027,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) data->chdata[i].dac_data =3D dac_val; =20 data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; - data->chdata[i].use_2x_gain =3D (gain_ch >> i) & MCP47FEB02_GAIN_BIT_MA= SK; + data->chdata[i].use_2x_gain =3D (gain_ch & DAC_GAIN_MASK(i)) ? 1 : 0; =20 /* * Inform the user that the current voltage reference read from the vola= tile --=20 2.43.0 From nobody Fri Sep 25 18:21:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C0CA58F078; Wed, 9 Sep 2026 14:19:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788963543; cv=none; b=l79MFUUSF2fG5AMlGbcPXJgmuN1smDToE+AZ/oOuXtxBJjUcD0ZO+WTxl7988hiGYOZ///HeKRAuisPbbm2VsHObtOK/0R9+eKm1bmfso4jyF/spuFlLnJdqnYn685laB0/WFi+MWUnmOKXb36dPegeUdyqpoEvmbzGmzq3rpnU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788963543; c=relaxed/simple; bh=M7VBk8FIgPIaUB2lPOsLSGOKSeEmxwO9WNXNNKgjIKc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=ViYfsYuQxzt6FQrjR5sP6gLiDkHS8GC/+FoylViA54afyf/0ig5kvDBEzLXzolgHgB4N/iGY+83bwRuddhfsiyNIgJtxL8aXtdL5QXMPjeHYq61RUBnKBbsw9dO4fXpASVmTuRIxIeKfUyqHzDOM5SWe4HxEPh38Ul/p0yJqPMw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=TDYh2FvX; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="TDYh2FvX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1788963542; x=1820499542; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=M7VBk8FIgPIaUB2lPOsLSGOKSeEmxwO9WNXNNKgjIKc=; b=TDYh2FvXCHlxzX8bFQp8yjl+V9z+3JEIN/ozrr4FwU67t2pSvJ6Zn6vb RnJMn2JOSarPC1Kl2h/w/oVxzTrmRkl41Ir9+Mopk2P6D7R91zCsjsALl fEBh0g8XM2/98e2hXyjrVjNmQJFrkEmGIuLfWCq3RmBEvH1PCRngSXfj1 8qFV0MsvKgd4pxoPqvKK/bFpfAZ8cN5sQwowJHhDRVjJYi3vaWG1rSRSJ ZGgbEndxZgUWMowV8kcfXXy2RwMlLlVAxOeVIbA0jMmDUbAnSSJDsb3Ff ZIimYlpej/QVeA3tLAXrdRhGOvpiCBNZIT7eGNiPPJj4EYI17mZ5HixsA w==; X-CSE-ConnectionGUID: minjwViPSTGXzdRrBf5YQg== X-CSE-MsgGUID: rfK2DfniTb27EOpkFR41XQ== X-IronPort-AV: E=Sophos;i="6.25,270,1779174000"; d="scan'208";a="294763994" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 09 Sep 2026 07:19:02 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Wed, 9 Sep 2026 07:19:01 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 9 Sep 2026 07:18:58 -0700 From: Ariana Lazar Date: Wed, 9 Sep 2026 17:18:46 +0300 Subject: [PATCH v5 03/10] iio: dac: mcp47feb02: Return len when disabling EEPROM store Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260909-mcp47feb02_refactor-v5-3-8b67bcab93d1@microchip.com> References: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> In-Reply-To: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788963530; l=851; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=M7VBk8FIgPIaUB2lPOsLSGOKSeEmxwO9WNXNNKgjIKc=; b=Kjg0BbDpOReFT9J9Btd2AqtrBKFdzunjWaE//SVci86Lyqr5FqS0It98wGblVR1DG20i82GoJ 1PPABC4NeTQDel6CpPbZlZYHoBiRugetnEmtOoSaUip0d8t0jGgs2RP X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= When state is false, return the number of bytes (len) the buffer has instead of 0 to properly signal that the input buffer was fully consumed, preventing unnecessary write retries. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index bf78618ac2c896b94e494a1ce76ef5b3e520f482..2ee981393aa1a2dc0bf65d25ab9= 37132fe2e7bf1 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -469,7 +469,7 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a return ret; =20 if (!state) - return 0; + return len; =20 /* * Verify DAC Wiper and DAC Configuration are unlocked. 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Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 2ee981393aa1a2dc0bf65d25ab937132fe2e7bf1..53a7bf4e71c46e75dff8bb5b16c= 343e7552f6901 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -449,7 +449,7 @@ static int mcp47feb02_write_to_eeprom(struct mcp47feb02= _data *data, unsigned int ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), - USEC_PER_MSEC, USEC_PER_MSEC * 5); + USEC_PER_MSEC, USEC_PER_MSEC * 1500); if (ret) return ret; =20 @@ -509,7 +509,7 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a =20 ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), - USEC_PER_MSEC, USEC_PER_MSEC * 5); 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Wed, 9 Sep 2026 07:19:04 -0700 From: Ariana Lazar Date: Wed, 9 Sep 2026 17:18:48 +0300 Subject: [PATCH v5 05/10] iio: dac: mcp47feb02: Avoid unjustified probe failure on missing label Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260909-mcp47feb02_refactor-v5-5-8b67bcab93d1@microchip.com> References: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> In-Reply-To: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788963530; l=991; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=pPXuISqpLOW+nKkX72vg+joZjaAIcuvbz7nTF3Yw0K4=; b=FH2KNx4b5+bnBVNhX11smoD3mtmLvs/ta639QWg05Fs4sE9xMzf3bOHljremg+selOw+1D8Ty lEKQGfuByQHBR24BFo5xGGDY9Y1UpE2ljoN3GvihHbWD6GmhR45s162 X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Fix unjustified probe failure on missing optional 'label' property by replacing dev_err_probe() with dev_err(). Correct %pfw usage by passing the child fwnode handle directly in the error message. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 53a7bf4e71c46e75dff8bb5b16c343e7552f6901..6353aabfe252e322a4f0d0efe20= 673f7e733a7f2 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -978,8 +978,7 @@ static int mcp47feb02_parse_fw(struct iio_dev *indio_de= v, =20 ret =3D fwnode_property_read_string(child, "label", &data->labels[reg]); if (ret) - return dev_err_probe(dev, ret, "%pfw: invalid label\n", - fwnode_get_name(child)); + dev_err(dev, "%pfw: invalid label\n", child); =20 chanspec.address =3D reg; chanspec.channel =3D reg; --=20 2.43.0 From nobody Fri Sep 25 18:21:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B9D445908D0; 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Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 6353aabfe252e322a4f0d0efe20673f7e733a7f2..c054711a55ca01be9e0aba57a2d= dbf192406fd47 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -53,7 +53,7 @@ #define DAC_CTRL_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) #define DAC_CTRL_VAL(ch, val) ((val) << (2 * (ch))) =20 -/* Gain Control and I2C Slave Address Reguster fields */ +/* Gain Control and I2C Slave Address Register fields */ #define DAC_GAIN_MASK(ch) (BIT(0) << (8 + (ch))) #define DAC_GAIN_VAL(ch, val) ((val) << (8 + (ch))) =20 --=20 2.43.0 From nobody Fri Sep 25 18:21:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3EDA592210; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260909-mcp47feb02_refactor-v5-7-8b67bcab93d1@microchip.com> References: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> In-Reply-To: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788963530; l=1903; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=wJZB/qoINM7AVZIhITt6LJmCeHlTSW/dK8UIYfcW38k=; b=xOTS7krn6ZbZISC40RqZiUVsv8BZdpeUZ4Cq40aJCuoP5BAUxvFTUwvtwoq70o2b+EjuTKcF7 yaMX08HpAHOBiu6Wuj2p0yb3t5/ucJssTDrBbzItDk37/zmPFXalrmB X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Use 2 new defines to select the corresponding bits for each channel in VREF and Power Down registers instead of the initial define without a meaningful name. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index c054711a55ca01be9e0aba57a2ddbf192406fd47..fb66bd2664a9e6dd938eacc9054= 7403041e258a4 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -33,8 +33,9 @@ /* Register addresses must be left shifted with 3 positions in order to ap= pend command mask */ #define MCP47FEB02_DAC0_REG_ADDR 0x00 #define MCP47FEB02_VREF_REG_ADDR 0x40 +#define MCP47FEB02_GET_VREF_MODE(reg, ch) (((reg) >> (2 * (ch))) & GENMAS= K(1, 0)) #define MCP47FEB02_POWER_DOWN_REG_ADDR 0x48 -#define MCP47FEB02_DAC_CTRL_MASK GENMASK(1, 0) +#define MCP47FEB02_GET_POWER_DOWN_MODE(reg, ch) (((reg) >> (2 * (ch))) & = GENMASK(1, 0)) =20 #define MCP47FEB02_GAIN_CTRL_STATUS_REG_ADDR 0x50 #define MCP47FEB02_GAIN_BIT_MASK BIT(0) @@ -1025,7 +1026,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) return ret; data->chdata[i].dac_data =3D dac_val; =20 - data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; + data->chdata[i].ref_mode =3D MCP47FEB02_GET_VREF_MODE(vref_ch, i); data->chdata[i].use_2x_gain =3D (gain_ch & DAC_GAIN_MASK(i)) ? 1 : 0; =20 /* @@ -1069,7 +1070,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) break; } =20 - pd_tmp =3D (pd_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_MASK; + pd_tmp =3D MCP47FEB02_GET_POWER_DOWN_MODE(pd_ch, i); data->chdata[i].powerdown_mode =3D pd_tmp ? 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The renamed file will contain the common DAC functionality shared by the MCP47FxBy1/2/4/8 I2C and MCP48FxBy1/2/4/8 SPI drivers. The MCP47FEB02 driver was refactored into two modules: mcp47feb02-core.c and mcp47feb02-i2c.c in order to prepare the support for SPI MCP48FxBy1/2/4/8 DAC family on top of the current implementation. Signed-off-by: Ariana Lazar --- MAINTAINERS | 2 +- drivers/iio/dac/Kconfig | 10 +- drivers/iio/dac/Makefile | 3 +- .../iio/dac/{mcp47feb02.c =3D> mcp47feb02-core.c} | 327 ++-------------= ------ drivers/iio/dac/mcp47feb02-i2c.c | 145 +++++++++ drivers/iio/dac/mcp47feb02.h | 43 +++ 6 files changed, 222 insertions(+), 308 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 6b4560681b51cfabf0b0e98fd89b69d8c527228b..3c8c1876c7871c060223e4f0823= bc7f724a77e39 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16118,7 +16118,7 @@ M: Ariana Lazar L: linux-iio@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml -F: drivers/iio/dac/mcp47feb02.c +F: drivers/iio/dac/mcp47feb02* =20 MCP4821 DAC DRIVER M: Anshul Dalal diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 657c68e75542e47ad5603165bcbc3660e90c6450..cc10d43ffd1e89bbf945ef89ea5= af0abe1a91084 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -550,8 +550,13 @@ config MCP4728 will be called mcp4728. =20 config MCP47FEB02 - tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 DAC driver" + tristate + +config MCP47FEB02_I2C + tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 I2C DAC driver" depends on I2C + select REGMAP_I2C + select MCP47FEB02 help Say yes here if you want to build the driver for the Microchip: - 8-bit DAC: @@ -567,7 +572,8 @@ config MCP47FEB02 (DAC) with I2C interface. =20 To compile this driver as a module, choose M here: the module - will be called mcp47feb02. + will be called mcp47feb02_i2c and you will also get + mcp47feb02_core for the core module. =20 config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 0034317984985035f7987a744899924bfd4612e3..28c8646a987cff1ac4d693fe868= 98d66c901d5bd 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -54,7 +54,8 @@ obj-$(CONFIG_MAX5522) +=3D max5522.o obj-$(CONFIG_MAX5821) +=3D max5821.o obj-$(CONFIG_MCP4725) +=3D mcp4725.o obj-$(CONFIG_MCP4728) +=3D mcp4728.o -obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02.o +obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o +obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02-core= .c similarity index 73% rename from drivers/iio/dac/mcp47feb02.c rename to drivers/iio/dac/mcp47feb02-core.c index fb66bd2664a9e6dd938eacc90547403041e258a4..4ef64a3408033501c724c7c52fd= 20686cc53722a 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02-core.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface + * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C and SPI interface * - * Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries * * Author: Ariana Lazar * @@ -16,12 +16,10 @@ #include #include #include -#include #include #include #include #include -#include #include #include #include @@ -30,6 +28,8 @@ #include #include =20 +#include "mcp47feb02.h" + /* Register addresses must be left shifted with 3 positions in order to ap= pend command mask */ #define MCP47FEB02_DAC0_REG_ADDR 0x00 #define MCP47FEB02_VREF_REG_ADDR 0x40 @@ -87,220 +87,12 @@ enum mcp47feb02_gain_bit_mode { MCP47FEB02_GAIN_BIT_X2 =3D 1, }; =20 -static const char * const mcp47feb02_powerdown_modes[] =3D { +const char * const mcp47feb02_powerdown_modes[] =3D { "1kohm_to_gnd", "100kohm_to_gnd", "open_circuit", }; =20 -/** - * struct mcp47feb02_features - chip specific data - * @name: device name - * @phys_channels: number of hardware channels - * @resolution: DAC resolution - * @have_ext_vref1: does the hardware have an the second external voltage = reference? - * @have_eeprom: does the hardware have an internal eeprom? - */ -struct mcp47feb02_features { - const char *name; - unsigned int phys_channels; - unsigned int resolution; - bool have_ext_vref1; - bool have_eeprom; -}; - -static const struct mcp47feb02_features mcp47feb01_chip_features =3D { - .name =3D "mcp47feb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb02_chip_features =3D { - .name =3D "mcp47feb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb04_chip_features =3D { - .name =3D "mcp47feb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb08_chip_features =3D { - .name =3D "mcp47feb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb11_chip_features =3D { - .name =3D "mcp47feb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb12_chip_features =3D { - .name =3D "mcp47feb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb14_chip_features =3D { - .name =3D "mcp47feb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb18_chip_features =3D { - .name =3D "mcp47feb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb21_chip_features =3D { - .name =3D "mcp47feb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb22_chip_features =3D { - .name =3D "mcp47feb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb24_chip_features =3D { - .name =3D "mcp47feb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb28_chip_features =3D { - .name =3D "mcp47feb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47fvb01_chip_features =3D { - .name =3D "mcp47fvb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb02_chip_features =3D { - .name =3D "mcp47fvb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb04_chip_features =3D { - .name =3D "mcp47fvb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb08_chip_features =3D { - .name =3D "mcp47fvb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb11_chip_features =3D { - .name =3D "mcp47fvb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb12_chip_features =3D { - .name =3D "mcp47fvb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb14_chip_features =3D { - .name =3D "mcp47fvb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb18_chip_features =3D { - .name =3D "mcp47fvb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb21_chip_features =3D { - .name =3D "mcp47fvb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb22_chip_features =3D { - .name =3D "mcp47fvb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb24_chip_features =3D { - .name =3D "mcp47fvb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb28_chip_features =3D { - .name =3D "mcp47fvb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - /** * struct mcp47feb02_channel_data - channel configuration * @ref_mode: chosen voltage for reference @@ -381,7 +173,7 @@ static const struct regmap_access_table mcp47feb02_vola= tile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47feb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47feb02_regmap_config =3D { +const struct regmap_config mcp47feb02_regmap_config =3D { .name =3D "mcp47feb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -393,6 +185,7 @@ static const struct regmap_config mcp47feb02_regmap_con= fig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47feb02_regmap_config, "IIO_MCP47FEB02"); =20 /* For devices that doesn't have nonvolatile memory */ static const struct regmap_range mcp47fvb02_readable_ranges[] =3D { @@ -423,7 +216,7 @@ static const struct regmap_access_table mcp47fvb02_vola= tile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47fvb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47fvb02_regmap_config =3D { +const struct regmap_config mcp47fvb02_regmap_config =3D { .name =3D "mcp47fvb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -435,6 +228,7 @@ static const struct regmap_config mcp47fvb02_regmap_con= fig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47fvb02_regmap_config, "IIO_MCP47FEB02"); =20 static int mcp47feb02_write_to_eeprom(struct mcp47feb02_data *data, unsign= ed int reg, unsigned int val) @@ -445,8 +239,6 @@ static int mcp47feb02_write_to_eeprom(struct mcp47feb02= _data *data, unsigned int * Wait until the currently occurring EEPROM Write Cycle is completed. * Only serial commands to the volatile memory are allowed. */ - guard(mutex)(&data->lock); - ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), @@ -472,6 +264,8 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a if (!state) return len; =20 + guard(mutex)(&data->lock); + /* * Verify DAC Wiper and DAC Configuration are unlocked. If both are disab= led, * writing to EEPROM is available. @@ -578,18 +372,17 @@ static int mcp47feb02_resume(struct device *dev) guard(mutex)(&data->lock); =20 for_each_set_bit(ch, &data->active_channels_mask, data->phys_channels) { - u8 pd_mode; int ret; =20 data->chdata[ch].powerdown =3D false; - pd_mode =3D data->chdata[ch].powerdown_mode + 1; =20 ret =3D regmap_write(data->regmap, REG_ADDR(ch), data->chdata[ch].dac_da= ta); if (ret) return ret; =20 ret =3D regmap_update_bits(data->regmap, MCP47FEB02_VREF_REG_ADDR, - DAC_CTRL_MASK(ch), DAC_CTRL_VAL(ch, pd_mode)); + DAC_CTRL_MASK(ch), + DAC_CTRL_VAL(ch, data->chdata[ch].ref_mode)); if (ret) return ret; =20 @@ -667,7 +460,7 @@ static ssize_t mcp47feb02_write_powerdown(struct iio_de= v *indio_dev, uintptr_t p return len; } =20 -static DEFINE_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp= 47feb02_resume); +EXPORT_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp47feb02= _resume); =20 static const struct iio_enum mcp47febxx_powerdown_mode_enum =3D { .items =3D mcp47feb02_powerdown_modes, @@ -1095,10 +888,10 @@ static int mcp47feb02_init_ch_scales(struct mcp47feb= 02_data *data, int vdd_uV, return 0; } =20 -static int mcp47feb02_probe(struct i2c_client *client) +int mcp47feb02_common_probe(const struct mcp47feb02_features *chip_feature= s, + struct regmap *regmap) { - const struct mcp47feb02_features *chip_features; - struct device *dev =3D &client->dev; + struct device *dev =3D regmap_get_device(regmap); struct mcp47feb02_data *data; struct iio_dev *indio_dev; int vref1_uV, vref_uV, vdd_uV, ret; @@ -1107,22 +900,16 @@ static int mcp47feb02_probe(struct i2c_client *clien= t) if (!indio_dev) return -ENOMEM; =20 - data =3D iio_priv(indio_dev); - chip_features =3D i2c_get_match_data(client); - if (!chip_features) - return -EINVAL; + dev_set_drvdata(dev, indio_dev); =20 + data =3D iio_priv(indio_dev); data->chip_features =3D chip_features; + data->regmap =3D regmap; =20 - if (chip_features->have_eeprom) { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + if (chip_features->have_eeprom) indio_dev->info =3D &mcp47feb02_info; - } else { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + else indio_dev->info =3D &mcp47fvb02_info; - } - if (IS_ERR(data->regmap)) - return dev_err_probe(dev, PTR_ERR(data->regmap), "Error initializing i2c= regmap\n"); =20 indio_dev->name =3D chip_features->name; =20 @@ -1179,75 +966,7 @@ static int mcp47feb02_probe(struct i2c_client *client) =20 return devm_iio_device_register(dev, indio_dev); } - -static const struct i2c_device_id mcp47feb02_id[] =3D { - { .name =3D "mcp47feb01", .driver_data =3D (kernel_ulong_t)&mcp47feb01_ch= ip_features }, - { .name =3D "mcp47feb02", .driver_data =3D (kernel_ulong_t)&mcp47feb02_ch= ip_features }, - { .name =3D "mcp47feb04", .driver_data =3D (kernel_ulong_t)&mcp47feb04_ch= ip_features }, - { .name =3D "mcp47feb08", .driver_data =3D (kernel_ulong_t)&mcp47feb08_ch= ip_features }, - { .name =3D "mcp47feb11", .driver_data =3D (kernel_ulong_t)&mcp47feb11_ch= ip_features }, - { .name =3D "mcp47feb12", .driver_data =3D (kernel_ulong_t)&mcp47feb12_ch= ip_features }, - { .name =3D "mcp47feb14", .driver_data =3D (kernel_ulong_t)&mcp47feb14_ch= ip_features }, - { .name =3D "mcp47feb18", .driver_data =3D (kernel_ulong_t)&mcp47feb18_ch= ip_features }, - { .name =3D "mcp47feb21", .driver_data =3D (kernel_ulong_t)&mcp47feb21_ch= ip_features }, - { .name =3D "mcp47feb22", .driver_data =3D (kernel_ulong_t)&mcp47feb22_ch= ip_features }, - { .name =3D "mcp47feb24", .driver_data =3D (kernel_ulong_t)&mcp47feb24_ch= ip_features }, - { .name =3D "mcp47feb28", .driver_data =3D (kernel_ulong_t)&mcp47feb28_ch= ip_features }, - { .name =3D "mcp47fvb01", .driver_data =3D (kernel_ulong_t)&mcp47fvb01_ch= ip_features }, - { .name =3D "mcp47fvb02", .driver_data =3D (kernel_ulong_t)&mcp47fvb02_ch= ip_features }, - { .name =3D "mcp47fvb04", .driver_data =3D (kernel_ulong_t)&mcp47fvb04_ch= ip_features }, - { .name =3D "mcp47fvb08", .driver_data =3D (kernel_ulong_t)&mcp47fvb08_ch= ip_features }, - { .name =3D "mcp47fvb11", .driver_data =3D (kernel_ulong_t)&mcp47fvb11_ch= ip_features }, - { .name =3D "mcp47fvb12", .driver_data =3D (kernel_ulong_t)&mcp47fvb12_ch= ip_features }, - { .name =3D "mcp47fvb14", .driver_data =3D (kernel_ulong_t)&mcp47fvb14_ch= ip_features }, - { .name =3D "mcp47fvb18", .driver_data =3D (kernel_ulong_t)&mcp47fvb18_ch= ip_features }, - { .name =3D "mcp47fvb21", .driver_data =3D (kernel_ulong_t)&mcp47fvb21_ch= ip_features }, - { .name =3D "mcp47fvb22", .driver_data =3D (kernel_ulong_t)&mcp47fvb22_ch= ip_features }, - { .name =3D "mcp47fvb24", .driver_data =3D (kernel_ulong_t)&mcp47fvb24_ch= ip_features }, - { .name =3D "mcp47fvb28", .driver_data =3D (kernel_ulong_t)&mcp47fvb28_ch= ip_features }, - { } -}; -MODULE_DEVICE_TABLE(i2c, mcp47feb02_id); - -static const struct of_device_id mcp47feb02_of_match[] =3D { - { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, - { } -}; -MODULE_DEVICE_TABLE(of, mcp47feb02_of_match); - -static struct i2c_driver mcp47feb02_driver =3D { - .driver =3D { - .name =3D "mcp47feb02", - .of_match_table =3D mcp47feb02_of_match, - .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), - }, - .probe =3D mcp47feb02_probe, - .id_table =3D mcp47feb02_id, -}; -module_i2c_driver(mcp47feb02_driver); +EXPORT_SYMBOL_NS(mcp47feb02_common_probe, "IIO_MCP47FEB02"); =20 MODULE_AUTHOR("Ariana Lazar "); MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); diff --git a/drivers/iio/dac/mcp47feb02-i2c.c b/drivers/iio/dac/mcp47feb02-= i2c.c new file mode 100644 index 0000000000000000000000000000000000000000..7e49503e3abc91225b6ede89fda= b03f5ca3799f3 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-i2c.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface + * + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with I2C interface: + * [MCP47FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005375A.pdf + * [MCP47FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005405A.pdf + * [MCP47FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb28, 8, 12, true, false); + +static int mcp47feb02_i2c_probe(struct i2c_client *client) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &client->dev; + struct regmap *regmap; + + chip_features =3D i2c_get_match_data(client); + if (!chip_features) + return dev_err_probe(dev, -ENODEV, "No I2C device found\n"); + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing I2C regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct i2c_device_id mcp47feb02_i2c_id[] =3D { + { .name =3D "mcp47feb01", .driver_data =3D (kernel_ulong_t)&mcp47feb01_ch= ip_features }, + { .name =3D "mcp47feb02", .driver_data =3D (kernel_ulong_t)&mcp47feb02_ch= ip_features }, + { .name =3D "mcp47feb04", .driver_data =3D (kernel_ulong_t)&mcp47feb04_ch= ip_features }, + { .name =3D "mcp47feb08", .driver_data =3D (kernel_ulong_t)&mcp47feb08_ch= ip_features }, + { .name =3D "mcp47feb11", .driver_data =3D (kernel_ulong_t)&mcp47feb11_ch= ip_features }, + { .name =3D "mcp47feb12", .driver_data =3D (kernel_ulong_t)&mcp47feb12_ch= ip_features }, + { .name =3D "mcp47feb14", .driver_data =3D (kernel_ulong_t)&mcp47feb14_ch= ip_features }, + { .name =3D "mcp47feb18", .driver_data =3D (kernel_ulong_t)&mcp47feb18_ch= ip_features }, + { .name =3D "mcp47feb21", .driver_data =3D (kernel_ulong_t)&mcp47feb21_ch= ip_features }, + { .name =3D "mcp47feb22", .driver_data =3D (kernel_ulong_t)&mcp47feb22_ch= ip_features }, + { .name =3D "mcp47feb24", .driver_data =3D (kernel_ulong_t)&mcp47feb24_ch= ip_features }, + { .name =3D "mcp47feb28", .driver_data =3D (kernel_ulong_t)&mcp47feb28_ch= ip_features }, + { .name =3D "mcp47fvb01", .driver_data =3D (kernel_ulong_t)&mcp47fvb01_ch= ip_features }, + { .name =3D "mcp47fvb02", .driver_data =3D (kernel_ulong_t)&mcp47fvb02_ch= ip_features }, + { .name =3D "mcp47fvb04", .driver_data =3D (kernel_ulong_t)&mcp47fvb04_ch= ip_features }, + { .name =3D "mcp47fvb08", .driver_data =3D (kernel_ulong_t)&mcp47fvb08_ch= ip_features }, + { .name =3D "mcp47fvb11", .driver_data =3D (kernel_ulong_t)&mcp47fvb11_ch= ip_features }, + { .name =3D "mcp47fvb12", .driver_data =3D (kernel_ulong_t)&mcp47fvb12_ch= ip_features }, + { .name =3D "mcp47fvb14", .driver_data =3D (kernel_ulong_t)&mcp47fvb14_ch= ip_features }, + { .name =3D "mcp47fvb18", .driver_data =3D (kernel_ulong_t)&mcp47fvb18_ch= ip_features }, + { .name =3D "mcp47fvb21", .driver_data =3D (kernel_ulong_t)&mcp47fvb21_ch= ip_features }, + { .name =3D "mcp47fvb22", .driver_data =3D (kernel_ulong_t)&mcp47fvb22_ch= ip_features }, + { .name =3D "mcp47fvb24", .driver_data =3D (kernel_ulong_t)&mcp47fvb24_ch= ip_features }, + { .name =3D "mcp47fvb28", .driver_data =3D (kernel_ulong_t)&mcp47fvb28_ch= ip_features }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mcp47feb02_i2c_id); + +static const struct of_device_id mcp47feb02_of_i2c_match[] =3D { + { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_i2c_match); + +static struct i2c_driver mcp47feb02_i2c_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_i2c_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_i2c_probe, + .id_table =3D mcp47feb02_i2c_id, +}; +module_i2c_driver(mcp47feb02_i2c_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); diff --git a/drivers/iio/dac/mcp47feb02.h b/drivers/iio/dac/mcp47feb02.h new file mode 100644 index 0000000000000000000000000000000000000000..5bcce1f9ae112c4fecc930f9927= 442eb93832f20 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __DRIVERS_IIO_DAC_MCP47FEB02_H__ +#define __DRIVERS_IIO_DAC_MCP47FEB02_H__ + +#include +#include + +extern const char * const mcp47feb02_powerdown_modes[]; + +#define MCP47FEB02_CHIP_INFO(_name, _channels, _res, _vref1, _eeprom) \ +static const struct mcp47feb02_features _name##_chip_features =3D { \ + .name =3D #_name, \ + .phys_channels =3D _channels, \ + .resolution =3D _res, \ + .have_ext_vref1 =3D _vref1, \ + .have_eeprom =3D _eeprom, \ +} + +/** + * struct mcp47feb02_features - chip specific data + * @name: device name + * @phys_channels: number of hardware channels + * @resolution: DAC resolution + * @have_ext_vref1: does the hardware have an the second external voltage = reference? + * @have_eeprom: does the hardware have an internal eeprom? + */ +struct mcp47feb02_features { + const char *name; + unsigned int phys_channels; + unsigned int resolution; + bool have_ext_vref1; + bool have_eeprom; +}; + +extern const struct regmap_config mcp47feb02_regmap_config; +extern const struct regmap_config mcp47fvb02_regmap_config; + +int mcp47feb02_common_probe(const struct mcp47feb02_features *chip_feature= s, + struct regmap *regmap); + +extern const struct dev_pm_ops mcp47feb02_pm_ops; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260909-mcp47feb02_refactor-v5-9-8b67bcab93d1@microchip.com> References: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> In-Reply-To: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788963530; l=15556; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=acUL/CcC7KE1IDiRXLEfBcTJXBXILIApK2E6Dz8MP1c=; b=xhlvG75CSN4C2phq6yYEPdQRbZ4r2HxqFHnncK7S76g40EfMtts6Kl9Kx8RhLwCFEdYPoJqMW l4jif/rgYquBYKIFst6OwrIW3iQDb+T3JT/EnWINOhEGzRe2Ey0rTpk X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Add the SPI MCP48FxBy1/2/4/8 part numbers, the spi-max-frequency property and a devicetree example for SPI usage to the existing binding. Signed-off-by: Ariana Lazar Reviewed-by: Rob Herring (Arm) --- .../bindings/iio/dac/microchip,mcp47feb02.yaml | 221 ++++++++++++++++-= ---- 1 file changed, 173 insertions(+), 48 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02= .yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml index d131f136bd15161666932261bcacd6d124b23ede..a86d094f0d4b54f9d9cc39fd542= 22f5968714668 100644 --- a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml @@ -4,58 +4,92 @@ $id: http://devicetree.org/schemas/iio/dac/microchip,mcp47feb02.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Microchip MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies +title: Microchip MCP4(7/8)F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C/SPI Interfa= ce Families =20 maintainers: - Ariana Lazar =20 description: | - Datasheet for MCP47FEB01, MCP47FEB11, MCP47FEB21, MCP47FEB02, MCP47FEB12, - MCP47FEB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005375A.pdf - Datasheet for MCP47FVB01, MCP47FVB11, MCP47FVB21, MCP47FVB02, MCP47FVB12, - MCP47FVB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005405A.pdf - Datasheet for MCP47FEB04, MCP47FEB14, MCP47FEB24, MCP47FEB08, MCP47FEB18, - MCP47FEB28, MCP47FVB04, MCP47FVB14, MCP47FVB24, MCP47FVB08, MCP47FVB18, - MCP47FVB28 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produc= tDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf - - +------------+--------------+-------------+-------------+------------+ - | Device | Resolution | Channels | Vref number | Memory | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB01 | 8-bit | 1 | 1 | EEPROM | - | MCP47FEB11 | 10-bit | 1 | 1 | EEPROM | - | MCP47FEB21 | 12-bit | 1 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB02 | 8-bit | 2 | 1 | EEPROM | - | MCP47FEB12 | 10-bit | 2 | 1 | EEPROM | - | MCP47FEB22 | 12-bit | 2 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB01 | 8-bit | 1 | 1 | RAM | - | MCP47FVB11 | 10-bit | 1 | 1 | RAM | - | MCP47FVB21 | 12-bit | 1 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB02 | 8-bit | 2 | 1 | RAM | - | MCP47FVB12 | 10-bit | 2 | 1 | RAM | - | MCP47FVB22 | 12-bit | 2 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB04 | 8-bit | 4 | 2 | RAM | - | MCP47FVB14 | 10-bit | 4 | 2 | RAM | - | MCP47FVB24 | 12-bit | 4 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB08 | 8-bit | 8 | 2 | RAM | - | MCP47FVB18 | 10-bit | 8 | 2 | RAM | - | MCP47FVB28 | 12-bit | 8 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB04 | 8-bit | 4 | 2 | EEPROM | - | MCP47FEB14 | 10-bit | 4 | 2 | EEPROM | - | MCP47FEB24 | 12-bit | 4 | 2 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | - | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | - | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | - +------------+--------------+-------------+-------------+------------+ + Datasheets for MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies: + Datasheet for MCP47FEB01, MCP47FEB02, MCP47FEB11, MCP47FEB12, MCP47FEB2= 1, + MCP47FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005375A.pdf + Datasheet for MCP47FVB01, MCP47FVB02, MCP47FVB11, MCP47FVB12, MCP47FVB2= 1, + MCP47FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005405A.pdf + Datasheet for MCP47FEB04, MCP47FEB08, MCP47FEB14, MCP47FEB18, MCP47FEB2= 4, + MCP47FEB28, MCP47FVB04, MCP47FVB08, MCP47FVB14, MCP47FVB18, MCP47FVB24, + MCP47FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + Datasheets for MCP48F(E/V)B(0/1/2)(1/2/4/8) DAC with SPI Interface Fami= lies: + Datasheet for MCP48FEB01, MCP48FEB02, MCP48FEB11, MCP48FEB12, MCP48FEB2= 1, + MCP48FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005429B.pdf + Datasheet for MCP48FVB01, MCP48FVB02, MCP48FVB11, MCP48FVB12, MCP48FVB2= 1, + MCP48FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005466A.pdf + Datasheet for MCP48FEB04, MCP48FEB14, MCP48FEB24, MCP48FEB08, MCP48FEB1= 8, + MCP48FEB28, MCP48FVB04, MCP48FVB14, MCP48FVB24, MCP48FVB08, MCP48FVB18, + MCP48FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS20006362A.pdf + + +------------+--------------+-------------+-------------+------------+--= ----------+ + | Device | Resolution | Channels | Vref number | Memory | I= nterface | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB01 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB02 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB04 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB01 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB02 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB04 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB08 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB11 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB12 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB14 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB11 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB12 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB14 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB18 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB21 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB22 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB24 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB21 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB22 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB24 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB28 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB01 | | 1 | 1 | RAM | = I2C | + | MCP47FVB02 | | 2 | 1 | RAM | = I2C | + | MCP47FVB04 | | 4 | 2 | RAM | = I2C | + | MCP47FVB08 | 8-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB01 | | 1 | 1 | RAM | = SPI | + | MCP48FVB02 | | 2 | 1 | RAM | = SPI | + | MCP48FVB04 | | 4 | 2 | RAM | = SPI | + | MCP48FVB08 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB11 | | 1 | 1 | RAM | = I2C | + | MCP47FVB12 | | 2 | 1 | RAM | = I2C | + | MCP47FVB14 | | 4 | 2 | RAM | = I2C | + | MCP47FVB18 | 10-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB11 | | 1 | 1 | RAM | = SPI | + | MCP48FVB12 | | 2 | 1 | RAM | = SPI | + | MCP48FVB14 | | 4 | 2 | RAM | = SPI | + | MCP48FVB18 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB21 | | 1 | 1 | RAM | = I2C | + | MCP47FVB22 | | 2 | 1 | RAM | = I2C | + | MCP47FVB24 | | 4 | 2 | RAM | = I2C | + | MCP47FVB28 | 12-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB21 | | 1 | 1 | RAM | = SPI | + | MCP48FVB22 | | 2 | 1 | RAM | = SPI | + | MCP48FVB24 | | 4 | 2 | RAM | = SPI | + | MCP48FVB28 | | 8 | 2 | RAM | = SPI | + +------------+--------------+-------------+-------------+------------+--= ----------+ =20 properties: compatible: @@ -84,10 +118,37 @@ properties: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb01 + - microchip,mcp48feb02 + - microchip,mcp48feb04 + - microchip,mcp48feb08 + - microchip,mcp48feb11 + - microchip,mcp48feb12 + - microchip,mcp48feb14 + - microchip,mcp48feb18 + - microchip,mcp48feb21 + - microchip,mcp48feb22 + - microchip,mcp48feb24 + - microchip,mcp48feb28 + - microchip,mcp48fvb01 + - microchip,mcp48fvb02 + - microchip,mcp48fvb04 + - microchip,mcp48fvb08 + - microchip,mcp48fvb11 + - microchip,mcp48fvb12 + - microchip,mcp48fvb14 + - microchip,mcp48fvb18 + - microchip,mcp48fvb21 + - microchip,mcp48fvb22 + - microchip,mcp48fvb24 + - microchip,mcp48fvb28 =20 reg: maxItems: 1 =20 + spi-max-frequency: + maximum: 10000000 + "#address-cells": const: 1 =20 @@ -178,6 +239,21 @@ required: - vdd-supply =20 allOf: + - if: + properties: + compatible: + contains: + pattern: "^microchip,mcp48f[ev]b[0-2][1248]$" + then: + $ref: /schemas/spi/spi-peripheral-props.yaml# + dependencies: + spi-cpha: [ spi-cpol ] + spi-cpol: [ spi-cpha ] + else: + properties: + spi-max-frequency: false + spi-cpha: false + spi-cpol: false - if: properties: compatible: @@ -189,6 +265,12 @@ allOf: - microchip,mcp47fvb01 - microchip,mcp47fvb11 - microchip,mcp47fvb21 + - microchip,mcp48feb01 + - microchip,mcp48feb11 + - microchip,mcp48feb21 + - microchip,mcp48fvb01 + - microchip,mcp48fvb11 + - microchip,mcp48fvb21 then: properties: lat1-gpios: false @@ -211,6 +293,12 @@ allOf: - microchip,mcp47fvb02 - microchip,mcp47fvb12 - microchip,mcp47fvb22 + - microchip,mcp48feb02 + - microchip,mcp48feb12 + - microchip,mcp48feb22 + - microchip,mcp48fvb02 + - microchip,mcp48fvb12 + - microchip,mcp48fvb22 then: properties: lat1-gpios: false @@ -233,6 +321,12 @@ allOf: - microchip,mcp47feb04 - microchip,mcp47feb14 - microchip,mcp47feb24 + - microchip,mcp48feb04 + - microchip,mcp48feb14 + - microchip,mcp48feb24 + - microchip,mcp48fvb04 + - microchip,mcp48fvb14 + - microchip,mcp48fvb24 then: patternProperties: "^channel@[0-3]$": @@ -251,6 +345,12 @@ allOf: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb08 + - microchip,mcp48feb18 + - microchip,mcp48feb28 + - microchip,mcp48fvb08 + - microchip,mcp48fvb18 + - microchip,mcp48fvb28 then: patternProperties: "^channel@[0-7]$": @@ -272,7 +372,7 @@ allOf: properties: microchip,vref1-buffered: false =20 -additionalProperties: false +unevaluatedProperties: false =20 examples: - | @@ -299,4 +399,29 @@ examples: }; }; }; + - | + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dac@0 { + compatible =3D "microchip,mcp48feb02"; + reg =3D <0x0>; + vdd-supply =3D <&vdac_vdd>; + vref-supply =3D <&vref_reg>; + spi-max-frequency =3D <10000000>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + channel@0 { + reg =3D <0>; + label =3D "Adjustable_voltage_ch0"; + }; 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(10.10.87.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.45; Wed, 9 Sep 2026 07:19:21 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 9 Sep 2026 07:19:18 -0700 From: Ariana Lazar Date: Wed, 9 Sep 2026 17:18:53 +0300 Subject: [PATCH v5 10/10] iio: dac: add support for Microchip MCP48FEB02 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260909-mcp47feb02_refactor-v5-10-8b67bcab93d1@microchip.com> References: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> In-Reply-To: <20260909-mcp47feb02_refactor-v5-0-8b67bcab93d1@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788963530; l=10612; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=gHrQC0pT4WPCYBiQrHsxPJcU+8ZI3XHSzBYSPRRGlME=; b=rjClFrs7KAVjTbqTtG3eUrHoC3AaR2x4+zhqw8CRdwp5FOtdAuOkNKrd5f44b51OAidrNydiR LTGGcMKeXMvCGHX63iH2VXFjifJTF9QPH7ZPtcyCgJq3eWPdSe6KKci X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= This is the IIO driver for Microchip MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to-Analog Converters with nonvolatile or volatile memory and an SPI Interface. The families support up to 8 output channels. The devices can be 8-bit, 10-bit and 12-bit. Signed-off-by: Ariana Lazar --- drivers/iio/dac/Kconfig | 23 +++++++ drivers/iio/dac/Makefile | 1 + drivers/iio/dac/mcp47feb02-spi.c | 145 +++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 169 insertions(+) diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index cc10d43ffd1e89bbf945ef89ea5af0abe1a91084..d941f78f7110b185fee6f025be8= 29bae1e4534da 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -575,6 +575,29 @@ config MCP47FEB02_I2C will be called mcp47feb02_i2c and you will also get mcp47feb02_core for the core module. =20 +config MCP47FEB02_SPI + tristate "MCP48F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 SPI DAC driver" + depends on SPI + select REGMAP_SPI + select MCP47FEB02 + help + Say yes here if you want to build the driver for the Microchip: + - 8-bit DAC: + MCP48FEB01, MCP48FEB02, MCP48FEB04, MCP48FEB08, + MCP48FVB01, MCP48FVB02, MCP48FVB04, MCP48FVB08 + - 10-bit DAC: + MCP48FEB11, MCP48FEB12, MCP48FEB14, MCP48FEB18, + MCP48FVB11, MCP48FVB12, MCP48FVB14, MCP48FVB18 + - 12-bit DAC: + MCP48FEB21, MCP48FEB22, MCP48FEB24, MCP48FEB28, + MCP48FVB21, MCP48FVB22, MCP48FVB24, MCP48FVB28 + having 1 to 8 channels, 8/10/12-bit digital-to-analog converter + (DAC) with SPI interface. + + To compile this driver as a module, choose M here: the module + will be called mcp47feb02_spi and you will also get + mcp47feb02_core for the core module. + config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" depends on SPI diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 28c8646a987cff1ac4d693fe86898d66c901d5bd..9903198b934e8b66a4ea6562b66= 2d8073ed9cc59 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_MCP4725) +=3D mcp4725.o obj-$(CONFIG_MCP4728) +=3D mcp4728.o obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o +obj-$(CONFIG_MCP47FEB02_SPI) +=3D mcp47feb02-spi.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02-spi.c b/drivers/iio/dac/mcp47feb02-= spi.c new file mode 100644 index 0000000000000000000000000000000000000000..0c68d7c318cb2269a9d713d3c6e= c0854a576c19e --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-spi.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP48FEB02 Multi-Channel DAC with SPI interface + * + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with SPI interface: + * [MCP48FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005429B.pdf + * [MCP48FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005466A.pdf + * [MCP48FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS200063= 62A.pdf + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb28, 8, 12, true, false); + +static int mcp47feb02_spi_probe(struct spi_device *spi) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &spi->dev; + struct regmap *regmap; + + chip_features =3D spi_get_device_match_data(spi); + if (!chip_features) + return dev_err_probe(dev, -ENODEV, "No SPI device found\n"); + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_spi(spi, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_spi(spi, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing SPI regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct spi_device_id mcp47feb02_spi_id[] =3D { + { .name =3D "mcp48feb01", .driver_data =3D (kernel_ulong_t)&mcp48feb01_ch= ip_features }, + { .name =3D "mcp48feb02", .driver_data =3D (kernel_ulong_t)&mcp48feb02_ch= ip_features }, + { .name =3D "mcp48feb04", .driver_data =3D (kernel_ulong_t)&mcp48feb04_ch= ip_features }, + { .name =3D "mcp48feb08", .driver_data =3D (kernel_ulong_t)&mcp48feb08_ch= ip_features }, + { .name =3D "mcp48feb11", .driver_data =3D (kernel_ulong_t)&mcp48feb11_ch= ip_features }, + { .name =3D "mcp48feb12", .driver_data =3D (kernel_ulong_t)&mcp48feb12_ch= ip_features }, + { .name =3D "mcp48feb14", .driver_data =3D (kernel_ulong_t)&mcp48feb14_ch= ip_features }, + { .name =3D "mcp48feb18", .driver_data =3D (kernel_ulong_t)&mcp48feb18_c= hip_features }, + { .name =3D "mcp48feb21", .driver_data =3D (kernel_ulong_t)&mcp48feb21_ch= ip_features }, + { .name =3D "mcp48feb22", .driver_data =3D (kernel_ulong_t)&mcp48feb22_ch= ip_features }, + { .name =3D "mcp48feb24", .driver_data =3D (kernel_ulong_t)&mcp48feb24_ch= ip_features }, + { .name =3D "mcp48feb28", .driver_data =3D (kernel_ulong_t)&mcp48feb28_ch= ip_features }, + { .name =3D "mcp48fvb01", .driver_data =3D (kernel_ulong_t)&mcp48fvb01_ch= ip_features }, + { .name =3D "mcp48fvb02", .driver_data =3D (kernel_ulong_t)&mcp48fvb02_ch= ip_features }, + { .name =3D "mcp48fvb04", .driver_data =3D (kernel_ulong_t)&mcp48fvb04_ch= ip_features }, + { .name =3D "mcp48fvb08", .driver_data =3D (kernel_ulong_t)&mcp48fvb08_ch= ip_features }, + { .name =3D "mcp48fvb11", .driver_data =3D (kernel_ulong_t)&mcp48fvb11_ch= ip_features }, + { .name =3D "mcp48fvb12", .driver_data =3D (kernel_ulong_t)&mcp48fvb12_ch= ip_features }, + { .name =3D "mcp48fvb14", .driver_data =3D (kernel_ulong_t)&mcp48fvb14_ch= ip_features }, + { .name =3D "mcp48fvb18", .driver_data =3D (kernel_ulong_t)&mcp48fvb18_ch= ip_features }, + { .name =3D "mcp48fvb21", .driver_data =3D (kernel_ulong_t)&mcp48fvb21_ch= ip_features }, + { .name =3D "mcp48fvb22", .driver_data =3D (kernel_ulong_t)&mcp48fvb22_ch= ip_features }, + { .name =3D "mcp48fvb24", .driver_data =3D (kernel_ulong_t)&mcp48fvb24_ch= ip_features }, + { .name =3D "mcp48fvb28", .driver_data =3D (kernel_ulong_t)&mcp48fvb28_ch= ip_features }, + { } +}; +MODULE_DEVICE_TABLE(spi, mcp47feb02_spi_id); + +static const struct of_device_id mcp47feb02_of_spi_match[] =3D { + { .compatible =3D "microchip,mcp48feb01", .data =3D &mcp48feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb02", .data =3D &mcp48feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb04", .data =3D &mcp48feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb08", .data =3D &mcp48feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb11", .data =3D &mcp48feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb12", .data =3D &mcp48feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb14", .data =3D &mcp48feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb18", .data =3D &mcp48feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb21", .data =3D &mcp48feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb22", .data =3D &mcp48feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb24", .data =3D &mcp48feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb28", .data =3D &mcp48feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb01", .data =3D &mcp48fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb02", .data =3D &mcp48fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb04", .data =3D &mcp48fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb08", .data =3D &mcp48fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb11", .data =3D &mcp48fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb12", .data =3D &mcp48fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb14", .data =3D &mcp48fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb18", .data =3D &mcp48fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb21", .data =3D &mcp48fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb22", .data =3D &mcp48fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb24", .data =3D &mcp48fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb28", .data =3D &mcp48fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_spi_match); + +static struct spi_driver mcp47feb02_spi_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_spi_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_spi_probe, + .id_table =3D mcp47feb02_spi_id, +}; +module_spi_driver(mcp47feb02_spi_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP48FEB02 Multi-Channel DAC with SPI i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); --=20 2.43.0