From nobody Fri Sep 25 22:19:32 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65500395ADE; Tue, 8 Sep 2026 07:27:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852478; cv=none; b=fPeHdYJURPh97jUQVLYKRTDBlEWTYPXBeBRSgjTegOQo84F3ZaKVMAxNYMotP9Ki/7Ju1MMSpqCLwAYk6Q6c4YFlRIgZsxJsCFezeg957KaRzcYfKSrB6WyK26/Q93I/qqRBSKaFxYAJ9LBuAAzzMFD9yc2nhyYHVPbb2AfHZLs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852478; c=relaxed/simple; bh=I28qNWvUt4LC9kmZmythP4voD2ADlBgQIZ3P3FwpCqc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=M0iO7d94CZu00uA6vxAn+SBIP5HzUFU6+BcVDf+3xbelRoXVeNUVaI/CclFwvl0fQ9JT8nzytF4c7WwAeolbOWHe35QhfGVajeABJhivaOO8iWG+/gPt3Tb7bM3fTw2cNbDIt7DMjqTBlf1l9SLqZZVpU/CjwlLLJzU0VFCGr5c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=cjOrdf4N; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="cjOrdf4N" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 7BC664E4158D; Tue, 8 Sep 2026 07:27:49 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 4E7E6603C4; Tue, 8 Sep 2026 07:27:49 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D04F011C7AF31; Tue, 8 Sep 2026 09:27:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788852468; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=ZR5x64Lg3Tk7Sqz9cGWUyByPFFb6+HVUsdxJ3gbitLM=; b=cjOrdf4Nd4vbqqXfEU6Pys9UHl/aISxVHCvznoqCh2D3RMYZiFl+w+Zu4U9EZ/dIR7mSuF NNoCRSSaaPwBTny22TKoVMabyEO8u6lEZoIJiNBAZRlNMiZNMABmyFNLtHx7k47947r4jt HwXeHp2YU1pZFAn2/ZXZZn9FZCtcbu4X7Ay7ju+PbfLP1ST2rhBhAj2NwEvWtd49jTWFg6 akpQo9dOREQzu/i4JyZ6EPLbl/gI1SaOO2Y33jaF6uO+tlEGamY5LysFo98ellGUjGQIHH UJeTLdROC6gxwW8STKFMrSYQ18dPguaL/SZnNyBCEGz6j6XK3zcSRiZHVZS4+g== From: "Bastien Curutchet (Schneider Electric)" Date: Tue, 08 Sep 2026 09:27:41 +0200 Subject: [PATCH net-next v3 01/10] net: dsa: microchip: add the number of pins to chip infos Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-1-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The number of periodic output pins available is hardcoded to 2 while KSZ8463 has 12 pins that can be used as periodic outputs. Add an n_pin attribute to the struct ksz_chip_data to make this setting configurable. Set it to 2 for all the PTP-capable switches. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 10 ++++++++++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 4 ++-- 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 1a9d6f83a023..d01fba253af5 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1194,6 +1194,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .ptp_capable =3D true, .wr_table =3D &ksz8563_register_set, .rd_table =3D &ksz8563_register_set, + .n_pins =3D 2, }, =20 [KSZ8795] =3D { @@ -1414,6 +1415,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .sgmii_port =3D 7, .wr_table =3D &ksz9477_register_set, .rd_table =3D &ksz9477_register_set, + .n_pins =3D 2, }, =20 [KSZ9896] =3D { @@ -1544,6 +1546,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, false}, .gbit_capable =3D {true, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [KSZ8567] =3D { @@ -1581,6 +1584,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .gbit_capable =3D {false, false, false, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [KSZ9567] =3D { @@ -1615,6 +1619,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { true, false, false}, .gbit_capable =3D {true, true, true, true, true, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9370] =3D { @@ -1646,6 +1651,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_rgmii =3D {false, false, false, false, true}, .internal_phy =3D {true, true, true, true, false}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9371] =3D { @@ -1677,6 +1683,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_rgmii =3D {false, false, false, false, true, true}, .internal_phy =3D {true, true, true, true, false, false}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9372] =3D { @@ -1712,6 +1719,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9373] =3D { @@ -1747,6 +1755,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, false, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9374] =3D { @@ -1782,6 +1791,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9646] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index cbe98494578c..c678fc6597dc 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -139,6 +139,7 @@ struct ksz_chip_data { u8 sgmii_port; const struct regmap_access_table *wr_table; const struct regmap_access_table *rd_table; + const u8 n_pins; }; =20 struct ksz_irq { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 39cc70d65900..c92936bf78d3 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1050,14 +1050,14 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) ptp_data->caps.do_aux_work =3D ksz_ptp_do_aux_work; ptp_data->caps.enable =3D ksz_ptp_enable; ptp_data->caps.verify =3D ksz_ptp_verify_pin; - ptp_data->caps.n_pins =3D KSZ_PTP_N_GPIO; + ptp_data->caps.n_pins =3D dev->info->n_pins; ptp_data->caps.n_per_out =3D 3; =20 ret =3D ksz_ptp_start_clock(dev); if (ret) return ret; =20 - for (i =3D 0; i < KSZ_PTP_N_GPIO; i++) { + for (i =3D 0; i < dev->info->n_pins; i++) { struct ptp_pin_desc *ptp_pin =3D &ptp_data->pin_config[i]; =20 snprintf(ptp_pin->name, --=20 2.55.0 From nobody Fri Sep 25 22:19:32 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA9A0395AE4; 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bh=BlT4DlPDgE82qA3Y46UcHC0kXIZUrf5Dya5wq4mWlu8=; b=I7sBqRM0zx1AjCjDPZcmB37jd7aSwveYe09mdN7mwzVPE4xVthohNrG92Ff6qPdjIK52mg xrz0oJ1jPGrd7ODHio5M/lYUOxjw8q4EHSnlWeXIGIetZrsaGeRg4QcGBqXWBk9H7sFWZN AF6Dmp4ZHzaesxNE2jD8LBprJDvRI5OxmU8sKxyG8ffuyzxy5aLCUbOcaGweJCsvrU/jhQ EF7CjxnySU+7As8y4n/b//VBvzZHBZqZOzAqaGSVEnozW/OV5IWp7UHQP9yVqYCpduEZO6 Ie3Mx0uoKTueV/sBP4Ud7kvmhv0sJzMKtlkzSWVmLFDUWqaAuJbZ9ae3Na45PQ== From: "Bastien Curutchet (Schneider Electric)" Date: Tue, 08 Sep 2026 09:27:42 +0200 Subject: [PATCH net-next v3 02/10] net: dsa: microchip: add the number of periodic signals to chip infos Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-2-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The number of periodic signals available is hardcoded to 3 while KSZ8463 can produce 12 different periodic signals. Add an n_per_out attribute to the struct ksz_chip_data to make this setting configurable. Set it to 3 for all the PTP-capable switches. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 10 ++++++++++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 2 +- 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index d01fba253af5..041bb4f96365 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1195,6 +1195,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .wr_table =3D &ksz8563_register_set, .rd_table =3D &ksz8563_register_set, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ8795] =3D { @@ -1416,6 +1417,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .wr_table =3D &ksz9477_register_set, .rd_table =3D &ksz9477_register_set, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ9896] =3D { @@ -1547,6 +1549,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .gbit_capable =3D {true, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ8567] =3D { @@ -1585,6 +1588,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ9567] =3D { @@ -1620,6 +1624,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .gbit_capable =3D {true, true, true, true, true, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9370] =3D { @@ -1652,6 +1657,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9371] =3D { @@ -1684,6 +1690,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false, false}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9372] =3D { @@ -1720,6 +1727,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { false, false, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9373] =3D { @@ -1756,6 +1764,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { false, false, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9374] =3D { @@ -1792,6 +1801,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { false, false, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9646] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index c678fc6597dc..1155b39350c2 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -140,6 +140,7 @@ struct ksz_chip_data { const struct regmap_access_table *wr_table; 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b=i4fVGBDb2ywDT6LanBlERODEcmDBsg65jkS8iWoRKBLYfyO/JnozCwwcxVLXvFtTsPe4VY JXVJy/sjIGSbynrds8tRlCuWRuu5znRHWU6q/iIkz+1CuW0iARuOxMEJfkwR0pv8QZDGYr OEXrW+hFrKEVT+0Ci7r55cfPGFDWEcgzdzVBETYSEGJMDgCZRBH7gsAaRiCngCkTlpilHs DGVFQeIgbQleqEt5w/3fD+VzGrCWeY5VutO5VU3dgXReg+R7+CnBq65abyk/cIo9aJQBRR kZvXZIOcPgKJ4v7R6brjf977YuUNbcGdMUpSh0BSFhl1RtXKQ/SZqvlqzMXeOw== From: "Bastien Curutchet (Schneider Electric)" Date: Tue, 08 Sep 2026 09:27:43 +0200 Subject: [PATCH net-next v3 03/10] net: dsa: microchip: use dynamic mask to check pulse width validity Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-3-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The pulse width validity is checked against an hardcoded mask. KSZ8463 uses a smaller register than other switches so this check won't work for it. Move the mask as a ksz_ptp_tou_pulse_verify()'s input to allow changing it for KSZ8463 case. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index f80015250e5a..7bf83e0b5918 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -86,7 +86,7 @@ static int ksz_ptp_tou_reset(struct ksz_device *dev, u8 u= nit) 0); } =20 -static int ksz_ptp_tou_pulse_verify(u64 pulse_ns) +static int ksz_ptp_tou_pulse_verify(u64 pulse_ns, u32 mask) { u32 data; =20 @@ -94,7 +94,7 @@ static int ksz_ptp_tou_pulse_verify(u64 pulse_ns) return -EINVAL; =20 data =3D (pulse_ns / 8); - if (!FIELD_FIT(TRIG_PULSE_WIDTH_M, data)) + if ((mask & data) !=3D data) return -ERANGE; =20 return 0; @@ -245,7 +245,7 @@ static int ksz_ptp_enable_perout(struct ksz_device *dev, KSZ_MAX_PULSE_WIDTH); } =20 - ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns); + ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns, TRIG_PULSE_WIDTH_M); if (ret) return ret; =20 --=20 2.55.0 From nobody Fri Sep 25 22:19:32 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 20C1E39A062 for ; Tue, 8 Sep 2026 07:28:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852486; cv=none; b=c8tDbgZeiN8HH6pjxPYeGzLSV6bl9NWkZwN++1pUSgEUjfyDigoznGRVvIWawjeYt2i+94TJko2ffLNDEPYiAbER5+j0JISVmMJUNvKSXhFBWpp8O6gk4nrazCv/479S31uxyfoxrOa09KuIkZn2FjNlTAZr9i9LBmmyUkyxVrY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852486; c=relaxed/simple; bh=4ov+NSQSBX9Qvd8THsxWYSJTFFg1Yr0ldf+mlrYxNTE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DlzkZdfeU3GvJn1L5QmOAZvzMSVvj24XuYaePugg25RoQwBaG7YKV9JUrx7y/PJfcSvRaH/OjogePIQkM3vLYrOSXfI+uXDe+NpbffESJ60qPOeJoudEzmQiOmXRMwythAv0rVQ6iVwvEDpETN6DeDJV/jhL4nti8syjeAoaNtw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=RdXd5nKc; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="RdXd5nKc" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 9602F4E4158C; Tue, 8 Sep 2026 07:28:03 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 69D79603C4; Tue, 8 Sep 2026 07:28:03 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id EA25B11C7AF3F; Tue, 8 Sep 2026 09:27:56 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788852478; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=RZ7rb6VbA9/VWHZ6BBtewbfE+bCLAayiZRWpfJptYvM=; b=RdXd5nKc8fDV6HAgrIoQllY/mrGG92tfPFUbPEfNnOp0BczR3yQsf7rlqEisKHh88gfZXJ FuSi/1QycCZJcb28zmZ44Cx33gng1ACc/JXGv58Kn8h7ABUXVPcgdFwQpZ6iXSx9557dNz /sKiuE5c1/N1eMdqMCRlC8NJjFhxMxX8OJHfaD3YQVaLnnl+2+YHas5UksAPikjrDwvnsn Zgn+e9fyI3MJqBmZnCBC7ITwjOdQ7HK30my8+0ekdj/KvZyCK2aGEqYOu8axlLdQiEM7GZ zQD+MCpL0BTsFVxbpHZOCFSpDN4zkBfyLR1SjnG7glPRyBcfgX0Xg0XVAE6sCA== From: "Bastien Curutchet (Schneider Electric)" Date: Tue, 08 Sep 2026 09:27:44 +0200 Subject: [PATCH net-next v3 04/10] net: dsa: microchip: extract PTP callbacks configuration from PTP registration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-4-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 also has periodic output capabilities but the way its outputs are driven differs from the other switches. It will need its own set of PTP callbacks to implements this behaviour. Extract the PTP callbacks configuration in a dedicated function to be called before the PTP registration to ease the use of others callbacks when needed. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 2 ++ drivers/net/dsa/microchip/ksz9477.c | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 20 ++++++++++++++------ drivers/net/dsa/microchip/ksz_ptp.h | 2 ++ drivers/net/dsa/microchip/lan937x_main.c | 1 + 5 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index 941ae9f66f70..f2a23e2e474a 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -2478,6 +2478,7 @@ static int ksz8463_setup(struct dsa_switch *ds) if (ret) goto free_girq; =20 + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", @@ -2775,6 +2776,7 @@ static int ksz8_setup(struct dsa_switch *ds) } =20 if (dev->info->ptp_capable) { + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchi= p/ksz9477.c index 3ee995545c57..72528a53b67d 100644 --- a/drivers/net/dsa/microchip/ksz9477.c +++ b/drivers/net/dsa/microchip/ksz9477.c @@ -1781,6 +1781,7 @@ static int ksz9477_setup(struct dsa_switch *ds) } =20 if (dev->info->ptp_capable) { + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 7bf83e0b5918..ea22601f6b26 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1028,17 +1028,12 @@ static int ksz_ptp_start_clock(struct ksz_device *d= ev) return 0; } =20 -int ksz_ptp_clock_register(struct dsa_switch *ds) +void ksz_ptp_set_caps(struct dsa_switch *ds) { struct ksz_device *dev =3D ds->priv; - const u16 *regs =3D dev->info->regs; struct ksz_ptp_data *ptp_data; - int ret; - u8 i; =20 ptp_data =3D &dev->ptp_data; - mutex_init(&ptp_data->lock); - spin_lock_init(&ptp_data->clock_lock); =20 ptp_data->caps.owner =3D THIS_MODULE; snprintf(ptp_data->caps.name, 16, "Microchip Clock"); @@ -1052,6 +1047,19 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) ptp_data->caps.verify =3D ksz_ptp_verify_pin; ptp_data->caps.n_pins =3D dev->info->n_pins; ptp_data->caps.n_per_out =3D dev->info->n_per_out; +} + +int ksz_ptp_clock_register(struct dsa_switch *ds) +{ + struct ksz_device *dev =3D ds->priv; + const u16 *regs =3D dev->info->regs; + struct ksz_ptp_data *ptp_data; + int ret; + u8 i; + + ptp_data =3D &dev->ptp_data; + mutex_init(&ptp_data->lock); + spin_lock_init(&ptp_data->clock_lock); =20 ret =3D ksz_ptp_start_clock(dev); if (ret) diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchi= p/ksz_ptp.h index 7067ec9bd1e6..89716b31596b 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.h +++ b/drivers/net/dsa/microchip/ksz_ptp.h @@ -33,6 +33,7 @@ struct ksz_ptp_data { struct timespec64 perout_period; }; =20 +void ksz_ptp_set_caps(struct dsa_switch *ds); int ksz_ptp_clock_register(struct dsa_switch *ds); =20 void ksz_ptp_clock_unregister(struct dsa_switch *ds); @@ -65,6 +66,7 @@ struct ksz_ptp_data { struct mutex lock; }; =20 +static inline void ksz_ptp_set_caps(struct dsa_switch *ds) { } static inline int ksz_ptp_clock_register(struct dsa_switch *ds) { return 0; diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/mic= rochip/lan937x_main.c index 86ce3a86705f..3a209122fc7d 100644 --- a/drivers/net/dsa/microchip/lan937x_main.c +++ b/drivers/net/dsa/microchip/lan937x_main.c @@ -867,6 +867,7 @@ static int lan937x_setup(struct dsa_switch *ds) } } =20 + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", --=20 2.55.0 From nobody Fri Sep 25 22:19:32 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E24563976A4 for ; Tue, 8 Sep 2026 07:28:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852494; cv=none; b=M9Ejr9mmOroSyGNqva/MV+rCDiFt35Lc7T/wmZuhIXO1fpZO+XNJJ7jA7Z/cnwi5dR6fgczU81h+Dfv69QuT60BrdALUce4j8bnrn4KTyFtx8gBYYTnQKPfZZg18zzn5+JWAjiIK5xitC0XTW+HADMfzJkYFxmS6ORN/YSVA4f8= ARC-Message-Signature: i=1; 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Tue, 8 Sep 2026 07:28:11 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id DF0FD603C4; Tue, 8 Sep 2026 07:28:10 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id F368911C7AF39; Tue, 8 Sep 2026 09:28:02 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788852485; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=o9jL6igQLJRDua5JaF1IyEJ/zeHLPSI/dmv7m8kdRo8=; b=di+hG1REoZ0SOfDBUeQNSP01IoIGaIS6OWY7lG0zDHqdzP8VFQE81cjE4pjg/S0d8jcjY+ nvVji34f23clMaF19o9Kyq/jg9UOtixeYviMey+axn6vXEepi3jRVwfqbInwCYCCaGWnWx HxUzRqeVsz0kZBVVXcJMo8PXh3tpbg4jeyDnfWZm6xodGB+v0/BWDgp9LBiSYJompJeqzv kvKug34CWOrodUju0She/yCfbrNx5/KRg8C7uKHcUjtrx8RE+uQZ2AVx5LSECI8vLR86Zg Z4HfzC0NLz8ezPK+pv3Jyu+GVd6DWu5k1jf8VdhqsNAmUNe8mQ1t/LMkTq1kRQ== From: "Bastien Curutchet (Schneider Electric)" Date: Tue, 08 Sep 2026 09:27:45 +0200 Subject: [PATCH net-next v3 05/10] net: dsa: microchip: extract ptp_get_pin Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-5-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_enable_perout() function needs to be created. This function will use the same algorithm to select the output pin as the common ksz_ptp_enable_perout() function. Extract the pin selection algorithm into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index ea22601f6b26..f97ea9d69ebc 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -183,17 +183,11 @@ static int ksz_ptp_configure_perout(struct ksz_device= *dev, return 0; } =20 -static int ksz_ptp_enable_perout(struct ksz_device *dev, - struct ptp_perout_request const *request, - int on) +static int ksz_ptp_get_pin(struct ksz_device *dev, + struct ptp_perout_request const *request) { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; - u64 req_pulse_width_ns; - u64 cycle_width_ns; - u64 pulse_width_ns; - int pin =3D 0; - u32 data32; - int ret; + int pin; =20 if (request->flags & ~PTP_PEROUT_DUTY_CYCLE) return -EOPNOTSUPP; @@ -206,6 +200,25 @@ static int ksz_ptp_enable_perout(struct ksz_device *de= v, if (pin < 0) return -EINVAL; =20 + return pin; +} + +static int ksz_ptp_enable_perout(struct ksz_device *dev, + struct ptp_perout_request const *request, + int on) +{ + struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + u64 req_pulse_width_ns; + u64 cycle_width_ns; + u64 pulse_width_ns; + int pin =3D 0; + u32 data32; + int ret; + + pin =3D ksz_ptp_get_pin(dev, request); + if (pin < 0) + return pin; + data32 =3D FIELD_PREP(PTP_GPIO_INDEX, pin) | FIELD_PREP(PTP_TOU_INDEX, request->index); ret =3D ksz_rmw32(dev, REG_PTP_UNIT_INDEX__4, --=20 2.55.0 From nobody Fri Sep 25 22:19:32 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C84B339B4B9 for ; Tue, 8 Sep 2026 07:28:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-6-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_enable_perout() function needs to be created. This function will use the same algorithm to compute the periodic cycles as the common ksz_ptp_enable_perout() function. Extract these algorithms into dedicated functions so they can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 67 ++++++++++++++++++++++++---------= ---- 1 file changed, 43 insertions(+), 24 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index f97ea9d69ebc..2f141df65eb0 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -203,12 +203,49 @@ static int ksz_ptp_get_pin(struct ksz_device *dev, return pin; } =20 +static int ksz_ptp_compute_perout_cycle(struct ksz_device *dev, + struct ptp_perout_request const *request, + u64 *cycle_width_ns) +{ + struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + + ptp_data->perout_target_time_first.tv_sec =3D request->start.sec; + ptp_data->perout_target_time_first.tv_nsec =3D request->start.nsec; + + ptp_data->perout_period.tv_sec =3D request->period.sec; + ptp_data->perout_period.tv_nsec =3D request->period.nsec; + + *cycle_width_ns =3D timespec64_to_ns(&ptp_data->perout_period); + if ((*cycle_width_ns & TRIG_CYCLE_WIDTH_M) !=3D *cycle_width_ns) { + *cycle_width_ns =3D 0; + return -EINVAL; + } + + return 0; +} + +static u64 ksz_ptp_compute_perout_pulse(struct ksz_device *dev, + struct ptp_perout_request const *request, + u64 max_pulse_width) +{ + u64 req_pulse_width_ns; + + if (request->flags & PTP_PEROUT_DUTY_CYCLE) + return request->on.sec * NSEC_PER_SEC + request->on.nsec; + + /* Use a duty cycle of 50%. Maximum pulse width supported by the + * hardware is a little bit more than 125 ms. + */ + req_pulse_width_ns =3D (request->period.sec * NSEC_PER_SEC + + request->period.nsec) / 2; + return min_t(u64, req_pulse_width_ns, max_pulse_width); +} + static int ksz_ptp_enable_perout(struct ksz_device *dev, struct ptp_perout_request const *request, int on) { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; - u64 req_pulse_width_ns; u64 cycle_width_ns; u64 pulse_width_ns; int pin =3D 0; @@ -234,29 +271,11 @@ static int ksz_ptp_enable_perout(struct ksz_device *d= ev, ptp_data->tou_mode =3D KSZ_PTP_TOU_IDLE; return 0; } - - ptp_data->perout_target_time_first.tv_sec =3D request->start.sec; - ptp_data->perout_target_time_first.tv_nsec =3D request->start.nsec; - - ptp_data->perout_period.tv_sec =3D request->period.sec; - ptp_data->perout_period.tv_nsec =3D request->period.nsec; - - cycle_width_ns =3D timespec64_to_ns(&ptp_data->perout_period); - if ((cycle_width_ns & TRIG_CYCLE_WIDTH_M) !=3D cycle_width_ns) - return -EINVAL; - - if (request->flags & PTP_PEROUT_DUTY_CYCLE) { - pulse_width_ns =3D request->on.sec * NSEC_PER_SEC + - request->on.nsec; - } else { - /* Use a duty cycle of 50%. Maximum pulse width supported by the - * hardware is a little bit more than 125 ms. - */ - req_pulse_width_ns =3D (request->period.sec * NSEC_PER_SEC + - request->period.nsec) / 2; - pulse_width_ns =3D min_t(u64, req_pulse_width_ns, - KSZ_MAX_PULSE_WIDTH); - } + ret =3D ksz_ptp_compute_perout_cycle(dev, request, &cycle_width_ns); + if (ret) + return ret; + pulse_width_ns =3D ksz_ptp_compute_perout_pulse(dev, request, + KSZ_MAX_PULSE_WIDTH); =20 ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns, TRIG_PULSE_WIDTH_M); if (ret) --=20 2.55.0 From nobody Fri Sep 25 22:19:32 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDD3B3A7584 for ; Tue, 8 Sep 2026 07:28:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852498; cv=none; b=GNTCk77oFJncX8T6Z7GcpSjNj/Yj0B82vQ4l2mzgQNmrI4MCQEvC3GjO3vg7z21sxAXWrhAAn8aqIXhj57s6NHfa/Fl3nc16vuoBpQRVs+jmCRXCZGGOFZm1I4jgz8gXKTkb7pkOQUPWQD40vB6Nggr/qJgMBi7ZwzKyUeie12k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852498; c=relaxed/simple; bh=j1+ZBVJmPVW03bJXf/56FabNKgWY7EFAGihdRcW3d0M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=s+/OXjTQ/tg9+PobRpOhs7DuO4L1bOk1b24bSvM0obLoFtMlu65Jeyunx6kDESM/3PHTvChfkrtSo0Ai6Q27Tw1PC1CMHCILvBcR+/7XC5OmZfGn+UtpZHhaoE6w0JEB1p6zx2E2cXhfT4CWDIKIaSRC8j2VBfpz4DrIsQiGSNQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=pHijxVVi; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="pHijxVVi" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 6E23C1A1A51; Tue, 8 Sep 2026 07:28:15 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 42B3F603C4; Tue, 8 Sep 2026 07:28:15 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 796B111C7AF31; Tue, 8 Sep 2026 09:28:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788852494; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=B3aS/Mr7RC/ZOcg+EzhbjQUCCCKDV341PmBKKjmtwgs=; b=pHijxVViV01FntyIg0oGpspqOWrGGqbMNqX8g2/IFdwCHEAmX8YclOLhGY2TO3nJe0P1u3 d78snXPGJ3jgt3ceKOyvYundfd4G7EoUtqdyxY54jNXNyR4NkSIlEA/AMC5aRqcXmhDF6M m+mwfSsEwZxfklbQIlnOiHzs1RazH3u8G2Obp2xPws//dpn0Q/1vsssiXWcBpRpA9gzIC8 qsX4FNly0ewhtltcbDw09iNH4XQZOoXGHGCHILOb5k6L+2GnFzWy5RYWJKIZ+ixdTjPqJP /psBaowE/uX1EqToLsWJjUOj/kB9h+NOVc7N8SON3E6LACxTW640qFRvBLWBnw== From: "Bastien Curutchet (Schneider Electric)" Date: Tue, 08 Sep 2026 09:27:47 +0200 Subject: [PATCH net-next v3 07/10] net: dsa: microchip: extract prepare reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-7-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_restart_perout() function needs to be created. This function will use the same request initialization as the common ksz_ptp_restart_perout() function. Extract the inialization into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 2f141df65eb0..e262bc7448f2 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -788,11 +788,11 @@ static int ksz_ptp_gettime(struct ptp_clock_info *ptp= , struct timespec64 *ts) return ret; } =20 -static int ksz_ptp_restart_perout(struct ksz_device *dev) +static int ksz_ptp_prepare_restart_perout(struct ksz_device *dev, + struct ptp_perout_request *request) { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; s64 now_ns, first_ns, period_ns, next_ns; - struct ptp_perout_request request; struct timespec64 next; struct timespec64 now; unsigned int count; @@ -823,12 +823,24 @@ static int ksz_ptp_restart_perout(struct ksz_device *= dev) =20 /* Restart periodic output signal */ next =3D ns_to_timespec64(next_ns); - request.start.sec =3D next.tv_sec; - request.start.nsec =3D next.tv_nsec; - request.period.sec =3D ptp_data->perout_period.tv_sec; - request.period.nsec =3D ptp_data->perout_period.tv_nsec; - request.index =3D 0; - request.flags =3D 0; + request->start.sec =3D next.tv_sec; + request->start.nsec =3D next.tv_nsec; + request->period.sec =3D ptp_data->perout_period.tv_sec; + request->period.nsec =3D ptp_data->perout_period.tv_nsec; + request->index =3D 0; + request->flags =3D 0; + + return 0; +} + +static int ksz_ptp_restart_perout(struct ksz_device *dev) +{ + struct ptp_perout_request request; + int ret; + + ret =3D ksz_ptp_prepare_restart_perout(dev, &request); + if (ret) + return ret; =20 return ksz_ptp_enable_perout(dev, &request, 1); } --=20 2.55.0 From nobody Fri Sep 25 22:19:32 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C54303A8736 for ; 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bh=UE3d8uBd3AkiHRdBNbCVNULk3X2F/j5sdXNN38PNd5o=; b=Cj8KCh1rheUyELSFALgunt2W321XZNafFo4umzi4Ei09IF/vT/P0Ichqba2RLiVbCCMoFu B1Cb/tZdO1GpRddi4u++sl2dq0JXY1KkHtm8FIfrP17OlUm4KXYA0+3y32iWBU7Ef7sCLY ptKIzBS3yD6Hbfqo32oDtUabaScBcFlo8LujudwUDINvwo1G7KgFS/vQh0NcrSIqdi2Zil la7UhONKY/nyzxqMIu1Ekyp6pct5GX8dc4G7PNu9xSol8Iza7T5EOA3xqOSgaQsX6a4moJ ScGV3iuGb6hyvdYlRe6nnHfWmqLLnvv/Cfh5UflprMwLBkIDIi4Zl52p7XOZhQ== From: "Bastien Curutchet (Schneider Electric)" Date: Tue, 08 Sep 2026 09:27:48 +0200 Subject: [PATCH net-next v3 08/10] net: dsa: microchip: extract time update Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-8-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_settime() function needs to be created. This function will access the same registers than the common ksz_ptp_settime(). Extract the register accesses into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 30 +++++++++++++++++++++--------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index e262bc7448f2..aa73ad1f05d8 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -845,30 +845,42 @@ static int ksz_ptp_restart_perout(struct ksz_device *= dev) return ksz_ptp_enable_perout(dev, &request, 1); } =20 -static int ksz_ptp_settime(struct ptp_clock_info *ptp, - const struct timespec64 *ts) +static int __ksz_ptp_settime(struct ksz_device *dev, + const struct timespec64 *ts) { - struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); - struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); const u16 *regs =3D dev->info->regs; int ret; =20 - mutex_lock(&ptp_data->lock); - /* Write to shadow registers and Load PTP clock */ ret =3D ksz_write16(dev, regs[PTP_RTC_SUB_NANOSEC], PTP_RTC_0NS); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_write32(dev, regs[PTP_RTC_NANOSEC], ts->tv_nsec); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_write32(dev, regs[PTP_RTC_SEC], ts->tv_sec); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_LOAD_TIME, PTP_LOAD_TIME); + if (ret) + return ret; + + return 0; +} + +static int ksz_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_settime(dev, ts); if (ret) goto unlock; =20 --=20 2.55.0 From nobody Fri Sep 25 22:19:32 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1DCA3A9DA1 for ; Tue, 8 Sep 2026 07:28:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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b=lKtEyN2hMhOxB8rJX7Y07mbstO86p9rIcUuwLL4TOGf8aIiQhP5RFE/eAxouGO1spNsS7o exMFu1Occ8nYjgyRz3vW4W3TNdloFnkvbGADSBYmI18+jFfkIO5FQe0E98MX9m8TW63Ccc MjRdie6qpQZXgf3qPym11Yu7ja8BKQgBgmBAQFV9gmlpI5Qud8tZnsOhyZtSWLrn53A6Wk sP+3uDcqevrwsGhwGmqN/q57/QAlIGEdWEftqnu0oCSjeaixVYqanhzFBH6kmKEK3twIJU CFJhSFsm5QDtqKxNt37+bRxcdMbFVR4Hse7OQ1J9YIqN3AtfQc0OkekaPTB7eA== From: "Bastien Curutchet (Schneider Electric)" Date: Tue, 08 Sep 2026 09:27:49 +0200 Subject: [PATCH net-next v3 09/10] net: dsa: microchip: extract time adjustment Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-9-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_adjtime() function needs to be created. This function will access the same registers as the common ksz_ptp_adjtime() function. Extract the register accesses into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index aa73ad1f05d8..0a77b46cfad2 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -946,18 +946,13 @@ static int ksz_ptp_adjfine(struct ptp_clock_info *ptp= , long scaled_ppm) return ret; } =20 -static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +static int __ksz_ptp_adjtime(struct ksz_device *dev, s64 delta) { - struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); - struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); - struct timespec64 delta64 =3D ns_to_timespec64(delta); const u16 *regs =3D dev->info->regs; s32 sec, nsec; u16 data16; int ret; =20 - mutex_lock(&ptp_data->lock); - /* do not use ns_to_timespec64(), * both sec and nsec are subtracted by hw */ @@ -965,15 +960,15 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp= , s64 delta) =20 ret =3D ksz_write32(dev, regs[PTP_RTC_NANOSEC], abs(nsec)); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_write32(dev, regs[PTP_RTC_SEC], abs(sec)); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_read16(dev, regs[PTP_CLK_CTRL], &data16); if (ret) - goto unlock; + return ret; =20 data16 |=3D PTP_STEP_ADJ; =20 @@ -984,6 +979,22 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp,= s64 delta) data16 |=3D PTP_STEP_DIR; =20 ret =3D ksz_write16(dev, regs[PTP_CLK_CTRL], data16); + if (ret) + return ret; + + return 0; +} + +static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + struct timespec64 delta64 =3D ns_to_timespec64(delta); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_adjtime(dev, delta); if (ret) goto unlock; =20 --=20 2.55.0 From nobody Fri Sep 25 22:19:32 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72EF23AAF6D for ; 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bh=39nZrXNSy6RAB1Z0YrdFqWLEeouplASL5OtMjMuD8DA=; b=2G3XWXH2D1DfuEVWGfvzvEp7FyHdN+IcKFy8Hv2jx+7n/Q4ndi6lk0LtP8GUp1Iu6p1BNu 2N7bu/65VlnsAU9WekwX8ji5L+cCN7bWybkBUuOEjChabqrI/H9+//q6DvU9a1NDKokDvy gSWxYNTf+YxhTkDdVmlPqJVqMT+62VSAz2Q9FlpGgxyVAh/8fuElgQjePSZVy1xI4Df0It LtFSI4eJQQGXy1rNeLlVA3ADZTnsxmphOaF5wrg8UntYbg5xXtpETu7KAvw0byP2egHSk1 7Kyjw6JhiLpfjY/bFoBFvzWwszsS2uAKKGaz7CLQ8kUc+6gqQyUZ4qdF1fT+8w== From: "Bastien Curutchet (Schneider Electric)" Date: Tue, 08 Sep 2026 09:27:50 +0200 Subject: [PATCH net-next v3 10/10] net: dsa: microchip: add periodic output support for the KSZ8463 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ksz-perout-v3-10-6722a3f1ca75@bootlin.com> References: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> In-Reply-To: <20260908-ksz-perout-v3-0-6722a3f1ca75@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 has several periodic outputs. The way it handles them differ from the other KSZ switches: - KSZ8463 has one set of registers for each of its 12 units while others switches share on set of configuration registers for all their units. - Maximum size of the KSZ8463 pulse width is smaller - KSZ8463 has 12 outputs while others only have 2 Add support for the KSZ8463 periodics outputs through a set of KSZ8463 specific functions. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 2 +- drivers/net/dsa/microchip/ksz_common.c | 2 + drivers/net/dsa/microchip/ksz_ptp.c | 258 ++++++++++++++++++++++++++++= ++++ drivers/net/dsa/microchip/ksz_ptp.h | 4 +- drivers/net/dsa/microchip/ksz_ptp_reg.h | 16 ++ 5 files changed, 280 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index f2a23e2e474a..6b08bb8fed5b 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -2478,7 +2478,7 @@ static int ksz8463_setup(struct dsa_switch *ds) if (ret) goto free_girq; =20 - ksz_ptp_set_caps(ds); + ksz8463_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 041bb4f96365..9e234ad71b72 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1161,6 +1161,8 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_mii =3D {false, false, true}, .supports_rmii =3D {false, false, true}, .internal_phy =3D {true, true, false}, + .n_pins =3D 12, + .n_per_out =3D 12, }, =20 [KSZ8563] =3D { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 0a77b46cfad2..d33034892a8f 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -26,6 +26,7 @@ */ #define KSZ_MAX_DRIFT_CORR 6249999 #define KSZ_MAX_PULSE_WIDTH 125000000LL +#define KSZ8463_MAX_PULSE_WIDTH 500000LL =20 #define KSZ_PTP_INC_NS 40ULL /* HW clock is incremented every 40 ns (by 4= 0) */ #define KSZ_PTP_SUBNS_BITS 32 @@ -63,6 +64,17 @@ static int ksz_ptp_tou_gpio(struct ksz_device *dev) LED_SRC_PTP_GPIO_1 | LED_SRC_PTP_GPIO_2); } =20 +static int ksz8463_ptp_tou_reset(struct ksz_device *dev, u8 unit) +{ + int ret; + + ret =3D ksz_rmw16(dev, KSZ8463_TOU_SW_RST, BIT(unit), BIT(unit)); + if (ret) + return ret; + + return ksz_rmw16(dev, KSZ8463_TOU_SW_RST, BIT(unit), 0); +} + static int ksz_ptp_tou_reset(struct ksz_device *dev, u8 unit) { u32 data; @@ -120,6 +132,28 @@ static int ksz_ptp_tou_target_time_set(struct ksz_devi= ce *dev, return 0; } =20 +static int ksz8463_ptp_tou_start(struct ksz_device *dev, u8 unit) +{ + u16 data; + int ret; + + ret =3D ksz_rmw16(dev, KSZ8463_TOU_EN, BIT(unit), BIT(unit)); + if (ret) + return ret; + + ret =3D ksz_read16(dev, KSZ8463_TOU_ACTIVE, &data); + if (ret) + return ret; + + if (!(data & BIT(unit))) { + dev_err(dev->dev, "%s: Trigger unit%d error!\n", __func__, + unit); + return -EIO; + } + + return 0; +} + static int ksz_ptp_tou_start(struct ksz_device *dev, u8 unit) { u32 data; @@ -147,6 +181,56 @@ static int ksz_ptp_tou_start(struct ksz_device *dev, u= 8 unit) return 0; } =20 +static int ksz8463_ptp_configure_perout(struct ksz_device *dev, + u32 cycle_width_ns, u32 pulse_width_ns, + struct timespec64 const *target_time, + u8 index) +{ + struct ptp_pin_desc *pin =3D &dev->ptp_data.pin_config[index]; + u16 cfg_base =3D KSZ8463_TRIG1_CFG + KSZ8463_TRIGN_CFG_SIZE * pin->chan; + u16 data; + int ret; + + /* Hardware has only 32 bit */ + if ((target_time->tv_sec & 0xffffffff) !=3D target_time->tv_sec) + return -EINVAL; + + data =3D KSZ8463_NOTIFY_BIT | + FIELD_PREP(KSZ8463_PATTERN_M, TRIG_POS_PERIOD) | + pin->index; + ret =3D ksz_write16(dev, cfg_base + KSZ8463_PATTERN_OFF, data); + if (ret) + return ret; + + ret =3D ksz_write32(dev, cfg_base + KSZ8463_CYCLE_WIDTH_OFF, + cycle_width_ns); + if (ret) + return ret; + + /* Set cycle count 0 - Infinite */ + ret =3D ksz_write16(dev, cfg_base + KSZ8463_CYCLE_CNT_OFF, 0); + if (ret) + return ret; + + /* KSZ8463 uses a 8 ns unit value to compute the pulse width */ + data =3D (pulse_width_ns / 8); + ret =3D ksz_write16(dev, cfg_base + KSZ8463_PULSE_WIDTH_OFF, data); + if (ret) + return ret; + + ret =3D ksz_write32(dev, cfg_base + KSZ8463_TARGET_NSEC, + target_time->tv_nsec); + if (ret) + return ret; + + ret =3D ksz_write32(dev, cfg_base + KSZ8463_TARGET_SEC, + target_time->tv_sec); + if (ret) + return ret; + + return 0; +} + static int ksz_ptp_configure_perout(struct ksz_device *dev, u32 cycle_width_ns, u32 pulse_width_ns, struct timespec64 const *target_time, @@ -241,6 +325,58 @@ static u64 ksz_ptp_compute_perout_pulse(struct ksz_dev= ice *dev, return min_t(u64, req_pulse_width_ns, max_pulse_width); } =20 +static int ksz8463_ptp_enable_perout(struct ksz_device *dev, + struct ptp_perout_request const *request, + int on) +{ + struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + u64 cycle_width_ns; + u64 pulse_width_ns; + int pin; + int ret; + + pin =3D ksz_ptp_get_pin(dev, request); + if (pin < 0) + return pin; + + ret =3D ksz8463_ptp_tou_reset(dev, request->index); + if (ret) + return ret; + + if (!on) { + ptp_data->tou_mode =3D KSZ_PTP_TOU_IDLE; + return 0; + } + ret =3D ksz_ptp_compute_perout_cycle(dev, request, &cycle_width_ns); + if (ret) + return ret; + pulse_width_ns =3D ksz_ptp_compute_perout_pulse(dev, request, + KSZ8463_MAX_PULSE_WIDTH); + + ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns, + KSZ8463_TRIG_PULSE_WIDTH_M); + if (ret) + return ret; + + ret =3D ksz8463_ptp_configure_perout(dev, cycle_width_ns, pulse_width_ns, + &ptp_data->perout_target_time_first, + pin); + if (ret) + return ret; + + ret =3D ksz_ptp_tou_gpio(dev); + if (ret) + return ret; + + ret =3D ksz8463_ptp_tou_start(dev, request->index); + if (ret) + return ret; + + ptp_data->tou_mode =3D KSZ_PTP_TOU_PEROUT; + + return 0; +} + static int ksz_ptp_enable_perout(struct ksz_device *dev, struct ptp_perout_request const *request, int on) @@ -845,6 +981,18 @@ static int ksz_ptp_restart_perout(struct ksz_device *d= ev) return ksz_ptp_enable_perout(dev, &request, 1); } =20 +static int ksz8463_ptp_restart_perout(struct ksz_device *dev) +{ + struct ptp_perout_request request; + int ret; + + ret =3D ksz_ptp_prepare_restart_perout(dev, &request); + if (ret) + return ret; + + return ksz8463_ptp_enable_perout(dev, &request, 1); +} + static int __ksz_ptp_settime(struct ksz_device *dev, const struct timespec64 *ts) { @@ -871,6 +1019,41 @@ static int __ksz_ptp_settime(struct ksz_device *dev, return 0; } =20 +static int ksz8463_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_settime(dev, ts); + if (ret) + goto unlock; + + switch (ptp_data->tou_mode) { + case KSZ_PTP_TOU_IDLE: + break; + + case KSZ_PTP_TOU_PEROUT: + ret =3D ksz8463_ptp_restart_perout(dev); + if (ret) + goto unlock; + + break; + } + + spin_lock_bh(&ptp_data->clock_lock); + ptp_data->clock_time =3D *ts; + spin_unlock_bh(&ptp_data->clock_lock); + +unlock: + mutex_unlock(&ptp_data->lock); + + return ret; +} + static int ksz_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts) { @@ -985,6 +1168,40 @@ static int __ksz_ptp_adjtime(struct ksz_device *dev, = s64 delta) return 0; } =20 +static int ksz8463_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + struct timespec64 delta64 =3D ns_to_timespec64(delta); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_adjtime(dev, delta); + if (ret) + goto unlock; + + switch (ptp_data->tou_mode) { + case KSZ_PTP_TOU_IDLE: + break; + + case KSZ_PTP_TOU_PEROUT: + ret =3D ksz8463_ptp_restart_perout(dev); + if (ret) + goto unlock; + + break; + } + + spin_lock_bh(&ptp_data->clock_lock); + ptp_data->clock_time =3D timespec64_add(ptp_data->clock_time, delta64); + spin_unlock_bh(&ptp_data->clock_lock); + +unlock: + mutex_unlock(&ptp_data->lock); + return ret; +} + static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); @@ -1019,6 +1236,26 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *pt= p, s64 delta) return ret; } =20 +static int ksz8463_ptp_enable(struct ptp_clock_info *ptp, + struct ptp_clock_request *req, int on) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + int ret; + + switch (req->type) { + case PTP_CLK_REQ_PEROUT: + mutex_lock(&ptp_data->lock); + ret =3D ksz8463_ptp_enable_perout(dev, &req->perout, on); + mutex_unlock(&ptp_data->lock); + break; + default: + return -EOPNOTSUPP; + } + + return ret; +} + static int ksz_ptp_enable(struct ptp_clock_info *ptp, struct ptp_clock_request *req, int on) { @@ -1095,6 +1332,27 @@ static int ksz_ptp_start_clock(struct ksz_device *de= v) return 0; } =20 +void ksz8463_ptp_set_caps(struct dsa_switch *ds) +{ + struct ksz_device *dev =3D ds->priv; + struct ksz_ptp_data *ptp_data; + + ptp_data =3D &dev->ptp_data; + + ptp_data->caps.owner =3D THIS_MODULE; + snprintf(ptp_data->caps.name, 16, "Microchip Clock"); + ptp_data->caps.max_adj =3D KSZ_MAX_DRIFT_CORR; + ptp_data->caps.gettime64 =3D ksz_ptp_gettime; + ptp_data->caps.settime64 =3D ksz8463_ptp_settime; + ptp_data->caps.adjfine =3D ksz_ptp_adjfine; + ptp_data->caps.adjtime =3D ksz8463_ptp_adjtime; + ptp_data->caps.do_aux_work =3D ksz_ptp_do_aux_work; + ptp_data->caps.enable =3D ksz8463_ptp_enable; + ptp_data->caps.verify =3D ksz_ptp_verify_pin; + ptp_data->caps.n_pins =3D dev->info->n_pins; + ptp_data->caps.n_per_out =3D dev->info->n_per_out; +} + void ksz_ptp_set_caps(struct dsa_switch *ds) { struct ksz_device *dev =3D ds->priv; diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchi= p/ksz_ptp.h index 89716b31596b..3838a73a8302 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.h +++ b/drivers/net/dsa/microchip/ksz_ptp.h @@ -12,7 +12,7 @@ =20 #include =20 -#define KSZ_PTP_N_GPIO 2 +#define KSZ_PTP_N_GPIO 12 =20 enum ksz_ptp_tou_mode { KSZ_PTP_TOU_IDLE, @@ -34,6 +34,7 @@ struct ksz_ptp_data { }; =20 void ksz_ptp_set_caps(struct dsa_switch *ds); +void ksz8463_ptp_set_caps(struct dsa_switch *ds); int ksz_ptp_clock_register(struct dsa_switch *ds); =20 void ksz_ptp_clock_unregister(struct dsa_switch *ds); @@ -67,6 +68,7 @@ struct ksz_ptp_data { }; =20 static inline void ksz_ptp_set_caps(struct dsa_switch *ds) { } +static inline void ksz8463_ptp_set_caps(struct dsa_switch *ds) { } static inline int ksz_ptp_clock_register(struct dsa_switch *ds) { return 0; diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index 65ea8577af75..16f117fa5d49 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -51,6 +51,22 @@ =20 #define REG_PTP_UNIT_INDEX__4 0x0520 =20 +#define KSZ8463_TOU_ACTIVE 0x202 +#define KSZ8463_TOU_EN 0x206 +#define KSZ8463_TOU_SW_RST 0x208 + +#define KSZ8463_TRIGN_CFG_SIZE 0x20 +#define KSZ8463_TRIG1_CFG 0x220 +#define KSZ8463_TARGET_NSEC 0x000 +#define KSZ8463_TARGET_SEC 0x004 +#define KSZ8463_PATTERN_OFF 0x008 +#define KSZ8463_NOTIFY_BIT BIT(8) +#define KSZ8463_PATTERN_M GENMASK(6, 4) +#define KSZ8463_PULSE_WIDTH_OFF 0x00A +#define KSZ8463_TRIG_PULSE_WIDTH_M GENMASK(15, 0) +#define KSZ8463_CYCLE_WIDTH_OFF 0x00C +#define KSZ8463_CYCLE_CNT_OFF 0x010 + #define PTP_GPIO_INDEX GENMASK(19, 16) #define PTP_TSI_INDEX BIT(8) #define PTP_TOU_INDEX GENMASK(1, 0) --=20 2.55.0