From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CFE74E1415; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=ozEpv5Mg2+/zjie7gPMIhS0Y9yrvcGi/HWNtKj5lvF2Cv+LMa/zokat2xDhbAsH4ec0BRrGghPGK/4VM0R9Ztvzc+xnbXCrvzn8h6M0nr6Ynr6q1v1v9W61/7IzSUoozMTkJDBjrY8CippzAZwcp8mbxAbLh+e29Uf9L+mzNex0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=mVWzArhsIEDBJ9wiE1E60QfHignwoHWXX2KeGyQsvUE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TGUR83osaIWL43XgV7sDSZdFG1t9idN2TtHXHCZ3TyStx0EgucpdCVgzasxWEElsQ7v0KCtMl1LfQIcsOLSGbrWUh9NlEEljhFzCIWNLq+Znk20xJ9ROwNkvRFliGNqcQrUxgXTmUttD2aJRA6ZQPv5LfsMjx1v/teQuyo8jt2w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Nn/z0Y/V; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Nn/z0Y/V" Received: by smtp.kernel.org (Postfix) with ESMTPS id C2487C2BD01; Tue, 8 Sep 2026 09:41:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860515; bh=mVWzArhsIEDBJ9wiE1E60QfHignwoHWXX2KeGyQsvUE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Nn/z0Y/V9n/EpHDUTlGH/d9MvUWWu9y6hf8fvhpebsrmhyMvd5CDV9mvsgWEbwcQa aG011T8aQKcIwDx0JchgcctQe86Fj+r/iwDlBEm1of3d8PmxGdpQYtcXv4oK+gdZ7q vu5Hw+5/YcVDFaRuqE+SCHUZ93+prLrgo9+DuAG/domn+ExI13oyE590HJO39AL6io +lRZwez48sg3YBJgPU8T3xqdo2W44N3NCxvOXJ869ONkwbP6TNfxOL3ZFCrAtuFcEV OQ/Ij+oVzjP9cBgV01Dlo9dmhPH0ux/J9zXIuNuPsHMwavSzTTpf1ClfBYTXVRUDnq CuzMFQsFnz/nQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 965CDC79FA1; Tue, 8 Sep 2026 09:41:55 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:40:54 +0400 Subject: [PATCH v4 01/13] dt-bindings: phy: qcom,ipq5332-uniphy-pcie: Document the IPQ5018 USB3 PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-1-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860512; l=3216; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=TqWnP3AC9DE1HL7njHHwCLpEe8r5+8+QRZEW4l8Wl84=; b=rVIhYL1zY84VxVREmCywegI2WeRUzTopjZCJlTxsroMvOs/QiM7ybKgi02klpu6I9dmxxhrkm sJvHvCB9GPHCunW0NOfPvtmz50S4yY0W4OI3sHypLF32IGItMLwUdGX X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Describe the USB3 PHY found in the IPQ5018 SoC, so add the compatible string for it as well as the required resources (clocks and resets). The PCIe and USB physical pads are muxed and selection is done via a control register in TCSR. By default, PCIe mode is selected, hence make the property for USB mux selection required. In addition, the PHY requires a 5V supply for USB3 mode operation. Signed-off-by: George Moussalem --- .../bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml | 44 ++++++++++++++++++= ++-- 1 file changed, 41 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie= -phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-= phy.yaml index 6e9df81441e9..f59fa4e88866 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.ya= ml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.ya= ml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/qcom,ipq5332-uniphy-pcie-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Qualcomm UNIPHY PCIe 28LP PHY +title: Qualcomm UNIPHY PCIe and USB3 28LP PHY =20 maintainers: - Nitheesh Sekar @@ -17,6 +17,7 @@ properties: compatible: enum: - qcom,ipq5018-uniphy-pcie-phy + - qcom,ipq5018-uniphy-usb3-phy - qcom,ipq5332-uniphy-pcie-phy =20 reg: @@ -27,9 +28,24 @@ properties: maxItems: 2 =20 resets: - minItems: 2 + minItems: 1 maxItems: 3 =20 + vdd-supply: + description: + Phandle to 5V regulator supply to PHY digital circuit. + + qcom,phy-usb-mux-sel: + description: + TCSR register address for mux selection control for PCIe / USB3 mode. + If the property is set, the driver will configure USB3 mux selection. + If not set, the setting defaults to PCIe mux selection (BIT(0) =3D 0= ). + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to TCSR syscon + - description: offset of PHY mux selection register + "#phy-cells": const: 0 =20 @@ -47,7 +63,6 @@ required: - resets - "#phy-cells" - "#clock-cells" - - num-lanes =20 additionalProperties: false =20 @@ -67,6 +82,27 @@ allOf: items: - description: phy reset - description: cfg reset + required: + - num-lanes + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-uniphy-usb3-phy + then: + properties: + clocks: + items: + - description: usb3 pipe clock + - description: usb3 cfg ahb clock + resets: + items: + - description: usb3 phy reset + required: + - vdd-supply + - qcom,phy-usb-mux-sel =20 - if: properties: @@ -85,6 +121,8 @@ allOf: - description: phy reset - description: ahb reset - description: cfg reset + required: + - num-lanes =20 examples: - | --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CEB34D990C; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=GnXx57qTXH/mZ18PSf5xBsPf406YKwNTItG5R2yot4MSZMjsj4dlBbzKBwGQDCgiMqmUvLpdX+gCsEtutPKDofrLpKs6UxInpen9w8F5yFGtbH/XxATRC0dagYfc3GQfqMy1jDIZik1gz1nryOXJqlwXWIrTYL0OZfz/9JTLwvg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=O68aPuLj/MRZZZ2bKgri277qxMacJOqxiv0zSOosvfg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ugu+U4dz+2044JGSoENVCb+P+C/XrXzRPx6eh1X9Q21MhCW5oRaNsNBuDssF0czqLXy3oP8+3prSU/tOC/4BzcoJFIA8jPnPXvn0WdMF43hWxOHSAp3NktGgl/7hfO9mImAqx8B0RFTidnlo0+Z21JkHeTxsiEYRwuGPC39cmMg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=L+hliv6k; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="L+hliv6k" Received: by smtp.kernel.org (Postfix) with ESMTPS id CF719C2BCFC; Tue, 8 Sep 2026 09:41:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860515; bh=O68aPuLj/MRZZZ2bKgri277qxMacJOqxiv0zSOosvfg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=L+hliv6kDHpRn/X2Z5eavYxIaW2hiAH2EDOLOCsGe7Rl8FtlgkyqxIxwK+PVAJStu Yx8FXxRuy6eAbF/CkJst2bSsNH8SnXXbhmD8XGS6SvEUjhMRhxF/Nu1scjp2Nir5qh DOSHb0wVg6Z8W9QzkYWEwKaScc6gig0lWi1yV/sXdJCWoHEgcM1Yr+RBOS5EDzWuKi QWX7blFxaxDh4Yg4QPWWKR2NTpU1QhabMXPJskffcZmyzCIiiQ9kqy77yMDHu6qJ4I T0qAeVkPAL0+9IU9iyBrwrcSnUSq3niKEZLTfY+A7L3LQuAaoxKTuhjBcOgVvvHy13 hlCdx/0HZpgJQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6A5FC79FAB; Tue, 8 Sep 2026 09:41:55 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:40:55 +0400 Subject: [PATCH v4 02/13] phy: qualcomm: qcom-uniphy-pcie-28lp: Convert to PCIe/USB3 combo PHY driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-2-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Konrad Dybcio , Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860512; l=10630; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=VlrFmI3Rhb8PL7GHLiIwbQZh0DHE3ArWCVg8Q7ElEGg=; b=t2FUeJ1P3TI29p6lCx6uxr5CygdRsRZk/HoEzL6VKigQ/BBEKXNn6yWzsH+jzg+wZjncQz/aW vtlYDyniftzBf1qFnZD0xCTGgphMpo8lUZkn58BEYONkkM/EQi6lTRz X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem This PHY found in IPQ5332 and IPQ5018 SoCs is actually a multi-purpose PCIe/USB3 combo PHY. The driver was initially created for PCIe PHY support only. As such, rename the driver and generalize function and struct names to reflect that it is a PCIe and USB3 combo PHY driver so that USB3 support can be added in subsequent patches. Reviewed-by: Konrad Dybcio Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- drivers/phy/qualcomm/Kconfig | 24 +++---- drivers/phy/qualcomm/Makefile | 2 +- ...cie-28lp.c =3D> phy-qcom-uniphy-pcie-usb3-28lp.c} | 83 +++++++++++-----= ------ 3 files changed, 53 insertions(+), 56 deletions(-) diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig index d910a5d1a1ac..2db65815b297 100644 --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -155,19 +155,6 @@ config PHY_QCOM_M31_USB management. This driver is required even for peripheral only or host only mode configurations. =20 -config PHY_QCOM_UNIPHY_PCIE_28LP - bool "PCIE UNIPHY 28LP PHY driver" - depends on ARCH_QCOM - depends on COMMON_CLK - depends on HAS_IOMEM - depends on OF - select GENERIC_PHY - help - Enable this to support the PCIe UNIPHY 28LP phy transceiver that - is used with PCIe controllers on Qualcomm IPQ5332 chips. It - handles PHY initialization, clock management required after - resetting the hardware and power management. - config PHY_QCOM_M31_EUSB tristate "Qualcomm M31 eUSB2 PHY driver support" depends on USB && (ARCH_QCOM || COMPILE_TEST) @@ -178,6 +165,17 @@ config PHY_QCOM_M31_EUSB up of the associated USB repeater that is paired with the eUSB2 PHY. =20 +config PHY_QCOM_UNIPHY_PCIE_USB3_28LP + bool "Qualcomm IPQ5332 UNIPHY PCIe USB3 28LP PHY driver" + depends on OF && (ARCH_QCOM || COMPILE_TEST) + select GENERIC_PHY + select MFD_SYSCON + help + Enable this to support the Qualcomm multi-purpose PCIe/USB3 UNIPHY + transceiver that is used on Qualcomm IPQ5018 and IPQ5332 SoCs with + PCIe and USB controllers. It handles PHY initialization, clock + management required after resetting the hardware and power management. + config PHY_QCOM_USB_HS tristate "Qualcomm USB HS PHY module" depends on USB_ULPI_BUS diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index 8bf887d58ee4..6e2e9737e387 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -18,7 +18,7 @@ obj-$(CONFIG_PHY_QCOM_QMP_USB_LEGACY) +=3D phy-qcom-qmp-u= sb-legacy.o =20 obj-$(CONFIG_PHY_QCOM_QUSB2) +=3D phy-qcom-qusb2.o obj-$(CONFIG_PHY_QCOM_EUSB2_REPEATER) +=3D phy-qcom-eusb2-repeater.o -obj-$(CONFIG_PHY_QCOM_UNIPHY_PCIE_28LP) +=3D phy-qcom-uniphy-pcie-28lp.o +obj-$(CONFIG_PHY_QCOM_UNIPHY_PCIE_USB3_28LP) +=3D phy-qcom-uniphy-pcie-usb= 3-28lp.o obj-$(CONFIG_PHY_QCOM_USB_HS) +=3D phy-qcom-usb-hs.o obj-$(CONFIG_PHY_QCOM_USB_HSIC) +=3D phy-qcom-usb-hsic.o obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) +=3D phy-qcom-usb-hs-28nm.o diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c b/drivers/phy= /qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c similarity index 76% rename from drivers/phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c rename to drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c index 324c0a5d658e..53512db90eb3 100644 --- a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c @@ -43,29 +43,29 @@ #define PHY_CFG_EIOS_DTCT_REG 0x3e4 #define PHY_CFG_GEN3_ALIGN_HOLDOFF_TIME 0x3e8 =20 -enum qcom_uniphy_pcie_type { +enum qcom_uniphy_type { PHY_TYPE_PCIE =3D 1, PHY_TYPE_PCIE_GEN2, PHY_TYPE_PCIE_GEN3, }; =20 -struct qcom_uniphy_pcie_regs { +struct qcom_uniphy_regs { u32 offset; u32 val; }; =20 -struct qcom_uniphy_pcie_data { +struct qcom_uniphy_data { int lane_offset; /* offset between the lane register bases */ u32 phy_type; - const struct qcom_uniphy_pcie_regs *init_seq; + const struct qcom_uniphy_regs *init_seq; u32 init_seq_num; u32 pipe_clk_rate; }; =20 -struct qcom_uniphy_pcie { +struct qcom_uniphy { struct phy phy; struct device *dev; - const struct qcom_uniphy_pcie_data *data; + const struct qcom_uniphy_data *data; struct clk_bulk_data *clks; int num_clks; struct reset_control *resets; @@ -73,9 +73,9 @@ struct qcom_uniphy_pcie { int lanes; }; =20 -#define phy_to_dw_phy(x) container_of((x), struct qca_uni_pcie_phy, phy) +#define phy_to_dw_phy(x) container_of((x), struct qcom_uniphy, phy) =20 -static const struct qcom_uniphy_pcie_regs ipq5018_regs[] =3D { +static const struct qcom_uniphy_regs ipq5018_pcie_regs[] =3D { { .offset =3D SSCG_CTRL_REG_4, .val =3D 0x1cb9, @@ -109,7 +109,7 @@ static const struct qcom_uniphy_pcie_regs ipq5018_regs[= ] =3D { }, }; =20 -static const struct qcom_uniphy_pcie_regs ipq5332_regs[] =3D { +static const struct qcom_uniphy_regs ipq5332_pcie_regs[] =3D { { .offset =3D PHY_CFG_PLLCFG, .val =3D 0x30, @@ -122,26 +122,26 @@ static const struct qcom_uniphy_pcie_regs ipq5332_reg= s[] =3D { }, }; =20 -static const struct qcom_uniphy_pcie_data ipq5018_data =3D { +static const struct qcom_uniphy_data ipq5018_pcie_data =3D { .lane_offset =3D 0x800, .phy_type =3D PHY_TYPE_PCIE_GEN2, - .init_seq =3D ipq5018_regs, - .init_seq_num =3D ARRAY_SIZE(ipq5018_regs), + .init_seq =3D ipq5018_pcie_regs, + .init_seq_num =3D ARRAY_SIZE(ipq5018_pcie_regs), .pipe_clk_rate =3D 125 * MEGA, }; =20 -static const struct qcom_uniphy_pcie_data ipq5332_data =3D { +static const struct qcom_uniphy_data ipq5332_pcie_data =3D { .lane_offset =3D 0x800, .phy_type =3D PHY_TYPE_PCIE_GEN3, - .init_seq =3D ipq5332_regs, - .init_seq_num =3D ARRAY_SIZE(ipq5332_regs), + .init_seq =3D ipq5332_pcie_regs, + .init_seq_num =3D ARRAY_SIZE(ipq5332_pcie_regs), .pipe_clk_rate =3D 250 * MEGA, }; =20 -static void qcom_uniphy_pcie_init(struct qcom_uniphy_pcie *phy) +static void qcom_uniphy_pcie_usb3_init(struct qcom_uniphy *phy) { - const struct qcom_uniphy_pcie_data *data =3D phy->data; - const struct qcom_uniphy_pcie_regs *init_seq; + const struct qcom_uniphy_data *data =3D phy->data; + const struct qcom_uniphy_regs *init_seq; void __iomem *base =3D phy->base; int lane, i; =20 @@ -157,7 +157,7 @@ static void qcom_uniphy_pcie_init(struct qcom_uniphy_pc= ie *phy) =20 static int qcom_uniphy_pcie_power_off(struct phy *x) { - struct qcom_uniphy_pcie *phy =3D phy_get_drvdata(x); + struct qcom_uniphy *phy =3D phy_get_drvdata(x); =20 clk_bulk_disable_unprepare(phy->num_clks, phy->clks); =20 @@ -166,7 +166,7 @@ static int qcom_uniphy_pcie_power_off(struct phy *x) =20 static int qcom_uniphy_pcie_power_on(struct phy *x) { - struct qcom_uniphy_pcie *phy =3D phy_get_drvdata(x); + struct qcom_uniphy *phy =3D phy_get_drvdata(x); int ret; =20 ret =3D reset_control_assert(phy->resets); @@ -193,13 +193,13 @@ static int qcom_uniphy_pcie_power_on(struct phy *x) =20 usleep_range(CLK_EN_DELAY_MIN_US, CLK_EN_DELAY_MAX_US); =20 - qcom_uniphy_pcie_init(phy); + qcom_uniphy_pcie_usb3_init(phy); =20 return 0; } =20 -static inline int qcom_uniphy_pcie_get_resources(struct platform_device *p= dev, - struct qcom_uniphy_pcie *phy) +static inline int qcom_uniphy_pcie_usb3_get_resources(struct platform_devi= ce *pdev, + struct qcom_uniphy *phy) { struct resource *res; =20 @@ -236,9 +236,9 @@ static inline int qcom_uniphy_pcie_get_resources(struct= platform_device *pdev, * clk | +-------+ | +-----+ * +---------------+ */ -static inline int phy_pipe_clk_register(struct qcom_uniphy_pcie *phy, int = id) +static inline int phy_pipe_clk_register(struct qcom_uniphy *phy, int id) { - const struct qcom_uniphy_pcie_data *data =3D phy->data; + const struct qcom_uniphy_data *data =3D phy->data; struct clk_hw *hw; char name[64]; =20 @@ -252,30 +252,29 @@ static inline int phy_pipe_clk_register(struct qcom_u= niphy_pcie *phy, int id) return devm_of_clk_add_hw_provider(phy->dev, of_clk_hw_simple_get, hw); } =20 -static const struct of_device_id qcom_uniphy_pcie_id_table[] =3D { +static const struct of_device_id qcom_uniphy_pcie_usb3_id_table[] =3D { { .compatible =3D "qcom,ipq5018-uniphy-pcie-phy", - .data =3D &ipq5018_data, + .data =3D &ipq5018_pcie_data, }, { .compatible =3D "qcom,ipq5332-uniphy-pcie-phy", - .data =3D &ipq5332_data, - }, { - /* Sentinel */ + .data =3D &ipq5332_pcie_data, }, + { }, }; -MODULE_DEVICE_TABLE(of, qcom_uniphy_pcie_id_table); +MODULE_DEVICE_TABLE(of, qcom_uniphy_pcie_usb3_id_table); =20 -static const struct phy_ops pcie_ops =3D { +static const struct phy_ops qcom_uniphy_pcie_ops =3D { .power_on =3D qcom_uniphy_pcie_power_on, .power_off =3D qcom_uniphy_pcie_power_off, .owner =3D THIS_MODULE, }; =20 -static int qcom_uniphy_pcie_probe(struct platform_device *pdev) +static int qcom_uniphy_pcie_usb3_probe(struct platform_device *pdev) { struct phy_provider *phy_provider; struct device *dev =3D &pdev->dev; - struct qcom_uniphy_pcie *phy; + struct qcom_uniphy *phy; struct phy *generic_phy; int ret; =20 @@ -294,12 +293,12 @@ static int qcom_uniphy_pcie_probe(struct platform_dev= ice *pdev) if (ret) return dev_err_probe(dev, ret, "Couldn't read num-lanes\n"); =20 - ret =3D qcom_uniphy_pcie_get_resources(pdev, phy); + ret =3D qcom_uniphy_pcie_usb3_get_resources(pdev, phy); if (ret < 0) return dev_err_probe(&pdev->dev, ret, "failed to get resources: %d\n", ret); =20 - generic_phy =3D devm_phy_create(phy->dev, NULL, &pcie_ops); + generic_phy =3D devm_phy_create(phy->dev, NULL, &qcom_uniphy_pcie_ops); if (IS_ERR(generic_phy)) return PTR_ERR(generic_phy); =20 @@ -317,15 +316,15 @@ static int qcom_uniphy_pcie_probe(struct platform_dev= ice *pdev) return 0; } =20 -static struct platform_driver qcom_uniphy_pcie_driver =3D { - .probe =3D qcom_uniphy_pcie_probe, +static struct platform_driver qcom_uniphy_pcie_usb3_driver =3D { + .probe =3D qcom_uniphy_pcie_usb3_probe, .driver =3D { - .name =3D "qcom-uniphy-pcie", - .of_match_table =3D qcom_uniphy_pcie_id_table, + .name =3D "qcom-uniphy-pcie-usb3-28lp", + .of_match_table =3D qcom_uniphy_pcie_usb3_id_table, }, }; =20 -module_platform_driver(qcom_uniphy_pcie_driver); +module_platform_driver(qcom_uniphy_pcie_usb3_driver); =20 -MODULE_DESCRIPTION("PCIE QCOM UNIPHY driver"); +MODULE_DESCRIPTION("Qualcomm IPQ5332 UNIPHY PCIe USB3 28LP PHY driver"); MODULE_LICENSE("GPL"); --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33AE74E2348; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=DiAyfpUtVDHZVjZBCqhgJKRdQuSmelHM06792SwAMFbdCG82m/aigGtpa8yEzqvC4HlPaH+4jrjptq6LB0Drw6mYUDuCsZlsdTC4ks1sRRB2lwB01SVbVZB7AmO83VJ+3sQWseC5ZHdhsA/D0xfWW1nw+EtMwukYbin5+x+u3T8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=XJ6yOYRHmExtgCBY9qgx0PWkSsgAEmtcH8En113ot5M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SJqaRbZ0kB7D9W4zwqdlOdIJFOAP1tg8vNE6JtCX95T1SOyMVo/Vzaw6WWZUc1gINjbtgXwnBMu5JIwyPPq3E1CjfSVE8JyomT9YgvG2mOoJF2kIx7dwhRw+/OFdaDgeeCYJpx+E9I5TYDuf8yoBQ60lAnR54HXgUkORGHsXbBU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mN6/eogA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mN6/eogA" Received: by smtp.kernel.org (Postfix) with ESMTPS id E9085C2BD04; Tue, 8 Sep 2026 09:41:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=XJ6yOYRHmExtgCBY9qgx0PWkSsgAEmtcH8En113ot5M=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=mN6/eogAkZbzqjvWFtEatTPOr9Qhv3XpQaWOJtJ/NUeeVmPyNp1H3VMIZdlEEnrsL 0FFHkFXlEtvohsZ4VuSjF37S39i2Hgv38VC/szstDP2FdkVNN2PNMJqKXnJS46b0/2 C876uV8YKabqt4HjZ3Bsmt2DeDnjVzfqW+wMure1s4zwKJi8CUi5220pJJFwQSZUgn P5c+Rp1Y5phdoxmKw7lxoosQ1UW93X6xyXlJP/c30+UqnXKa0V89xkjtYWlZ35HjGl AnsGBxP+JG+ureHDmR4LWqecM7nthxM8+rm9A70bUyBe2/kypNQesPWiXXbTseoU/m nsTaqNoduuDOw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDB46C79F82; Tue, 8 Sep 2026 09:41:55 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:40:56 +0400 Subject: [PATCH v4 03/13] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Remove unused of_device.h header file Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-3-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860512; l=932; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=x3YqnFvnYn/dCrkEKgaRYBlPO+FYsf46oEelUL8OnI4=; b=Z6muUtm7Pdr7gd25BHnn0SL9Th8zJf9BxGrRZH5VgkYh2/tMv5XhZmJAPRCmqvBuDxz/w+rx7 WgQl+YY1RUxBzyjyoufuWzTS/Um6a2gcF4t1xVvhHpS5BPvxiYxzuHR X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Drop the unused of_device.h header file as the of_device_get_match_data declaration was moved to of.h in below commit: commit 82174a0a9c5c ("of: Move of_device_get_match_data() declaration") Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c b/driver= s/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c index 53512db90eb3..b9ca6c1c177b 100644 --- a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E99D4E379B; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=HWbnkRHNCj3lyI19g9V6OVG9ctsmTJxDxHVDcpXsSLPuS7SXILEYZqnXs9Kh1MW7utlxyfG9ytW6mSrYrM/LbEi2Q8OI33kxKEGYnUwY9Vn3QaUDjI92YQ6y3/4Rpw7zMNba4NC8+9y/QzVjae6quzhIBlt5gHRFfT7Jbj3lCkk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=vUrdouI6geIRrhvl7FMUbnySUDBs0we9z3aR5YMU6zs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MGZKnJIL+Goz7oPX7AHsPGLDytf3vU5Y9JsiEeOtIA9YNsSgRww5E2PLQBFbIbl1Yh8+OngFNszvzDF1W3fS9Tn9rELXUAWDHjzURKvq/LR4BGFk0Z7MW4INZg0yy4zUUX9JTvvsnheFD2Lkpf0qKqtQS47NEOaQ9NLnZh3XV30= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JKhqAIjw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JKhqAIjw" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0194AC4AF0D; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=vUrdouI6geIRrhvl7FMUbnySUDBs0we9z3aR5YMU6zs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=JKhqAIjw/3Novblg8urc1LS9uF6ZHOnbMnXARtaAduLCNUkAOGFeul8TpXFw7e6te 3eBvaeHhsKQz6RcWMOr+p/ZkzzsaCB0UTJCDiaNXtck9OhJroioI9TXX5GVQGW+cEo sbWgtXPrixcx7NpNmiG7ffWJjkK9gMkXkSW2FRdX95HZL0t0OQ6YkX8+/N63PFg0GK ElVzjsolP+Jq0apJGPxpj+UNIZq0i2frZAenJ5/m+cZO8/4sHKosRyJKXE5FKW9Pwe c7wS4ebC1mt6puS/kaAe/hsNcyOnnwnX0zLm9xJuNe+hGi1d4rBYOwfmOiAI7imBcK h4ef08ZM+Rzjg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2475C79FAD; Tue, 8 Sep 2026 09:41:55 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:40:57 +0400 Subject: [PATCH v4 04/13] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Drop unused phy_to_dw_phy macro Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-4-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=847; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=IZ/hjxmEdOnTJTDZazw9P78aJ5AEBePKGFMJqAXOe5s=; b=94b2fzvuiH7G5zZammgV57trIIoPK4mwZqfHv2tpEyLyAeIpxfo/xe/+DsS2EFQY4eRxD2v08 ZWuehp9sx54DjPwk2XmsfBYVjKTaJMsL7x8hSrAFF2Qjl/52zzElgX5 X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Remove the unused phy_to_dw_phy() helper macro which is not referenced anywhere in the driver. Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c b/driver= s/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c index b9ca6c1c177b..0256183fbcbd 100644 --- a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c @@ -72,8 +72,6 @@ struct qcom_uniphy { int lanes; }; =20 -#define phy_to_dw_phy(x) container_of((x), struct qcom_uniphy, phy) - static const struct qcom_uniphy_regs ipq5018_pcie_regs[] =3D { { .offset =3D SSCG_CTRL_REG_4, --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6215C4EE84D; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=dfiyVdcz4TZgYHgZmQ7spBnvJh2sgk/pu2FSTLXSHbx/ovk/b6LVPPMVqlZLUIS3ZAlisYlw7LxZ6cC+JC4iOie//0bnpOJ88d6OwZmkHpmNbVIeb9mDnYihUGMexAtfm/jmT57OVzcCbP6y0j//DK1v85TRnvmKTG4CN6p9iIY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=+r5joPgRFCFYWXgPKNZ7DFEUDDAg9qDqy9jlkzCRojk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Am5P1/h12hsBZHxXYUlHbkDO0GgscqUbsM1XPMdodYaJ0yqh0gS2x+IUZANVw0KYIF0kJOxyZ9txFfvCZcWt6d+YlpTaERsUaGmjqBSLUamdWwjK+HYmi+kMjZXSBx0ycU+BKaujrQr4qIr74WhLqFE/mxiBQV6ZU9wbJhNikOg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KCELvOj8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KCELvOj8" Received: by smtp.kernel.org (Postfix) with ESMTPS id 166B4C32781; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=+r5joPgRFCFYWXgPKNZ7DFEUDDAg9qDqy9jlkzCRojk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=KCELvOj8GCAMREoziPERLvMYVqKNKgTZFtX6n1tss91uMPDueR+/CMj9PoRWepqdj ND+I13nAXygkV9cEzcl/05Md1wd5Pu2Y7OQvMHZInxu7aSfL372y+ndq7ttuO0tusx YicAGdpFoNCwK17vek2KLjF6gIOq6YJlrf8jKr5TTqarlRNG97IX6YS00oiSJZvLV4 3Gyf1Z4jPMCiSTn7NoYg54CgwmvRfBhlFfrZKhTqV003SVR7Kq+fSaxzHrJ/yp1U0g roOYxVmunMw2KjRGeZ/xGGAjHZlEaCvVTpGy6NKp89KbLsyb577sAjsZ9RREOA4ExZ IdLotAimpY61A== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01467C79F99; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:40:58 +0400 Subject: [PATCH v4 05/13] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Refactor init regs table definitions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-5-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Konrad Dybcio , Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=2508; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=j5eDBU1/M/VWuaZnnm/rYsHj5E3f2ArUUkz0LzF/aZY=; b=EsNjOdFWxRh2tznRzAS6gw4JLaSQrKdA36/aIXLc4K5DTg5/I8/PQbYw+TZY4zp84nmNiE1sl xzsDXRNyIw8AZ+dls5TglpJU8c+Ge4pwXmush/Jznv/uNBAMCNWSuDJ X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Refactor the IPQ5018/IPQ5332 UNIPHY PCIe init data by introducing a helper macro for register/value entries and converting open-coded struct initializers to the compact form. No functional change intended. Reviewed-by: Konrad Dybcio Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- .../phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c | 60 +++++++-----------= ---- 1 file changed, 19 insertions(+), 41 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c b/driver= s/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c index 0256183fbcbd..c12de5549652 100644 --- a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c @@ -72,51 +72,29 @@ struct qcom_uniphy { int lanes; }; =20 +#define PHY_INIT_CFG(o, v) \ + { \ + .offset =3D o, \ + .val =3D v, \ + } + static const struct qcom_uniphy_regs ipq5018_pcie_regs[] =3D { - { - .offset =3D SSCG_CTRL_REG_4, - .val =3D 0x1cb9, - }, { - .offset =3D SSCG_CTRL_REG_5, - .val =3D 0x023a, - }, { - .offset =3D SSCG_CTRL_REG_3, - .val =3D 0xd360, - }, { - .offset =3D SSCG_CTRL_REG_1, - .val =3D 0x1, - }, { - .offset =3D SSCG_CTRL_REG_2, - .val =3D 0xeb, - }, { - .offset =3D CDR_CTRL_REG_4, - .val =3D 0x3f9, - }, { - .offset =3D CDR_CTRL_REG_5, - .val =3D 0x1c9, - }, { - .offset =3D CDR_CTRL_REG_2, - .val =3D 0x419, - }, { - .offset =3D CDR_CTRL_REG_1, - .val =3D 0x200, - }, { - .offset =3D PCS_INTERNAL_CONTROL_2, - .val =3D 0xf101, - }, + PHY_INIT_CFG(SSCG_CTRL_REG_4, 0x1cb9), + PHY_INIT_CFG(SSCG_CTRL_REG_5, 0x023a), + PHY_INIT_CFG(SSCG_CTRL_REG_3, 0xd360), + PHY_INIT_CFG(SSCG_CTRL_REG_1, 0x1), + PHY_INIT_CFG(SSCG_CTRL_REG_2, 0xeb), + PHY_INIT_CFG(CDR_CTRL_REG_4, 0x3f9), + PHY_INIT_CFG(CDR_CTRL_REG_5, 0x1c9), + PHY_INIT_CFG(CDR_CTRL_REG_2, 0x419), + PHY_INIT_CFG(CDR_CTRL_REG_1, 0x200), + PHY_INIT_CFG(PCS_INTERNAL_CONTROL_2, 0xf101), }; =20 static const struct qcom_uniphy_regs ipq5332_pcie_regs[] =3D { - { - .offset =3D PHY_CFG_PLLCFG, - .val =3D 0x30, - }, { - .offset =3D PHY_CFG_EIOS_DTCT_REG, - .val =3D 0x53ef, - }, { - .offset =3D PHY_CFG_GEN3_ALIGN_HOLDOFF_TIME, - .val =3D 0xcf, - }, + PHY_INIT_CFG(PHY_CFG_PLLCFG, 0x30), + PHY_INIT_CFG(PHY_CFG_EIOS_DTCT_REG, 0x53ef), + PHY_INIT_CFG(PHY_CFG_GEN3_ALIGN_HOLDOFF_TIME, 0xcf), }; =20 static const struct qcom_uniphy_data ipq5018_pcie_data =3D { --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 614B24EE84B; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=FtYah1LKIxDM4knMIUoDrtzWECL0KoZ1EGJLkPyNGddbEukUe/MEjfULmyGogjykKCAmtmzjNvGyz8R0syVK6cFn6midH4LG+WOrHELKVoN7ZdU6oQKSZLK3ZyAqJz/dshlz0ZaR7D4ipYyLu6sVGPfeKm8JQ3TtflNIy5UU3po= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=p5YHlkuIPNYbVBUZsZU/5N8TqxxBbe/5VAHVVT4DypY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UnkvsfAkxglyr0JFKpI1Nlv9/ZkUHvDF50p95z0CAruCFYoGg9DzfeHVPhqsc8/VIhy/qcw3E+/IA3CU1uwyizaGBm995EbN9xabNXeXeMDRolxpGXJeZF9q9UbjUUiIX/UaGw/rh9NwZTr0Cx2J7wl0777JC5jFslXXUTDhOBo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ceP0H/5Z; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ceP0H/5Z" Received: by smtp.kernel.org (Postfix) with ESMTPS id 274FFC2BCB8; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=p5YHlkuIPNYbVBUZsZU/5N8TqxxBbe/5VAHVVT4DypY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ceP0H/5ZseVQ9i1DbhlTaqkNT7XcFboHICIpULEle+Ut3oRL9ZzAlYEtQzSo2cZRV xdZNcY89CGw/jWkHsL1DmECx6thI1O7Igh8rD/C+h3Iyxy4a9WcWxyHOHk2WQvNpEd I70tequqozLzT8FpBtQJa0GiskLBqlTTLb1xLGk+pqakayaB/isgq7vDMBBdrwO/rc LMCF/0Vbs3ze6gKAL5SquwFEH5keD+zB6jgeiPStJEQK/hxNirfuwczP72f8FrYEy6 vvFKDJmYK6LBJx0A3yh6FCTqBLkbasr1NCXBL23uxK8qoVAVmOcyN0IdTSYJLXecLR 1gpIO/1IqI/6w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14F21C79FA1; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:40:59 +0400 Subject: [PATCH v4 06/13] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Use bulk reset_control API Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-6-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Stanislaw Pal , Manivannan Sadhasivam , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=3371; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=h4fXL1CdGlHbqoFCN4A+EVtPpqzGGhM/+y8nDodBIX8=; b=0gViUe/rFCZsihT03kxd49W+sZAmyHentB4B+G0DYoO0fScTNT1Ue63HKWRrtxY2DzxJ/M0wm qzmjA7TtuJpCljjApss3yfTytaITqfvT6oXYNX1U8T9mxdCcsP/9jUr X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Switch to using bulk reset_control functions to prepare the driver for managing multiple resets, acquiring reset controls by name, and uniformly storing resets in the private data structure to enable support for future combo PHY functionality requiring multiple resets. Tested-by: Stanislaw Pal Reviewed-by: Manivannan Sadhasivam Signed-off-by: George Moussalem --- .../phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c | 31 ++++++++++++++++--= ---- 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c b/driver= s/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c index c12de5549652..0a50eb44c0ce 100644 --- a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c @@ -67,7 +67,8 @@ struct qcom_uniphy { const struct qcom_uniphy_data *data; struct clk_bulk_data *clks; int num_clks; - struct reset_control *resets; + struct reset_control_bulk_data *resets; + int num_resets; void __iomem *base; int lanes; }; @@ -136,7 +137,7 @@ static int qcom_uniphy_pcie_power_off(struct phy *x) =20 clk_bulk_disable_unprepare(phy->num_clks, phy->clks); =20 - return reset_control_assert(phy->resets); + return reset_control_bulk_assert(phy->num_resets, phy->resets); } =20 static int qcom_uniphy_pcie_power_on(struct phy *x) @@ -144,7 +145,7 @@ static int qcom_uniphy_pcie_power_on(struct phy *x) struct qcom_uniphy *phy =3D phy_get_drvdata(x); int ret; =20 - ret =3D reset_control_assert(phy->resets); + ret =3D reset_control_bulk_assert(phy->num_resets, phy->resets); if (ret) { dev_err(phy->dev, "reset assert failed (%d)\n", ret); return ret; @@ -152,7 +153,7 @@ static int qcom_uniphy_pcie_power_on(struct phy *x) =20 usleep_range(RST_ASSERT_DELAY_MIN_US, RST_ASSERT_DELAY_MAX_US); =20 - ret =3D reset_control_deassert(phy->resets); + ret =3D reset_control_bulk_deassert(phy->num_resets, phy->resets); if (ret) { dev_err(phy->dev, "reset deassert failed (%d)\n", ret); return ret; @@ -176,19 +177,33 @@ static int qcom_uniphy_pcie_power_on(struct phy *x) static inline int qcom_uniphy_pcie_usb3_get_resources(struct platform_devi= ce *pdev, struct qcom_uniphy *phy) { + struct device *dev =3D phy->dev; struct resource *res; + int i, count, ret; =20 phy->base =3D devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(phy->base)) return PTR_ERR(phy->base); =20 - phy->num_clks =3D devm_clk_bulk_get_all(phy->dev, &phy->clks); + phy->num_clks =3D devm_clk_bulk_get_all(dev, &phy->clks); if (phy->num_clks < 0) return phy->num_clks; =20 - phy->resets =3D devm_reset_control_array_get_exclusive(phy->dev); - if (IS_ERR(phy->resets)) - return PTR_ERR(phy->resets); + count =3D of_count_phandle_with_args(dev->of_node, "resets", "#reset-cell= s"); + if (count < 0) + return count; + + phy->resets =3D devm_kcalloc(dev, count, sizeof(*phy->resets), GFP_KERNEL= ); + if (!phy->resets) + return -ENOMEM; + + for (i =3D 0; i < count; i++) { + phy->resets[i].rstc =3D devm_reset_control_get_exclusive_by_index(dev, i= ); + if (IS_ERR(phy->resets[i].rstc)) + return PTR_ERR(phy->resets[i].rstc); + } + + phy->num_resets =3D count; =20 return 0; } --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CCBB4F0541; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=n03jUnLCZBRSJjMGyqdR3tJtEN2mTMgds6XpMpD069Mk8Vv3DLQLrezhO/hZQOCp9JQR1WULwaV7JeZDPhJAygLkxticug+uUPtWoa0iK9B/Ak1OmcA69NgOH+oJHnSQyBC2/GJZI54F94m03vydFzPnBsZeMecexSVMtGYQVEg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=uWZIHL2RMVsnz8x+iZFwErDd550WZ2Cci9TFAmY6WQk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IZRVn2ZvBXH89GTOt8qDwtKRzEcqg0Tbf1wyF7xObL84TC3fC/PHgEbkc+eNFFjAwlvx6EjYkjb+Qv6ogbdib+uXu0x/8JJJVIfs1KJ2Ul1a5akFGWtEPMJ9YEdMvid6CLt4Egoy7m/Ipal6qrT5t05g6p3yRRejm+wGB3Xd5R0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JAL2Jtmp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JAL2Jtmp" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3CCC6C2BD00; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=uWZIHL2RMVsnz8x+iZFwErDd550WZ2Cci9TFAmY6WQk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=JAL2JtmpRRNA13Kt3DTbQkNYbJHVZcl6FKbOGltm24A7BA0i/g5Izl30h8F/A61JD 3jfzlyD+WsWbh0t/cPjFwKmmX8iq39cWLMOwNLIXRluAq6Sg8kzkSMfurc3JlxAK4H D9dp7gU3EesnFl6D8xvgxG8/XYPVfSu2ccQ5G05wDpatXuXoGizX3GSPPYSyNesWPY TgatRavAUHQZmM9CWE6vz+U6A/aB3XQZ5KnhBm3kvQBykddMAKLBeZcC0vjZuWJOCG MNkzpUDArFVHNV5cbZRgD5OFwBWchAQgq5gw9LFWObSBODS92qY5Gxrvlq28akJK8e v626PbWCDSKEQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29FB1C79FAE; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:41:00 +0400 Subject: [PATCH v4 07/13] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Assert reset on clock enable failure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-7-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=945; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=Xt9077phHCqVPqMVNZVzBLq0pYjZ3VnSS927ST8gSWc=; b=AIvUePJfwwQReYU60ZhpE5aFQZ4csdMBGKGnxFwBKh1Lt4PYR1ueo4LZpPFkx4/d3/w64mEWA Oza4apZiP0TA+sqkwp7OeyVBpJW+NfuQMyYtbemzANyG+LTdKMQ9qR3 X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem When the PHY fails the enable clocks, it leaves the PHY out of reset. Fix this by asserting the reset before returning the error. Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c b/driver= s/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c index 0a50eb44c0ce..15b17044fde3 100644 --- a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c @@ -164,6 +164,7 @@ static int qcom_uniphy_pcie_power_on(struct phy *x) ret =3D clk_bulk_prepare_enable(phy->num_clks, phy->clks); if (ret) { dev_err(phy->dev, "clk prepare and enable failed %d\n", ret); + reset_control_bulk_assert(phy->num_resets, phy->resets); return ret; } =20 --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86E3C525A84; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=GtPl5pRV2MEvegrDmYM+eLht37wyYtFkL2SYvYdxxWqLqlJYqqLATvBh+ChaJW0OZkto1UVF4oKGXvQfm1WW6I7PmpVCTVtr7dYjpkJuTF5GJ+0fLlGySnHTzIrnraePAWQWdRTSkOFEFRgwnJrIR39+mrNiv+jCz4cj0RbE6gA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=ZO5jvrocZjQt67O6VgC9J8nF2RckLuv38HfbcB7cyq4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZrWicsTmwOC+sQNjC93Yf/vkGWKr3B3Hv/+R/uwC4exYm/vjpQX9h2RjVj7qNGvxkW91ZN+6MTyWydx4z0F3W1jjYEFimJVmlR/YrzefHObO5lm38/qVqvlO8vqX6KiYpzU4rg+VgXp6tR3nIWAnE8wN+hdg63ok5RkoR86CEco= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KHl7x6wQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KHl7x6wQ" Received: by smtp.kernel.org (Postfix) with ESMTPS id 549D7C2BCFB; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=ZO5jvrocZjQt67O6VgC9J8nF2RckLuv38HfbcB7cyq4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=KHl7x6wQkDj2Ix8UFb7PB3MAyIEZgdjGceDUItfnlJLMy59hL9+JAx6CTemfbRlN2 X67E/5Zz5ps6eZU1x+QRNsZve9qfTmAgSdekMeHvqpBTRy4cL1oYZxbxh00GyhvT/P wrwPAJdgomfv+VfBFyCFLkyJ5O7IDz6EIluqlnpO7ShcC6FBfVHkF0+S7SzRpB81wR nB+pACs1DPWpmzprSb9s6AphakbwU+rfuKElYUCSOceW6Pfr373J1Igxmp+tJblumC riTfUkWmifLTgeKbhkvp0XyUbuksq9314IoTLCsywZhmvVY0X2sShyYEt33Q6w4l3F aBfzyRnzm1k3w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FAB3C79F99; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:41:01 +0400 Subject: [PATCH v4 08/13] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Add support for USB3 PHY on IPQ5018 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-8-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=10947; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=hQz7KLN8ayzrj3pX64Qwz30mR0DsL9ZYq7Hhrx1edmc=; b=4K5/lf1rXmQvEjFVbxqkQFHT6ZHcnQVXyc5GoZz3rzTWioqldOpFii7XbFwFBlG/E964WOC5e aRzxfc4ofBcC3kFjTCPx1rLdhvKz0oSv2od5jGFij6nmFUyh+TLS4o1 X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add support for the USB3 PHY on IPQ5018 chipsets. The PHY outputs a 250MHz PIPE clock routed to and gated by the GCC, so register a fixed rate clock. In addition, add the register/value pairs for the PHY initialization sequence. The code to acquire clocks and resets is the same as for PCIe so no changes are needed. Add a USB3-specific helper function to acquire the required regulator and TCSR syscon for USB mux selection. The PCIe and USB3 pads are muxed so select USB3 mode in TCSR which needs to occur before the DWC3 USB3 controller resets. Otherwise, the SS link doesn't train and remains stuck in RX.Detect. Add PHY ops for USB3 power on/off sequences to account for USB3-specific delay timings and enabling/disabling the PHY supply. Rename the existing reset delay timings to describe they are for PCIe. Lastly, add the USB3 PHY type to the UNIPHY PHY type enum and remove the GEN2 and GEN3 PCIe types as the driver makes no distinction between the two which also makes it easier to distinguish between the PCIe and USB3 PHYs. Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- .../phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c | 178 +++++++++++++++++= +--- 1 file changed, 159 insertions(+), 19 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c b/driver= s/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c index 15b17044fde3..810121508634 100644 --- a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c @@ -14,15 +14,22 @@ #include #include #include +#include #include #include =20 -#define RST_ASSERT_DELAY_MIN_US 100 -#define RST_ASSERT_DELAY_MAX_US 150 -#define PIPE_CLK_DELAY_MIN_US 5000 -#define PIPE_CLK_DELAY_MAX_US 5100 -#define CLK_EN_DELAY_MIN_US 30 -#define CLK_EN_DELAY_MAX_US 50 +#define PCIE_RST_ASSERT_DELAY_MIN_US 100 +#define PCIE_RST_ASSERT_DELAY_MAX_US 150 +#define PCIE_PIPE_CLK_DELAY_MIN_US 5000 +#define PCIE_PIPE_CLK_DELAY_MAX_US 5100 +#define PCIE_CLK_EN_DELAY_MIN_US 30 +#define PCIE_CLK_EN_DELAY_MAX_US 50 + +#define USB3_RST_ASSERT_DELAY_MIN_US 1 +#define USB3_RST_ASSERT_DELAY_MAX_US 5 +#define USB3_CLK_EN_DELAY_MIN_US 35 +#define USB3_CLK_EN_DELAY_MAX_US 40 + #define CDR_CTRL_REG_1 0x80 #define CDR_CTRL_REG_2 0x84 #define CDR_CTRL_REG_3 0x88 @@ -42,10 +49,13 @@ #define PHY_CFG_EIOS_DTCT_REG 0x3e4 #define PHY_CFG_GEN3_ALIGN_HOLDOFF_TIME 0x3e8 =20 +#define TCSR_USB_MUX_SEL BIT(0) + +#define PHY_IS_USB3(phy) ((phy)->data->phy_type =3D=3D PHY_TYPE_USB3) + enum qcom_uniphy_type { PHY_TYPE_PCIE =3D 1, - PHY_TYPE_PCIE_GEN2, - PHY_TYPE_PCIE_GEN3, + PHY_TYPE_USB3, }; =20 struct qcom_uniphy_regs { @@ -71,6 +81,9 @@ struct qcom_uniphy { int num_resets; void __iomem *base; int lanes; + struct regulator *vreg; + struct regmap *tcsr; + unsigned int mux_offset; }; =20 #define PHY_INIT_CFG(o, v) \ @@ -92,6 +105,14 @@ static const struct qcom_uniphy_regs ipq5018_pcie_regs[= ] =3D { PHY_INIT_CFG(PCS_INTERNAL_CONTROL_2, 0xf101), }; =20 +static const struct qcom_uniphy_regs ipq5018_usb3_regs[] =3D { + PHY_INIT_CFG(SSCG_CTRL_REG_4, 0x1cb9), + PHY_INIT_CFG(SSCG_CTRL_REG_5, 0x023a), + PHY_INIT_CFG(SSCG_CTRL_REG_3, 0xd360), + PHY_INIT_CFG(SSCG_CTRL_REG_1, 0x1), + PHY_INIT_CFG(SSCG_CTRL_REG_2, 0xeb), +}; + static const struct qcom_uniphy_regs ipq5332_pcie_regs[] =3D { PHY_INIT_CFG(PHY_CFG_PLLCFG, 0x30), PHY_INIT_CFG(PHY_CFG_EIOS_DTCT_REG, 0x53ef), @@ -100,15 +121,23 @@ static const struct qcom_uniphy_regs ipq5332_pcie_reg= s[] =3D { =20 static const struct qcom_uniphy_data ipq5018_pcie_data =3D { .lane_offset =3D 0x800, - .phy_type =3D PHY_TYPE_PCIE_GEN2, + .phy_type =3D PHY_TYPE_PCIE, .init_seq =3D ipq5018_pcie_regs, .init_seq_num =3D ARRAY_SIZE(ipq5018_pcie_regs), .pipe_clk_rate =3D 125 * MEGA, }; =20 +static const struct qcom_uniphy_data ipq5018_usb3_data =3D { + .lane_offset =3D 0x800, + .phy_type =3D PHY_TYPE_USB3, + .init_seq =3D ipq5018_usb3_regs, + .init_seq_num =3D ARRAY_SIZE(ipq5018_usb3_regs), + .pipe_clk_rate =3D 250 * MEGA, +}; + static const struct qcom_uniphy_data ipq5332_pcie_data =3D { .lane_offset =3D 0x800, - .phy_type =3D PHY_TYPE_PCIE_GEN3, + .phy_type =3D PHY_TYPE_PCIE, .init_seq =3D ipq5332_pcie_regs, .init_seq_num =3D ARRAY_SIZE(ipq5332_pcie_regs), .pipe_clk_rate =3D 250 * MEGA, @@ -151,7 +180,7 @@ static int qcom_uniphy_pcie_power_on(struct phy *x) return ret; } =20 - usleep_range(RST_ASSERT_DELAY_MIN_US, RST_ASSERT_DELAY_MAX_US); + usleep_range(PCIE_RST_ASSERT_DELAY_MIN_US, PCIE_RST_ASSERT_DELAY_MAX_US); =20 ret =3D reset_control_bulk_deassert(phy->num_resets, phy->resets); if (ret) { @@ -159,7 +188,7 @@ static int qcom_uniphy_pcie_power_on(struct phy *x) return ret; } =20 - usleep_range(PIPE_CLK_DELAY_MIN_US, PIPE_CLK_DELAY_MAX_US); + usleep_range(PCIE_PIPE_CLK_DELAY_MIN_US, PCIE_PIPE_CLK_DELAY_MAX_US); =20 ret =3D clk_bulk_prepare_enable(phy->num_clks, phy->clks); if (ret) { @@ -168,13 +197,90 @@ static int qcom_uniphy_pcie_power_on(struct phy *x) return ret; } =20 - usleep_range(CLK_EN_DELAY_MIN_US, CLK_EN_DELAY_MAX_US); + usleep_range(PCIE_CLK_EN_DELAY_MIN_US, PCIE_CLK_EN_DELAY_MAX_US); =20 qcom_uniphy_pcie_usb3_init(phy); =20 return 0; } =20 +static int qcom_uniphy_usb3_power_off(struct phy *x) +{ + struct qcom_uniphy *phy =3D phy_get_drvdata(x); + + clk_bulk_disable_unprepare(phy->num_clks, phy->clks); + + reset_control_bulk_assert(phy->num_resets, phy->resets); + + regulator_disable(phy->vreg); + + return 0; +} + +static int qcom_uniphy_usb3_power_on(struct phy *x) +{ + struct qcom_uniphy *phy =3D phy_get_drvdata(x); + int ret; + + ret =3D regulator_enable(phy->vreg); + if (ret) { + dev_err(phy->dev, "failed to enable regulator: %d\n", ret); + return ret; + } + + ret =3D reset_control_bulk_assert(phy->num_resets, phy->resets); + if (ret) { + dev_err(phy->dev, "reset assert failed (%d)\n", ret); + goto err_disable_regulator; + } + + usleep_range(USB3_RST_ASSERT_DELAY_MIN_US, USB3_RST_ASSERT_DELAY_MAX_US); + + ret =3D reset_control_bulk_deassert(phy->num_resets, phy->resets); + if (ret) { + dev_err(phy->dev, "reset deassert failed (%d)\n", ret); + goto err_disable_regulator; + } + + ret =3D clk_bulk_prepare_enable(phy->num_clks, phy->clks); + if (ret) { + dev_err(phy->dev, "clk prepare and enable failed %d\n", ret); + reset_control_bulk_assert(phy->num_resets, phy->resets); + goto err_disable_regulator; + } + + usleep_range(USB3_CLK_EN_DELAY_MIN_US, USB3_CLK_EN_DELAY_MAX_US); + + qcom_uniphy_pcie_usb3_init(phy); + + return 0; + +err_disable_regulator: + regulator_disable(phy->vreg); + + return ret; +} + +static inline int qcom_uniphy_usb3_get_resources(struct platform_device *p= dev, + struct qcom_uniphy *phy) +{ + struct device *dev =3D phy->dev; + + phy->vreg =3D devm_regulator_get(dev, "vdd"); + if (IS_ERR(phy->vreg)) + return dev_err_probe(dev, PTR_ERR(phy->vreg), "failed to get regulator\n= "); + + phy->tcsr =3D syscon_regmap_lookup_by_phandle_args(dev->of_node, + "qcom,phy-usb-mux-sel", + 1, &phy->mux_offset); + if (IS_ERR(phy->tcsr)) + return dev_err_probe(dev, PTR_ERR(phy->tcsr), "failed to get regmap\n"); + + phy->lanes =3D 1; + + return 0; +} + static inline int qcom_uniphy_pcie_usb3_get_resources(struct platform_devi= ce *pdev, struct qcom_uniphy *phy) { @@ -206,6 +312,13 @@ static inline int qcom_uniphy_pcie_usb3_get_resources(= struct platform_device *pd =20 phy->num_resets =3D count; =20 + if (PHY_IS_USB3(phy)) + return qcom_uniphy_usb3_get_resources(pdev, phy); + + ret =3D of_property_read_u32(dev_of_node(dev), "num-lanes", &phy->lanes); + if (ret) + return dev_err_probe(dev, ret, "Couldn't read num-lanes\n"); + return 0; } =20 @@ -233,7 +346,8 @@ static inline int phy_pipe_clk_register(struct qcom_uni= phy *phy, int id) struct clk_hw *hw; char name[64]; =20 - snprintf(name, sizeof(name), "phy%d_pipe_clk_src", id); + snprintf(name, sizeof(name), "%sphy%d_pipe_clk_src", + (PHY_IS_USB3(phy)) ? "usb" : "", id); hw =3D devm_clk_hw_register_fixed_rate(phy->dev, name, NULL, 0, data->pipe_clk_rate); if (IS_ERR(hw)) @@ -243,10 +357,19 @@ static inline int phy_pipe_clk_register(struct qcom_u= niphy *phy, int id) return devm_of_clk_add_hw_provider(phy->dev, of_clk_hw_simple_get, hw); } =20 +static int qcom_uniphy_usb_mux_select(struct qcom_uniphy *phy, bool enable) +{ + return regmap_assign_bits(phy->tcsr, phy->mux_offset, + TCSR_USB_MUX_SEL, enable); +} + static const struct of_device_id qcom_uniphy_pcie_usb3_id_table[] =3D { { .compatible =3D "qcom,ipq5018-uniphy-pcie-phy", .data =3D &ipq5018_pcie_data, + }, { + .compatible =3D "qcom,ipq5018-uniphy-usb3-phy", + .data =3D &ipq5018_usb3_data, }, { .compatible =3D "qcom,ipq5332-uniphy-pcie-phy", .data =3D &ipq5332_pcie_data, @@ -261,6 +384,12 @@ static const struct phy_ops qcom_uniphy_pcie_ops =3D { .owner =3D THIS_MODULE, }; =20 +static const struct phy_ops qcom_uniphy_usb3_ops =3D { + .power_on =3D qcom_uniphy_usb3_power_on, + .power_off =3D qcom_uniphy_usb3_power_off, + .owner =3D THIS_MODULE, +}; + static int qcom_uniphy_pcie_usb3_probe(struct platform_device *pdev) { struct phy_provider *phy_provider; @@ -280,16 +409,15 @@ static int qcom_uniphy_pcie_usb3_probe(struct platfor= m_device *pdev) if (!phy->data) return -EINVAL; =20 - ret =3D of_property_read_u32(dev_of_node(dev), "num-lanes", &phy->lanes); - if (ret) - return dev_err_probe(dev, ret, "Couldn't read num-lanes\n"); - ret =3D qcom_uniphy_pcie_usb3_get_resources(pdev, phy); if (ret < 0) return dev_err_probe(&pdev->dev, ret, "failed to get resources: %d\n", ret); =20 - generic_phy =3D devm_phy_create(phy->dev, NULL, &qcom_uniphy_pcie_ops); + if (PHY_IS_USB3(phy)) + generic_phy =3D devm_phy_create(phy->dev, NULL, &qcom_uniphy_usb3_ops); + else + generic_phy =3D devm_phy_create(phy->dev, NULL, &qcom_uniphy_pcie_ops); if (IS_ERR(generic_phy)) return PTR_ERR(generic_phy); =20 @@ -304,6 +432,18 @@ static int qcom_uniphy_pcie_usb3_probe(struct platform= _device *pdev) if (IS_ERR(phy_provider)) return PTR_ERR(phy_provider); =20 + /* + * Select USB mux before the controller comes out of reset. Selecting it + * later in .power_on leaves the SuperSpeed pads muxed away while the + * controller resets, and the SS link training remains in Rx.Detect + */ + if (PHY_IS_USB3(phy)) { + ret =3D qcom_uniphy_usb_mux_select(phy, true); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to select usb mux\n"); + } + return 0; } =20 --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A887525A87; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=BH9ZQzNjo+JwWpa0gK0whnOEdSUuAYsF7SLkMTn9e8Dn2nshvbDwdnzIGYfYH6e11/zYM5O/CYVECuAyOnmEfPHz/9KEhCalc0YUR0xQwwYtto3waeCSkBVgAF2csvNvx6bMcFh/iXSbpP3xwOraqKDupn3uYzDkUwP5udfSRsM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=6rrENnExuPWnVu3LsSNeNwwki1fRkiuqcMOe8pK5ajM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=N31qzHrNqBiF4FzT80JZZlxyGVfnb5pc7LWVbwCRaizt89F2nK8MzxNTrTBbFYJE7Hih0zFzqIeTiYFgY+nDTHFwXkGiGISQQ4QOpx4+GA/G+z64sf+a/k0aVfDZS/tODqYut/3yCpDAridu1lo3F391O2stP2DlGLgKkrUSLI4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EEYLq/pA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EEYLq/pA" Received: by smtp.kernel.org (Postfix) with ESMTPS id 672C1C2BCFC; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=6rrENnExuPWnVu3LsSNeNwwki1fRkiuqcMOe8pK5ajM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=EEYLq/pAsCRYIZ2m/rJt+W8yr6hv+hJJZ1mjoZcd9REztimE6rJkspMDSbzkZ1i1I rAgGUzX9YQO+aOqq9LAjEFuKzgND/3ZGMctoRjor/NJYYJuzyRsoZGsb6T0QZ/2g/y UBl2hIv1rBKMJrkv4KALYDWLBqhCWq2GZ5rAjnfT/cjBftYjm6aZcnYQ/43ylunNxa 8wiQVEqlgkbP7apQ/kb+U200l1L38p4ubecV2DaWJJX7REsO4bKff/6+0d4rMlrCnL LSqSmGeHs2rRNHYEVIAnHNaHVP600uWCLR5kb9fvMb+52hP+bRRjKgfpMQi4iaZPo4 e9v+z/QXG42Jw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54663C79F82; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:41:02 +0400 Subject: [PATCH v4 09/13] arm64: dts: qcom: ipq5018: Add USB Super-Speed PHY node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-9-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=1365; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=E1RXspduA/qm4y+OQopUpGy17R6HIoV4JDWYYWUJv1I=; b=+5aKJQzhNectQFle6jqBMtjnlnyl8ime8/xt5oo529EKwQPuifI4WiJ27M4tgvsYaKC0/Z6HH mV8Wz+WafQ9CP11d89JRMolziqhBmVd3p27IDez4eZy3GIli0yJob1P X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add the USB3 PHY node and populate the USB DT clock on the GCC node for the GCC to gate the PIPE clock supplied by the USB3 PHY. Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index 956d3217ec52..34d882b047bc 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -179,6 +179,23 @@ usbphy0: phy@5b000 { status =3D "disabled"; }; =20 + usbphy1: phy@5d000 { + compatible =3D "qcom,ipq5018-uniphy-usb3-phy"; + reg =3D <0x0005d000 0x800>; + + clocks =3D <&gcc GCC_USB0_PIPE_CLK>, + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>; + + resets =3D <&gcc GCC_USB0_PHY_BCR>; + + #clock-cells =3D <0>; + #phy-cells =3D <0>; + + qcom,phy-usb-mux-sel =3D <&tcsr 0x10540>; + + status =3D "disabled"; + }; + pcie1_phy: phy@7e000 { compatible =3D "qcom,ipq5018-uniphy-pcie-phy"; reg =3D <0x0007e000 0x800>; @@ -436,7 +453,7 @@ gcc: clock-controller@1800000 { <&sleep_clk>, <&pcie0_phy>, <&pcie1_phy>, - <0>, + <&usbphy1>, <&gephy_rx_clk>, <&gephy_tx_clk>, <0>, --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98122526A80; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=aePLeCcNBOJG0QKdIWs0vUZtSQh4Gra8i6QLaMA6LLcmCgK4a4lFePd77j7/zmCKmdeoIr0IjficIQCvoYKjna5u2WQTGKTFVQfOU8zZzLtRlod+P6Zor+YXLPF+ui5wyxRvg/NMoMC4CluImUso+2T0df03Mk3NNoPdrVa0EQc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=GNhJnwzA4v6qB0oiDDOZHkZ5dU+PRCSRVX9DyexTG9Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AQnyGWoWnt2rWPkw0A8NP0X17uHkRgEdnZTeX86pH1upm9U3c0aFzNGpqyMDmnqnH9aCMFrdJAJMcVzooMgpJphtmzcxr5MdDcSoyZH0zYKBnjQHhX8RhNYHzJJuqOYvvOWcfEqZZKKdBfdJdg+RZBHxW04PCZgD+OkevDE6zb0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=u1Sp2ZM0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="u1Sp2ZM0" Received: by smtp.kernel.org (Postfix) with ESMTPS id 79C55C2BCFF; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=GNhJnwzA4v6qB0oiDDOZHkZ5dU+PRCSRVX9DyexTG9Y=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=u1Sp2ZM0ciUvNOvDfqXh+GQDy8u7LlHRCydPv1xKtc2zSeGK0ntCScOllg4Ko8CZ5 lAefc4jRnJlkKnv+3m/0AAuUMqCic8OcsP/uj4QU1D6bPGeT40steRiqvSAZruAX1j s/yW7/pmj9zgFKhTcPoe63VYvKkk6b1R4RyxXa7WabpOS9iDVSTzh4XjlOMfFKZKx8 d9KHArg62iXaHl2GbWEvi1BdMbsUaO8mbFNyHStGR9Pr1mQK3qMQLpVEBjpcJq8vcU 290+Oq32yYdr6SS7iIdsEwOJ3hSEEi7ifHotQiIagJ/5zXPU6CBlaMfd8pv+uN1KU2 YjJMBBylbrbXA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66CCDC79FAD; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:41:03 +0400 Subject: [PATCH v4 10/13] dt-bindings: usb: qcom,snps-dwc3: Add clocks for USB3 on Qualcomm IPQ5018 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-10-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Krzysztof Kozlowski , Manivannan Sadhasivam , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=1580; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=nnok2h0uSuHM9sQQxP02Bt+VA9DyMyTiEgmYSTTwQlI=; b=pQK1BA+a2+WltBcL9gThdqUA4BSWpFD3YbmUWOaH4HOw+J7UJeH7FUlOlcRPF6zAmxSjaDUTL Yex9sjhg4FmBoAtIyKl1u3RYF3BW/0BRAC6yVt75XvHTYNdyQskM1ON X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add aux and lfps clocks in Qualcomm IPQ5018. These clocks are required only for USB Super-Speed support. Reviewed-by: Krzysztof Kozlowski Acked-by: Manivannan Sadhasivam Signed-off-by: George Moussalem --- .../devicetree/bindings/usb/qcom,snps-dwc3.yaml | 21 +++++++++++++++++= +++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml b/Do= cumentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml index ea60f7220afe..5cf10863aca2 100644 --- a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml @@ -185,6 +185,26 @@ allOf: - const: sleep - const: mock_utmi =20 + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-dwc3 + then: + properties: + clocks: + minItems: 6 + maxItems: 6 + clock-names: + items: + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: aux + - const: lfps + - if: properties: compatible: @@ -286,7 +306,6 @@ allOf: compatible: contains: enum: - - qcom,ipq5018-dwc3 - qcom,msm8994-dwc3 - qcom,qcs404-dwc3 then: --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AAEA2526A8F; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=jCpE0siG/olkSE/+Ez/guKSF8n+LypETG0RDYf6Ey6g6Uuq4HyzLcFT1EDZjSs16Dcs9SGHA/bnESKzaG4kfMbP22fjYzIilGRKxXIBvla0mrzqfsp8LGZN7MhYV2N939a7EaTTkclcc+sXJ0Iu40sidYcalprfgFJQvzMVKI8E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=wjWHYMGGPiiY5KFppAP+tjkV0njxtlntuGZteZN1CqU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HrSyvBAo/7/8nOPIDHDuVgsmkphTIRmEOV9SFXL0sk5+Sva6AII32fIj9z8wgP2avGwiecjNPS6ApIlozO60Ajn4TZmXTGHC7CMJILA6wqVbujvEIJHFDwPOJpjNK54D149Z9VajS0uBtdqHDpEOT4onLQFhOLD0JCl2V7vw/PE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=MWU8I6if; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="MWU8I6if" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8C734C2BCB8; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=wjWHYMGGPiiY5KFppAP+tjkV0njxtlntuGZteZN1CqU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=MWU8I6if7WrGOfNj0KWzg75xB3JadxVhOZJ8IO9ybxsqlJdw/QRqf5UR9FErLWjie iy6yt1aozd45Z645UEB7mcLFS32aH4N/8JlZvC4/7trf4xvL1BG++xE0lgq3DLXAhg PI8OjV29PIENrdWbbAooXZ8Y2QgNENeTKgwk06pnIxqA6GuBWXJmlqR+Fg+9cKHkoF qqpQIMV47HOrnZDY0/JDQLQbjXu8+VAC/Z68K7xxY7en1jSQi34kN7dYRwYrVpdNnZ XXrE6IUrUlYp7ekrh9BU3LsDoVpGoLdJyXpubVboW7yOmBlb+alDo+2/X9LXVfRQrX Sdk1E+w0dO0lA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B093C79FA1; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:41:04 +0400 Subject: [PATCH v4 11/13] arm64: dts: qcom: ipq5018: Add clocks required for USB3 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-11-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Dmitry Baryshkov , Konrad Dybcio , Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=1434; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=I4jm4NWYfCMkGfNzx/usV/Xj+0IxIcI5RxXPlEHXCyw=; b=92bG5hFNoqxnQJvD9S7r7KVqQKonFMOwhrB8+3T0BhQ6xGpaEM1ImTkG3Xunqsd4ep6jd5DWY voG1iyJ4eFZCaMGP3b5ZbXyU7ohU3al1rSWF2dBZmvpjcnreN5YW3mx X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add aux and lfps clocks to USB controller node for Super-Speed support. These clocks are required for USB3 mode only and are not needed for USB2 mode. In addition, set UTMI clock frequency to ensure it's parented correctly and override the clock rate potentially set by the bootloader. Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index 34d882b047bc..a6e337e137c8 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -604,11 +604,15 @@ usb: usb@8a00000 { clocks =3D <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, <&gcc GCC_USB0_SLEEP_CLK>, - <&gcc GCC_USB0_MOCK_UTMI_CLK>; + <&gcc GCC_USB0_MOCK_UTMI_CLK>, + <&gcc GCC_USB0_AUX_CLK>, + <&gcc GCC_USB0_LFPS_CLK>; clock-names =3D "core", "iface", "sleep", - "mock_utmi"; + "mock_utmi", + "aux", + "lfps"; assigned-clocks =3D <&gcc GCC_USB0_MOCK_UTMI_CLK>; assigned-clock-rates =3D <60000000>; =20 --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C2748526A99; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=QjqOQ8G48qtQ+3ao0L28w8ZUS7P/VTvd4FKnistk51FgTuDDSy/CdK6lFNis6VeaZ7m8X71+bpmtb7buR2hBRZ+YUZ3qNONfQ0SVWlWiinCVmSsUyhFRzXgZBLBQM1Bf66BtAqehekrdXmL1eIdQSF464t4zlkynd9MgzElROT4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=6Pg056yYXzBCy1r8gHAQMUILwrcGvqIRlccK+SCvndM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lSXopOpomK33QX1IPwTM0B1Aq8yuyG8gWD3wvVTZipaZ1tSwZakyqcv+Wf4IjFCNsj614pM/1olGaYEiIW7FPO1Njujm4NBtffuhgHq53CR12ZaF/+xfMzrVjfklcSgUWPnaU8Sr4DxTH+4jk4Vj1Z5UuvnrppOfJdDXQNQkiYU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Tk+5k8vc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Tk+5k8vc" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9E50BC2BCFD; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=6Pg056yYXzBCy1r8gHAQMUILwrcGvqIRlccK+SCvndM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Tk+5k8vcVCw/8/CAosGKP0PXphlCID9czKlNE8GXPQonMX+qTb816S3FjXyNaQyZS rsL3OYq8F4QijFIb2RzTemb5Jp3Wp6iT92ZvT3QCRpKSR7OKvduTkdsoEEYQqJEFTS peSsaltaM50sBjpkzWCyyU2yEfjx84VFZCLq30Qhx8p4VpDEYr0/WqX+Nj/je1BySE sq82Ja4RO77dA2748IgfmT3yKRz/DgePGOv44Le3+nigOqgE5ai5JyZ8KkC2DVL2Db eZJO4UpWbrD40bPdTsiKO5dFkL3U+x6VE0E96t5/zJEtF5e2N1DHSEctHs9Lqwdic6 G83lMKbNyfPug== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CC02C79FAE; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:41:05 +0400 Subject: [PATCH v4 12/13] arm64: dts: qcom: ipq5018: Add Super-Speed UNIPHY to USB node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-12-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Konrad Dybcio , Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=983; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=EHNPdJoLDki9kvFwibHMHsxbeTT5//UH8U5tcciCAP0=; b=6NyqUCjIxQxnKqMl2ofSls4YZVVMbqAgjueSnu2r/2cx+kbOLXCQK/4xF/NN33eQlbp3atfQR MU9WnGocuL1BZ7lyxLPkM9kCncekhaIrCNQXtJ6Ydukx44xLJAvUXm2 X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add the USB3 UNIPHY to the USB controller node for USB3 support. In addition, switch to the pipe clock supplied by the USB3 UNIPHY instead of the UTMI clock. Reviewed-by: Konrad Dybcio Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index a6e337e137c8..8e5d45a214a5 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -627,10 +627,8 @@ usb: usb@8a00000 { =20 resets =3D <&gcc GCC_USB0_BCR>; =20 - phys =3D <&usbphy0>; - phy-names =3D "usb2-phy"; - - qcom,select-utmi-as-pipe-clk; + phys =3D <&usbphy0>, <&usbphy1>; + phy-names =3D "usb2-phy", "usb3-phy"; =20 tx-fifo-resize; snps,is-utmi-l1-suspend; --=20 2.53.0 From nobody Fri Sep 25 21:41:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF190526AAC; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; cv=none; b=aRymftKFuioqwTNJHTx0cVW92d03xaa2NE0qkZN4XRbixaUMYfHlpUY6o+2iU2M+J5OkovZJe2xPmRhdAIAAomMsQNRwSrvjK6TI5Z2lwM5kE76CjuuvuGuwPYDOsl8TirmD65ercTcyYXf+V5d6DVw1n8v33gRWAvFcG3+tgO0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788860516; c=relaxed/simple; bh=L6/tHcGjjx80t8rzbIBaij+88GgQawCNtisJ0JSOs4g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pgHH7B2dCo7rSeGurX/sLDYqHZEEEAqDrs/5QeQ4P7DdYEV2nY8bybRQDtfNKrYZLSj6rdTEKs75/CwCdZn58sQgJ63QiIbnE322lsjcK3h8FcoovFqCDHgpvpGiduZ7/A6fyQMfCIalMt9mevR9dKUfV3P57tbwOzuL2nlB2q8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hQVSYbS+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hQVSYbS+" Received: by smtp.kernel.org (Postfix) with ESMTPS id ADC02C2BCFB; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788860516; bh=L6/tHcGjjx80t8rzbIBaij+88GgQawCNtisJ0JSOs4g=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=hQVSYbS+lpKq2pz6y/Y7umrKVPHXoVKr2Fbv/2IqR3/KZRhzfZjj5j+OPYkVIfIHE QnRivaZYoLF1JxnYTRaQPWYDHX/id41t7p6HBRrnY+qBWoSdVu31zi2rlRFPfvZ6Ui 81gyTiZrY7GRiVCa0Fo7x07ZfjF1xAF2AP25AJ07/po+vfXJu6NZsxMcjXV9Tdy26e E63YRHjFVZcbGn3u6RNq3rfCOL1oJXU6r4+SfIn5t1daQR3QlYWHgBWu+XbXxmX6TX jGjn251OoG2aW/umOjba1pErhQx7e3Iy+hslBOCIr7c0Mpk9uiPedRJAcFE3hxfFxY F8ZR5Ot+D7hvw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D5CAC79F82; Tue, 8 Sep 2026 09:41:56 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 08 Sep 2026 13:41:06 +0400 Subject: [PATCH v4 13/13] arm64: dts: qcom: ipq5018-rdp432-c2: Enable USB Super-Speed PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260908-ipq5018-usb3-v4-13-b789702f0695@outlook.com> References: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> In-Reply-To: <20260908-ipq5018-usb3-v4-0-b789702f0695@outlook.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Praveenkumar I , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Varadarajan Narayanan , Nitheesh Sekar , Wesley Cheng , Manivannan Sadhasivam , Varadarajan Narayanan Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Konrad Dybcio , Stanislaw Pal , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788860513; l=1184; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=55+OVTWKoDEF3wFthbSUFmewrmNa0eMnoTEShtYSUqE=; b=7ZYFYqUEweAtZ4nB5oD6JUvuE6pzxgG0QSFyde93gD0Xb4pnc7NncPC4g/lv/YdjfWRAuQQ+T 6LUVZWGdY9xCIkpncL1xBsS/Ja2ivIPl4+oWlRWEdXa+yynBBhj4Ss5 X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add the 5V supply regulator and enable USB Super-Speed PHY support. Reviewed-by: Konrad Dybcio Tested-by: Stanislaw Pal Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/bo= ot/dts/qcom/ipq5018-rdp432-c2.dts index 8efb2b21ed9e..ca29f271e673 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts +++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts @@ -22,6 +22,14 @@ aliases { chosen { stdout-path =3D "serial0:115200n8"; }; + + regulator_fixed_5p0: regulator-s0500 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-name =3D "fixed_5p0"; + gpios =3D <&tlmm 24 GPIO_ACTIVE_LOW>; + }; }; =20 &blsp1_uart1 { @@ -119,6 +127,12 @@ &usbphy0 { status =3D "okay"; }; =20 +&usbphy1 { + vdd-supply =3D <®ulator_fixed_5p0>; + + status =3D "okay"; +}; + &xo_board_clk { clock-div =3D <4>; clock-mult =3D <1>; --=20 2.53.0