From nobody Fri Sep 25 22:19:32 2026 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45D6B318EC4; Tue, 8 Sep 2026 07:25:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.135.77 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852312; cv=none; b=ujNlOCrXPOaxPaS6GRnEcD7DZRgDBK9TR3BjqVr+6W1M99yjjX7Kd5NS1PPHBZeWsJqVyN/nLSo7oCOhckpX9l5cyhF75Oy/5Z9qmgi57nLV9zcgIbIkTuizG/jfEkcmfIRRFwrPUEzebx2Q3WkLg/Ugim+1Xjvvy23rUYD7akU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852312; c=relaxed/simple; bh=SUPdCQ9y6smqEBkTRXfO7L9iuHWsQz6QNl0nLGK1rLY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=sqvg607lk9ZOz+py99DNF/OjCRPIkU2+v7+dTNhTXhiWLpuT4mtPhptEgtIfsnFhUV2EzEsjOhLbE3AnaOff6qn5UzWvva5PSM8vTpvjF7tb56jRKAlFOu6sWjnUzrWZWw5VVo+OXjNJ/x/LTDRP0/hRuX9oJ7KCo4UvUu+jccM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=analog.com; spf=pass smtp.mailfrom=analog.com; dkim=pass (2048-bit key) header.d=analog.com header.i=@analog.com header.b=jSIBi+/U; arc=none smtp.client-ip=148.163.135.77 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=analog.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=analog.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=analog.com header.i=@analog.com header.b="jSIBi+/U" Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6886QZwR2130664; Tue, 8 Sep 2026 03:25:08 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=analog.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=DKIM; bh=SO2Eh qdXVuyjFuYaaFeApvFrp1DvhV3lKMVL+nf3JeU=; b=jSIBi+/UhBbTVqt0WFAHK rSzjCcnkd3IvsvdN0d3JAJgEYXOYMCfLhmCZgzKMVq3JTEi6BEIk5hXepEwoQg6I OHZj2L+6w7QiioJBLMGVgEn0z2P3O7ce3KTHE+v+vD9M2TXpVZMhC9hdnTqFUxK8 YrLmoc5yOBk+jZg402uj/zl2uv3avYWRJ9yVh3mJW99lTkjRX7nCXncthZ11NRS/ oX09/JXxxoGdlwq+A9uK1P9c+cggzESy8h3hNdhlB8MOumfpsK+yD3O/olPfgYrP 5/0aLB1AYclnDNMdp7sgvI8Q6oDWUlNS64RMaPfz1ncRH8pmBu0aA+8BkGtWtfRB w== Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 4ggcx2ums6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 08 Sep 2026 03:25:08 -0400 (EDT) Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 6887P7ak039600 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 8 Sep 2026 03:25:07 -0400 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.37; Tue, 8 Sep 2026 03:25:07 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.1748.37 via Frontend Transport; Tue, 8 Sep 2026 03:25:06 -0400 Received: from HYB-e1y2fvUQ3cx.ad.analog.com (HYB-e1y2fvUQ3cx.ad.analog.com [10.44.3.59]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 6887Ot8d016290; Tue, 8 Sep 2026 03:25:03 -0400 From: Janani Sunil Date: Tue, 8 Sep 2026 09:24:52 +0200 Subject: [PATCH v7 1/3] gpio: regmap: Use regmap_test_bits() for single bit reads Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260908-ad7768-gpio-v7-1-52ee6ef18a1e@analog.com> References: <20260908-ad7768-gpio-v7-0-52ee6ef18a1e@analog.com> In-Reply-To: <20260908-ad7768-gpio-v7-0-52ee6ef18a1e@analog.com> To: Michael Walle , Linus Walleij , Bartosz Golaszewski CC: , , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Cameron , Andy Shevchenko , Janani Sunil , Janani Sunil X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788852295; l=2016; i=janani.sunil@analog.com; s=20260903; h=from:subject:message-id; bh=SUPdCQ9y6smqEBkTRXfO7L9iuHWsQz6QNl0nLGK1rLY=; b=4YIPWzX5ysDZ9agDbKkWwRWu0TVbM3s6UEE1j5/2uBTPZggj76EE0aQBdZZOuvAor6K2OyTof ge2p0ASqFYbBvEZR/89t/UdEJ0kLwBVexipPeV4vKfQLMEwAouKnQly X-Developer-Key: i=janani.sunil@analog.com; a=ed25519; pk=0UJo4rLJeMHBMco/+wcMHzXI7nV8k1T72+XQlBNV4Rw= X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA4MDA3NiBTYWx0ZWRfX9YePWyMk8Nui V8OAu5Ee/fw7LQc3Lu7liwnmV6fqVFzrdRmQ01RII/9L3KP/pDMYrTHmstwB0+0R3c675CbciOS kTfQ8oKvoF56aUei6Kp0bR+DN8IZu9Vdrljf7QNovKjCvhPS5bAf X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA4MDA3NiBTYWx0ZWRfX3JeEkPWkst0t HuJUGJWrYRR7Gw4tPeP6sMjIMzawZZtsswfxZc/LNQshBiZ+1NYWuEIj7hXYuWU3vFUhRI8udGZ LiLfE6YUWQDVXy3hDow7avFEFjynVz5lV1JIzWlcsLo3CkdI1zgzdjrdHjb+Gp/kFlqmbH/6+Oa NFAUJf5V7LWXFg87DjmxmCfCZZV9FNNYMUpb1VE0VGGQ/umIOCpfZsmk+0dAea32AdVPfroas+S oR+JuUMTkdDyr7QtjDvpWAs2gNd+ABoyKn9PGKDJdaxlyllbkEa9J3puGojAIYjnjv96P820Wwi 3t7H62DHBrsKQVQmyt/rmp1mTBsOt1E9y1Dmcg7tDs+UsSnqwQD5+/n26MFalrKlqjrXjBI/bSA y23wMOfOszqSYBAICt7/WtIn8y35yaZUgm8Ks8u+lKeZoPM8dj1pGwApfhyo0GtVgPKwyzNFLYE p922l7ONVCc0o0TkIgA== X-Proofpoint-ORIG-GUID: nwKz-WGG0OmYRkV1dWnHm3c0H5bf_Yx2 X-Proofpoint-GUID: nwKz-WGG0OmYRkV1dWnHm3c0H5bf_Yx2 X-Authority-Analysis: v=2.4 cv=SOdykuvH c=1 sm=1 tr=0 ts=6a9fb854 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0sLvza09kfJOxVLZPwjg:22 a=uXIjobp8t2wMuQ0fPvqm:22 a=VwQbUJbxAAAA:8 a=QyXUC8HyAAAA:8 a=gAnH3GRIAAAA:8 a=h95pfnyYhxuxbSzySfwA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-08_01,2026-09-07_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 impostorscore=0 adultscore=0 priorityscore=1501 phishscore=0 suspectscore=0 spamscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609080076 Use regmap_test_bits() when reading a single GPIO value from a normal register and when reading the direction bit. Reviewed-by: Linus Walleij Reviewed-by: Michael Walle Reviewed-by: Andy Shevchenko Signed-off-by: Janani Sunil --- drivers/gpio/gpio-regmap.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-regmap.c b/drivers/gpio/gpio-regmap.c index fb21396e1d02..ae6fa42b00a4 100644 --- a/drivers/gpio/gpio-regmap.c +++ b/drivers/gpio/gpio-regmap.c @@ -95,11 +95,11 @@ static int gpio_regmap_get(struct gpio_chip *chip, unsi= gned int offset) if (ret) return ret; =20 + if (gpio->reg_dat_base !=3D gpio->reg_set_base) + return regmap_test_bits(gpio->regmap, reg, mask); + /* ensure we don't spoil any register cache with pin input values */ - if (gpio->reg_dat_base =3D=3D gpio->reg_set_base) - ret =3D regmap_read_bypassed(gpio->regmap, reg, &val); - else - ret =3D regmap_read(gpio->regmap, reg, &val); + ret =3D regmap_read_bypassed(gpio->regmap, reg, &val); if (ret) return ret; =20 @@ -183,7 +183,7 @@ static int gpio_regmap_get_direction(struct gpio_chip *= chip, unsigned int offset) { struct gpio_regmap *gpio =3D gpiochip_get_data(chip); - unsigned int base, val, reg, mask; + unsigned int base, reg, mask; int invert, ret; =20 if (gpio_regmap_fixed_direction(gpio, offset)) { @@ -212,14 +212,14 @@ static int gpio_regmap_get_direction(struct gpio_chip= *chip, if (ret) return ret; =20 - ret =3D regmap_read(gpio->regmap, reg, &val); - if (ret) + ret =3D regmap_test_bits(gpio->regmap, reg, mask); + if (ret < 0) return ret; =20 - if (!!(val & mask) ^ invert) + if (ret ^ invert) return GPIO_LINE_DIRECTION_OUT; - else - return GPIO_LINE_DIRECTION_IN; + + return GPIO_LINE_DIRECTION_IN; } =20 static int gpio_regmap_try_direction_fixed(struct gpio_regmap *gpio, --=20 2.43.0 From nobody Fri Sep 25 22:19:32 2026 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44A8D396561; Tue, 8 Sep 2026 07:25:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.135.77 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852315; cv=none; b=J6MNdaxFuw2Ljf2CGcggkpT92YjYDOR0ecREmzhP6iEA3v+cb1FDCh2tvF9ndwXzgPtHbkIwL7GYcrxuQgayxSo5hgF7rMNZfM+O0Fv7Cf/mtWRj6j2FiClj/eB0JO+1cScD86qbvxgOQ5q7IU5I50Vhf294JiUvRAbj1G0Sc2Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852315; c=relaxed/simple; bh=Rvho5R3p9z34bElAQ63YqEnhP+/R0Fnn9h0VmL/Pxto=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=QMjE6kJZBd6GbPB4dhI+QVf4IZvc52zh/bYNmJ/3eGHogUHLlerdjGGYebVseuQt4xCS6fthmxsWmc+6hWYJJLRsSBSrrZoOOsZk05/y0OMsCXTgg9gLFCQp+PoTMFpflq+QC8ZlGWhWyPJyQXxv0Q33blClBifs1auhS8BNZf4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=analog.com; spf=pass smtp.mailfrom=analog.com; dkim=pass (2048-bit key) header.d=analog.com header.i=@analog.com header.b=UkXol3Go; arc=none smtp.client-ip=148.163.135.77 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=analog.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=analog.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=analog.com header.i=@analog.com header.b="UkXol3Go" Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6886Qdiq2130744; Tue, 8 Sep 2026 03:25:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=analog.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=DKIM; bh=Fl+7K 7BAXKhPoru800gVR4cCwgCOqIx22a0MTu3D4xw=; b=UkXol3GoPN/jHl6u1gmhz 33F50T5llFu+slQMhyqn4RO4LtsdmXIUrmj1I8Utpe5haJ3QSC3F2OKJT81dRyyY j3/W09wFHlsLIbYFMfamcEnU9svC8VLeRfYmV1UccEaJIwZSK/kY0GneRJYtIPrn 25LKkNI6nAmbFHRKbKNdPk46i16CM4Q9Th2A154x+2627JHJqcKydM1gMS9Hxcnn d3XHY7qO/Pzyh/lLlKoGHzHlaozZSftomC1sOrAnO78p2EyV2fMG2Yrg2rGs3865 Lt8zy/UAj8XuzJA4o1WQbIM4wqWDFZHhREiLRBH/W7ZoW4HYbxMbDuALhm4rdXMQ g== Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 4ggcx2umsa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 08 Sep 2026 03:25:09 -0400 (EDT) Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 6887P89P039603 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 8 Sep 2026 03:25:08 -0400 Received: from ASHBCASHYB4.ad.analog.com (10.64.17.132) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.37; Tue, 8 Sep 2026 03:25:08 -0400 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBCASHYB4.ad.analog.com (10.64.17.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.37; Tue, 8 Sep 2026 03:25:08 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.1748.37 via Frontend Transport; Tue, 8 Sep 2026 03:25:07 -0400 Received: from HYB-e1y2fvUQ3cx.ad.analog.com (HYB-e1y2fvUQ3cx.ad.analog.com [10.44.3.59]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 6887Ot8e016290; Tue, 8 Sep 2026 03:25:04 -0400 From: Janani Sunil Date: Tue, 8 Sep 2026 09:24:53 +0200 Subject: [PATCH v7 2/3] gpio: regmap: Add optional runtime PM support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260908-ad7768-gpio-v7-2-52ee6ef18a1e@analog.com> References: <20260908-ad7768-gpio-v7-0-52ee6ef18a1e@analog.com> In-Reply-To: <20260908-ad7768-gpio-v7-0-52ee6ef18a1e@analog.com> To: Michael Walle , Linus Walleij , Bartosz Golaszewski CC: , , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Cameron , Andy Shevchenko , "Janani Sunil" , Janani Sunil X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788852295; l=6988; i=janani.sunil@analog.com; s=20260903; h=from:subject:message-id; bh=Rvho5R3p9z34bElAQ63YqEnhP+/R0Fnn9h0VmL/Pxto=; b=Ifh6sl8DSXpqA5RlsCv9V0GjZlbWtGf0JWcCg8sRtXhqCtmRwUbsDihHADrO5ojWZmoGaahBN PziOT1SNxHoAWkhvVRLyPxW8lvTFJxenyjQRg2COXYofKervZpLOHRv X-Developer-Key: i=janani.sunil@analog.com; a=ed25519; pk=0UJo4rLJeMHBMco/+wcMHzXI7nV8k1T72+XQlBNV4Rw= X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA4MDA3NiBTYWx0ZWRfXxFoavjpZOKjS 4G0aY3y3WNHf9E7FwflysK890W+0RmWWnn42dLs5CMGwubg4hKit/WnDPlUwTBEYYQzrOg3pt0D 9EjIITvx80qcP9L9NQWvgl49pbS/XlslveX2lV3+8KtsEBrf0ViK X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA4MDA3NiBTYWx0ZWRfXzOHhdIVkRThG Hc1y/m0O9Prjdgt9ZBQA3WlyyAhtVlsIN7CJmyw3i8kVUFRP0MUD6zx7BWqLSrqvpcNjfgYy4hs xcUaJCV7jJ5F2EIS0Q3WRvVgx0Oik3FurFGEGMyvhxEcToElOdKYQRwCTCQYn54sVeG8TRz9lic gKtb3/NkKPyePG5tEmGx8Jxw8mB3NfGi5fL/SwH0Un0/SwF6Sw1SQCw1jQONmmDI9V5MXP7c7NX MxksCU5l1aG3vtBmmac2fQcF6jwiZ0MN7ECQ/W2JpU1Q9UhuWNavwxxyLPN06JIjlKciuCpRbNg 0VK1Us4kPJRgBWa8dZcuQK8GvcoVaM6pDjEF6wt8CrnGJUc0i9PkEu7CR0Qs59rvKLlBkVpaT3w 1xVUXGXr3d9XBugwD6KWI23V4CXaXwNQK3bb4aHJZTmdbDIzDmIH8puRMii5zCERRYKjpTqlTxN E+FuUqphLL3bU3Q1IoQ== X-Proofpoint-ORIG-GUID: 89zivAWlAncqtVU5LO7yV2fX1WUTgmiq X-Proofpoint-GUID: 89zivAWlAncqtVU5LO7yV2fX1WUTgmiq X-Authority-Analysis: v=2.4 cv=SOdykuvH c=1 sm=1 tr=0 ts=6a9fb855 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0sLvza09kfJOxVLZPwjg:22 a=uXIjobp8t2wMuQ0fPvqm:22 a=QyXUC8HyAAAA:8 a=VwQbUJbxAAAA:8 a=gAnH3GRIAAAA:8 a=3fJ8ZLtifNgCll64qzMA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-08_01,2026-09-07_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 impostorscore=0 adultscore=0 priorityscore=1501 phishscore=0 suspectscore=0 spamscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609080076 Some gpio-regmap consumers share their regmap with a parent device that may be runtime suspended. GPIO register accesses must resume that device first. Add an optional pm_dev field and acquire it before register translation or access. Release it using runtime autosuspend after each operation. Keep the device active across the complete direction-output sequence and propagate failure when setting the initial output value. Reviewed-by: Andy Shevchenko Reviewed-by: Michael Walle Signed-off-by: Janani Sunil --- drivers/gpio/gpio-regmap.c | 80 +++++++++++++++++++++++++++++++++++++++++= ---- include/linux/gpio/regmap.h | 2 ++ 2 files changed, 76 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-regmap.c b/drivers/gpio/gpio-regmap.c index ae6fa42b00a4..2f5f45b84cc9 100644 --- a/drivers/gpio/gpio-regmap.c +++ b/drivers/gpio/gpio-regmap.c @@ -6,11 +6,13 @@ */ =20 #include +#include #include #include #include #include #include +#include #include #include #include @@ -23,6 +25,8 @@ struct gpio_regmap { struct device *parent; struct regmap *regmap; + struct device *pm_dev; + struct gpio_chip gpio_chip; =20 int reg_stride; @@ -79,6 +83,33 @@ static int gpio_regmap_simple_xlate(struct gpio_regmap *= gpio, return 0; } =20 +static int gpio_regmap_runtime_get(struct gpio_regmap *gpio) +{ + if (!gpio->pm_dev) + return 0; + + return pm_runtime_get_active(gpio->pm_dev, RPM_TRANSPARENT); +} + +static void gpio_regmap_runtime_put(struct gpio_regmap *gpio) +{ + if (!gpio->pm_dev) + return; + + pm_runtime_put_autosuspend(gpio->pm_dev); +} + +DEFINE_GUARD(gpio_regmap_runtime, struct gpio_regmap *, + gpio_regmap_runtime_get(_T), gpio_regmap_runtime_put(_T)) +DEFINE_GUARD_COND(gpio_regmap_runtime, _try, + gpio_regmap_runtime_get(_T), _RET =3D=3D 0) + +#define GPIO_REGMAP_RUNTIME_ACQUIRE(_gpio, _var) \ + ACQUIRE(gpio_regmap_runtime_try, _var)(_gpio) + +#define GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(_var_ptr) \ + ACQUIRE_ERR(gpio_regmap_runtime, _var_ptr) + static int gpio_regmap_get(struct gpio_chip *chip, unsigned int offset) { struct gpio_regmap *gpio =3D gpiochip_get_data(chip); @@ -91,7 +122,13 @@ static int gpio_regmap_get(struct gpio_chip *chip, unsi= gned int offset) else base =3D gpio_regmap_addr(gpio->reg_set_base); =20 - ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_GET_OP, base, offset, ®= , &mask); + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_GET_OP, base, offset, + ®, &mask); if (ret) return ret; =20 @@ -114,7 +151,13 @@ static int gpio_regmap_set(struct gpio_chip *chip, uns= igned int offset, unsigned int reg, mask, mask_val; int ret; =20 - ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_OP, base, offset, ®= , &mask); + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_OP, base, offset, + ®, &mask); if (ret) return ret; =20 @@ -146,6 +189,11 @@ static int gpio_regmap_set_with_clear(struct gpio_chip= *chip, unsigned int base, reg, mask, value =3D 0; int ret; =20 + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + if (val) base =3D gpio_regmap_addr(gpio->reg_set_base); else @@ -208,7 +256,13 @@ static int gpio_regmap_get_direction(struct gpio_chip = *chip, return -ENOTSUPP; } =20 - ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_GET_DIR_OP, base, offset, = ®, &mask); + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_GET_DIR_OP, base, offset, + ®, &mask); if (ret) return ret; =20 @@ -262,7 +316,13 @@ static int gpio_regmap_set_direction(struct gpio_chip = *chip, return -ENOTSUPP; } =20 - ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_DIR_OP, base, offset, = ®, &mask); + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_DIR_OP, base, offset, + ®, &mask); if (ret) return ret; =20 @@ -293,6 +353,11 @@ static int gpio_regmap_direction_output(struct gpio_ch= ip *chip, struct gpio_regmap *gpio =3D gpiochip_get_data(chip); int ret; =20 + GPIO_REGMAP_RUNTIME_ACQUIRE(gpio, pm); + ret =3D GPIO_REGMAP_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + /* * First check if this is gonna work on a fixed direction line, * if it doesn't (i.e. this is a fixed input line), then do not @@ -304,7 +369,9 @@ static int gpio_regmap_direction_output(struct gpio_chi= p *chip, return ret; } =20 - gpio_regmap_set(chip, offset, value); + ret =3D gpio_regmap_set(chip, offset, value); + if (ret) + return ret; =20 return gpio_regmap_set_direction(chip, offset, true); } @@ -399,6 +466,7 @@ struct gpio_regmap *gpio_regmap_register(const struct g= pio_regmap_config *config gpio->reg_clr_base =3D config->reg_clr_base; gpio->reg_dir_in_base =3D config->reg_dir_in_base; gpio->reg_dir_out_base =3D config->reg_dir_out_base; + gpio->pm_dev =3D config->pm_dev; =20 chip =3D &gpio->gpio_chip; chip->parent =3D config->parent; @@ -406,7 +474,7 @@ struct gpio_regmap *gpio_regmap_register(const struct g= pio_regmap_config *config chip->base =3D -1; chip->names =3D config->names; chip->label =3D config->label ?: dev_name(config->parent); - chip->can_sleep =3D regmap_might_sleep(config->regmap); + chip->can_sleep =3D config->pm_dev || regmap_might_sleep(config->regmap); chip->init_valid_mask =3D config->init_valid_mask; =20 chip->request =3D gpiochip_generic_request; diff --git a/include/linux/gpio/regmap.h b/include/linux/gpio/regmap.h index 6f52c140e50d..6fe0877717cb 100644 --- a/include/linux/gpio/regmap.h +++ b/include/linux/gpio/regmap.h @@ -46,6 +46,7 @@ enum gpio_regmap_operation { * @parent: The parent device * @regmap: The regmap used to access the registers * given, the name of the device is used + * @pm_dev: (Optional) Device to use for runtime power management. * @fwnode: (Optional) The firmware node. * If not given, the fwnode of the parent is used. * @label: (Optional) Descriptive name for GPIO controller. @@ -117,6 +118,7 @@ enum gpio_regmap_operation { struct gpio_regmap_config { struct device *parent; struct regmap *regmap; + struct device *pm_dev; struct fwnode_handle *fwnode; =20 const char *label; --=20 2.43.0 From nobody Fri Sep 25 22:19:32 2026 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F023396597; Tue, 8 Sep 2026 07:25:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.135.77 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852317; cv=none; b=mX7OWinkL9sLJAyKRfONtD7mZu+bMx79K0DxhmjlA0qszl/wsaIizt8JxOhJLhHy3aVK8lqj//NgaSeJRaBUwBeTDAXVnZo9qJnfMmbtBy9jnj4VxSWJpgeBFYqCxlFrPB9G2oINg5YEg2fDBMVaZIlgLphFDXZhQYPY8kSALIw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788852317; c=relaxed/simple; bh=l+Eony3UuqYY0Z+qZgt4P9TCjcM6pbMWWjgi+x/jxa8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=V0MeJohK+z3BfOXxxfaxIcuPpOaM5HM8R6q7wOL1gZygRNOQS1ET8peWtbwWh+GoT+C56F0DHU/h4+XaRmcIAioTBzUW80qNH320uIbQfJoUe1f0/nlhuWr/Kmq5/JyVhpDHVqX5JxJSxpve1iktAdAsADNzHYUbHl6wWJPY5u4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=analog.com; spf=pass smtp.mailfrom=analog.com; dkim=pass (2048-bit key) header.d=analog.com header.i=@analog.com header.b=WjzhKaTg; arc=none smtp.client-ip=148.163.135.77 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=analog.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=analog.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=analog.com header.i=@analog.com header.b="WjzhKaTg" Received: from pps.filterd (m0516787.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6886RaXD1884298; Tue, 8 Sep 2026 03:25:10 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=analog.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=DKIM; bh=j/Swa lTTNkhfhIHJjX5eNE0kNrAtrLo17uwB+pFIWqQ=; b=WjzhKaTgF/dDQioIncxiN StYTn8kxmJ18RElytCIu0zh7/7HjsnMhy09TafSl/mecJVUUz6V6rM4+6ELTKVFT snZnrA4vv8UgnkTbvzibUOTcvCmAOc8OkTqs9YXl4n+L9NnQBkCQyfUbVAzcuy9f /E8x7efT2oBpE6DcvPNaL2iihJXtPWNcy36mkmqxsoL3NZ/hF/jGxcqhI3IgNb3H i2ac0Gi/hE9u/A4Kmhbiq+pHPNDskq2+nM1PCtDaYvEDnXMsDc+YrkvodWLRmO+r ltGDwW9DoEGmPO6bUSWdapEcHN4eAwnKmLAyl1pXdiBhwSnTBiy9ZBcW0G8ioTWW Q== Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 4gh4dg835k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 08 Sep 2026 03:25:10 -0400 (EDT) Received: from ASHBMBX9.ad.analog.com (ASHBMBX9.ad.analog.com [10.64.17.10]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 6887P9E7039609 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 8 Sep 2026 03:25:09 -0400 Received: from ASHBCASHYB4.ad.analog.com (10.64.17.132) by ASHBMBX9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.37; Tue, 8 Sep 2026 03:25:09 -0400 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBCASHYB4.ad.analog.com (10.64.17.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.37; Tue, 8 Sep 2026 03:25:09 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.2.1748.37 via Frontend Transport; Tue, 8 Sep 2026 03:25:09 -0400 Received: from HYB-e1y2fvUQ3cx.ad.analog.com (HYB-e1y2fvUQ3cx.ad.analog.com [10.44.3.59]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 6887Ot8f016290; Tue, 8 Sep 2026 03:25:05 -0400 From: Janani Sunil Date: Tue, 8 Sep 2026 09:24:54 +0200 Subject: [PATCH v7 3/3] gpio: ad7768: Add AD7768 GPIO auxiliary driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260908-ad7768-gpio-v7-3-52ee6ef18a1e@analog.com> References: <20260908-ad7768-gpio-v7-0-52ee6ef18a1e@analog.com> In-Reply-To: <20260908-ad7768-gpio-v7-0-52ee6ef18a1e@analog.com> To: Michael Walle , Linus Walleij , Bartosz Golaszewski CC: , , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Cameron , Andy Shevchenko , "Janani Sunil" , Janani Sunil X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788852295; l=5643; i=janani.sunil@analog.com; s=20260903; h=from:subject:message-id; bh=l+Eony3UuqYY0Z+qZgt4P9TCjcM6pbMWWjgi+x/jxa8=; b=r1Fsj3hHn9Orqzg3+dNw0LyTG1imtFoHo4e7FuZKpi6N5zLhsawKoG813G2HGwNt9T9DFF11a KFI5PKFm+1wBbbBx6vxlftuFQWqzYiT/vNkvANgkxSLxKDDstxpeEXT X-Developer-Key: i=janani.sunil@analog.com; a=ed25519; pk=0UJo4rLJeMHBMco/+wcMHzXI7nV8k1T72+XQlBNV4Rw= X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-ORIG-GUID: rxciDb0v_iNRXExW1O6UqMVWKv9OO135 X-Authority-Analysis: v=2.4 cv=f5N4wuyM c=1 sm=1 tr=0 ts=6a9fb856 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0sLvza09kfJOxVLZPwjg:22 a=OmVn7CZJonkx5R5zMQLL:22 a=QyXUC8HyAAAA:8 a=VwQbUJbxAAAA:8 a=gAnH3GRIAAAA:8 a=8fq82CzG31171KfXEYkA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-GUID: rxciDb0v_iNRXExW1O6UqMVWKv9OO135 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA4MDA3NiBTYWx0ZWRfX6M/+kxeXAHdh mLM+LgUwY1jGl5nuN97fhjjT+YTzkz49aHocyGFrbAi13Om/d9evGKR8qaGVLqGWjkKn90mHVCy CeFvfoRUqAnLTQ7HrTPINM0j/VnVw0h3qCkFckPMwAlXa+zL8do3 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA4MDA3NiBTYWx0ZWRfX6PXSMiMBcBme kTuxGdK314NChvAI0Phr3EW6CwpY9+b7nSJHz3agp5iW1pzf1EqV9Ms86/Z494PdzMbxkFe2t5F pERrxcENvkNQIGoJfZqdXlKJiNnX+DIDwkKe381dJ1ygJb+1xBlKxsgAljhPywuXCh9V61HFBZ5 hC19KgSvxQe+6HQzKAyVtwv1NR+5tcIuHv2hDH55q9dn+zlbko1IQ8G0jbhWP1hR4hUlLoay+cF vpQxambjGFBJV/TPnMsx0RUfoy/hLsUpg8H32LGGydWw2xRbgRyu0jjNfKrnu5kKf04AEJVFkj+ +xET2xkyigqpwyd86sc8A2KJJwrbqtYWNdsJ5VdcP3bKLQEQKorDm+4mdfqrEARPqYUiRVxArda I18WSKDr9HklBaGpfuoDbAl+k34bbj+K9cK4qsEnYN4FlJWD1Qm5hKdz2GIP5uBedtVaUZ6ryiz dX8jJAHH+KN1eIxoFfw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-08_01,2026-09-07_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 phishscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 adultscore=0 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609080076 The AD7768 provides five GPIOs controlled through registers shared with the parent IIO device. Register an auxiliary gpio-regmap driver and use the parent device for runtime PM. The device has separate input-state and output-latch registers. Add a reg_mask_xlate() callback that checks the line direction and reads the programmed output latch for output lines while retaining input-state reads for input lines. Reviewed-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Janani Sunil --- drivers/gpio/Kconfig | 12 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-ad7768.c | 121 +++++++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 134 insertions(+) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index a48586bb8edb..07b7f8ab0ccb 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1818,6 +1818,18 @@ endmenu menu "Auxiliary Bus GPIO drivers" depends on AUXILIARY_BUS =20 +config GPIO_AD7768 + tristate "Analog Devices AD7768 GPIO support" + depends on AD7768 + depends on GPIOLIB + select GPIO_REGMAP + help + Say yes here to expose the AD7768 utility pins as GPIOs when the + device tree node is marked as a GPIO controller. + + To compile this driver as a module, choose M here: the module will be + called gpio-ad7768. + config GPIO_LTC4283 tristate "Analog Devices LTC4283 GPIO support" depends on SENSORS_LTC4283 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index dc9e6d643b5b..ce56e9b3f55d 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_GPIO_104_IDI_48) +=3D gpio-104-idi-48.o obj-$(CONFIG_GPIO_104_IDIO_16) +=3D gpio-104-idio-16.o obj-$(CONFIG_GPIO_74X164) +=3D gpio-74x164.o obj-$(CONFIG_GPIO_74XX_MMIO) +=3D gpio-74xx-mmio.o +obj-$(CONFIG_GPIO_AD7768) +=3D gpio-ad7768.o obj-$(CONFIG_GPIO_ADNP) +=3D gpio-adnp.o obj-$(CONFIG_GPIO_ADP5520) +=3D gpio-adp5520.o obj-$(CONFIG_GPIO_ADP5585) +=3D gpio-adp5585.o diff --git a/drivers/gpio/gpio-ad7768.c b/drivers/gpio/gpio-ad7768.c new file mode 100644 index 000000000000..6d373c697e7a --- /dev/null +++ b/drivers/gpio/gpio-ad7768.c @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Analog Devices AD7768 GPIO auxiliary driver + * + * Copyright 2026 Analog Devices Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define AD7768_REG_GPIO_CONTROL 0x0E +#define AD7768_GPIO_UGPIO_ENABLE BIT(7) + +#define AD7768_REG_GPIO_WRITE 0x0F +#define AD7768_REG_GPIO_READ 0x10 + +#define AD7768_NUM_GPIOS 5 +#define AD7768_FILTER_GPIO 4 + +static int ad7768_gpio_init_valid_mask(struct gpio_chip *gc, + unsigned long *valid_mask, + unsigned int ngpios) +{ + if (ngpios > AD7768_FILTER_GPIO && + device_property_match_string(gc->parent->parent, "clock-names", + "mclk") < 0) + __clear_bit(AD7768_FILTER_GPIO, valid_mask); + + return 0; +} + +static int ad7768_gpio_reg_mask_xlate(struct gpio_regmap *gpio, + enum gpio_regmap_operation op, + unsigned int base, unsigned int offset, + unsigned int *reg, unsigned int *mask) +{ + struct regmap *regmap =3D gpio_regmap_get_drvdata(gpio); + int ret; + + *reg =3D base; + *mask =3D BIT(offset); + + if (op !=3D GPIO_REGMAP_GET_OP) + return 0; + + /* + * AD7768 has separate input-state and output-latch registers. For an + * output line, report the programmed value from the output latch; + * input lines continue to use the input-state register. + */ + ret =3D regmap_test_bits(regmap, AD7768_REG_GPIO_CONTROL, *mask); + if (ret < 0) + return ret; + if (ret) + *reg =3D AD7768_REG_GPIO_WRITE; + + return 0; +} + +static int ad7768_gpio_probe(struct auxiliary_device *adev, + const struct auxiliary_device_id *id) +{ + struct gpio_regmap_config config; + struct device *dev =3D &adev->dev; + struct device *parent =3D dev->parent; + struct regmap *map; + int ret; + + map =3D dev_get_regmap(parent, NULL); + if (!map) + return -ENODEV; + + PM_RUNTIME_ACQUIRE_AUTOSUSPEND(parent, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + ret =3D regmap_set_bits(map, AD7768_REG_GPIO_CONTROL, AD7768_GPIO_UGPIO_E= NABLE); + if (ret) + return ret; + + config =3D (struct gpio_regmap_config) { + .parent =3D dev, + .regmap =3D map, + .label =3D dev_name(parent), + .ngpio =3D AD7768_NUM_GPIOS, + .reg_dat_base =3D AD7768_REG_GPIO_READ, + .reg_set_base =3D AD7768_REG_GPIO_WRITE, + .reg_dir_out_base =3D AD7768_REG_GPIO_CONTROL, + .pm_dev =3D parent, + .reg_mask_xlate =3D ad7768_gpio_reg_mask_xlate, + .init_valid_mask =3D ad7768_gpio_init_valid_mask, + .drvdata =3D map, + }; + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &config)); +} + +static const struct auxiliary_device_id ad7768_gpio_ids[] =3D { + { .name =3D "ad7768.gpio" }, + { } +}; +MODULE_DEVICE_TABLE(auxiliary, ad7768_gpio_ids); + +static struct auxiliary_driver ad7768_gpio_driver =3D { + .probe =3D ad7768_gpio_probe, + .id_table =3D ad7768_gpio_ids, +}; +module_auxiliary_driver(ad7768_gpio_driver); + +MODULE_AUTHOR("Janani Sunil "); +MODULE_DESCRIPTION("Analog Devices AD7768 GPIO auxiliary driver"); +MODULE_LICENSE("GPL"); --=20 2.43.0