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The two are not identical: STATIC_IFN_KUNIT was gated on CONFIG_DRM_AMD_DC_KUNIT_TEST, while VISIBLE_IF_KUNIT is gated on CONFIG_KUNIT. Helpers therefore become non-static whenever KUnit is enabled, not only when the AMD DC tests are built. However, given that DRM_AMD_DC_KUNIT_TEST depends on KUNIT, tests remain behaviourally unchanged. kernel-doc still needs to strip the qualifier. amdgpu_dm_color.c is pulled into Documentation/gpu and several documented functions use it. Include from dm_helpers.h, which is where the local macros used to live. Suggested-by: Maxime Ripard Signed-off-by: Albert Esteve Acked-by: Maxime Ripard --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 39 +++++------ .../drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c | 6 +- .../amd/display/amdgpu_dm/amdgpu_dm_backlight.c | 24 +++---- .../drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 60 ++++++++--------- .../drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 2 +- .../amd/display/amdgpu_dm/amdgpu_dm_connector.c | 76 +++++++++++-------= ---- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 14 ++-- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 16 ++--- .../drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c | 4 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c | 4 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 49 +++++++------- .../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 30 ++++----- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 56 ++++++++-------- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c | 14 ++-- .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 24 +++---- .../drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 50 +++++++------- .../drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 50 +++++++------- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c | 4 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c | 8 +-- drivers/gpu/drm/amd/display/dc/dm_helpers.h | 4 +- tools/lib/python/kdoc/xforms_lists.py | 2 +- 21 files changed, 273 insertions(+), 263 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gp= u/drm/amd/display/amdgpu_dm/amdgpu_dm.c index ec483276d753..5b3bebde0b08 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -143,7 +143,8 @@ static void amdgpu_dm_destroy_drm_device(struct amdgpu_= display_manager *dm); =20 static int amdgpu_dm_atomic_setup_commit(struct drm_atomic_commit *state); static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_commit *state); -STATIC_IFN_KUNIT void dm_enable_per_frame_crtc_master_sync(struct dc_state= *context); +VISIBLE_IF_KUNIT void dm_enable_per_frame_crtc_master_sync( + struct dc_state *context); =20 static int amdgpu_dm_atomic_check(struct drm_device *dev, struct drm_atomic_commit *state); @@ -167,7 +168,7 @@ static inline void amdgpu_dm_exit_ips_for_hw_access(str= uct dc *dc) * @return * Counter for vertical blanks */ -STATIC_IFN_KUNIT u32 dm_vblank_get_counter(struct amdgpu_device *adev, int= crtc) +VISIBLE_IF_KUNIT u32 dm_vblank_get_counter(struct amdgpu_device *adev, int= crtc) { struct amdgpu_crtc *acrtc =3D NULL; =20 @@ -186,7 +187,7 @@ STATIC_IFN_KUNIT u32 dm_vblank_get_counter(struct amdgp= u_device *adev, int crtc) } EXPORT_IF_KUNIT(dm_vblank_get_counter); =20 -STATIC_IFN_KUNIT int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, in= t crtc, +VISIBLE_IF_KUNIT int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, in= t crtc, u32 *vbl, u32 *position) { u32 v_blank_start =3D 0, v_blank_end =3D 0, h_position =3D 0, v_position = =3D 0; @@ -224,21 +225,21 @@ STATIC_IFN_KUNIT int dm_crtc_get_scanoutpos(struct am= dgpu_device *adev, int crtc } EXPORT_IF_KUNIT(dm_crtc_get_scanoutpos); =20 -STATIC_IFN_KUNIT bool dm_is_idle(struct amdgpu_ip_block *ip_block) +VISIBLE_IF_KUNIT bool dm_is_idle(struct amdgpu_ip_block *ip_block) { /* XXX todo */ return true; } EXPORT_IF_KUNIT(dm_is_idle); =20 -STATIC_IFN_KUNIT int dm_wait_for_idle(struct amdgpu_ip_block *ip_block) +VISIBLE_IF_KUNIT int dm_wait_for_idle(struct amdgpu_ip_block *ip_block) { /* XXX todo */ return 0; } EXPORT_IF_KUNIT(dm_wait_for_idle); =20 -STATIC_IFN_KUNIT int dm_soft_reset(struct amdgpu_ip_block *ip_block) +VISIBLE_IF_KUNIT int dm_soft_reset(struct amdgpu_ip_block *ip_block) { /* XXX todo */ return 0; @@ -250,7 +251,7 @@ EXPORT_IF_KUNIT(dm_soft_reset); * in the dc_surface_updates array. This comparator is used to sort them * by descending zpos. */ -STATIC_IFN_KUNIT int dm_plane_layer_index_cmp(const void *a, const void *b) +VISIBLE_IF_KUNIT int dm_plane_layer_index_cmp(const void *a, const void *b) { const struct dc_surface_update *sa =3D (struct dc_surface_update *)a; const struct dc_surface_update *sb =3D (struct dc_surface_update *)b; @@ -299,14 +300,14 @@ static inline bool update_planes_and_stream_adapter(s= truct dc *dc, stream_update); } =20 -STATIC_IFN_KUNIT int dm_set_clockgating_state(struct amdgpu_ip_block *ip_b= lock, +VISIBLE_IF_KUNIT int dm_set_clockgating_state(struct amdgpu_ip_block *ip_b= lock, enum amd_clockgating_state state) { return 0; } EXPORT_IF_KUNIT(dm_set_clockgating_state); =20 -STATIC_IFN_KUNIT int dm_set_powergating_state(struct amdgpu_ip_block *ip_b= lock, +VISIBLE_IF_KUNIT int dm_set_powergating_state(struct amdgpu_ip_block *ip_b= lock, enum amd_powergating_state state) { return 0; @@ -2145,7 +2146,7 @@ int dm_atomic_get_state(struct drm_atomic_commit *sta= te, return 0; } =20 -STATIC_IFN_KUNIT struct dm_atomic_state * +VISIBLE_IF_KUNIT struct dm_atomic_state * dm_atomic_get_new_state(struct drm_atomic_commit *state) { struct drm_device *dev =3D state->dev; @@ -2188,7 +2189,7 @@ dm_atomic_duplicate_state(struct drm_private_obj *obj) return &new_state->base; } =20 -STATIC_IFN_KUNIT void dm_atomic_destroy_state(struct drm_private_obj *obj, +VISIBLE_IF_KUNIT void dm_atomic_destroy_state(struct drm_private_obj *obj, struct drm_private_state *state) { struct dm_atomic_state *dm_state =3D to_dm_atomic_state(state); @@ -2671,7 +2672,7 @@ static void amdgpu_dm_destroy_drm_device(struct amdgp= u_display_manager *dm) * * Calculate and program the display watermarks and line buffer allocation. */ -STATIC_IFN_KUNIT void dm_bandwidth_update(struct amdgpu_device *adev) +VISIBLE_IF_KUNIT void dm_bandwidth_update(struct amdgpu_device *adev) { /* TODO: implement later */ } @@ -2876,13 +2877,13 @@ static int dm_early_init(struct amdgpu_ip_block *ip= _block) return dm_init_microcode(adev); } =20 -STATIC_IFN_KUNIT bool modereset_required(struct drm_crtc_state *crtc_state) +VISIBLE_IF_KUNIT bool modereset_required(struct drm_crtc_state *crtc_state) { return !crtc_state->active && drm_atomic_crtc_needs_modeset(crtc_state); } EXPORT_IF_KUNIT(modereset_required); =20 -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int fill_plane_color_attributes(const struct drm_plane_state *plane_state, const enum surface_pixel_format format, enum dc_color_space *color_space) @@ -3442,7 +3443,7 @@ static void dm_update_pflip_irq_state(struct amdgpu_d= evice *adev, amdgpu_irq_update(adev, &adev->pageflip_irq, irq_type); } =20 -STATIC_IFN_KUNIT bool +VISIBLE_IF_KUNIT bool is_scaling_state_different(const struct dm_connector_state *dm_state, const struct dm_connector_state *old_dm_state) { @@ -3461,7 +3462,7 @@ is_scaling_state_different(const struct dm_connector_= state *dm_state, } EXPORT_IF_KUNIT(is_scaling_state_different); =20 -STATIC_IFN_KUNIT bool +VISIBLE_IF_KUNIT bool is_content_protection_different(struct drm_crtc_state *new_crtc_state, struct drm_crtc_state *old_crtc_state, struct drm_connector_state *new_conn_state, @@ -4925,7 +4926,7 @@ static int amdgpu_dm_atomic_setup_commit(struct drm_a= tomic_commit *state) return 0; } =20 -STATIC_IFN_KUNIT void set_multisync_trigger_params( +VISIBLE_IF_KUNIT void set_multisync_trigger_params( struct dc_stream_state *stream) { struct dc_stream_state *master =3D NULL; @@ -4940,7 +4941,7 @@ STATIC_IFN_KUNIT void set_multisync_trigger_params( } EXPORT_IF_KUNIT(set_multisync_trigger_params); =20 -STATIC_IFN_KUNIT void set_master_stream(struct dc_stream_state *stream_set= [], +VISIBLE_IF_KUNIT void set_master_stream(struct dc_stream_state *stream_set= [], int stream_count) { int j, highest_rfr =3D 0, master_stream =3D 0; @@ -4964,7 +4965,7 @@ STATIC_IFN_KUNIT void set_master_stream(struct dc_str= eam_state *stream_set[], } EXPORT_IF_KUNIT(set_master_stream); =20 -STATIC_IFN_KUNIT void dm_enable_per_frame_crtc_master_sync(struct dc_state= *context) +VISIBLE_IF_KUNIT void dm_enable_per_frame_crtc_master_sync(struct dc_state= *context) { int i =3D 0; struct dc_stream_state *stream; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c index 199f339839b2..1b331e783220 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c @@ -84,7 +84,7 @@ static const struct drm_audio_component_ops amdgpu_dm_aud= io_component_ops =3D { .get_eld =3D amdgpu_dm_audio_component_get_eld, }; =20 -STATIC_IFN_KUNIT int amdgpu_dm_audio_component_bind(struct device *kdev, +VISIBLE_IF_KUNIT int amdgpu_dm_audio_component_bind(struct device *kdev, struct device *hda_kdev, void *data) { struct drm_device *dev =3D dev_get_drvdata(kdev); @@ -99,7 +99,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_audio_component_bind(struc= t device *kdev, } EXPORT_IF_KUNIT(amdgpu_dm_audio_component_bind); =20 -STATIC_IFN_KUNIT void amdgpu_dm_audio_component_unbind(struct device *kdev, +VISIBLE_IF_KUNIT void amdgpu_dm_audio_component_unbind(struct device *kdev, struct device *hda_kdev, void *data) { struct amdgpu_device *adev =3D drm_to_adev(dev_get_drvdata(kdev)); @@ -116,7 +116,7 @@ static const struct component_ops amdgpu_dm_audio_compo= nent_bind_ops =3D { .unbind =3D amdgpu_dm_audio_component_unbind, }; =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void amdgpu_dm_audio_init_pins(struct amdgpu_device *adev, int audio_count, const unsigned int *inst_array) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_backlight.c b/= drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_backlight.c index e61bbc310f33..02aaaa19cb54 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_backlight.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_backlight.c @@ -86,7 +86,7 @@ void amdgpu_dm_update_backlight_caps(struct amdgpu_displa= y_manager *dm, } EXPORT_IF_KUNIT(amdgpu_dm_update_backlight_caps); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT int get_brightness_range(const struct amdgpu_dm_backlight_caps *caps, unsigned int *min, unsigned int *max) { @@ -118,7 +118,7 @@ static inline u32 scale_fw_to_input(int min, int max, u= 64 input) return min + DIV_ROUND_CLOSEST_ULL(input * (max - min), AMDGPU_MAX_BL_LEV= EL); } =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void convert_custom_brightness(const struct amdgpu_dm_backlight_caps *caps, unsigned int min, unsigned int max, uint32_t *user_brightness) @@ -185,7 +185,7 @@ void convert_custom_brightness(const struct amdgpu_dm_b= acklight_caps *caps, =20 EXPORT_IF_KUNIT(convert_custom_brightness); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT u32 convert_brightness_from_user(const struct amdgpu_dm_backlight_caps *ca= ps, uint32_t brightness) { @@ -202,7 +202,7 @@ u32 convert_brightness_from_user(const struct amdgpu_dm= _backlight_caps *caps, =20 EXPORT_IF_KUNIT(convert_brightness_from_user); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT u32 convert_brightness_to_user(const struct amdgpu_dm_backlight_caps *caps, uint32_t brightness) { @@ -219,7 +219,7 @@ u32 convert_brightness_to_user(const struct amdgpu_dm_b= acklight_caps *caps, } EXPORT_IF_KUNIT(convert_brightness_to_user); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT struct dc_stream_state *dm_find_stream_with_link( struct amdgpu_display_manager *dm, struct dc_link *link) @@ -238,7 +238,7 @@ struct dc_stream_state *dm_find_stream_with_link( } EXPORT_IF_KUNIT(dm_find_stream_with_link); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT int amdgpu_dm_backlight_get_device_index(struct amdgpu_display_manager *dm, struct backlight_device *bd) { @@ -350,7 +350,7 @@ void amdgpu_dm_backlight_set_level(struct amdgpu_displa= y_manager *dm, } EXPORT_IF_KUNIT(amdgpu_dm_backlight_set_level); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT int amdgpu_dm_backlight_update_status(struct backlight_device *bd) { struct amdgpu_display_manager *dm =3D bl_get_data(bd); @@ -362,7 +362,7 @@ int amdgpu_dm_backlight_update_status(struct backlight_= device *bd) } EXPORT_IF_KUNIT(amdgpu_dm_backlight_update_status); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT u32 amdgpu_dm_backlight_get_level(struct amdgpu_display_manager *dm, int b= l_idx) { int ret; @@ -389,7 +389,7 @@ u32 amdgpu_dm_backlight_get_level(struct amdgpu_display= _manager *dm, int bl_idx) } EXPORT_IF_KUNIT(amdgpu_dm_backlight_get_level); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT int amdgpu_dm_backlight_get_brightness(struct backlight_device *bd) { struct amdgpu_display_manager *dm =3D bl_get_data(bd); @@ -405,7 +405,7 @@ static const struct backlight_ops amdgpu_dm_backlight_o= ps =3D { .update_status =3D amdgpu_dm_backlight_update_status, }; =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void amdgpu_dm_backlight_fill_props(const struct amdgpu_dm_backlight_caps = *caps, bool is_system_supplied, bool custom_curve_enabled, @@ -614,7 +614,7 @@ EXPORT_IF_KUNIT(amdgpu_dm_setup_backlight_device); * carefully. */ =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT ssize_t panel_power_savings_show(struct device *device, struct device_attribute *attr, char *buf) @@ -633,7 +633,7 @@ ssize_t panel_power_savings_show(struct device *device, } EXPORT_IF_KUNIT(panel_power_savings_show); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT ssize_t panel_power_savings_store(struct device *device, struct device_attribute *attr, const char *buf, size_t count) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index d55dc06167a8..0273701bd174 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -174,7 +174,7 @@ void amdgpu_dm_init_color_mod(void) } EXPORT_IF_KUNIT(amdgpu_dm_init_color_mod); =20 -STATIC_IFN_KUNIT INLINE_IFN_KUNIT +VISIBLE_IF_KUNIT INLINE_IFN_KUNIT struct fixed31_32 amdgpu_dm_fixpt_from_s3132(__u64 x) { struct fixed31_32 val; @@ -425,7 +425,7 @@ amdgpu_dm_create_color_properties(struct amdgpu_device = *adev) * Returns: * DRM LUT or NULL */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT const struct drm_color_lut * __extract_blob_lut(const struct drm_property_blob *blob, uint32_t *size) { @@ -442,7 +442,7 @@ EXPORT_IF_KUNIT(__extract_blob_lut); * Returns: * DRM LUT or NULL */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT const struct drm_color_lut32 * __extract_blob_lut32(const struct drm_property_blob *blob, uint32_t *size) { @@ -464,7 +464,7 @@ EXPORT_IF_KUNIT(__extract_blob_lut32); * True if the given lut is a linear mapping of values, i.e. it acts like a * bypass LUT. Otherwise, false. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool __is_lut_linear(const struct drm_color_lut *lut, uint32_t size) { int i; @@ -501,7 +501,7 @@ EXPORT_IF_KUNIT(__is_lut_linear); * * The conversion depends on the size of the lut - whether or not it's leg= acy. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void __drm_lut_to_dc_gamma(const struct drm_color_lut *lut, struct dc_gamma *gamma, bool is_legacy) { @@ -541,7 +541,7 @@ EXPORT_IF_KUNIT(__drm_lut_to_dc_gamma); * * The conversion depends on the size of the lut - whether or not it's leg= acy. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void __drm_lut32_to_dc_gamma(const struct drm_color_lut32 *lut, struct dc_= gamma *gamma) { int i; @@ -561,7 +561,7 @@ EXPORT_IF_KUNIT(__drm_lut32_to_dc_gamma); * * The matrix needs to be a 3x4 (12 entry) matrix. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void __drm_ctm_to_dc_matrix(const struct drm_color_ctm *ctm, struct fixed31_32 *matrix) { @@ -595,7 +595,7 @@ EXPORT_IF_KUNIT(__drm_ctm_to_dc_matrix); * * The matrix needs to be a 3x4 (12 entry) matrix. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void __drm_ctm_3x4_to_dc_matrix(const struct drm_color_ctm_3x4 *ctm, struct fixed31_32 *matrix) { @@ -624,7 +624,7 @@ EXPORT_IF_KUNIT(__drm_ctm_3x4_to_dc_matrix); * Returns: * 0 in case of success, -ENOMEM if fails */ -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int __set_legacy_tf(struct dc_transfer_func *func, const struct drm_color_lut *lut, uint32_t lut_size, bool has_rom) @@ -664,7 +664,7 @@ EXPORT_IF_KUNIT(__set_legacy_tf); * Returns: * 0 in case of success. -ENOMEM if fails. */ -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int __set_output_tf(struct dc_transfer_func *func, const struct drm_color_lut *lut, uint32_t lut_size, bool has_rom) @@ -724,7 +724,7 @@ EXPORT_IF_KUNIT(__set_output_tf); * Returns: * 0 in case of success. -ENOMEM if fails. */ -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int __set_output_tf_32(struct dc_transfer_func *func, const struct drm_color_lut32 *lut, uint32_t lut_size, bool has_rom) @@ -772,14 +772,14 @@ __set_output_tf_32(struct dc_transfer_func *func, } EXPORT_IF_KUNIT(__set_output_tf_32); =20 -STATIC_IFN_KUNIT void __set_tf_bypass(struct dc_transfer_func *tf) +VISIBLE_IF_KUNIT void __set_tf_bypass(struct dc_transfer_func *tf) { tf->type =3D TF_TYPE_BYPASS; tf->tf =3D TRANSFER_FUNCTION_LINEAR; } EXPORT_IF_KUNIT(__set_tf_bypass); =20 -STATIC_IFN_KUNIT void __set_tf_distributed_points(struct dc_transfer_func = *tf, +VISIBLE_IF_KUNIT void __set_tf_distributed_points(struct dc_transfer_func = *tf, enum dc_transfer_func_predefined predefined_tf) { tf->type =3D TF_TYPE_DISTRIBUTED_POINTS; @@ -788,7 +788,7 @@ STATIC_IFN_KUNIT void __set_tf_distributed_points(struc= t dc_transfer_func *tf, } EXPORT_IF_KUNIT(__set_tf_distributed_points); =20 -STATIC_IFN_KUNIT int amdgpu_dm_set_atomic_regamma(struct dc_transfer_func = *out_tf, +VISIBLE_IF_KUNIT int amdgpu_dm_set_atomic_regamma(struct dc_transfer_func = *out_tf, const struct drm_color_lut *regamma_lut, uint32_t regamma_size, bool has_rom, enum dc_transfer_func_predefined tf) @@ -832,7 +832,7 @@ EXPORT_IF_KUNIT(amdgpu_dm_set_atomic_regamma); * Returns: * 0 in case of success. -ENOMEM if fails. */ -STATIC_IFN_KUNIT int __set_input_tf(struct dc_color_caps *caps, +VISIBLE_IF_KUNIT int __set_input_tf(struct dc_color_caps *caps, struct dc_transfer_func *func, const struct drm_color_lut *lut, uint32_t lut_size) { @@ -870,7 +870,7 @@ EXPORT_IF_KUNIT(__set_input_tf); * Returns: * 0 in case of success. -ENOMEM if fails. */ -STATIC_IFN_KUNIT int __set_input_tf_32(struct dc_color_caps *caps, +VISIBLE_IF_KUNIT int __set_input_tf_32(struct dc_color_caps *caps, struct dc_transfer_func *func, const struct drm_color_lut32 *lut, uint32_t lut_size) { @@ -897,7 +897,7 @@ STATIC_IFN_KUNIT int __set_input_tf_32(struct dc_color_= caps *caps, } EXPORT_IF_KUNIT(__set_input_tf_32); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT enum dc_transfer_func_predefined amdgpu_tf_to_dc_tf(enum amdgpu_transfer_function tf) { @@ -928,7 +928,7 @@ amdgpu_tf_to_dc_tf(enum amdgpu_transfer_function tf) } EXPORT_IF_KUNIT(amdgpu_tf_to_dc_tf); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT enum dc_transfer_func_predefined amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_type tf) { @@ -951,7 +951,7 @@ amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_ty= pe tf) } EXPORT_IF_KUNIT(amdgpu_colorop_tf_to_dc_tf); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void __to_dc_lut3d_color(struct dc_rgb *rgb, const struct drm_color_lut lut, int bit_precision) @@ -962,7 +962,7 @@ void __to_dc_lut3d_color(struct dc_rgb *rgb, } EXPORT_IF_KUNIT(__to_dc_lut3d_color); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void __drm_3dlut_to_dc_3dlut(const struct drm_color_lut *lut, uint32_t lut3d_size, struct tetrahedral_params *params, @@ -1008,7 +1008,7 @@ void __drm_3dlut_to_dc_3dlut(const struct drm_color_l= ut *lut, } EXPORT_IF_KUNIT(__drm_3dlut_to_dc_3dlut); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void __to_dc_lut3d_32_color(struct dc_rgb *rgb, const struct drm_color_lut32 lut, int bit_precision) @@ -1019,7 +1019,7 @@ void __to_dc_lut3d_32_color(struct dc_rgb *rgb, } EXPORT_IF_KUNIT(__to_dc_lut3d_32_color); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void __drm_3dlut32_to_dc_3dlut(const struct drm_color_lut32 *lut, uint32_t lut3d_size, struct tetrahedral_params *params, @@ -1073,7 +1073,7 @@ EXPORT_IF_KUNIT(__drm_3dlut32_to_dc_3dlut); * Map user 3D LUT data to DC 3D LUT and all necessary bits to program it * on DCN accordingly. */ -STATIC_IFN_KUNIT void amdgpu_dm_atomic_lut3d(const struct drm_color_lut *d= rm_lut3d, +VISIBLE_IF_KUNIT void amdgpu_dm_atomic_lut3d(const struct drm_color_lut *d= rm_lut3d, uint32_t drm_lut3d_size, struct dc_plane_cm *cm) { @@ -1095,7 +1095,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_atomic_lut3d(const st= ruct drm_color_lut *drm_lut } EXPORT_IF_KUNIT(amdgpu_dm_atomic_lut3d); =20 -STATIC_IFN_KUNIT int amdgpu_dm_atomic_shaper_lut(const struct drm_color_lu= t *shaper_lut, +VISIBLE_IF_KUNIT int amdgpu_dm_atomic_shaper_lut(const struct drm_color_lu= t *shaper_lut, bool has_rom, enum dc_transfer_func_predefined tf, uint32_t shaper_size, @@ -1121,7 +1121,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_atomic_shaper_lut(cons= t struct drm_color_lut *sha } EXPORT_IF_KUNIT(amdgpu_dm_atomic_shaper_lut); =20 -STATIC_IFN_KUNIT int amdgpu_dm_atomic_blend_lut(const struct drm_color_lut= *blend_lut, +VISIBLE_IF_KUNIT int amdgpu_dm_atomic_blend_lut(const struct drm_color_lut= *blend_lut, bool has_rom, enum dc_transfer_func_predefined tf, uint32_t blend_size, @@ -1544,7 +1544,7 @@ __set_dm_plane_degamma(struct drm_plane_state *plane_= state, return 0; } =20 -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int __set_colorop_in_tf_1d_curve(struct dc_plane_state *dc_plane_state, struct drm_colorop_state *colorop_state) { @@ -1572,7 +1572,7 @@ __set_colorop_in_tf_1d_curve(struct dc_plane_state *d= c_plane_state, } EXPORT_IF_KUNIT(__set_colorop_in_tf_1d_curve); =20 -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state, struct drm_colorop *colorop) @@ -1600,7 +1600,7 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state= *plane_state, } EXPORT_IF_KUNIT(__set_dm_plane_colorop_degamma); =20 -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int __set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state, struct drm_colorop *colorop) @@ -1642,7 +1642,7 @@ __set_dm_plane_colorop_3x4_matrix(struct drm_plane_st= ate *plane_state, } EXPORT_IF_KUNIT(__set_dm_plane_colorop_3x4_matrix); =20 -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int __set_dm_plane_colorop_multiplier(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state, struct drm_colorop *colorop) @@ -1764,7 +1764,7 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state = *plane_state, * Returns: * 0 on success. -EINVAL if drm_lut3d_size is zero. */ -STATIC_IFN_KUNIT int __set_colorop_3dlut(const struct drm_color_lut32 *drm= _lut3d, +VISIBLE_IF_KUNIT int __set_colorop_3dlut(const struct drm_color_lut32 *drm= _lut3d, uint32_t drm_lut3d_size, struct dc_3dlut *lut) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/dr= ivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index fae9007b9998..ea326f5b0941 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -63,7 +63,7 @@ static const struct drm_colorop_funcs dm_colorop_funcs = =3D { .destroy =3D drm_colorop_destroy, }; =20 -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int amdgpu_dm_build_default_pipeline(struct drm_device *dev, struct drm_plane = *plane, bool hw_3d_lut, struct drm_prop_enum_list *list) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_connector.c b/= drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_connector.c index c8a1ab8c3b16..fe310b6d9f60 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_connector.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_connector.c @@ -90,12 +90,12 @@ static const struct drm_encoder_funcs amdgpu_dm_encoder= _funcs =3D { .destroy =3D amdgpu_dm_encoder_destroy, }; =20 -STATIC_IFN_KUNIT void dm_encoder_helper_disable(struct drm_encoder *encode= r) +VISIBLE_IF_KUNIT void dm_encoder_helper_disable(struct drm_encoder *encode= r) { } EXPORT_IF_KUNIT(dm_encoder_helper_disable); =20 -STATIC_IFN_KUNIT int dm_encoder_helper_atomic_check(struct drm_encoder *en= coder, +VISIBLE_IF_KUNIT int dm_encoder_helper_atomic_check(struct drm_encoder *en= coder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) { @@ -216,7 +216,7 @@ int amdgpu_dm_encoder_init(struct drm_device *dev, return res; } =20 -STATIC_IFN_KUNIT enum drm_mode_subconnector get_subconnector_type(struct d= c_link *link) +VISIBLE_IF_KUNIT enum drm_mode_subconnector get_subconnector_type(struct d= c_link *link) { switch (link->dpcd_caps.dongle_type) { case DISPLAY_DONGLE_NONE: @@ -236,7 +236,7 @@ STATIC_IFN_KUNIT enum drm_mode_subconnector get_subconn= ector_type(struct dc_link } EXPORT_IF_KUNIT(get_subconnector_type); =20 -STATIC_IFN_KUNIT void update_subconnector_property(struct amdgpu_dm_connec= tor *aconnector) +VISIBLE_IF_KUNIT void update_subconnector_property(struct amdgpu_dm_connec= tor *aconnector) { struct dc_link *link =3D aconnector->dc_link; struct drm_connector *connector =3D &aconnector->base; @@ -256,7 +256,7 @@ EXPORT_IF_KUNIT(update_subconnector_property); =20 static int amdgpu_dm_connector_get_modes(struct drm_connector *connector); =20 -STATIC_IFN_KUNIT void amdgpu_dm_fbc_init(struct drm_connector *connector) +VISIBLE_IF_KUNIT void amdgpu_dm_fbc_init(struct drm_connector *connector) { struct amdgpu_device *adev =3D drm_to_adev(connector->dev); struct dm_compressor_info *compressor =3D &adev->dm.compressor; @@ -334,7 +334,7 @@ int amdgpu_dm_detect_mst_link_for_all_connectors(struct= drm_device *dev) } EXPORT_IF_KUNIT(amdgpu_dm_detect_mst_link_for_all_connectors); =20 -STATIC_IFN_KUNIT void hdmi_cec_unset_edid(struct amdgpu_dm_connector *acon= nector) +VISIBLE_IF_KUNIT void hdmi_cec_unset_edid(struct amdgpu_dm_connector *acon= nector) { struct cec_notifier *n =3D aconnector->notifier; =20 @@ -400,7 +400,7 @@ amdgpu_dm_find_first_crtc_matching_connector(struct drm= _atomic_commit *state, } EXPORT_IF_KUNIT(amdgpu_dm_find_first_crtc_matching_connector); =20 -STATIC_IFN_KUNIT void amdgpu_dm_set_panel_type(struct amdgpu_dm_connector = *aconnector) +VISIBLE_IF_KUNIT void amdgpu_dm_set_panel_type(struct amdgpu_dm_connector = *aconnector) { struct drm_connector *connector =3D &aconnector->base; struct drm_display_info *display_info =3D &connector->display_info; @@ -469,7 +469,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_set_panel_type(struct a= mdgpu_dm_connector *aconn } EXPORT_IF_KUNIT(amdgpu_dm_set_panel_type); =20 -STATIC_IFN_KUNIT void amdgpu_dm_update_cacp_caps(struct amdgpu_dm_connecto= r *aconnector) +VISIBLE_IF_KUNIT void amdgpu_dm_update_cacp_caps(struct amdgpu_dm_connecto= r *aconnector) { struct amdgpu_device *adev =3D drm_to_adev(aconnector->base.dev); struct dc_link *link =3D aconnector->dc_link; @@ -724,7 +724,7 @@ amdgpu_dm_convert_color_depth_from_display_info(const s= truct drm_connector *conn } EXPORT_IF_KUNIT(amdgpu_dm_convert_color_depth_from_display_info); =20 -STATIC_IFN_KUNIT enum dc_aspect_ratio +VISIBLE_IF_KUNIT enum dc_aspect_ratio get_aspect_ratio(const struct drm_display_mode *mode_in) { /* 1-1 mapping, since both enums follow the HDMI spec. */ @@ -792,7 +792,7 @@ amdgpu_dm_get_output_color_space(const struct dc_crtc_t= iming *dc_crtc_timing, } EXPORT_IF_KUNIT(amdgpu_dm_get_output_color_space); =20 -STATIC_IFN_KUNIT enum display_content_type +VISIBLE_IF_KUNIT enum display_content_type get_output_content_type(const struct drm_connector_state *connector_state) { switch (connector_state->content_type) { @@ -811,7 +811,7 @@ get_output_content_type(const struct drm_connector_stat= e *connector_state) } EXPORT_IF_KUNIT(get_output_content_type); =20 -STATIC_IFN_KUNIT bool adjust_colour_depth_from_display_info( +VISIBLE_IF_KUNIT bool adjust_colour_depth_from_display_info( struct dc_crtc_timing *timing_out, const struct drm_display_info *info) { @@ -849,7 +849,7 @@ STATIC_IFN_KUNIT bool adjust_colour_depth_from_display_= info( } EXPORT_IF_KUNIT(adjust_colour_depth_from_display_info); =20 -STATIC_IFN_KUNIT void fill_stream_properties_from_drm_display_mode( +VISIBLE_IF_KUNIT void fill_stream_properties_from_drm_display_mode( struct dc_stream_state *stream, const struct drm_display_mode *mode_in, const struct drm_connector *connector, @@ -964,7 +964,7 @@ STATIC_IFN_KUNIT void fill_stream_properties_from_drm_d= isplay_mode( } EXPORT_IF_KUNIT(fill_stream_properties_from_drm_display_mode); =20 -STATIC_IFN_KUNIT void +VISIBLE_IF_KUNIT void copy_crtc_timing_for_drm_display_mode(const struct drm_display_mode *src_m= ode, struct drm_display_mode *dst_mode) { @@ -985,7 +985,7 @@ copy_crtc_timing_for_drm_display_mode(const struct drm_= display_mode *src_mode, } EXPORT_IF_KUNIT(copy_crtc_timing_for_drm_display_mode); =20 -STATIC_IFN_KUNIT void +VISIBLE_IF_KUNIT void decide_crtc_timing_for_drm_display_mode(struct drm_display_mode *drm_mode, const struct drm_display_mode *native_mode, bool scale_enabled) @@ -1419,7 +1419,7 @@ void amdgpu_dm_update_stream_scaling_settings(struct = drm_device *dev, } EXPORT_IF_KUNIT(amdgpu_dm_update_stream_scaling_settings); =20 -STATIC_IFN_KUNIT struct dc_stream_state * +VISIBLE_IF_KUNIT struct dc_stream_state * create_stream_for_sink(struct drm_connector *connector, const struct drm_display_mode *drm_mode, const struct dm_connector_state *dm_state, @@ -1621,7 +1621,7 @@ EXPORT_IF_KUNIT(create_stream_for_sink); * * Return: The probed connector status (connected/disconnected/unknown). */ -STATIC_IFN_KUNIT enum drm_connector_status +VISIBLE_IF_KUNIT enum drm_connector_status amdgpu_dm_connector_poll(struct amdgpu_dm_connector *aconnector, bool forc= e) { struct drm_connector *connector =3D &aconnector->base; @@ -1730,7 +1730,7 @@ static bool amdgpu_dm_hide_secondary_tile_from_usersp= ace(struct drm_connector *c * Return: The connector status (connected, disconnected, or unknown). * */ -STATIC_IFN_KUNIT enum drm_connector_status +VISIBLE_IF_KUNIT enum drm_connector_status amdgpu_dm_connector_detect(struct drm_connector *connector, bool force) { struct amdgpu_dm_connector *aconnector =3D to_amdgpu_dm_connector(connect= or); @@ -1876,7 +1876,7 @@ int amdgpu_dm_connector_atomic_get_property(struct dr= m_connector *connector, } EXPORT_IF_KUNIT(amdgpu_dm_connector_atomic_get_property); =20 -STATIC_IFN_KUNIT void amdgpu_dm_connector_unregister(struct drm_connector = *connector) +VISIBLE_IF_KUNIT void amdgpu_dm_connector_unregister(struct drm_connector = *connector) { struct amdgpu_dm_connector *amdgpu_dm_connector =3D to_amdgpu_dm_connecto= r(connector); =20 @@ -1888,7 +1888,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_connector_unregister(= struct drm_connector *conne } EXPORT_IF_KUNIT(amdgpu_dm_connector_unregister); =20 -STATIC_IFN_KUNIT void amdgpu_dm_connector_destroy(struct drm_connector *co= nnector) +VISIBLE_IF_KUNIT void amdgpu_dm_connector_destroy(struct drm_connector *co= nnector) { struct amdgpu_dm_connector *aconnector =3D to_amdgpu_dm_connector(connect= or); struct amdgpu_device *adev =3D drm_to_adev(connector->dev); @@ -1991,7 +1991,7 @@ amdgpu_dm_connector_atomic_duplicate_state(struct drm= _connector *connector) } EXPORT_IF_KUNIT(amdgpu_dm_connector_atomic_duplicate_state); =20 -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int amdgpu_dm_connector_late_register(struct drm_connector *connector) { struct amdgpu_dm_connector *amdgpu_dm_connector =3D @@ -2023,7 +2023,7 @@ amdgpu_dm_connector_late_register(struct drm_connecto= r *connector) } EXPORT_IF_KUNIT(amdgpu_dm_connector_late_register); =20 -STATIC_IFN_KUNIT void amdgpu_dm_connector_funcs_force(struct drm_connector= *connector) +VISIBLE_IF_KUNIT void amdgpu_dm_connector_funcs_force(struct drm_connector= *connector) { struct amdgpu_dm_connector *aconnector =3D to_amdgpu_dm_connector(connect= or); struct dc_link *dc_link =3D aconnector->dc_link; @@ -2080,7 +2080,7 @@ static int get_modes(struct drm_connector *connector) return amdgpu_dm_connector_get_modes(connector); } =20 -STATIC_IFN_KUNIT void create_eml_sink(struct amdgpu_dm_connector *aconnect= or) +VISIBLE_IF_KUNIT void create_eml_sink(struct amdgpu_dm_connector *aconnect= or) { struct drm_connector *connector =3D &aconnector->base; struct dc_link *dc_link =3D aconnector->dc_link; @@ -2127,7 +2127,7 @@ STATIC_IFN_KUNIT void create_eml_sink(struct amdgpu_d= m_connector *aconnector) } EXPORT_IF_KUNIT(create_eml_sink); =20 -STATIC_IFN_KUNIT void handle_edid_mgmt(struct amdgpu_dm_connector *aconnec= tor) +VISIBLE_IF_KUNIT void handle_edid_mgmt(struct amdgpu_dm_connector *aconnec= tor) { struct dc_link *link =3D (struct dc_link *)aconnector->dc_link; =20 @@ -2144,7 +2144,7 @@ STATIC_IFN_KUNIT void handle_edid_mgmt(struct amdgpu_= dm_connector *aconnector) } EXPORT_IF_KUNIT(handle_edid_mgmt); =20 -STATIC_IFN_KUNIT enum dc_status dm_validate_stream_and_context(struct dc *= dc, +VISIBLE_IF_KUNIT enum dc_status dm_validate_stream_and_context(struct dc *= dc, struct dc_stream_state *stream) { enum dc_status dc_result =3D DC_ERROR_UNEXPECTED; @@ -2688,7 +2688,7 @@ int amdgpu_dm_convert_dc_color_depth_into_bpc(enum dc= _color_depth display_color_ } EXPORT_IF_KUNIT(amdgpu_dm_convert_dc_color_depth_into_bpc); =20 -STATIC_IFN_KUNIT int to_drm_connector_type(enum signal_type st, uint32_t c= onnector_id) +VISIBLE_IF_KUNIT int to_drm_connector_type(enum signal_type st, uint32_t c= onnector_id) { switch (st) { case SIGNAL_TYPE_HDMI_TYPE_A: @@ -2724,7 +2724,7 @@ STATIC_IFN_KUNIT int to_drm_connector_type(enum signa= l_type st, uint32_t connect } EXPORT_IF_KUNIT(to_drm_connector_type); =20 -STATIC_IFN_KUNIT struct drm_encoder *amdgpu_dm_connector_to_encoder(struct= drm_connector *connector) +VISIBLE_IF_KUNIT struct drm_encoder *amdgpu_dm_connector_to_encoder(struct= drm_connector *connector) { struct drm_encoder *encoder; =20 @@ -2736,7 +2736,7 @@ STATIC_IFN_KUNIT struct drm_encoder *amdgpu_dm_connec= tor_to_encoder(struct drm_c } EXPORT_IF_KUNIT(amdgpu_dm_connector_to_encoder); =20 -STATIC_IFN_KUNIT void amdgpu_dm_get_native_mode(struct drm_connector *conn= ector) +VISIBLE_IF_KUNIT void amdgpu_dm_get_native_mode(struct drm_connector *conn= ector) { struct drm_encoder *encoder; struct amdgpu_encoder *amdgpu_encoder; @@ -2766,7 +2766,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_get_native_mode(struc= t drm_connector *connector) } EXPORT_IF_KUNIT(amdgpu_dm_get_native_mode); =20 -STATIC_IFN_KUNIT struct drm_display_mode * +VISIBLE_IF_KUNIT struct drm_display_mode * amdgpu_dm_create_common_mode(struct drm_encoder *encoder, const char *name, int hdisplay, int vdisplay) @@ -2809,7 +2809,7 @@ static const struct amdgpu_dm_mode_size { {"1920x1200", 1920, 1200} }; =20 -STATIC_IFN_KUNIT void amdgpu_dm_connector_add_common_modes(struct drm_enco= der *encoder, +VISIBLE_IF_KUNIT void amdgpu_dm_connector_add_common_modes(struct drm_enco= der *encoder, struct drm_connector *connector) { struct amdgpu_encoder *amdgpu_encoder =3D to_amdgpu_encoder(encoder); @@ -2930,7 +2930,7 @@ static void amdgpu_dm_prune_primary_tile_modes(struct= drm_connector *connector) } } =20 -STATIC_IFN_KUNIT void amdgpu_dm_connector_ddc_get_modes(struct drm_connect= or *connector, +VISIBLE_IF_KUNIT void amdgpu_dm_connector_ddc_get_modes(struct drm_connect= or *connector, const struct drm_edid *drm_edid) { struct amdgpu_dm_connector *amdgpu_dm_connector =3D @@ -2966,7 +2966,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_connector_ddc_get_mod= es(struct drm_connector *co } EXPORT_IF_KUNIT(amdgpu_dm_connector_ddc_get_modes); =20 -STATIC_IFN_KUNIT bool is_duplicate_mode(struct amdgpu_dm_connector *aconne= ctor, +VISIBLE_IF_KUNIT bool is_duplicate_mode(struct amdgpu_dm_connector *aconne= ctor, struct drm_display_mode *mode) { struct drm_display_mode *m; @@ -2980,7 +2980,7 @@ STATIC_IFN_KUNIT bool is_duplicate_mode(struct amdgpu= _dm_connector *aconnector, } EXPORT_IF_KUNIT(is_duplicate_mode); =20 -STATIC_IFN_KUNIT uint add_fs_modes(struct amdgpu_dm_connector *aconnector) +VISIBLE_IF_KUNIT uint add_fs_modes(struct amdgpu_dm_connector *aconnector) { const struct drm_display_mode *m; struct drm_display_mode *new_mode; @@ -3057,7 +3057,7 @@ STATIC_IFN_KUNIT uint add_fs_modes(struct amdgpu_dm_c= onnector *aconnector) } EXPORT_IF_KUNIT(add_fs_modes); =20 -STATIC_IFN_KUNIT void amdgpu_dm_connector_add_freesync_modes(struct drm_co= nnector *connector, +VISIBLE_IF_KUNIT void amdgpu_dm_connector_add_freesync_modes(struct drm_co= nnector *connector, const struct drm_edid *drm_edid) { struct amdgpu_dm_connector *amdgpu_dm_connector =3D @@ -3313,7 +3313,7 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_di= splay_manager *dm, } } =20 -STATIC_IFN_KUNIT int amdgpu_dm_i2c_xfer(struct i2c_adapter *i2c_adap, +VISIBLE_IF_KUNIT int amdgpu_dm_i2c_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) { struct amdgpu_i2c_adapter *i2c =3D i2c_get_adapdata(i2c_adap); @@ -3359,7 +3359,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_i2c_xfer(struct i2c_ad= apter *i2c_adap, } EXPORT_IF_KUNIT(amdgpu_dm_i2c_xfer); =20 -STATIC_IFN_KUNIT u32 amdgpu_dm_i2c_func(struct i2c_adapter *adap) +VISIBLE_IF_KUNIT u32 amdgpu_dm_i2c_func(struct i2c_adapter *adap) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; } @@ -3724,7 +3724,7 @@ static bool parse_edid_cea(struct amdgpu_dm_connector= *aconnector, return ret; } =20 -STATIC_IFN_KUNIT void parse_edid_displayid_vrr(struct drm_connector *conne= ctor, +VISIBLE_IF_KUNIT void parse_edid_displayid_vrr(struct drm_connector *conne= ctor, const struct edid *edid) { u8 *edid_ext =3D NULL; @@ -3768,7 +3768,7 @@ STATIC_IFN_KUNIT void parse_edid_displayid_vrr(struct= drm_connector *connector, } EXPORT_IF_KUNIT(parse_edid_displayid_vrr); =20 -STATIC_IFN_KUNIT int get_amd_vsdb(struct amdgpu_dm_connector *aconnector, +VISIBLE_IF_KUNIT int get_amd_vsdb(struct amdgpu_dm_connector *aconnector, struct amdgpu_hdmi_vsdb_info *vsdb_info) { struct drm_connector *connector =3D &aconnector->base; @@ -3780,7 +3780,7 @@ STATIC_IFN_KUNIT int get_amd_vsdb(struct amdgpu_dm_co= nnector *aconnector, } EXPORT_IF_KUNIT(get_amd_vsdb); =20 -STATIC_IFN_KUNIT int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconn= ector, +VISIBLE_IF_KUNIT int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconn= ector, const struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c b/driver= s/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c index db546dd44b91..c58cbf00543f 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c @@ -44,7 +44,7 @@ static const char *const pipe_crc_sources[] =3D { "auto", }; =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT enum amdgpu_dm_pipe_crc_source dm_parse_crc_source(const char *source) { if (!source || !strcmp(source, "none")) @@ -62,7 +62,7 @@ enum amdgpu_dm_pipe_crc_source dm_parse_crc_source(const = char *source) } EXPORT_IF_KUNIT(dm_parse_crc_source); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool dm_is_crc_source_crtc(enum amdgpu_dm_pipe_crc_source src) { return (src =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_CRTC) || @@ -70,7 +70,7 @@ bool dm_is_crc_source_crtc(enum amdgpu_dm_pipe_crc_source= src) } EXPORT_IF_KUNIT(dm_is_crc_source_crtc); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool dm_is_crc_source_dprx(enum amdgpu_dm_pipe_crc_source src) { return (src =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_DPRX) || @@ -78,7 +78,7 @@ bool dm_is_crc_source_dprx(enum amdgpu_dm_pipe_crc_source= src) } EXPORT_IF_KUNIT(dm_is_crc_source_dprx); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool dm_need_crc_dither(enum amdgpu_dm_pipe_crc_source src) { return (src =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER) || @@ -97,7 +97,7 @@ EXPORT_IF_KUNIT(dm_need_crc_dither); * * Return: true if the DP AUX handle is needed, false otherwise. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool dm_need_dp_aux(enum amdgpu_dm_pipe_crc_source source, enum amdgpu_dm_pipe_crc_source cur_crc_src) { @@ -116,7 +116,7 @@ EXPORT_IF_KUNIT(dm_need_dp_aux); * * Return: true if drm_dp_start_crc() should be called, false otherwise. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool dm_crc_source_should_start_dprx(enum amdgpu_dm_pipe_crc_source source, enum amdgpu_dm_pipe_crc_source cur_crc_src) { @@ -136,7 +136,7 @@ EXPORT_IF_KUNIT(dm_crc_source_should_start_dprx); * * Return: true if drm_dp_stop_crc() should be called, false otherwise. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool dm_crc_source_should_stop_dprx(enum amdgpu_dm_pipe_crc_source source, enum amdgpu_dm_pipe_crc_source cur_crc_src) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drive= rs/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c index 62eac6e65334..790296cec5d6 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c @@ -169,7 +169,7 @@ bool amdgpu_dm_is_headless(struct amdgpu_device *adev) } EXPORT_IF_KUNIT(amdgpu_dm_is_headless); =20 -STATIC_IFN_KUNIT void amdgpu_dm_idle_worker(struct work_struct *work) +VISIBLE_IF_KUNIT void amdgpu_dm_idle_worker(struct work_struct *work) { struct idle_workqueue *idle_work; =20 @@ -222,7 +222,7 @@ struct idle_workqueue *idle_create_workqueue(struct amd= gpu_device *adev) } EXPORT_IF_KUNIT(idle_create_workqueue); =20 -STATIC_IFN_KUNIT void amdgpu_dm_crtc_vblank_control_worker(struct work_str= uct *work) +VISIBLE_IF_KUNIT void amdgpu_dm_crtc_vblank_control_worker(struct work_str= uct *work) { struct vblank_control_work *vblank_work =3D container_of(work, struct vblank_control_work, work); @@ -409,7 +409,7 @@ void amdgpu_dm_crtc_disable_vblank(struct drm_crtc *crt= c) } EXPORT_IF_KUNIT(amdgpu_dm_crtc_disable_vblank); =20 -STATIC_IFN_KUNIT void amdgpu_dm_crtc_destroy_state(struct drm_crtc *crtc, +VISIBLE_IF_KUNIT void amdgpu_dm_crtc_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *state) { struct dm_crtc_state *cur =3D to_dm_crtc_state(state); @@ -426,7 +426,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_crtc_destroy_state(stru= ct drm_crtc *crtc, } EXPORT_IF_KUNIT(amdgpu_dm_crtc_destroy_state); =20 -STATIC_IFN_KUNIT struct drm_crtc_state *amdgpu_dm_crtc_duplicate_state(str= uct drm_crtc *crtc) +VISIBLE_IF_KUNIT struct drm_crtc_state *amdgpu_dm_crtc_duplicate_state(str= uct drm_crtc *crtc) { struct dm_crtc_state *state, *cur; =20 @@ -475,7 +475,7 @@ static void amdgpu_dm_crtc_destroy(struct drm_crtc *crt= c) kfree(crtc); } =20 -STATIC_IFN_KUNIT void amdgpu_dm_crtc_reset_state(struct drm_crtc *crtc) +VISIBLE_IF_KUNIT void amdgpu_dm_crtc_reset_state(struct drm_crtc *crtc) { struct dm_crtc_state *state; =20 @@ -591,7 +591,7 @@ static void amdgpu_dm_crtc_helper_disable(struct drm_cr= tc *crtc) { } =20 -STATIC_IFN_KUNIT int amdgpu_dm_crtc_count_crtc_active_planes(struct drm_cr= tc_state *new_crtc_state) +VISIBLE_IF_KUNIT int amdgpu_dm_crtc_count_crtc_active_planes(struct drm_cr= tc_state *new_crtc_state) { struct drm_atomic_commit *state =3D new_crtc_state->state; struct drm_plane *plane; @@ -624,7 +624,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_crtc_count_crtc_active_p= lanes(struct drm_crtc_sta } EXPORT_IF_KUNIT(amdgpu_dm_crtc_count_crtc_active_planes); =20 -STATIC_IFN_KUNIT void amdgpu_dm_crtc_update_crtc_active_planes(struct drm_= crtc *crtc, +VISIBLE_IF_KUNIT void amdgpu_dm_crtc_update_crtc_active_planes(struct drm_= crtc *crtc, struct drm_crtc_state *new_crtc_state) { struct dm_crtc_state *dm_new_crtc_state =3D @@ -640,7 +640,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_crtc_update_crtc_active= _planes(struct drm_crtc * } EXPORT_IF_KUNIT(amdgpu_dm_crtc_update_crtc_active_planes); =20 -STATIC_IFN_KUNIT bool amdgpu_dm_crtc_helper_mode_fixup(struct drm_crtc *cr= tc, +VISIBLE_IF_KUNIT bool amdgpu_dm_crtc_helper_mode_fixup(struct drm_crtc *cr= tc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c b/dri= vers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c index d565433ea06d..d6c33c107e11 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c @@ -173,7 +173,7 @@ bool amdgpu_dm_should_update_native_cursor(struct drm_a= tomic_commit *state, } EXPORT_IF_KUNIT(amdgpu_dm_should_update_native_cursor); =20 -STATIC_IFN_KUNIT void dm_get_oriented_plane_size(struct drm_plane_state *p= lane_state, +VISIBLE_IF_KUNIT void dm_get_oriented_plane_size(struct drm_plane_state *p= lane_state, int *src_w, int *src_h) { switch (plane_state->rotation & DRM_MODE_ROTATE_MASK) { @@ -192,7 +192,7 @@ STATIC_IFN_KUNIT void dm_get_oriented_plane_size(struct= drm_plane_state *plane_s } EXPORT_IF_KUNIT(dm_get_oriented_plane_size); =20 -STATIC_IFN_KUNIT void +VISIBLE_IF_KUNIT void dm_get_plane_scale(struct drm_plane_state *plane_state, int *out_plane_scale_w, int *out_plane_scale_h) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c b/drive= rs/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c index 9ff25bc8ee5a..ecf1faca4d4b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c @@ -386,7 +386,7 @@ dm_dmub_send_vbios_gpint_command(struct amdgpu_device *= adev, return DMUB_STATUS_TIMEOUT; } =20 -STATIC_IFN_KUNIT void *dm_dmub_get_vbios_bounding_box(struct amdgpu_device= *adev) +VISIBLE_IF_KUNIT void *dm_dmub_get_vbios_bounding_box(struct amdgpu_device= *adev) { void *bb; long long addr; @@ -842,7 +842,7 @@ int amdgpu_dm_process_dmub_aux_transfer_sync( } EXPORT_IF_KUNIT(amdgpu_dm_process_dmub_aux_transfer_sync); =20 -STATIC_IFN_KUNIT void abort_fused_io( +VISIBLE_IF_KUNIT void abort_fused_io( struct dc_context *ctx, const struct dmub_cmd_fused_request *request ) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c b/drive= rs/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c index 47cbc826ed45..20c1ce8cda44 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c @@ -38,7 +38,8 @@ */ #define PSP_SRM_VERSION_MAX 0xFFFF =20 -STATIC_IFN_KUNIT bool lp_write_i2c(void *handle, uint32_t address, const u= int8_t *data, uint32_t size) +VISIBLE_IF_KUNIT +bool lp_write_i2c(void *handle, uint32_t address, const uint8_t *data, uin= t32_t size) { struct dc_link *link =3D handle; struct i2c_payload i2c_payloads[] =3D {{true, address, size, (void *)data= } }; @@ -49,7 +50,8 @@ STATIC_IFN_KUNIT bool lp_write_i2c(void *handle, uint32_t= address, const uint8_t } EXPORT_IF_KUNIT(lp_write_i2c); =20 -STATIC_IFN_KUNIT bool lp_read_i2c(void *handle, uint32_t address, uint8_t = offset, uint8_t *data, uint32_t size) +VISIBLE_IF_KUNIT +bool lp_read_i2c(void *handle, uint32_t address, uint8_t offset, uint8_t *= data, uint32_t size) { struct dc_link *link =3D handle; =20 @@ -62,7 +64,8 @@ STATIC_IFN_KUNIT bool lp_read_i2c(void *handle, uint32_t = address, uint8_t offset } EXPORT_IF_KUNIT(lp_read_i2c); =20 -STATIC_IFN_KUNIT bool lp_write_dpcd(void *handle, uint32_t address, const = uint8_t *data, uint32_t size) +VISIBLE_IF_KUNIT +bool lp_write_dpcd(void *handle, uint32_t address, const uint8_t *data, ui= nt32_t size) { struct dc_link *link =3D handle; =20 @@ -70,7 +73,7 @@ STATIC_IFN_KUNIT bool lp_write_dpcd(void *handle, uint32_= t address, const uint8_ } EXPORT_IF_KUNIT(lp_write_dpcd); =20 -STATIC_IFN_KUNIT bool lp_read_dpcd(void *handle, uint32_t address, uint8_t= *data, uint32_t size) +VISIBLE_IF_KUNIT bool lp_read_dpcd(void *handle, uint32_t address, uint8_t= *data, uint32_t size) { struct dc_link *link =3D handle; =20 @@ -78,7 +81,7 @@ STATIC_IFN_KUNIT bool lp_read_dpcd(void *handle, uint32_t= address, uint8_t *data } EXPORT_IF_KUNIT(lp_read_dpcd); =20 -STATIC_IFN_KUNIT bool lp_atomic_write_poll_read_i2c( +VISIBLE_IF_KUNIT bool lp_atomic_write_poll_read_i2c( void *handle, const struct mod_hdcp_atomic_op_i2c *write, const struct mod_hdcp_atomic_op_i2c *poll, @@ -93,7 +96,7 @@ STATIC_IFN_KUNIT bool lp_atomic_write_poll_read_i2c( } EXPORT_IF_KUNIT(lp_atomic_write_poll_read_i2c); =20 -STATIC_IFN_KUNIT bool lp_atomic_write_poll_read_aux( +VISIBLE_IF_KUNIT bool lp_atomic_write_poll_read_aux( void *handle, const struct mod_hdcp_atomic_op_aux *write, const struct mod_hdcp_atomic_op_aux *poll, @@ -108,7 +111,7 @@ STATIC_IFN_KUNIT bool lp_atomic_write_poll_read_aux( } EXPORT_IF_KUNIT(lp_atomic_write_poll_read_aux); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT uint8_t *psp_get_srm(struct psp_context *psp, uint32_t *srm_version, uint3= 2_t *srm_size) { struct ta_hdcp_shared_memory *hdcp_cmd; @@ -134,7 +137,7 @@ uint8_t *psp_get_srm(struct psp_context *psp, uint32_t = *srm_version, uint32_t *s } EXPORT_IF_KUNIT(psp_get_srm); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT int psp_set_srm(struct psp_context *psp, u8 *srm, uint32_t srm_size, uint32_t *srm_version) { @@ -164,7 +167,7 @@ int psp_set_srm(struct psp_context *psp, } EXPORT_IF_KUNIT(psp_set_srm); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void process_output(struct hdcp_workqueue *hdcp_work) { struct mod_hdcp_output output =3D hdcp_work->output; @@ -187,7 +190,7 @@ void process_output(struct hdcp_workqueue *hdcp_work) } EXPORT_IF_KUNIT(process_output); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool hdcp_get_content_protection_from_status( unsigned int hdcp_content_type, enum mod_hdcp_encryption_status encryption_status, @@ -214,7 +217,7 @@ bool hdcp_get_content_protection_from_status( } EXPORT_IF_KUNIT(hdcp_get_content_protection_from_status); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void hdcp_get_link_display_adjustments( bool enable_encryption, u8 content_type, @@ -251,7 +254,7 @@ void hdcp_get_link_display_adjustments( } EXPORT_IF_KUNIT(hdcp_get_link_display_adjustments); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void link_lock(struct hdcp_workqueue *work, bool lock) { int i =3D 0; @@ -265,7 +268,7 @@ void link_lock(struct hdcp_workqueue *work, bool lock) } EXPORT_IF_KUNIT(link_lock); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void hdcp_update_display_encryption_control(struct hdcp_workqueue *hdcp_wo= rk, struct hdcp_workqueue *hdcp_w, unsigned int conn_index, @@ -321,7 +324,7 @@ void hdcp_update_display(struct hdcp_workqueue *hdcp_wo= rk, } EXPORT_IF_KUNIT(hdcp_update_display); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void hdcp_remove_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index, struct amdgpu_dm_connector *aconnector) @@ -386,7 +389,7 @@ void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work= , unsigned int link_index } EXPORT_IF_KUNIT(hdcp_handle_cpirq); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void event_callback(struct work_struct *work) { struct hdcp_workqueue *hdcp_work; @@ -405,7 +408,7 @@ void event_callback(struct work_struct *work) } EXPORT_IF_KUNIT(event_callback); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void event_property_update(struct work_struct *work) { struct hdcp_workqueue *hdcp_work =3D container_of(work, struct hdcp_workq= ueue, @@ -467,7 +470,7 @@ void event_property_update(struct work_struct *work) } EXPORT_IF_KUNIT(event_property_update); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void event_property_validate(struct work_struct *work) { struct hdcp_workqueue *hdcp_work =3D @@ -519,7 +522,7 @@ void event_property_validate(struct work_struct *work) } EXPORT_IF_KUNIT(event_property_validate); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void event_watchdog_timer(struct work_struct *work) { struct hdcp_workqueue *hdcp_work; @@ -540,7 +543,7 @@ void event_watchdog_timer(struct work_struct *work) } EXPORT_IF_KUNIT(event_watchdog_timer); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void event_cpirq(struct work_struct *work) { struct hdcp_workqueue *hdcp_work; @@ -572,7 +575,7 @@ void hdcp_destroy(struct kobject *kobj, struct hdcp_wor= kqueue *hdcp_work) } EXPORT_IF_KUNIT(hdcp_destroy); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool enable_assr(void *handle, struct dc_link *link) { struct hdcp_workqueue *hdcp_work =3D handle; @@ -608,7 +611,7 @@ bool enable_assr(void *handle, struct dc_link *link) } EXPORT_IF_KUNIT(enable_assr); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void update_config(void *handle, struct cp_psp_stream_config *config) { struct hdcp_workqueue *hdcp_work =3D handle; @@ -745,7 +748,7 @@ EXPORT_IF_KUNIT(update_config); * -if we try to "1. SET" a newer version and PSP rejects it. That means t= he format is * incorrect/corrupted and we should correct our SRM by getting it from PSP */ -STATIC_IFN_KUNIT ssize_t srm_data_write(struct file *filp, struct kobject = *kobj, +VISIBLE_IF_KUNIT ssize_t srm_data_write(struct file *filp, struct kobject = *kobj, const struct bin_attribute *bin_attr, char *buffer, loff_t pos, size_t count) { @@ -770,7 +773,7 @@ STATIC_IFN_KUNIT ssize_t srm_data_write(struct file *fi= lp, struct kobject *kobj, } EXPORT_IF_KUNIT(srm_data_write); =20 -STATIC_IFN_KUNIT ssize_t srm_data_read(struct file *filp, struct kobject *= kobj, +VISIBLE_IF_KUNIT ssize_t srm_data_read(struct file *filp, struct kobject *= kobj, const struct bin_attribute *bin_attr, char *buffer, loff_t pos, size_t count) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/dr= ivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index d451082552e8..ca5d7ca99f8f 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -89,7 +89,7 @@ union vcp_reply { unsigned char raw[11]; }; =20 -STATIC_IFN_KUNIT u32 edid_extract_panel_id(struct edid *edid) +VISIBLE_IF_KUNIT u32 edid_extract_panel_id(struct edid *edid) { return (u32)edid->mfg_id[0] << 24 | (u32)edid->mfg_id[1] << 16 | @@ -97,7 +97,7 @@ STATIC_IFN_KUNIT u32 edid_extract_panel_id(struct edid *e= did) } EXPORT_IF_KUNIT(edid_extract_panel_id); =20 -STATIC_IFN_KUNIT void apply_edid_quirks(struct dc_link *link, struct edid = *edid, +VISIBLE_IF_KUNIT void apply_edid_quirks(struct dc_link *link, struct edid = *edid, struct dc_edid_caps *edid_caps) { struct amdgpu_dm_connector *aconnector =3D link->priv; @@ -250,7 +250,7 @@ enum dc_edid_status dm_helpers_parse_edid_caps( } EXPORT_IF_KUNIT(dm_helpers_parse_edid_caps); =20 -STATIC_IFN_KUNIT void +VISIBLE_IF_KUNIT void fill_dc_mst_payload_table_from_drm(struct dc_link *link, bool enable, struct drm_dp_mst_atomic_payload *target_payload, @@ -308,7 +308,7 @@ void dm_helpers_dp_update_branch_info( {} EXPORT_IF_KUNIT(dm_helpers_dp_update_branch_info); =20 -STATIC_IFN_KUNIT void dm_helpers_construct_old_payload( +VISIBLE_IF_KUNIT void dm_helpers_construct_old_payload( struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *new_payload, @@ -741,7 +741,7 @@ bool dm_helpers_execute_fused_io( } EXPORT_IF_KUNIT(dm_helpers_execute_fused_io); =20 -STATIC_IFN_KUNIT bool execute_synaptics_rc_command(struct drm_dp_aux *aux, +VISIBLE_IF_KUNIT bool execute_synaptics_rc_command(struct drm_dp_aux *aux, bool is_write_cmd, unsigned char cmd, unsigned int length, @@ -815,7 +815,7 @@ STATIC_IFN_KUNIT bool execute_synaptics_rc_command(stru= ct drm_dp_aux *aux, } EXPORT_IF_KUNIT(execute_synaptics_rc_command); =20 -STATIC_IFN_KUNIT void apply_synaptics_fifo_reset_wa(struct drm_dp_aux *aux) +VISIBLE_IF_KUNIT void apply_synaptics_fifo_reset_wa(struct drm_dp_aux *aux) { unsigned char data[16] =3D {0}; =20 @@ -884,7 +884,7 @@ EXPORT_IF_KUNIT(apply_synaptics_fifo_reset_wa); /* MST Dock */ static const uint8_t SYNAPTICS_DEVICE_ID[] =3D "SYNA"; =20 -STATIC_IFN_KUNIT uint8_t write_dsc_enable_synaptics_non_virtual_dpcd_mst( +VISIBLE_IF_KUNIT uint8_t write_dsc_enable_synaptics_non_virtual_dpcd_mst( struct drm_dp_aux *aux, const struct dc_stream_state *stream, bool enable) @@ -1044,7 +1044,7 @@ bool dm_helpers_is_dp_sink_present(struct dc_link *li= nk) } EXPORT_IF_KUNIT(dm_helpers_is_dp_sink_present); =20 -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int dm_helpers_probe_acpi_edid(void *data, u8 *buf, unsigned int block, size_t= len) { struct drm_connector *connector =3D data; @@ -1084,7 +1084,7 @@ dm_helpers_probe_acpi_edid(void *data, u8 *buf, unsig= ned int block, size_t len) } EXPORT_IF_KUNIT(dm_helpers_probe_acpi_edid); =20 -STATIC_IFN_KUNIT const struct drm_edid * +VISIBLE_IF_KUNIT const struct drm_edid * dm_helpers_read_acpi_edid(struct amdgpu_dm_connector *aconnector) { struct drm_connector *connector =3D &aconnector->base; @@ -1107,7 +1107,7 @@ dm_helpers_read_acpi_edid(struct amdgpu_dm_connector = *aconnector) } EXPORT_IF_KUNIT(dm_helpers_read_acpi_edid); =20 -STATIC_IFN_KUNIT const struct drm_edid * +VISIBLE_IF_KUNIT const struct drm_edid * dm_helpers_read_vbios_hardcoded_edid(struct dc_link *link, struct amdgpu_d= m_connector *aconnector) { struct dc_bios *bios =3D link->ctx->dc_bios; @@ -1147,7 +1147,7 @@ dm_helpers_read_vbios_hardcoded_edid(struct dc_link *= link, struct amdgpu_dm_conn } EXPORT_IF_KUNIT(dm_helpers_read_vbios_hardcoded_edid); =20 -STATIC_IFN_KUNIT uint8_t get_max_frl_rate(uint8_t max_lanes, uint8_t max_r= ate_per_lane) +VISIBLE_IF_KUNIT uint8_t get_max_frl_rate(uint8_t max_lanes, uint8_t max_r= ate_per_lane) { uint8_t max_frl_rate; =20 @@ -1170,7 +1170,7 @@ STATIC_IFN_KUNIT uint8_t get_max_frl_rate(uint8_t max= _lanes, uint8_t max_rate_pe } EXPORT_IF_KUNIT(get_max_frl_rate); =20 -STATIC_IFN_KUNIT uint8_t get_dsc_max_slices(uint8_t max_slices, int clk_pe= r_slice) +VISIBLE_IF_KUNIT uint8_t get_dsc_max_slices(uint8_t max_slices, int clk_pe= r_slice) { uint8_t dsc_max_slices; =20 @@ -1641,7 +1641,7 @@ void dm_helpers_dp_mst_update_branch_bandwidth( } EXPORT_IF_KUNIT(dm_helpers_dp_mst_update_branch_bandwidth); =20 -STATIC_IFN_KUNIT const uint32_t dm_freesync_pcon_whitelist[] =3D { +VISIBLE_IF_KUNIT const uint32_t dm_freesync_pcon_whitelist[] =3D { DP_BRANCH_DEVICE_ID_0060AD, DP_BRANCH_DEVICE_ID_00E04C, DP_BRANCH_DEVICE_ID_90CC24, @@ -1650,13 +1650,13 @@ STATIC_IFN_KUNIT const uint32_t dm_freesync_pcon_wh= itelist[] =3D { }; EXPORT_IF_KUNIT(dm_freesync_pcon_whitelist); =20 -STATIC_IFN_KUNIT uint32_t dm_freesync_pcon_whitelist_count(void) +VISIBLE_IF_KUNIT uint32_t dm_freesync_pcon_whitelist_count(void) { return ARRAY_SIZE(dm_freesync_pcon_whitelist); } EXPORT_IF_KUNIT(dm_freesync_pcon_whitelist_count); =20 -STATIC_IFN_KUNIT bool dm_is_freesync_pcon_whitelist(const uint32_t branch_= dev_id) +VISIBLE_IF_KUNIT bool dm_is_freesync_pcon_whitelist(const uint32_t branch_= dev_id) { u32 i; =20 diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c b/driver= s/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c index d0239a3de2e1..2a551ccf79fa 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c @@ -608,7 +608,7 @@ EXPORT_IF_KUNIT(amdgpu_dm_irq_resume_late); * amdgpu_dm_irq_schedule_work - schedule all work items registered for the * "irq_source". */ -STATIC_IFN_KUNIT void amdgpu_dm_irq_schedule_work(struct amdgpu_device *ad= ev, +VISIBLE_IF_KUNIT void amdgpu_dm_irq_schedule_work(struct amdgpu_device *ad= ev, enum dc_irq_source irq_source) { struct list_head *handler_list =3D &adev->dm.irq_handler_list_low_tab[ir= q_source]; @@ -669,7 +669,7 @@ EXPORT_IF_KUNIT(amdgpu_dm_irq_schedule_work); * amdgpu_dm_irq_immediate_work * Callback high irq work immediately, don't send to work queue */ -STATIC_IFN_KUNIT void amdgpu_dm_irq_immediate_work(struct amdgpu_device *a= dev, +VISIBLE_IF_KUNIT void amdgpu_dm_irq_immediate_work(struct amdgpu_device *a= dev, enum dc_irq_source irq_source) { struct amdgpu_dm_irq_handler_data *handler_data; @@ -699,7 +699,7 @@ EXPORT_IF_KUNIT(amdgpu_dm_irq_immediate_work); * Calls all registered high irq work immediately, and schedules work for = low * irq. The DM IRQ table is used to find the corresponding handlers. */ -STATIC_IFN_KUNIT int amdgpu_dm_irq_handler(struct amdgpu_device *adev, +VISIBLE_IF_KUNIT int amdgpu_dm_irq_handler(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) { @@ -721,7 +721,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_irq_handler(struct amdgp= u_device *adev, } EXPORT_IF_KUNIT(amdgpu_dm_irq_handler); =20 -STATIC_IFN_KUNIT enum dc_irq_source amdgpu_dm_hpd_to_dal_irq_source(unsign= ed int type) +VISIBLE_IF_KUNIT enum dc_irq_source amdgpu_dm_hpd_to_dal_irq_source(unsign= ed int type) { switch (type) { case AMDGPU_HPD_1: @@ -742,7 +742,7 @@ STATIC_IFN_KUNIT enum dc_irq_source amdgpu_dm_hpd_to_da= l_irq_source(unsigned int } EXPORT_IF_KUNIT(amdgpu_dm_hpd_to_dal_irq_source); =20 -STATIC_IFN_KUNIT int amdgpu_dm_set_hpd_irq_state(struct amdgpu_device *ade= v, +VISIBLE_IF_KUNIT int amdgpu_dm_set_hpd_irq_state(struct amdgpu_device *ade= v, struct amdgpu_irq_src *source, unsigned int type, enum amdgpu_interrupt_state state) @@ -789,7 +789,7 @@ static inline int dm_irq_state(struct amdgpu_device *ad= ev, return 0; } =20 -STATIC_IFN_KUNIT int amdgpu_dm_set_pflip_irq_state(struct amdgpu_device *a= dev, +VISIBLE_IF_KUNIT int amdgpu_dm_set_pflip_irq_state(struct amdgpu_device *a= dev, struct amdgpu_irq_src *source, unsigned int crtc_id, enum amdgpu_interrupt_state state) @@ -804,7 +804,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_set_pflip_irq_state(stru= ct amdgpu_device *adev, } EXPORT_IF_KUNIT(amdgpu_dm_set_pflip_irq_state); =20 -STATIC_IFN_KUNIT int amdgpu_dm_set_crtc_irq_state(struct amdgpu_device *ad= ev, +VISIBLE_IF_KUNIT int amdgpu_dm_set_crtc_irq_state(struct amdgpu_device *ad= ev, struct amdgpu_irq_src *source, unsigned int crtc_id, enum amdgpu_interrupt_state state) @@ -819,7 +819,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_set_crtc_irq_state(struc= t amdgpu_device *adev, } EXPORT_IF_KUNIT(amdgpu_dm_set_crtc_irq_state); =20 -STATIC_IFN_KUNIT int amdgpu_dm_set_vline0_irq_state(struct amdgpu_device *= adev, +VISIBLE_IF_KUNIT int amdgpu_dm_set_vline0_irq_state(struct amdgpu_device *= adev, struct amdgpu_irq_src *source, unsigned int crtc_id, enum amdgpu_interrupt_state state) @@ -834,7 +834,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_set_vline0_irq_state(str= uct amdgpu_device *adev, } EXPORT_IF_KUNIT(amdgpu_dm_set_vline0_irq_state); =20 -STATIC_IFN_KUNIT int amdgpu_dm_set_dmub_outbox_irq_state(struct amdgpu_dev= ice *adev, +VISIBLE_IF_KUNIT int amdgpu_dm_set_dmub_outbox_irq_state(struct amdgpu_dev= ice *adev, struct amdgpu_irq_src *source, unsigned int crtc_id, enum amdgpu_interrupt_state state) @@ -847,7 +847,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_set_dmub_outbox_irq_stat= e(struct amdgpu_device *a } EXPORT_IF_KUNIT(amdgpu_dm_set_dmub_outbox_irq_state); =20 -STATIC_IFN_KUNIT int amdgpu_dm_set_vupdate_irq_state(struct amdgpu_device = *adev, +VISIBLE_IF_KUNIT int amdgpu_dm_set_vupdate_irq_state(struct amdgpu_device = *adev, struct amdgpu_irq_src *source, unsigned int crtc_id, enum amdgpu_interrupt_state state) @@ -862,7 +862,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_set_vupdate_irq_state(st= ruct amdgpu_device *adev, } EXPORT_IF_KUNIT(amdgpu_dm_set_vupdate_irq_state); =20 -STATIC_IFN_KUNIT int amdgpu_dm_set_dmub_trace_irq_state(struct amdgpu_devi= ce *adev, +VISIBLE_IF_KUNIT int amdgpu_dm_set_dmub_trace_irq_state(struct amdgpu_devi= ce *adev, struct amdgpu_irq_src *source, unsigned int type, enum amdgpu_interrupt_state state) @@ -1096,7 +1096,7 @@ static void force_connector_state( mutex_unlock(&aconnector->hpd_lock); } =20 -STATIC_IFN_KUNIT void dm_handle_hpd_rx_offload_work(struct work_struct *wo= rk) +VISIBLE_IF_KUNIT void dm_handle_hpd_rx_offload_work(struct work_struct *wo= rk) { struct hpd_rx_irq_offload_work *offload_work; struct amdgpu_dm_connector *aconnector; @@ -1239,7 +1239,7 @@ void amdgpu_dm_hpd_rx_irq_work_suspend(struct amdgpu_= display_manager *dm) } EXPORT_IF_KUNIT(amdgpu_dm_hpd_rx_irq_work_suspend); =20 -STATIC_IFN_KUNIT bool are_sinks_equal(const struct dc_sink *sink1, const s= truct dc_sink *sink2) +VISIBLE_IF_KUNIT bool are_sinks_equal(const struct dc_sink *sink1, const s= truct dc_sink *sink2) { if (!sink1 || !sink2) return false; @@ -1333,7 +1333,7 @@ void amdgpu_dm_hdmi_hpd_debounce_work(struct work_str= uct *work) } EXPORT_IF_KUNIT(amdgpu_dm_hdmi_hpd_debounce_work); =20 -STATIC_IFN_KUNIT void handle_hpd_irq_helper(struct amdgpu_dm_connector *ac= onnector, +VISIBLE_IF_KUNIT void handle_hpd_irq_helper(struct amdgpu_dm_connector *ac= onnector, enum dc_detect_reason reason) { struct drm_connector *connector =3D &aconnector->base; @@ -1433,7 +1433,7 @@ STATIC_IFN_KUNIT void handle_hpd_irq_helper(struct am= dgpu_dm_connector *aconnect } EXPORT_IF_KUNIT(handle_hpd_irq_helper); =20 -STATIC_IFN_KUNIT void handle_hpd_irq(void *param) +VISIBLE_IF_KUNIT void handle_hpd_irq(void *param) { struct amdgpu_dm_connector *aconnector =3D (struct amdgpu_dm_connector *)= param; =20 @@ -1442,8 +1442,10 @@ STATIC_IFN_KUNIT void handle_hpd_irq(void *param) } EXPORT_IF_KUNIT(handle_hpd_irq); =20 -STATIC_IFN_KUNIT void schedule_hpd_rx_offload_work(struct amdgpu_device *a= dev, struct hpd_rx_irq_offload_work_queue *offload_wq, - union hpd_irq_data hpd_irq_data) +VISIBLE_IF_KUNIT void +schedule_hpd_rx_offload_work(struct amdgpu_device *adev, + struct hpd_rx_irq_offload_work_queue *offload_wq, + union hpd_irq_data hpd_irq_data) { struct hpd_rx_irq_offload_work *offload_work =3D kzalloc_obj(*offload_wor= k); =20 @@ -1462,7 +1464,7 @@ STATIC_IFN_KUNIT void schedule_hpd_rx_offload_work(st= ruct amdgpu_device *adev, s } EXPORT_IF_KUNIT(schedule_hpd_rx_offload_work); =20 -STATIC_IFN_KUNIT void handle_hpd_rx_irq(void *param) +VISIBLE_IF_KUNIT void handle_hpd_rx_irq(void *param) { struct amdgpu_dm_connector *aconnector =3D (struct amdgpu_dm_connector *)= param; struct drm_connector *connector =3D &aconnector->base; @@ -1605,7 +1607,7 @@ EXPORT_IF_KUNIT(handle_hpd_rx_irq); * Dmub Hpd interrupt processing callback. Gets displayindex through the * ink index and calls helper to do the processing. */ -STATIC_IFN_KUNIT void dmub_hpd_callback(struct amdgpu_device *adev, +VISIBLE_IF_KUNIT void dmub_hpd_callback(struct amdgpu_device *adev, struct dmub_notification *notify) { struct amdgpu_dm_connector *aconnector; @@ -1681,7 +1683,7 @@ EXPORT_IF_KUNIT(dmub_hpd_callback); * HPD sense changes can occur during low power states and need to be * notified from firmware to driver. */ -STATIC_IFN_KUNIT void dmub_hpd_sense_callback(struct amdgpu_device *adev, +VISIBLE_IF_KUNIT void dmub_hpd_sense_callback(struct amdgpu_device *adev, struct dmub_notification *notify) { drm_dbg_driver(adev_to_drm(adev), "DMUB HPD SENSE callback.\n"); @@ -1800,7 +1802,7 @@ EXPORT_IF_KUNIT(amdgpu_dm_get_crtc_by_otg_inst); * Handles the pageflip interrupt by notifying all interested parties * that the pageflip has been completed. */ -STATIC_IFN_KUNIT void dm_pflip_high_irq(void *interrupt_params) +VISIBLE_IF_KUNIT void dm_pflip_high_irq(void *interrupt_params) { struct amdgpu_crtc *amdgpu_crtc; struct common_irq_params *irq_params =3D interrupt_params; @@ -1898,7 +1900,7 @@ STATIC_IFN_KUNIT void dm_pflip_high_irq(void *interru= pt_params) } EXPORT_IF_KUNIT(dm_pflip_high_irq); =20 -STATIC_IFN_KUNIT void dm_handle_vmin_vmax_update(struct work_struct *offlo= ad_work) +VISIBLE_IF_KUNIT void dm_handle_vmin_vmax_update(struct work_struct *offlo= ad_work) { struct vupdate_offload_work *work =3D container_of(offload_work, struct v= update_offload_work, work); struct amdgpu_device *adev =3D work->adev; @@ -2074,7 +2076,7 @@ static void dm_crtc_high_irq_handler(struct amdgpu_de= vice *adev, spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); } =20 -STATIC_IFN_KUNIT void dm_vupdate_high_irq(void *interrupt_params) +VISIBLE_IF_KUNIT void dm_vupdate_high_irq(void *interrupt_params) { struct common_irq_params *irq_params =3D interrupt_params; struct amdgpu_device *adev =3D irq_params->adev; @@ -2160,7 +2162,7 @@ EXPORT_IF_KUNIT(dm_vupdate_high_irq); * Used on DCE (VLINE0, set to vblank start). On DCN the equivalent handli= ng is * driven by VUPDATE_NO_LOCK in dm_vupdate_high_irq(). */ -STATIC_IFN_KUNIT void dm_crtc_high_irq(void *interrupt_params) +VISIBLE_IF_KUNIT void dm_crtc_high_irq(void *interrupt_params) { struct common_irq_params *irq_params =3D interrupt_params; struct amdgpu_device *adev =3D irq_params->adev; @@ -2197,7 +2199,7 @@ static void dm_dcn_vertical_interrupt0_high_irq(void = *interrupt_params) } #endif /* CONFIG_DRM_AMD_SECURE_DISPLAY */ =20 -STATIC_IFN_KUNIT void dm_handle_hpd_work(struct work_struct *work) +VISIBLE_IF_KUNIT void dm_handle_hpd_work(struct work_struct *work) { struct dmub_hpd_work *dmub_hpd_wrk; =20 @@ -2219,7 +2221,7 @@ STATIC_IFN_KUNIT void dm_handle_hpd_work(struct work_= struct *work) } EXPORT_IF_KUNIT(dm_handle_hpd_work); =20 -STATIC_IFN_KUNIT const char *dmub_notification_type_str(enum dmub_notifica= tion_type e) +VISIBLE_IF_KUNIT const char *dmub_notification_type_str(enum dmub_notifica= tion_type e) { switch (e) { case DMUB_NOTIFICATION_NO_DATA: @@ -2252,7 +2254,7 @@ EXPORT_IF_KUNIT(dmub_notification_type_str); * Handles the Outbox Interrupt * event handler. */ -STATIC_IFN_KUNIT void dm_dmub_outbox1_low_irq(void *interrupt_params) +VISIBLE_IF_KUNIT void dm_dmub_outbox1_low_irq(void *interrupt_params) { struct dmub_notification notify =3D {0}; struct common_irq_params *irq_params =3D interrupt_params; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c b/driver= s/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c index 4e57572e12b6..b4cedf760f6b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c @@ -44,7 +44,7 @@ * This function defines the idle state management FSM. Invalid transitions * are ignored and will not progress the FSM. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool dm_ism_next_state(enum amdgpu_dm_ism_state current_state, enum amdgpu_dm_ism_event event, enum amdgpu_dm_ism_state *next_state) @@ -130,7 +130,7 @@ bool dm_ism_next_state(enum amdgpu_dm_ism_state current= _state, } EXPORT_IF_KUNIT(dm_ism_next_state); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT uint64_t dm_ism_get_sso_delay(const struct amdgpu_dm_ism *ism, const struct dc_stream_state *stream) { @@ -163,7 +163,7 @@ EXPORT_IF_KUNIT(dm_ism_get_sso_delay); * Calculates the delay before allowing idle optimizations based on recent * idle history and the current stream timing. */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT uint64_t dm_ism_get_idle_allow_delay(const struct amdgpu_dm_ism *ism, const struct dc_stream_state *stream) { @@ -230,7 +230,7 @@ EXPORT_IF_KUNIT(dm_ism_get_idle_allow_delay); * dm_ism_insert_record - Insert a record into the circular history buffer * @ism: ISM instance */ -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void dm_ism_insert_record(struct amdgpu_dm_ism *ism) { struct amdgpu_dm_ism_record *record; @@ -249,7 +249,7 @@ void dm_ism_insert_record(struct amdgpu_dm_ism *ism) EXPORT_IF_KUNIT(dm_ism_insert_record); =20 =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void dm_ism_set_last_idle_ts(struct amdgpu_dm_ism *ism) { ism->last_idle_timestamp_ns =3D ktime_get_ns(); @@ -257,7 +257,7 @@ void dm_ism_set_last_idle_ts(struct amdgpu_dm_ism *ism) EXPORT_IF_KUNIT(dm_ism_set_last_idle_ts); =20 =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool dm_ism_trigger_event(struct amdgpu_dm_ism *ism, enum amdgpu_dm_ism_event event) { @@ -332,7 +332,7 @@ static void dm_ism_commit_idle_optimization_state(struc= t amdgpu_dm_ism *ism, } } =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT enum amdgpu_dm_ism_event dm_ism_dispatch_next_event( enum amdgpu_dm_ism_state current_state, uint64_t delay_ns, diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/= drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index 045a7f88b754..8c996d5aa7b8 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -56,7 +56,7 @@ * Translate a failed AUX transaction's operation result into an errno-sty= le * return value. @result is returned unchanged for AUX_RET_SUCCESS. */ -STATIC_IFN_KUNIT ssize_t dm_dp_aux_transfer_result(ssize_t result, +VISIBLE_IF_KUNIT ssize_t dm_dp_aux_transfer_result(ssize_t result, enum aux_return_code_type operation_result) { switch (operation_result) { @@ -84,7 +84,7 @@ EXPORT_IF_KUNIT(dm_dp_aux_transfer_result); /* * Derive the AUX payload transaction flags from a DP AUX request field. */ -STATIC_IFN_KUNIT void dm_dp_aux_fill_payload_flags(u8 request, +VISIBLE_IF_KUNIT void dm_dp_aux_fill_payload_flags(u8 request, struct aux_payload *payload) { payload->i2c_over_aux =3D (request & DP_AUX_NATIVE_WRITE) =3D=3D 0; @@ -98,7 +98,7 @@ EXPORT_IF_KUNIT(dm_dp_aux_fill_payload_flags); /* * This function handles both native AUX and I2C-Over-AUX transactions. */ -STATIC_IFN_KUNIT ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, +VISIBLE_IF_KUNIT ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) { ssize_t result =3D 0; @@ -207,7 +207,7 @@ amdgpu_dm_mst_connector_late_register(struct drm_connec= tor *connector) } =20 =20 -STATIC_IFN_KUNIT void +VISIBLE_IF_KUNIT void amdgpu_dm_mst_reset_mst_connector_setting(struct amdgpu_dm_connector *acon= nector) { aconnector->drm_edid =3D NULL; @@ -337,7 +337,7 @@ static bool validate_dsc_caps_on_connector(struct amdgp= u_dm_connector *aconnecto } #endif =20 -STATIC_IFN_KUNIT bool retrieve_downstream_port_device(struct amdgpu_dm_con= nector *aconnector) +VISIBLE_IF_KUNIT bool retrieve_downstream_port_device(struct amdgpu_dm_con= nector *aconnector) { union dp_downstream_port_present ds_port_present; =20 @@ -357,7 +357,7 @@ STATIC_IFN_KUNIT bool retrieve_downstream_port_device(s= truct amdgpu_dm_connector } EXPORT_IF_KUNIT(retrieve_downstream_port_device); =20 -STATIC_IFN_KUNIT bool retrieve_branch_specific_data(struct amdgpu_dm_conne= ctor *aconnector) +VISIBLE_IF_KUNIT bool retrieve_branch_specific_data(struct amdgpu_dm_conne= ctor *aconnector) { struct drm_connector *connector =3D &aconnector->base; struct drm_dp_mst_port *port =3D aconnector->mst_output_port; @@ -519,7 +519,7 @@ static int dm_dp_mst_get_modes(struct drm_connector *co= nnector) return ret; } =20 -STATIC_IFN_KUNIT struct drm_encoder * +VISIBLE_IF_KUNIT struct drm_encoder * dm_mst_atomic_best_encoder(struct drm_connector *connector, struct drm_atomic_commit *state) { @@ -532,7 +532,7 @@ dm_mst_atomic_best_encoder(struct drm_connector *connec= tor, } EXPORT_IF_KUNIT(dm_mst_atomic_best_encoder); =20 -STATIC_IFN_KUNIT int +VISIBLE_IF_KUNIT int dm_dp_mst_detect(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force) { @@ -604,7 +604,7 @@ dm_dp_mst_detect(struct drm_connector *connector, } EXPORT_IF_KUNIT(dm_dp_mst_detect); =20 -STATIC_IFN_KUNIT int dm_dp_mst_atomic_check(struct drm_connector *connecto= r, +VISIBLE_IF_KUNIT int dm_dp_mst_atomic_check(struct drm_connector *connecto= r, struct drm_atomic_commit *state) { struct amdgpu_dm_connector *aconnector =3D to_amdgpu_dm_connector(connect= or); @@ -743,7 +743,7 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr = *mgr, * Select the ESI[1] mask used to filter the MST sideband ready bits for a * given message-ready event type. */ -STATIC_IFN_KUNIT u8 dm_mst_msg_ready_mask(enum mst_msg_ready_type msg_rdy_= type) +VISIBLE_IF_KUNIT u8 dm_mst_msg_ready_mask(enum mst_msg_ready_type msg_rdy_= type) { switch (msg_rdy_type) { case DOWN_REP_MSG_RDY_EVENT: @@ -762,7 +762,7 @@ EXPORT_IF_KUNIT(dm_mst_msg_ready_mask); /* * Select the DPCD ESI address and read length based on the DPCD revision. */ -STATIC_IFN_KUNIT void dm_mst_select_esi_dpcd(u8 dpcd_rev, int *dpcd_addr, +VISIBLE_IF_KUNIT void dm_mst_select_esi_dpcd(u8 dpcd_rev, int *dpcd_addr, u8 *dpcd_bytes_to_read) { if (dpcd_rev < 0x12) { @@ -862,7 +862,7 @@ void dm_handle_mst_sideband_msg_ready_event( } EXPORT_IF_KUNIT(dm_handle_mst_sideband_msg_ready_event); =20 -STATIC_IFN_KUNIT void dm_handle_mst_down_rep_msg_ready(struct drm_dp_mst_t= opology_mgr *mgr) +VISIBLE_IF_KUNIT void dm_handle_mst_down_rep_msg_ready(struct drm_dp_mst_t= opology_mgr *mgr) { dm_handle_mst_sideband_msg_ready_event(mgr, DOWN_REP_MSG_RDY_EVENT); } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 824ef3ce5de0..08153ffb38cb 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -154,7 +154,7 @@ void amdgpu_dm_plane_fill_blending_from_plane_state(con= st struct drm_plane_state } EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_blending_from_plane_state); =20 -STATIC_IFN_KUNIT void amdgpu_dm_plane_add_modifier(uint64_t **mods, uint64= _t *size, +VISIBLE_IF_KUNIT void amdgpu_dm_plane_add_modifier(uint64_t **mods, uint64= _t *size, uint64_t *cap, uint64_t mod) { if (!*mods) @@ -181,7 +181,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_plane_add_modifier(uint= 64_t **mods, uint64_t *si } EXPORT_IF_KUNIT(amdgpu_dm_plane_add_modifier); =20 -STATIC_IFN_KUNIT void amdgpu_dm_plane_add_modifier_dedup(uint64_t **mods, = uint64_t *size, +VISIBLE_IF_KUNIT void amdgpu_dm_plane_add_modifier_dedup(uint64_t **mods, = uint64_t *size, uint64_t *cap, uint64_t mod) { uint64_t i; @@ -197,13 +197,13 @@ STATIC_IFN_KUNIT void amdgpu_dm_plane_add_modifier_de= dup(uint64_t **mods, uint64 } EXPORT_IF_KUNIT(amdgpu_dm_plane_add_modifier_dedup); =20 -STATIC_IFN_KUNIT bool amdgpu_dm_plane_modifier_has_dcc(uint64_t modifier) +VISIBLE_IF_KUNIT bool amdgpu_dm_plane_modifier_has_dcc(uint64_t modifier) { return IS_AMD_FMT_MOD(modifier) && AMD_FMT_MOD_GET(DCC, modifier); } EXPORT_IF_KUNIT(amdgpu_dm_plane_modifier_has_dcc); =20 -STATIC_IFN_KUNIT unsigned int amdgpu_dm_plane_modifier_gfx9_swizzle_mode(u= int64_t modifier) +VISIBLE_IF_KUNIT unsigned int amdgpu_dm_plane_modifier_gfx9_swizzle_mode(u= int64_t modifier) { if (modifier =3D=3D DRM_FORMAT_MOD_LINEAR) return 0; @@ -212,7 +212,7 @@ STATIC_IFN_KUNIT unsigned int amdgpu_dm_plane_modifier_= gfx9_swizzle_mode(uint64_ } EXPORT_IF_KUNIT(amdgpu_dm_plane_modifier_gfx9_swizzle_mode); =20 -STATIC_IFN_KUNIT int amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier( +VISIBLE_IF_KUNIT int amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier( struct dc_tiling_info *tiling_info, uint64_t modifier) { @@ -247,8 +247,9 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_fill_gfx6_tiling_i= nfo_from_modifier( } EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier); =20 -STATIC_IFN_KUNIT void amdgpu_dm_plane_fill_gfx9_tiling_info_from_device(co= nst struct amdgpu_device *adev, - struct dc_tiling_info *tiling_info) +VISIBLE_IF_KUNIT +void amdgpu_dm_plane_fill_gfx9_tiling_info_from_device(const struct amdgpu= _device *adev, + struct dc_tiling_info *tiling_info) { /* Fill GFX9 params */ tiling_info->gfx9.num_pipes =3D @@ -269,9 +270,10 @@ STATIC_IFN_KUNIT void amdgpu_dm_plane_fill_gfx9_tiling= _info_from_device(const st } EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_gfx9_tiling_info_from_device); =20 -STATIC_IFN_KUNIT void amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier(= const struct amdgpu_device *adev, - struct dc_tiling_info *tiling_info, - uint64_t modifier) +VISIBLE_IF_KUNIT +void amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier(const struct amdg= pu_device *adev, + struct dc_tiling_info *tiling_info, + uint64_t modifier) { unsigned int mod_bank_xor_bits =3D AMD_FMT_MOD_GET(BANK_XOR_BITS, modifie= r); unsigned int mod_pipe_xor_bits =3D AMD_FMT_MOD_GET(PIPE_XOR_BITS, modifie= r); @@ -298,7 +300,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_plane_fill_gfx9_tiling_= info_from_modifier(const } EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier); =20 -STATIC_IFN_KUNIT int amdgpu_dm_plane_validate_dcc(struct amdgpu_device *ad= ev, +VISIBLE_IF_KUNIT int amdgpu_dm_plane_validate_dcc(struct amdgpu_device *ad= ev, const enum surface_pixel_format format, const enum dc_rotation_angle rotation, const struct dc_tiling_info *tiling_info, @@ -348,7 +350,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_validate_dcc(struc= t amdgpu_device *adev, } EXPORT_IF_KUNIT(amdgpu_dm_plane_validate_dcc); =20 -STATIC_IFN_KUNIT int amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers(struct= amdgpu_device *adev, +VISIBLE_IF_KUNIT int amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers(struct= amdgpu_device *adev, const struct amdgpu_framebuffer *afb, const enum surface_pixel_format format, const enum dc_rotation_angle rotation, @@ -400,7 +402,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_fill_gfx9_attrs_fr= om_modifiers(struct amdgp } EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers); =20 -STATIC_IFN_KUNIT int amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers(struc= t amdgpu_device *adev, +VISIBLE_IF_KUNIT int amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers(struc= t amdgpu_device *adev, const struct amdgpu_framebuffer *afb, const enum surface_pixel_format format, const enum dc_rotation_angle rotation, @@ -1009,7 +1011,9 @@ static void amdgpu_dm_plane_add_gfx12_modifiers(struc= t amdgpu_device *adev, =20 } =20 -STATIC_IFN_KUNIT int amdgpu_dm_plane_get_plane_modifiers(struct amdgpu_dev= ice *adev, unsigned int plane_type, uint64_t **mods) +VISIBLE_IF_KUNIT +int amdgpu_dm_plane_get_plane_modifiers(struct amdgpu_device *adev, unsign= ed int plane_type, + uint64_t **mods) { uint64_t size =3D 0, capacity =3D 128; *mods =3D kmalloc_array(capacity, sizeof(uint64_t), GFP_KERNEL); @@ -1067,7 +1071,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_get_plane_modifi= ers(struct amdgpu_device *a } EXPORT_IF_KUNIT(amdgpu_dm_plane_get_plane_modifiers); =20 -STATIC_IFN_KUNIT int amdgpu_dm_plane_get_plane_formats(const struct drm_pl= ane *plane, +VISIBLE_IF_KUNIT int amdgpu_dm_plane_get_plane_formats(const struct drm_pl= ane *plane, const struct dc_plane_cap *plane_cap, uint32_t *formats, int max_formats) { @@ -1337,7 +1341,7 @@ static void amdgpu_dm_plane_helper_cleanup_fb(struct = drm_plane *plane, amdgpu_bo_unref(&rbo); } =20 -STATIC_IFN_KUNIT void amdgpu_dm_plane_get_min_max_dc_plane_scaling(struct = drm_device *dev, +VISIBLE_IF_KUNIT void amdgpu_dm_plane_get_min_max_dc_plane_scaling(struct = drm_device *dev, struct drm_framebuffer *fb, int *min_downscale, int *max_upscale) { @@ -1524,7 +1528,7 @@ int amdgpu_dm_plane_fill_dc_scaling_info(struct amdgp= u_device *adev, } EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_dc_scaling_info); =20 -STATIC_IFN_KUNIT int amdgpu_dm_plane_atomic_check(struct drm_plane *plane, +VISIBLE_IF_KUNIT int amdgpu_dm_plane_atomic_check(struct drm_plane *plane, struct drm_atomic_commit *state) { struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(state, @@ -1572,7 +1576,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_atomic_check(str= uct drm_plane *plane, } EXPORT_IF_KUNIT(amdgpu_dm_plane_atomic_check); =20 -STATIC_IFN_KUNIT int amdgpu_dm_plane_atomic_async_check(struct drm_plane *= plane, +VISIBLE_IF_KUNIT int amdgpu_dm_plane_atomic_async_check(struct drm_plane *= plane, struct drm_atomic_commit *state, bool flip) { struct drm_crtc_state *new_crtc_state; @@ -1755,7 +1759,7 @@ static void amdgpu_dm_plane_atomic_async_update(struc= t drm_plane *plane, amdgpu_dm_plane_handle_cursor_update(plane, old_state); } =20 -STATIC_IFN_KUNIT void amdgpu_dm_plane_panic_flush(struct drm_plane *plane) +VISIBLE_IF_KUNIT void amdgpu_dm_plane_panic_flush(struct drm_plane *plane) { struct dm_plane_state *dm_plane_state =3D to_dm_plane_state(plane->state); struct drm_framebuffer *fb =3D plane->state->fb; @@ -1788,7 +1792,7 @@ static const struct drm_plane_helper_funcs dm_primary= _plane_helper_funcs =3D { .panic_flush =3D amdgpu_dm_plane_panic_flush, }; =20 -STATIC_IFN_KUNIT void amdgpu_dm_plane_drm_plane_reset(struct drm_plane *pl= ane) +VISIBLE_IF_KUNIT void amdgpu_dm_plane_drm_plane_reset(struct drm_plane *pl= ane) { struct dm_plane_state *amdgpu_state; =20 @@ -1807,7 +1811,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_plane_drm_plane_reset= (struct drm_plane *plane) } EXPORT_IF_KUNIT(amdgpu_dm_plane_drm_plane_reset); =20 -STATIC_IFN_KUNIT struct drm_plane_state * +VISIBLE_IF_KUNIT struct drm_plane_state * amdgpu_dm_plane_drm_plane_duplicate_state(struct drm_plane *plane) { struct dm_plane_state *dm_plane_state, *old_dm_plane_state; @@ -1849,7 +1853,7 @@ amdgpu_dm_plane_drm_plane_duplicate_state(struct drm_= plane *plane) } EXPORT_IF_KUNIT(amdgpu_dm_plane_drm_plane_duplicate_state); =20 -STATIC_IFN_KUNIT bool amdgpu_dm_plane_format_mod_supported(struct drm_plan= e *plane, +VISIBLE_IF_KUNIT bool amdgpu_dm_plane_format_mod_supported(struct drm_plan= e *plane, uint32_t format, uint64_t modifier) { @@ -1920,7 +1924,7 @@ STATIC_IFN_KUNIT bool amdgpu_dm_plane_format_mod_supp= orted(struct drm_plane *pla } EXPORT_IF_KUNIT(amdgpu_dm_plane_format_mod_supported); =20 -STATIC_IFN_KUNIT void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_p= lane *plane, +VISIBLE_IF_KUNIT void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_p= lane *plane, struct drm_plane_state *state) { struct dm_plane_state *dm_plane_state =3D to_dm_plane_state(state); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/dri= vers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c index 3280bfadc6a8..13901a1e6907 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c @@ -36,7 +36,7 @@ #include "dm_helpers.h" #include "amdgpu_dm_pp_smu.h" =20 -STATIC_IFN_KUNIT void build_pm_display_cfg( +VISIBLE_IF_KUNIT void build_pm_display_cfg( struct amd_pp_display_configuration *pm_display_cfg, const struct dm_pp_display_configuration *pp_display_cfg) { @@ -104,7 +104,7 @@ bool dm_pp_apply_display_requirements( } EXPORT_IF_KUNIT(dm_pp_apply_display_requirements); =20 -STATIC_IFN_KUNIT void get_default_clock_levels( +VISIBLE_IF_KUNIT void get_default_clock_levels( enum dm_pp_clock_type clk_type, struct dm_pp_clock_levels *clks) { @@ -137,7 +137,7 @@ STATIC_IFN_KUNIT void get_default_clock_levels( } EXPORT_IF_KUNIT(get_default_clock_levels); =20 -STATIC_IFN_KUNIT enum amd_pp_clock_type dc_to_pp_clock_type( +VISIBLE_IF_KUNIT enum amd_pp_clock_type dc_to_pp_clock_type( enum dm_pp_clock_type dm_pp_clk_type) { enum amd_pp_clock_type amd_pp_clk_type =3D 0; @@ -180,7 +180,7 @@ STATIC_IFN_KUNIT enum amd_pp_clock_type dc_to_pp_clock_= type( } EXPORT_IF_KUNIT(dc_to_pp_clock_type); =20 -STATIC_IFN_KUNIT void pp_to_dc_clock_levels( +VISIBLE_IF_KUNIT void pp_to_dc_clock_levels( const struct amd_pp_clocks *pp_clks, struct dm_pp_clock_levels *dc_clks, enum dm_pp_clock_type dc_clk_type) @@ -207,7 +207,7 @@ STATIC_IFN_KUNIT void pp_to_dc_clock_levels( } EXPORT_IF_KUNIT(pp_to_dc_clock_levels); =20 -STATIC_IFN_KUNIT void pp_to_dc_clock_levels_with_latency( +VISIBLE_IF_KUNIT void pp_to_dc_clock_levels_with_latency( const struct pp_clock_levels_with_latency *pp_clks, struct dm_pp_clock_levels_with_latency *clk_level_info, enum dm_pp_clock_type dc_clk_type) @@ -235,7 +235,7 @@ STATIC_IFN_KUNIT void pp_to_dc_clock_levels_with_latenc= y( } EXPORT_IF_KUNIT(pp_to_dc_clock_levels_with_latency); =20 -STATIC_IFN_KUNIT void pp_to_dc_clock_levels_with_voltage( +VISIBLE_IF_KUNIT void pp_to_dc_clock_levels_with_voltage( const struct pp_clock_levels_with_voltage *pp_clks, struct dm_pp_clock_levels_with_voltage *clk_level_info, enum dm_pp_clock_type dc_clk_type) @@ -264,7 +264,7 @@ STATIC_IFN_KUNIT void pp_to_dc_clock_levels_with_voltag= e( } EXPORT_IF_KUNIT(pp_to_dc_clock_levels_with_voltage); =20 -STATIC_IFN_KUNIT void cap_clock_levels_to_validation( +VISIBLE_IF_KUNIT void cap_clock_levels_to_validation( struct dm_pp_clock_levels *dc_clks, enum dm_pp_clock_type clk_type, const struct amd_pp_simple_clock_info *validation_clks) @@ -423,7 +423,7 @@ bool dm_pp_apply_clock_for_voltage_request( } EXPORT_IF_KUNIT(dm_pp_apply_clock_for_voltage_request); =20 -STATIC_IFN_KUNIT void build_wm_clock_ranges_soc15( +VISIBLE_IF_KUNIT void build_wm_clock_ranges_soc15( const struct pp_smu_wm_range_sets *ranges, struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges) { @@ -468,7 +468,7 @@ STATIC_IFN_KUNIT void build_wm_clock_ranges_soc15( } EXPORT_IF_KUNIT(build_wm_clock_ranges_soc15); =20 -STATIC_IFN_KUNIT void pp_rv_set_wm_ranges(struct pp_smu *pp, +VISIBLE_IF_KUNIT void pp_rv_set_wm_ranges(struct pp_smu *pp, struct pp_smu_wm_range_sets *ranges) { const struct dc_context *ctx =3D pp->dm; @@ -482,7 +482,7 @@ STATIC_IFN_KUNIT void pp_rv_set_wm_ranges(struct pp_smu= *pp, } EXPORT_IF_KUNIT(pp_rv_set_wm_ranges); =20 -STATIC_IFN_KUNIT void pp_rv_set_pme_wa_enable(struct pp_smu *pp) +VISIBLE_IF_KUNIT void pp_rv_set_pme_wa_enable(struct pp_smu *pp) { const struct dc_context *ctx =3D pp->dm; struct amdgpu_device *adev =3D ctx->driver_context; @@ -491,7 +491,7 @@ STATIC_IFN_KUNIT void pp_rv_set_pme_wa_enable(struct pp= _smu *pp) } EXPORT_IF_KUNIT(pp_rv_set_pme_wa_enable); =20 -STATIC_IFN_KUNIT void pp_rv_set_active_display_count(struct pp_smu *pp, in= t count) +VISIBLE_IF_KUNIT void pp_rv_set_active_display_count(struct pp_smu *pp, in= t count) { const struct dc_context *ctx =3D pp->dm; struct amdgpu_device *adev =3D ctx->driver_context; @@ -500,7 +500,7 @@ STATIC_IFN_KUNIT void pp_rv_set_active_display_count(st= ruct pp_smu *pp, int coun } EXPORT_IF_KUNIT(pp_rv_set_active_display_count); =20 -STATIC_IFN_KUNIT void pp_rv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, i= nt clock) +VISIBLE_IF_KUNIT void pp_rv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, i= nt clock) { const struct dc_context *ctx =3D pp->dm; struct amdgpu_device *adev =3D ctx->driver_context; @@ -509,7 +509,7 @@ STATIC_IFN_KUNIT void pp_rv_set_min_deep_sleep_dcfclk(s= truct pp_smu *pp, int clo } EXPORT_IF_KUNIT(pp_rv_set_min_deep_sleep_dcfclk); =20 -STATIC_IFN_KUNIT void pp_rv_set_hard_min_dcefclk_by_freq(struct pp_smu *pp= , int clock) +VISIBLE_IF_KUNIT void pp_rv_set_hard_min_dcefclk_by_freq(struct pp_smu *pp= , int clock) { const struct dc_context *ctx =3D pp->dm; struct amdgpu_device *adev =3D ctx->driver_context; @@ -518,7 +518,7 @@ STATIC_IFN_KUNIT void pp_rv_set_hard_min_dcefclk_by_fre= q(struct pp_smu *pp, int } EXPORT_IF_KUNIT(pp_rv_set_hard_min_dcefclk_by_freq); =20 -STATIC_IFN_KUNIT void pp_rv_set_hard_min_fclk_by_freq(struct pp_smu *pp, i= nt mhz) +VISIBLE_IF_KUNIT void pp_rv_set_hard_min_fclk_by_freq(struct pp_smu *pp, i= nt mhz) { const struct dc_context *ctx =3D pp->dm; struct amdgpu_device *adev =3D ctx->driver_context; @@ -527,7 +527,7 @@ STATIC_IFN_KUNIT void pp_rv_set_hard_min_fclk_by_freq(s= truct pp_smu *pp, int mhz } EXPORT_IF_KUNIT(pp_rv_set_hard_min_fclk_by_freq); =20 -STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_wm_ranges(struct pp_smu *pp, +VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_wm_ranges(struct pp_smu *pp, struct pp_smu_wm_range_sets *ranges) { const struct dc_context *ctx =3D pp->dm; @@ -539,7 +539,7 @@ STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_wm_ranges= (struct pp_smu *pp, } EXPORT_IF_KUNIT(pp_nv_set_wm_ranges); =20 -STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_display_count(struct pp_smu = *pp, int count) +VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_display_count(struct pp_smu = *pp, int count) { const struct dc_context *ctx =3D pp->dm; struct amdgpu_device *adev =3D ctx->driver_context; @@ -556,7 +556,7 @@ STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_display_c= ount(struct pp_smu *pp, i } EXPORT_IF_KUNIT(pp_nv_set_display_count); =20 -STATIC_IFN_KUNIT enum pp_smu_status +VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int mhz) { const struct dc_context *ctx =3D pp->dm; @@ -574,7 +574,7 @@ pp_nv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int = mhz) } EXPORT_IF_KUNIT(pp_nv_set_min_deep_sleep_dcfclk); =20 -STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_hard_min_dcefclk_by_freq( +VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_hard_min_dcefclk_by_freq( struct pp_smu *pp, int mhz) { const struct dc_context *ctx =3D pp->dm; @@ -598,7 +598,7 @@ STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_hard_min_= dcefclk_by_freq( } EXPORT_IF_KUNIT(pp_nv_set_hard_min_dcefclk_by_freq); =20 -STATIC_IFN_KUNIT enum pp_smu_status +VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int mhz) { const struct dc_context *ctx =3D pp->dm; @@ -622,7 +622,7 @@ pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int = mhz) } EXPORT_IF_KUNIT(pp_nv_set_hard_min_uclk_by_freq); =20 -STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_pstate_handshake_support( +VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_pstate_handshake_support( struct pp_smu *pp, bool pstate_handshake_supported) { const struct dc_context *ctx =3D pp->dm; @@ -636,7 +636,7 @@ STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_pstate_ha= ndshake_support( } EXPORT_IF_KUNIT(pp_nv_set_pstate_handshake_support); =20 -STATIC_IFN_KUNIT bool pp_smu_nv_clock_id_to_pp(enum pp_smu_nv_clock_id clo= ck_id, +VISIBLE_IF_KUNIT bool pp_smu_nv_clock_id_to_pp(enum pp_smu_nv_clock_id clo= ck_id, enum amd_pp_clock_type *clock_type) { switch (clock_id) { @@ -657,7 +657,7 @@ STATIC_IFN_KUNIT bool pp_smu_nv_clock_id_to_pp(enum pp_= smu_nv_clock_id clock_id, } EXPORT_IF_KUNIT(pp_smu_nv_clock_id_to_pp); =20 -STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_voltage_by_freq(struct pp_sm= u *pp, +VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_voltage_by_freq(struct pp_sm= u *pp, enum pp_smu_nv_clock_id clock_id, int mhz) { const struct dc_context *ctx =3D pp->dm; @@ -683,7 +683,7 @@ STATIC_IFN_KUNIT enum pp_smu_status pp_nv_set_voltage_b= y_freq(struct pp_smu *pp, } EXPORT_IF_KUNIT(pp_nv_set_voltage_by_freq); =20 -STATIC_IFN_KUNIT enum pp_smu_status pp_nv_get_maximum_sustainable_clocks( +VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_get_maximum_sustainable_clocks( struct pp_smu *pp, struct pp_smu_nv_clock_table *max_clocks) { const struct dc_context *ctx =3D pp->dm; @@ -701,7 +701,7 @@ STATIC_IFN_KUNIT enum pp_smu_status pp_nv_get_maximum_s= ustainable_clocks( } EXPORT_IF_KUNIT(pp_nv_get_maximum_sustainable_clocks); =20 -STATIC_IFN_KUNIT enum pp_smu_status pp_nv_get_uclk_dpm_states(struct pp_sm= u *pp, +VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_get_uclk_dpm_states(struct pp_sm= u *pp, unsigned int *clock_values_in_khz, unsigned int *num_states) { const struct dc_context *ctx =3D pp->dm; @@ -720,7 +720,7 @@ STATIC_IFN_KUNIT enum pp_smu_status pp_nv_get_uclk_dpm_= states(struct pp_smu *pp, } EXPORT_IF_KUNIT(pp_nv_get_uclk_dpm_states); =20 -STATIC_IFN_KUNIT enum pp_smu_status pp_rn_get_dpm_clock_table( +VISIBLE_IF_KUNIT enum pp_smu_status pp_rn_get_dpm_clock_table( struct pp_smu *pp, struct dpm_clocks *clock_table) { const struct dc_context *ctx =3D pp->dm; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c b/driver= s/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c index dbad0a6d3a2b..522fc81d09b5 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c @@ -32,7 +32,7 @@ #include "modules/power/power_helpers.h" #include "dm_helpers.h" =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT bool link_supports_psrsu(struct dc_link *link) { struct dc *dc =3D link->ctx->dc; @@ -62,7 +62,7 @@ bool link_supports_psrsu(struct dc_link *link) } EXPORT_IF_KUNIT(link_supports_psrsu); =20 -STATIC_IFN_KUNIT +VISIBLE_IF_KUNIT void amdgpu_dm_psr_fill_caps(struct dc_link *link, struct psr_caps *caps) { struct dpcd_caps *dpcd_caps =3D &link->dpcd_caps; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c b/drivers= /gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c index a7594012a0b2..76eb3b0a0721 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c @@ -41,7 +41,7 @@ static const u32 amdgpu_dm_wb_formats[] =3D { DRM_FORMAT_XRGB2101010, }; =20 -STATIC_IFN_KUNIT int amdgpu_dm_wb_encoder_atomic_check(struct drm_encoder = *encoder, +VISIBLE_IF_KUNIT int amdgpu_dm_wb_encoder_atomic_check(struct drm_encoder = *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) { @@ -78,14 +78,14 @@ STATIC_IFN_KUNIT int amdgpu_dm_wb_encoder_atomic_check(= struct drm_encoder *encod EXPORT_IF_KUNIT(amdgpu_dm_wb_encoder_atomic_check); =20 =20 -STATIC_IFN_KUNIT int amdgpu_dm_wb_connector_get_modes(struct drm_connector= *connector) +VISIBLE_IF_KUNIT int amdgpu_dm_wb_connector_get_modes(struct drm_connector= *connector) { /* Maximum resolution supported by DWB */ return drm_add_modes_noedid(connector, 3840, 2160); } EXPORT_IF_KUNIT(amdgpu_dm_wb_connector_get_modes); =20 -STATIC_IFN_KUNIT int amdgpu_dm_wb_prepare_job(struct drm_writeback_connect= or *wb_connector, +VISIBLE_IF_KUNIT int amdgpu_dm_wb_prepare_job(struct drm_writeback_connect= or *wb_connector, struct drm_writeback_job *job) { struct amdgpu_framebuffer *afb; @@ -150,7 +150,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_wb_prepare_job(struct dr= m_writeback_connector *wb } EXPORT_IF_KUNIT(amdgpu_dm_wb_prepare_job); =20 -STATIC_IFN_KUNIT void amdgpu_dm_wb_cleanup_job(struct drm_writeback_connec= tor *connector, +VISIBLE_IF_KUNIT void amdgpu_dm_wb_cleanup_job(struct drm_writeback_connec= tor *connector, struct drm_writeback_job *job) { struct amdgpu_bo *rbo; diff --git a/drivers/gpu/drm/amd/display/dc/dm_helpers.h b/drivers/gpu/drm/= amd/display/dc/dm_helpers.h index c887fdcba049..ac1522fc2e70 100644 --- a/drivers/gpu/drm/amd/display/dc/dm_helpers.h +++ b/drivers/gpu/drm/amd/display/dc/dm_helpers.h @@ -30,6 +30,8 @@ #ifndef __DM_HELPERS__ #define __DM_HELPERS__ =20 +#include + #include "modules/inc/mod_info_packet_types.h" #include "dc_types.h" #include "dc.h" @@ -193,12 +195,10 @@ void dm_helpers_mccs_vcp_set( struct dc_sink *sink); =20 #if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST) -#define STATIC_IFN_KUNIT #define INLINE_IFN_KUNIT inline #define EXPORT_IF_KUNIT(symbol) EXPORT_SYMBOL(symbol) =20 #else -#define STATIC_IFN_KUNIT static #define INLINE_IFN_KUNIT #define EXPORT_IF_KUNIT(symbol) #endif diff --git a/tools/lib/python/kdoc/xforms_lists.py b/tools/lib/python/kdoc/= xforms_lists.py index e3dda2fe8a53..b49b81da74d9 100644 --- a/tools/lib/python/kdoc/xforms_lists.py +++ b/tools/lib/python/kdoc/xforms_lists.py @@ -104,7 +104,7 @@ class CTransforms: (CMatch("__no_context_analysis"), ""), (CMatch("__attribute_const__"), ""), (CMatch("__attribute__"), ""), - (CMatch("STATIC_IFN_KUNIT"), ""), + (CMatch("VISIBLE_IF_KUNIT"), ""), (CMatch("INLINE_IFN_KUNIT"), ""), =20 # --=20 2.55.0 From nobody Fri Sep 25 23:09:45 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9983471439 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-visibility-unification-v1-2-6a962e5b3351@redhat.com> References: <20260907-visibility-unification-v1-0-6a962e5b3351@redhat.com> In-Reply-To: <20260907-visibility-unification-v1-0-6a962e5b3351@redhat.com> To: Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Jonathan Corbet , Shuah Khan , Randy Dunlap Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Maxime Ripard , Albert Esteve X-Developer-Signature: v=1; a=ed25519-sha256; t=1788787740; l=174744; i=aesteve@redhat.com; s=20260827; h=from:subject:message-id; bh=B1m137OTaXZU5qU8FPfHVkiUHXOZvTh+C5yboibuhR8=; b=WcV0SUx7MK92uT+/xygNBThz25t79oI1ppSjrERqkWjjJrkuUNVkU0AJuo4LZuJvFWG9BbiZu 9Mg1lBEKJgyDhspBZYwL/IoYIU3NLsPcuF24KnfnJaKp7XqlzuhQnvr X-Developer-Key: i=aesteve@redhat.com; a=ed25519; pk=zI2RBeZgocwYm3AkJW4CtjoJnKoDZrfBl1xe5Ed6h+U= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Switch exports of KUnit-only helpers to EXPORT_SYMBOL_IF_KUNIT. Unlike EXPORT_IF_KUNIT, which used EXPORT_SYMBOL(), the standard macro places symbols in the EXPORTED_FOR_KUNIT_TESTING namespace. Add MODULE_IMPORT_NS() to the AMD DC test files so loadable tests can still resolve those helpers. Suggested-by: Maxime Ripard Signed-off-by: Albert Esteve Acked-by: Maxime Ripard --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 40 ++++---- .../drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c | 20 ++-- .../amd/display/amdgpu_dm/amdgpu_dm_backlight.c | 50 +++++---- .../drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 73 +++++++------ .../drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 10 +- .../amd/display/amdgpu_dm/amdgpu_dm_connector.c | 114 ++++++++++-------= ---- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 24 ++--- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 36 +++---- .../drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c | 6 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c | 26 ++--- .../drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c | 10 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 56 +++++----- .../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 110 ++++++++++-------= --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 90 ++++++++-------- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c | 26 ++--- .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 36 +++---- .../drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 54 +++++----- .../drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 66 ++++++------ .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c | 18 ++-- .../drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c | 4 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c | 9 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 10 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c | 10 +- .../display/amdgpu_dm/tests/amdgpu_dm_audio_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_backlight_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_color_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_colorop_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_connector_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_crc_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_crtc_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_cursor_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_dmub_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_freesync_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_hdcp_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_helpers_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_irq_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_ism_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_kunit_helpers.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_mst_types_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_plane_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_pp_smu_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_psr_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_quirks_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_replay_test.c | 1 + .../amdgpu_dm/tests/amdgpu_dm_services_test.c | 1 + .../amd/display/amdgpu_dm/tests/amdgpu_dm_test.c | 1 + .../display/amdgpu_dm/tests/amdgpu_dm_wb_test.c | 1 + drivers/gpu/drm/amd/display/dc/core/dc_sink.c | 6 +- drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 2 +- drivers/gpu/drm/amd/display/dc/dm_helpers.h | 2 - 50 files changed, 475 insertions(+), 457 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gp= u/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 5b3bebde0b08..f14cf0d951f2 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -185,7 +185,7 @@ VISIBLE_IF_KUNIT u32 dm_vblank_get_counter(struct amdgp= u_device *adev, int crtc) =20 return dc_stream_get_vblank_counter(acrtc->dm_irq_params.stream); } -EXPORT_IF_KUNIT(dm_vblank_get_counter); +EXPORT_SYMBOL_IF_KUNIT(dm_vblank_get_counter); =20 VISIBLE_IF_KUNIT int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, in= t crtc, u32 *vbl, u32 *position) @@ -223,28 +223,28 @@ VISIBLE_IF_KUNIT int dm_crtc_get_scanoutpos(struct am= dgpu_device *adev, int crtc =20 return 0; } -EXPORT_IF_KUNIT(dm_crtc_get_scanoutpos); +EXPORT_SYMBOL_IF_KUNIT(dm_crtc_get_scanoutpos); =20 VISIBLE_IF_KUNIT bool dm_is_idle(struct amdgpu_ip_block *ip_block) { /* XXX todo */ return true; } -EXPORT_IF_KUNIT(dm_is_idle); +EXPORT_SYMBOL_IF_KUNIT(dm_is_idle); =20 VISIBLE_IF_KUNIT int dm_wait_for_idle(struct amdgpu_ip_block *ip_block) { /* XXX todo */ return 0; } -EXPORT_IF_KUNIT(dm_wait_for_idle); +EXPORT_SYMBOL_IF_KUNIT(dm_wait_for_idle); =20 VISIBLE_IF_KUNIT int dm_soft_reset(struct amdgpu_ip_block *ip_block) { /* XXX todo */ return 0; } -EXPORT_IF_KUNIT(dm_soft_reset); +EXPORT_SYMBOL_IF_KUNIT(dm_soft_reset); =20 /* * DC will program planes with their z-order determined by their ordering @@ -259,7 +259,7 @@ VISIBLE_IF_KUNIT int dm_plane_layer_index_cmp(const voi= d *a, const void *b) /* Sort by descending dc_plane layer_index (i.e. normalized_zpos) */ return sb->surface->layer_index - sa->surface->layer_index; } -EXPORT_IF_KUNIT(dm_plane_layer_index_cmp); +EXPORT_SYMBOL_IF_KUNIT(dm_plane_layer_index_cmp); =20 /** * update_planes_and_stream_adapter() - Send planes to be updated in DC @@ -305,14 +305,14 @@ VISIBLE_IF_KUNIT int dm_set_clockgating_state(struct = amdgpu_ip_block *ip_block, { return 0; } -EXPORT_IF_KUNIT(dm_set_clockgating_state); +EXPORT_SYMBOL_IF_KUNIT(dm_set_clockgating_state); =20 VISIBLE_IF_KUNIT int dm_set_powergating_state(struct amdgpu_ip_block *ip_b= lock, enum amd_powergating_state state) { return 0; } -EXPORT_IF_KUNIT(dm_set_powergating_state); +EXPORT_SYMBOL_IF_KUNIT(dm_set_powergating_state); =20 /* Prototypes of private functions */ static int dm_early_init(struct amdgpu_ip_block *ip_block); @@ -1774,7 +1774,7 @@ void amdgpu_dm_apply_delay_after_dpcd_poweroff(struct= amdgpu_device *adev, ppatch->wait_after_dpcd_poweroff_ms / 1000); } } -EXPORT_IF_KUNIT(amdgpu_dm_apply_delay_after_dpcd_poweroff); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_apply_delay_after_dpcd_poweroff); =20 /** * amdgpu_dm_dump_links_and_sinks - Debug dump of all DC links and their s= inks @@ -2163,7 +2163,7 @@ dm_atomic_get_new_state(struct drm_atomic_commit *sta= te) =20 return NULL; } -EXPORT_IF_KUNIT(dm_atomic_get_new_state); +EXPORT_SYMBOL_IF_KUNIT(dm_atomic_get_new_state); =20 static struct drm_private_state * dm_atomic_duplicate_state(struct drm_private_obj *obj) @@ -2199,7 +2199,7 @@ VISIBLE_IF_KUNIT void dm_atomic_destroy_state(struct = drm_private_obj *obj, =20 kfree(dm_state); } -EXPORT_IF_KUNIT(dm_atomic_destroy_state); +EXPORT_SYMBOL_IF_KUNIT(dm_atomic_destroy_state); =20 static struct drm_private_state * dm_atomic_create_state(struct drm_private_obj *obj) @@ -2676,7 +2676,7 @@ VISIBLE_IF_KUNIT void dm_bandwidth_update(struct amdg= pu_device *adev) { /* TODO: implement later */ } -EXPORT_IF_KUNIT(dm_bandwidth_update); +EXPORT_SYMBOL_IF_KUNIT(dm_bandwidth_update); =20 static const struct amdgpu_display_funcs dm_display_funcs =3D { .bandwidth_update =3D dm_bandwidth_update, /* called unconditionally */ @@ -2881,7 +2881,7 @@ VISIBLE_IF_KUNIT bool modereset_required(struct drm_c= rtc_state *crtc_state) { return !crtc_state->active && drm_atomic_crtc_needs_modeset(crtc_state); } -EXPORT_IF_KUNIT(modereset_required); +EXPORT_SYMBOL_IF_KUNIT(modereset_required); =20 VISIBLE_IF_KUNIT int fill_plane_color_attributes(const struct drm_plane_state *plane_state, @@ -2930,7 +2930,7 @@ fill_plane_color_attributes(const struct drm_plane_st= ate *plane_state, =20 return 0; } -EXPORT_IF_KUNIT(fill_plane_color_attributes); +EXPORT_SYMBOL_IF_KUNIT(fill_plane_color_attributes); =20 static int fill_dc_plane_info_and_addr(struct amdgpu_device *adev, @@ -3460,7 +3460,7 @@ is_scaling_state_different(const struct dm_connector_= state *dm_state, return true; return false; } -EXPORT_IF_KUNIT(is_scaling_state_different); +EXPORT_SYMBOL_IF_KUNIT(is_scaling_state_different); =20 VISIBLE_IF_KUNIT bool is_content_protection_different(struct drm_crtc_state *new_crtc_state, @@ -3582,7 +3582,7 @@ is_content_protection_different(struct drm_crtc_state= *new_crtc_state, pr_debug("[HDCP_DM] DESIRED->ENABLED %s :false\n", __func__); return false; } -EXPORT_IF_KUNIT(is_content_protection_different); +EXPORT_SYMBOL_IF_KUNIT(is_content_protection_different); =20 static void remove_stream(struct amdgpu_device *adev, struct amdgpu_crtc *acrtc, @@ -4310,7 +4310,7 @@ bool amdgpu_dm_crtc_complete_writeback(struct amdgpu_= crtc *acrtc) =20 return true; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_complete_writeback); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_complete_writeback); =20 static void dm_clear_writeback(struct amdgpu_display_manager *dm, struct amdgpu_crtc *acrtc, @@ -4939,7 +4939,7 @@ VISIBLE_IF_KUNIT void set_multisync_trigger_params( stream->triggered_crtc_reset.delay =3D TRIGGER_DELAY_NEXT_PIXEL; } } -EXPORT_IF_KUNIT(set_multisync_trigger_params); +EXPORT_SYMBOL_IF_KUNIT(set_multisync_trigger_params); =20 VISIBLE_IF_KUNIT void set_master_stream(struct dc_stream_state *stream_set= [], int stream_count) @@ -4963,7 +4963,7 @@ VISIBLE_IF_KUNIT void set_master_stream(struct dc_str= eam_state *stream_set[], stream_set[j]->triggered_crtc_reset.event_source =3D stream_set[master_= stream]; } } -EXPORT_IF_KUNIT(set_master_stream); +EXPORT_SYMBOL_IF_KUNIT(set_master_stream); =20 VISIBLE_IF_KUNIT void dm_enable_per_frame_crtc_master_sync(struct dc_state= *context) { @@ -4993,7 +4993,7 @@ VISIBLE_IF_KUNIT void dm_enable_per_frame_crtc_master= _sync(struct dc_state *cont set_multisync_trigger_params(stream); } } -EXPORT_IF_KUNIT(dm_enable_per_frame_crtc_master_sync); +EXPORT_SYMBOL_IF_KUNIT(dm_enable_per_frame_crtc_master_sync); =20 /** * amdgpu_dm_atomic_commit_tail() - AMDgpu DM's commit tail implementation. diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c index 1b331e783220..4ec4a51a0f67 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_audio.c @@ -97,7 +97,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_audio_component_bind(struc= t device *kdev, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_audio_component_bind); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_audio_component_bind); =20 VISIBLE_IF_KUNIT void amdgpu_dm_audio_component_unbind(struct device *kdev, struct device *hda_kdev, void *data) @@ -109,7 +109,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_audio_component_unbind(= struct device *kdev, acomp->dev =3D NULL; adev->dm.audio_component =3D NULL; } -EXPORT_IF_KUNIT(amdgpu_dm_audio_component_unbind); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_audio_component_unbind); =20 static const struct component_ops amdgpu_dm_audio_component_bind_ops =3D { .bind =3D amdgpu_dm_audio_component_bind, @@ -135,7 +135,7 @@ void amdgpu_dm_audio_init_pins(struct amdgpu_device *ad= ev, int audio_count, adev->mode_info.audio.pin[i].offset =3D 0; } } -EXPORT_IF_KUNIT(amdgpu_dm_audio_init_pins); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_audio_init_pins); =20 int amdgpu_dm_audio_init(struct amdgpu_device *adev) { @@ -161,7 +161,7 @@ int amdgpu_dm_audio_init(struct amdgpu_device *adev) =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_audio_init); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_audio_init); =20 void amdgpu_dm_audio_fini(struct amdgpu_device *adev) { @@ -180,7 +180,7 @@ void amdgpu_dm_audio_fini(struct amdgpu_device *adev) =20 adev->mode_info.audio.enabled =3D false; } -EXPORT_IF_KUNIT(amdgpu_dm_audio_fini); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_audio_fini); =20 void amdgpu_dm_audio_eld_notify(struct amdgpu_device *adev, int pin) { @@ -193,7 +193,7 @@ void amdgpu_dm_audio_eld_notify(struct amdgpu_device *a= dev, int pin) pin, -1); } } -EXPORT_IF_KUNIT(amdgpu_dm_audio_eld_notify); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_audio_eld_notify); =20 void amdgpu_dm_fill_audio_info(struct audio_info *audio_info, const struct drm_connector *drm_connector, @@ -239,7 +239,7 @@ void amdgpu_dm_fill_audio_info(struct audio_info *audio= _info, /* TODO: For DP, video and audio latency should be calculated from DPCD c= aps */ =20 } -EXPORT_IF_KUNIT(amdgpu_dm_fill_audio_info); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_fill_audio_info); =20 void amdgpu_dm_commit_audio(struct drm_device *dev, struct drm_atomic_commit *state) @@ -321,18 +321,18 @@ void amdgpu_dm_commit_audio(struct drm_device *dev, amdgpu_dm_audio_eld_notify(adev, inst); } } -EXPORT_IF_KUNIT(amdgpu_dm_commit_audio); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_commit_audio); =20 #if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST) int amdgpu_dm_audio_get_param(void) { return amdgpu_audio; } -EXPORT_IF_KUNIT(amdgpu_dm_audio_get_param); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_audio_get_param); =20 void amdgpu_dm_audio_set_param(int val) { amdgpu_audio =3D val; } -EXPORT_IF_KUNIT(amdgpu_dm_audio_set_param); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_audio_set_param); #endif diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_backlight.c b/= drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_backlight.c index 02aaaa19cb54..2e46dea09973 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_backlight.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_backlight.c @@ -84,7 +84,7 @@ void amdgpu_dm_update_backlight_caps(struct amdgpu_displa= y_manager *dm, caps->caps_valid =3D true; } } -EXPORT_IF_KUNIT(amdgpu_dm_update_backlight_caps); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_update_backlight_caps); =20 VISIBLE_IF_KUNIT int get_brightness_range(const struct amdgpu_dm_backlight_caps *caps, @@ -104,7 +104,7 @@ int get_brightness_range(const struct amdgpu_dm_backlig= ht_caps *caps, } return 1; } -EXPORT_IF_KUNIT(get_brightness_range); +EXPORT_SYMBOL_IF_KUNIT(get_brightness_range); =20 /* Rescale userspace [0..max] to the firmware curve's [0..255]. */ static inline u32 scale_input_to_fw(int max, u64 input) @@ -182,8 +182,7 @@ void convert_custom_brightness(const struct amdgpu_dm_b= acklight_caps *caps, *user_brightness =3D scale_fw_to_input(min, max, DIV_ROUND_CLOSEST(lum * brightness, 101)); } - -EXPORT_IF_KUNIT(convert_custom_brightness); +EXPORT_SYMBOL_IF_KUNIT(convert_custom_brightness); =20 VISIBLE_IF_KUNIT u32 convert_brightness_from_user(const struct amdgpu_dm_backlight_caps *ca= ps, @@ -199,8 +198,7 @@ u32 convert_brightness_from_user(const struct amdgpu_dm= _backlight_caps *caps, /* Rescale 0..max to min..max */ return min + DIV_ROUND_CLOSEST_ULL((u64)(max - min) * brightness, max); } - -EXPORT_IF_KUNIT(convert_brightness_from_user); +EXPORT_SYMBOL_IF_KUNIT(convert_brightness_from_user); =20 VISIBLE_IF_KUNIT u32 convert_brightness_to_user(const struct amdgpu_dm_backlight_caps *caps, @@ -217,7 +215,7 @@ u32 convert_brightness_to_user(const struct amdgpu_dm_b= acklight_caps *caps, return DIV_ROUND_CLOSEST_ULL((u64)max * (brightness - min), max - min); } -EXPORT_IF_KUNIT(convert_brightness_to_user); +EXPORT_SYMBOL_IF_KUNIT(convert_brightness_to_user); =20 VISIBLE_IF_KUNIT struct dc_stream_state *dm_find_stream_with_link( @@ -236,7 +234,7 @@ struct dc_stream_state *dm_find_stream_with_link( =20 return NULL; } -EXPORT_IF_KUNIT(dm_find_stream_with_link); +EXPORT_SYMBOL_IF_KUNIT(dm_find_stream_with_link); =20 VISIBLE_IF_KUNIT int amdgpu_dm_backlight_get_device_index(struct amdgpu_display_manager *dm, @@ -251,7 +249,7 @@ int amdgpu_dm_backlight_get_device_index(struct amdgpu_= display_manager *dm, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_backlight_get_device_index); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_backlight_get_device_index); =20 void amdgpu_dm_backlight_set_level(struct amdgpu_display_manager *dm, int bl_idx, @@ -348,7 +346,7 @@ void amdgpu_dm_backlight_set_level(struct amdgpu_displa= y_manager *dm, if (rc) dm->actual_brightness[bl_idx] =3D user_brightness; } -EXPORT_IF_KUNIT(amdgpu_dm_backlight_set_level); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_backlight_set_level); =20 VISIBLE_IF_KUNIT int amdgpu_dm_backlight_update_status(struct backlight_device *bd) @@ -360,7 +358,7 @@ int amdgpu_dm_backlight_update_status(struct backlight_= device *bd) =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_backlight_update_status); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_backlight_update_status); =20 VISIBLE_IF_KUNIT u32 amdgpu_dm_backlight_get_level(struct amdgpu_display_manager *dm, int b= l_idx) @@ -387,7 +385,7 @@ u32 amdgpu_dm_backlight_get_level(struct amdgpu_display= _manager *dm, int bl_idx) =20 return convert_brightness_to_user(&caps, ret); } -EXPORT_IF_KUNIT(amdgpu_dm_backlight_get_level); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_backlight_get_level); =20 VISIBLE_IF_KUNIT int amdgpu_dm_backlight_get_brightness(struct backlight_device *bd) @@ -397,7 +395,7 @@ int amdgpu_dm_backlight_get_brightness(struct backlight= _device *bd) =20 return amdgpu_dm_backlight_get_level(dm, i); } -EXPORT_IF_KUNIT(amdgpu_dm_backlight_get_brightness); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_backlight_get_brightness); =20 static const struct backlight_ops amdgpu_dm_backlight_ops =3D { .options =3D BL_CORE_SUSPENDRESUME, @@ -432,7 +430,7 @@ void amdgpu_dm_backlight_fill_props(const struct amdgpu= _dm_backlight_caps *caps, props->scale =3D BACKLIGHT_SCALE_LINEAR; props->type =3D BACKLIGHT_RAW; } -EXPORT_IF_KUNIT(amdgpu_dm_backlight_fill_props); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_backlight_fill_props); =20 void amdgpu_dm_register_backlight_device(struct amdgpu_dm_connector *aconnector) @@ -494,7 +492,7 @@ amdgpu_dm_register_backlight_device(struct amdgpu_dm_co= nnector *aconnector) drm_dbg_driver(drm, "DM: Registered Backlight device: %s\n", bl_name); } } -EXPORT_IF_KUNIT(amdgpu_dm_register_backlight_device); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_register_backlight_device); =20 void amdgpu_dm_update_connector_ext_caps(struct amdgpu_dm_connector *aconn= ector) { @@ -566,7 +564,7 @@ void amdgpu_dm_update_connector_ext_caps(struct amdgpu_= dm_connector *aconnector) } } } -EXPORT_IF_KUNIT(amdgpu_dm_update_connector_ext_caps); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_update_connector_ext_caps); =20 void amdgpu_dm_setup_backlight_device(struct amdgpu_display_manager *dm, struct amdgpu_dm_connector *aconnector) @@ -600,7 +598,7 @@ void amdgpu_dm_setup_backlight_device(struct amdgpu_dis= play_manager *dm, dm->adev->mode_info.abm_level_property, ABM_SYSFS_CONTROL); } -EXPORT_IF_KUNIT(amdgpu_dm_setup_backlight_device); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_setup_backlight_device); =20 /** * DOC: panel power savings @@ -631,7 +629,7 @@ ssize_t panel_power_savings_show(struct device *device, =20 return sysfs_emit(buf, "%u\n", val); } -EXPORT_IF_KUNIT(panel_power_savings_show); +EXPORT_SYMBOL_IF_KUNIT(panel_power_savings_show); =20 VISIBLE_IF_KUNIT ssize_t panel_power_savings_store(struct device *device, @@ -666,7 +664,7 @@ ssize_t panel_power_savings_store(struct device *device, =20 return count; } -EXPORT_IF_KUNIT(panel_power_savings_store); +EXPORT_SYMBOL_IF_KUNIT(panel_power_savings_store); =20 static DEVICE_ATTR_RW(panel_power_savings); =20 @@ -696,42 +694,42 @@ amdgpu_dm_should_create_sysfs(struct amdgpu_dm_connec= tor *amdgpu_dm_connector) =20 return true; } -EXPORT_IF_KUNIT(amdgpu_dm_should_create_sysfs); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_should_create_sysfs); =20 #if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST) uint amdgpu_dm_get_dc_debug_mask(void) { return amdgpu_dc_debug_mask; } -EXPORT_IF_KUNIT(amdgpu_dm_get_dc_debug_mask); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_get_dc_debug_mask); =20 void amdgpu_dm_set_dc_debug_mask(uint val) { amdgpu_dc_debug_mask =3D val; } -EXPORT_IF_KUNIT(amdgpu_dm_set_dc_debug_mask); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_dc_debug_mask); =20 int amdgpu_dm_get_abm_level_param(void) { return amdgpu_dm_abm_level; } -EXPORT_IF_KUNIT(amdgpu_dm_get_abm_level_param); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_get_abm_level_param); =20 void amdgpu_dm_set_abm_level_param(int val) { amdgpu_dm_abm_level =3D val; } -EXPORT_IF_KUNIT(amdgpu_dm_set_abm_level_param); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_abm_level_param); =20 int amdgpu_dm_get_backlight_param(void) { return amdgpu_backlight; } -EXPORT_IF_KUNIT(amdgpu_dm_get_backlight_param); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_get_backlight_param); =20 void amdgpu_dm_set_backlight_param(int val) { amdgpu_backlight =3D val; } -EXPORT_IF_KUNIT(amdgpu_dm_set_backlight_param); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_backlight_param); #endif diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 0273701bd174..e3f4ee6e8380 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -35,7 +35,6 @@ #include "modules/color/color_gamma.h" #include "dm_helpers.h" =20 - /** * DOC: overview * @@ -172,7 +171,7 @@ void amdgpu_dm_init_color_mod(void) { setup_x_points_distribution(); } -EXPORT_IF_KUNIT(amdgpu_dm_init_color_mod); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_init_color_mod); =20 VISIBLE_IF_KUNIT INLINE_IFN_KUNIT struct fixed31_32 amdgpu_dm_fixpt_from_s3132(__u64 x) @@ -186,7 +185,7 @@ struct fixed31_32 amdgpu_dm_fixpt_from_s3132(__u64 x) val.value =3D x; return val; } -EXPORT_IF_KUNIT(amdgpu_dm_fixpt_from_s3132); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_fixpt_from_s3132); =20 #ifdef AMD_PRIVATE_COLOR /* Pre-defined Transfer Functions (TF) @@ -432,7 +431,7 @@ __extract_blob_lut(const struct drm_property_blob *blob= , uint32_t *size) *size =3D blob ? drm_color_lut_size(blob) : 0; return blob ? (struct drm_color_lut *)blob->data : NULL; } -EXPORT_IF_KUNIT(__extract_blob_lut); +EXPORT_SYMBOL_IF_KUNIT(__extract_blob_lut); =20 /** * __extract_blob_lut32 - Extracts the DRM lut and lut size from a blob. @@ -449,7 +448,7 @@ __extract_blob_lut32(const struct drm_property_blob *bl= ob, uint32_t *size) *size =3D blob ? drm_color_lut32_size(blob) : 0; return blob ? (struct drm_color_lut32 *)blob->data : NULL; } -EXPORT_IF_KUNIT(__extract_blob_lut32); +EXPORT_SYMBOL_IF_KUNIT(__extract_blob_lut32); =20 /** * __is_lut_linear - check if the given lut is a linear mapping of values @@ -491,7 +490,7 @@ bool __is_lut_linear(const struct drm_color_lut *lut, u= int32_t size) } return true; } -EXPORT_IF_KUNIT(__is_lut_linear); +EXPORT_SYMBOL_IF_KUNIT(__is_lut_linear); =20 /** * __drm_lut_to_dc_gamma - convert the drm_color_lut to dc_gamma. @@ -532,7 +531,7 @@ void __drm_lut_to_dc_gamma(const struct drm_color_lut *= lut, gamma->entries.blue[i] =3D dc_fixpt_from_fraction(b, MAX_DRM_LUT_VALUE); } } -EXPORT_IF_KUNIT(__drm_lut_to_dc_gamma); +EXPORT_SYMBOL_IF_KUNIT(__drm_lut_to_dc_gamma); =20 /** * __drm_lut32_to_dc_gamma - convert the drm_color_lut to dc_gamma. @@ -552,7 +551,7 @@ void __drm_lut32_to_dc_gamma(const struct drm_color_lut= 32 *lut, struct dc_gamma gamma->entries.blue[i] =3D dc_fixpt_from_fraction(lut[i].blue, MAX_DRM_L= UT32_VALUE); } } -EXPORT_IF_KUNIT(__drm_lut32_to_dc_gamma); +EXPORT_SYMBOL_IF_KUNIT(__drm_lut32_to_dc_gamma); =20 /** * __drm_ctm_to_dc_matrix - converts a DRM CTM to a DC CSC float matrix @@ -586,7 +585,7 @@ void __drm_ctm_to_dc_matrix(const struct drm_color_ctm = *ctm, matrix[i] =3D amdgpu_dm_fixpt_from_s3132(ctm->matrix[i - (i / 4)]); } } -EXPORT_IF_KUNIT(__drm_ctm_to_dc_matrix); +EXPORT_SYMBOL_IF_KUNIT(__drm_ctm_to_dc_matrix); =20 /** * __drm_ctm_3x4_to_dc_matrix - converts a DRM CTM 3x4 to a DC CSC float m= atrix @@ -610,7 +609,7 @@ void __drm_ctm_3x4_to_dc_matrix(const struct drm_color_= ctm_3x4 *ctm, matrix[i] =3D amdgpu_dm_fixpt_from_s3132(ctm->matrix[i]); } } -EXPORT_IF_KUNIT(__drm_ctm_3x4_to_dc_matrix); +EXPORT_SYMBOL_IF_KUNIT(__drm_ctm_3x4_to_dc_matrix); =20 /** * __set_legacy_tf - Calculates the legacy transfer function @@ -652,7 +651,7 @@ __set_legacy_tf(struct dc_transfer_func *func, =20 return res ? 0 : -ENOMEM; } -EXPORT_IF_KUNIT(__set_legacy_tf); +EXPORT_SYMBOL_IF_KUNIT(__set_legacy_tf); =20 /** * __set_output_tf - calculates the output transfer function based on expe= cted input space. @@ -712,7 +711,7 @@ __set_output_tf(struct dc_transfer_func *func, =20 return res ? 0 : -ENOMEM; } -EXPORT_IF_KUNIT(__set_output_tf); +EXPORT_SYMBOL_IF_KUNIT(__set_output_tf); =20 /** * __set_output_tf_32 - calculates the output transfer function based on e= xpected input space. @@ -770,14 +769,14 @@ __set_output_tf_32(struct dc_transfer_func *func, =20 return res ? 0 : -ENOMEM; } -EXPORT_IF_KUNIT(__set_output_tf_32); +EXPORT_SYMBOL_IF_KUNIT(__set_output_tf_32); =20 VISIBLE_IF_KUNIT void __set_tf_bypass(struct dc_transfer_func *tf) { tf->type =3D TF_TYPE_BYPASS; tf->tf =3D TRANSFER_FUNCTION_LINEAR; } -EXPORT_IF_KUNIT(__set_tf_bypass); +EXPORT_SYMBOL_IF_KUNIT(__set_tf_bypass); =20 VISIBLE_IF_KUNIT void __set_tf_distributed_points(struct dc_transfer_func = *tf, enum dc_transfer_func_predefined predefined_tf) @@ -786,7 +785,7 @@ VISIBLE_IF_KUNIT void __set_tf_distributed_points(struc= t dc_transfer_func *tf, tf->tf =3D predefined_tf; tf->sdr_ref_white_level =3D SDR_WHITE_LEVEL_INIT_VALUE; } -EXPORT_IF_KUNIT(__set_tf_distributed_points); +EXPORT_SYMBOL_IF_KUNIT(__set_tf_distributed_points); =20 VISIBLE_IF_KUNIT int amdgpu_dm_set_atomic_regamma(struct dc_transfer_func = *out_tf, const struct drm_color_lut *regamma_lut, @@ -819,7 +818,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_set_atomic_regamma(struc= t dc_transfer_func *out_t =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_set_atomic_regamma); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_atomic_regamma); =20 /** * __set_input_tf - calculates the input transfer function based on expect= ed @@ -857,7 +856,7 @@ VISIBLE_IF_KUNIT int __set_input_tf(struct dc_color_cap= s *caps, =20 return res ? 0 : -ENOMEM; } -EXPORT_IF_KUNIT(__set_input_tf); +EXPORT_SYMBOL_IF_KUNIT(__set_input_tf); =20 /** * __set_input_tf_32 - calculates the input transfer function based on exp= ected @@ -895,7 +894,7 @@ VISIBLE_IF_KUNIT int __set_input_tf_32(struct dc_color_= caps *caps, =20 return res ? 0 : -ENOMEM; } -EXPORT_IF_KUNIT(__set_input_tf_32); +EXPORT_SYMBOL_IF_KUNIT(__set_input_tf_32); =20 VISIBLE_IF_KUNIT enum dc_transfer_func_predefined @@ -926,7 +925,7 @@ amdgpu_tf_to_dc_tf(enum amdgpu_transfer_function tf) return TRANSFER_FUNCTION_GAMMA26; } } -EXPORT_IF_KUNIT(amdgpu_tf_to_dc_tf); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_tf_to_dc_tf); =20 VISIBLE_IF_KUNIT enum dc_transfer_func_predefined @@ -949,7 +948,7 @@ amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_ty= pe tf) return TRANSFER_FUNCTION_LINEAR; } } -EXPORT_IF_KUNIT(amdgpu_colorop_tf_to_dc_tf); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_colorop_tf_to_dc_tf); =20 VISIBLE_IF_KUNIT void __to_dc_lut3d_color(struct dc_rgb *rgb, @@ -960,7 +959,7 @@ void __to_dc_lut3d_color(struct dc_rgb *rgb, rgb->green =3D drm_color_lut_extract(lut.green, bit_precision); rgb->blue =3D drm_color_lut_extract(lut.blue, bit_precision); } -EXPORT_IF_KUNIT(__to_dc_lut3d_color); +EXPORT_SYMBOL_IF_KUNIT(__to_dc_lut3d_color); =20 VISIBLE_IF_KUNIT void __drm_3dlut_to_dc_3dlut(const struct drm_color_lut *lut, @@ -1006,7 +1005,7 @@ void __drm_3dlut_to_dc_3dlut(const struct drm_color_l= ut *lut, /* lut0 has 1229 points (lut_size/4 + 1) */ __to_dc_lut3d_color(&lut0[lut_i], lut[i], bit_depth); } -EXPORT_IF_KUNIT(__drm_3dlut_to_dc_3dlut); +EXPORT_SYMBOL_IF_KUNIT(__drm_3dlut_to_dc_3dlut); =20 VISIBLE_IF_KUNIT void __to_dc_lut3d_32_color(struct dc_rgb *rgb, @@ -1017,7 +1016,7 @@ void __to_dc_lut3d_32_color(struct dc_rgb *rgb, rgb->green =3D drm_color_lut32_extract(lut.green, bit_precision); rgb->blue =3D drm_color_lut32_extract(lut.blue, bit_precision); } -EXPORT_IF_KUNIT(__to_dc_lut3d_32_color); +EXPORT_SYMBOL_IF_KUNIT(__to_dc_lut3d_32_color); =20 VISIBLE_IF_KUNIT void __drm_3dlut32_to_dc_3dlut(const struct drm_color_lut32 *lut, @@ -1063,7 +1062,7 @@ void __drm_3dlut32_to_dc_3dlut(const struct drm_color= _lut32 *lut, /* lut0 has 1229 points (lut_size/4 + 1) */ __to_dc_lut3d_32_color(&lut0[lut_i], lut[i], bit_depth); } -EXPORT_IF_KUNIT(__drm_3dlut32_to_dc_3dlut); +EXPORT_SYMBOL_IF_KUNIT(__drm_3dlut32_to_dc_3dlut); =20 /* amdgpu_dm_atomic_lut3d - set DRM 3D LUT to DC stream * @drm_lut3d: user 3D LUT @@ -1093,7 +1092,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_atomic_lut3d(const st= ruct drm_color_lut *drm_lut MAX_COLOR_3DLUT_BITDEPTH); } } -EXPORT_IF_KUNIT(amdgpu_dm_atomic_lut3d); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_atomic_lut3d); =20 VISIBLE_IF_KUNIT int amdgpu_dm_atomic_shaper_lut(const struct drm_color_lu= t *shaper_lut, bool has_rom, @@ -1119,7 +1118,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_atomic_shaper_lut(cons= t struct drm_color_lut *sha =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_atomic_shaper_lut); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_atomic_shaper_lut); =20 VISIBLE_IF_KUNIT int amdgpu_dm_atomic_blend_lut(const struct drm_color_lut= *blend_lut, bool has_rom, @@ -1148,7 +1147,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_atomic_blend_lut(const= struct drm_color_lut *blen =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_atomic_blend_lut); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_atomic_blend_lut); =20 /** * amdgpu_dm_verify_lut3d_size - verifies if 3D LUT is supported and if us= er @@ -1194,7 +1193,7 @@ int amdgpu_dm_verify_lut3d_size(struct amdgpu_device = *adev, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_verify_lut3d_size); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_verify_lut3d_size); =20 /** * amdgpu_dm_verify_lut_sizes - verifies if DRM luts match the hw supporte= d sizes @@ -1231,7 +1230,7 @@ int amdgpu_dm_verify_lut_sizes(const struct drm_crtc_= state *crtc_state) =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_verify_lut_sizes); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_verify_lut_sizes); =20 /** * amdgpu_dm_check_crtc_color_mgmt: Check if DRM color props are programma= ble by DC. @@ -1339,7 +1338,7 @@ int amdgpu_dm_check_crtc_color_mgmt(struct dm_crtc_st= ate *crtc, =20 return r; } -EXPORT_IF_KUNIT(amdgpu_dm_check_crtc_color_mgmt); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_check_crtc_color_mgmt); =20 /** * amdgpu_dm_update_crtc_color_mgmt: Maps DRM color management to DC strea= m. @@ -1398,7 +1397,7 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_s= tate *crtc) =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_update_crtc_color_mgmt); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_update_crtc_color_mgmt); =20 static int map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc, @@ -1570,7 +1569,7 @@ __set_colorop_in_tf_1d_curve(struct dc_plane_state *d= c_plane_state, =20 return 0; } -EXPORT_IF_KUNIT(__set_colorop_in_tf_1d_curve); +EXPORT_SYMBOL_IF_KUNIT(__set_colorop_in_tf_1d_curve); =20 VISIBLE_IF_KUNIT int __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, @@ -1598,7 +1597,7 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state= *plane_state, =20 return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state); } -EXPORT_IF_KUNIT(__set_dm_plane_colorop_degamma); +EXPORT_SYMBOL_IF_KUNIT(__set_dm_plane_colorop_degamma); =20 VISIBLE_IF_KUNIT int __set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state, @@ -1640,7 +1639,7 @@ __set_dm_plane_colorop_3x4_matrix(struct drm_plane_st= ate *plane_state, =20 return 0; } -EXPORT_IF_KUNIT(__set_dm_plane_colorop_3x4_matrix); +EXPORT_SYMBOL_IF_KUNIT(__set_dm_plane_colorop_3x4_matrix); =20 VISIBLE_IF_KUNIT int __set_dm_plane_colorop_multiplier(struct drm_plane_state *plane_state, @@ -1670,7 +1669,7 @@ __set_dm_plane_colorop_multiplier(struct drm_plane_st= ate *plane_state, =20 return 0; } -EXPORT_IF_KUNIT(__set_dm_plane_colorop_multiplier); +EXPORT_SYMBOL_IF_KUNIT(__set_dm_plane_colorop_multiplier); =20 static int __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, @@ -1783,7 +1782,7 @@ VISIBLE_IF_KUNIT int __set_colorop_3dlut(const struct= drm_color_lut32 *drm_lut3d =20 return 0; } -EXPORT_IF_KUNIT(__set_colorop_3dlut); +EXPORT_SYMBOL_IF_KUNIT(__set_colorop_3dlut); =20 static int __set_dm_plane_colorop_3dlut(struct drm_plane_state *plane_state, @@ -2155,4 +2154,4 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_= state *crtc, =20 return amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state); } -EXPORT_IF_KUNIT(amdgpu_dm_update_plane_color_mgmt); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_update_plane_color_mgmt); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/dr= ivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index ea326f5b0941..e60464259bb6 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -39,21 +39,21 @@ const u64 amdgpu_dm_supported_degam_tfs =3D BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) | BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF) | BIT(DRM_COLOROP_1D_CURVE_GAMMA22); -EXPORT_IF_KUNIT(amdgpu_dm_supported_degam_tfs); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_supported_degam_tfs); =20 const u64 amdgpu_dm_supported_shaper_tfs =3D BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) | BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF) | BIT(DRM_COLOROP_1D_CURVE_BT2020_OETF) | BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV); -EXPORT_IF_KUNIT(amdgpu_dm_supported_shaper_tfs); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_supported_shaper_tfs); =20 const u64 amdgpu_dm_supported_blnd_tfs =3D BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) | BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) | BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF) | BIT(DRM_COLOROP_1D_CURVE_GAMMA22); -EXPORT_IF_KUNIT(amdgpu_dm_supported_blnd_tfs); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_supported_blnd_tfs); =20 #define MAX_COLOR_PIPELINE_OPS 10 =20 @@ -224,7 +224,7 @@ amdgpu_dm_build_default_pipeline(struct drm_device *dev= , struct drm_plane *plane =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_build_default_pipeline); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_build_default_pipeline); =20 int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct = drm_prop_enum_list *list) { @@ -235,4 +235,4 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_pl= ane *plane, struct drm_pr =20 return amdgpu_dm_build_default_pipeline(dev, plane, hw_3d_lut, list); } -EXPORT_IF_KUNIT(amdgpu_dm_initialize_default_pipeline); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_initialize_default_pipeline); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_connector.c b/= drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_connector.c index fe310b6d9f60..f613e8ac02bd 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_connector.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_connector.c @@ -93,7 +93,7 @@ static const struct drm_encoder_funcs amdgpu_dm_encoder_f= uncs =3D { VISIBLE_IF_KUNIT void dm_encoder_helper_disable(struct drm_encoder *encode= r) { } -EXPORT_IF_KUNIT(dm_encoder_helper_disable); +EXPORT_SYMBOL_IF_KUNIT(dm_encoder_helper_disable); =20 VISIBLE_IF_KUNIT int dm_encoder_helper_atomic_check(struct drm_encoder *en= coder, struct drm_crtc_state *crtc_state, @@ -165,7 +165,7 @@ VISIBLE_IF_KUNIT int dm_encoder_helper_atomic_check(str= uct drm_encoder *encoder, } return 0; } -EXPORT_IF_KUNIT(dm_encoder_helper_atomic_check); +EXPORT_SYMBOL_IF_KUNIT(dm_encoder_helper_atomic_check); =20 const struct drm_encoder_helper_funcs amdgpu_dm_encoder_helper_funcs =3D { .disable =3D dm_encoder_helper_disable, @@ -190,7 +190,7 @@ int amdgpu_dm_get_encoder_crtc_mask(struct amdgpu_devic= e *adev) return 0x3f; } } -EXPORT_IF_KUNIT(amdgpu_dm_get_encoder_crtc_mask); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_get_encoder_crtc_mask); =20 int amdgpu_dm_encoder_init(struct drm_device *dev, struct amdgpu_encoder *aencoder, @@ -234,7 +234,7 @@ VISIBLE_IF_KUNIT enum drm_mode_subconnector get_subconn= ector_type(struct dc_link return DRM_MODE_SUBCONNECTOR_Unknown; } } -EXPORT_IF_KUNIT(get_subconnector_type); +EXPORT_SYMBOL_IF_KUNIT(get_subconnector_type); =20 VISIBLE_IF_KUNIT void update_subconnector_property(struct amdgpu_dm_connec= tor *aconnector) { @@ -252,7 +252,7 @@ VISIBLE_IF_KUNIT void update_subconnector_property(stru= ct amdgpu_dm_connector *a connector->dev->mode_config.dp_subconnector_property, subconnector); } -EXPORT_IF_KUNIT(update_subconnector_property); +EXPORT_SYMBOL_IF_KUNIT(update_subconnector_property); =20 static int amdgpu_dm_connector_get_modes(struct drm_connector *connector); =20 @@ -294,7 +294,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_fbc_init(struct drm_con= nector *connector) } =20 } -EXPORT_IF_KUNIT(amdgpu_dm_fbc_init); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_fbc_init); =20 =20 int amdgpu_dm_detect_mst_link_for_all_connectors(struct drm_device *dev) @@ -332,7 +332,7 @@ int amdgpu_dm_detect_mst_link_for_all_connectors(struct= drm_device *dev) =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_detect_mst_link_for_all_connectors); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_detect_mst_link_for_all_connectors); =20 VISIBLE_IF_KUNIT void hdmi_cec_unset_edid(struct amdgpu_dm_connector *acon= nector) { @@ -343,7 +343,7 @@ VISIBLE_IF_KUNIT void hdmi_cec_unset_edid(struct amdgpu= _dm_connector *aconnector =20 cec_notifier_phys_addr_invalidate(n); } -EXPORT_IF_KUNIT(hdmi_cec_unset_edid); +EXPORT_SYMBOL_IF_KUNIT(hdmi_cec_unset_edid); =20 void amdgpu_dm_hdmi_cec_set_edid(struct amdgpu_dm_connector *aconnector) { @@ -356,7 +356,7 @@ void amdgpu_dm_hdmi_cec_set_edid(struct amdgpu_dm_conne= ctor *aconnector) cec_notifier_set_phys_addr(n, connector->display_info.source_physical_address); } -EXPORT_IF_KUNIT(amdgpu_dm_hdmi_cec_set_edid); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_hdmi_cec_set_edid); =20 void amdgpu_dm_s3_handle_hdmi_cec(struct drm_device *ddev, bool suspend) { @@ -377,7 +377,7 @@ void amdgpu_dm_s3_handle_hdmi_cec(struct drm_device *dd= ev, bool suspend) } drm_connector_list_iter_end(&conn_iter); } -EXPORT_IF_KUNIT(amdgpu_dm_s3_handle_hdmi_cec); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_s3_handle_hdmi_cec); =20 =20 struct drm_connector * @@ -398,7 +398,7 @@ amdgpu_dm_find_first_crtc_matching_connector(struct drm= _atomic_commit *state, =20 return NULL; } -EXPORT_IF_KUNIT(amdgpu_dm_find_first_crtc_matching_connector); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_find_first_crtc_matching_connector); =20 VISIBLE_IF_KUNIT void amdgpu_dm_set_panel_type(struct amdgpu_dm_connector = *aconnector) { @@ -467,7 +467,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_set_panel_type(struct a= mdgpu_dm_connector *aconn =20 drm_dbg_kms(aconnector->base.dev, "Panel type: %d\n", link->panel_type); } -EXPORT_IF_KUNIT(amdgpu_dm_set_panel_type); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_panel_type); =20 VISIBLE_IF_KUNIT void amdgpu_dm_update_cacp_caps(struct amdgpu_dm_connecto= r *aconnector) { @@ -494,7 +494,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_update_cacp_caps(struct= amdgpu_dm_connector *aco drm_dbg_kms(aconnector->base.dev, "cacp_supported: %d\n", link->panel_config.cacp.cacp_supported); } -EXPORT_IF_KUNIT(amdgpu_dm_update_cacp_caps); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_update_cacp_caps); =20 DEFINE_FREE(sink_release, struct dc_sink *, if (_T) dc_sink_release(_T)) =20 @@ -659,7 +659,7 @@ void amdgpu_dm_update_connector_after_detect( if (!drm_kms_helper_is_poll_worker()) mutex_unlock(&dev->mode_config.mutex); } -EXPORT_IF_KUNIT(amdgpu_dm_update_connector_after_detect); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_update_connector_after_detect); =20 enum dc_color_depth amdgpu_dm_convert_color_depth_from_display_info(const struct drm_connector= *connector, @@ -722,7 +722,7 @@ amdgpu_dm_convert_color_depth_from_display_info(const s= truct drm_connector *conn return COLOR_DEPTH_UNDEFINED; } } -EXPORT_IF_KUNIT(amdgpu_dm_convert_color_depth_from_display_info); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_convert_color_depth_from_display_info); =20 VISIBLE_IF_KUNIT enum dc_aspect_ratio get_aspect_ratio(const struct drm_display_mode *mode_in) @@ -730,7 +730,7 @@ get_aspect_ratio(const struct drm_display_mode *mode_in) /* 1-1 mapping, since both enums follow the HDMI spec. */ return (enum dc_aspect_ratio) mode_in->picture_aspect_ratio; } -EXPORT_IF_KUNIT(get_aspect_ratio); +EXPORT_SYMBOL_IF_KUNIT(get_aspect_ratio); =20 enum dc_color_space amdgpu_dm_get_output_color_space(const struct dc_crtc_timing *dc_crtc_timi= ng, @@ -790,7 +790,7 @@ amdgpu_dm_get_output_color_space(const struct dc_crtc_t= iming *dc_crtc_timing, =20 return color_space; } -EXPORT_IF_KUNIT(amdgpu_dm_get_output_color_space); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_get_output_color_space); =20 VISIBLE_IF_KUNIT enum display_content_type get_output_content_type(const struct drm_connector_state *connector_state) @@ -809,7 +809,7 @@ get_output_content_type(const struct drm_connector_stat= e *connector_state) return DISPLAY_CONTENT_TYPE_GAME; } } -EXPORT_IF_KUNIT(get_output_content_type); +EXPORT_SYMBOL_IF_KUNIT(get_output_content_type); =20 VISIBLE_IF_KUNIT bool adjust_colour_depth_from_display_info( struct dc_crtc_timing *timing_out, @@ -847,7 +847,7 @@ VISIBLE_IF_KUNIT bool adjust_colour_depth_from_display_= info( } while (--depth > COLOR_DEPTH_666); return false; } -EXPORT_IF_KUNIT(adjust_colour_depth_from_display_info); +EXPORT_SYMBOL_IF_KUNIT(adjust_colour_depth_from_display_info); =20 VISIBLE_IF_KUNIT void fill_stream_properties_from_drm_display_mode( struct dc_stream_state *stream, @@ -962,7 +962,7 @@ VISIBLE_IF_KUNIT void fill_stream_properties_from_drm_d= isplay_mode( stream->output_color_space =3D amdgpu_dm_get_output_color_space(timing_ou= t, connector_state); stream->content_type =3D get_output_content_type(connector_state); } -EXPORT_IF_KUNIT(fill_stream_properties_from_drm_display_mode); +EXPORT_SYMBOL_IF_KUNIT(fill_stream_properties_from_drm_display_mode); =20 VISIBLE_IF_KUNIT void copy_crtc_timing_for_drm_display_mode(const struct drm_display_mode *src_m= ode, @@ -983,7 +983,7 @@ copy_crtc_timing_for_drm_display_mode(const struct drm_= display_mode *src_mode, dst_mode->crtc_vsync_end =3D src_mode->crtc_vsync_end; dst_mode->crtc_vtotal =3D src_mode->crtc_vtotal; } -EXPORT_IF_KUNIT(copy_crtc_timing_for_drm_display_mode); +EXPORT_SYMBOL_IF_KUNIT(copy_crtc_timing_for_drm_display_mode); =20 VISIBLE_IF_KUNIT void decide_crtc_timing_for_drm_display_mode(struct drm_display_mode *drm_mode, @@ -1000,7 +1000,7 @@ decide_crtc_timing_for_drm_display_mode(struct drm_di= splay_mode *drm_mode, /* no scaling nor amdgpu inserted, no need to patch */ } } -EXPORT_IF_KUNIT(decide_crtc_timing_for_drm_display_mode); +EXPORT_SYMBOL_IF_KUNIT(decide_crtc_timing_for_drm_display_mode); =20 static struct dc_sink * create_fake_sink(struct drm_device *dev, struct dc_link *link) @@ -1106,7 +1106,7 @@ amdgpu_dm_get_highest_refresh_rate_mode(struct amdgpu= _dm_connector *aconnector, drm_mode_copy(&aconnector->freesync_vid_base, m_pref); return m_pref; } -EXPORT_IF_KUNIT(amdgpu_dm_get_highest_refresh_rate_mode); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_get_highest_refresh_rate_mode); =20 bool amdgpu_dm_is_freesync_video_mode(const struct drm_display_mode *mode, struct amdgpu_dm_connector *aconnector) @@ -1134,7 +1134,7 @@ bool amdgpu_dm_is_freesync_video_mode(const struct dr= m_display_mode *mode, else return true; } -EXPORT_IF_KUNIT(amdgpu_dm_is_freesync_video_mode); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_is_freesync_video_mode); =20 #if defined(CONFIG_DRM_AMD_DC_FP) static void update_dsc_caps(struct amdgpu_dm_connector *aconnector, @@ -1417,7 +1417,7 @@ void amdgpu_dm_update_stream_scaling_settings(struct = drm_device *dev, dst.x, dst.y, dst.width, dst.height); =20 } -EXPORT_IF_KUNIT(amdgpu_dm_update_stream_scaling_settings); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_update_stream_scaling_settings); =20 VISIBLE_IF_KUNIT struct dc_stream_state * create_stream_for_sink(struct drm_connector *connector, @@ -1605,7 +1605,7 @@ create_stream_for_sink(struct drm_connector *connecto= r, =20 return stream; } -EXPORT_IF_KUNIT(create_stream_for_sink); +EXPORT_SYMBOL_IF_KUNIT(create_stream_for_sink); =20 /** * amdgpu_dm_connector_poll - Poll a connector to see if it's connected to= a display @@ -1673,7 +1673,7 @@ amdgpu_dm_connector_poll(struct amdgpu_dm_connector *= aconnector, bool force) mutex_unlock(&aconnector->hpd_lock); return status; } -EXPORT_IF_KUNIT(amdgpu_dm_connector_poll); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_poll); =20 /* * Apple Studio Display exposes two SST DP links for a 2x1 tiled panel. @@ -1757,7 +1757,7 @@ amdgpu_dm_connector_detect(struct drm_connector *conn= ector, bool force) return (aconnector->dc_sink ? connector_status_connected : connector_status_disconnected); } -EXPORT_IF_KUNIT(amdgpu_dm_connector_detect); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_detect); =20 int amdgpu_dm_connector_atomic_set_property(struct drm_connector *connecto= r, struct drm_connector_state *connector_state, @@ -1824,7 +1824,7 @@ int amdgpu_dm_connector_atomic_set_property(struct dr= m_connector *connector, =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_connector_atomic_set_property); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_atomic_set_property); =20 int amdgpu_dm_connector_atomic_get_property(struct drm_connector *connecto= r, const struct drm_connector_state *state, @@ -1874,7 +1874,7 @@ int amdgpu_dm_connector_atomic_get_property(struct dr= m_connector *connector, =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_connector_atomic_get_property); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_atomic_get_property); =20 VISIBLE_IF_KUNIT void amdgpu_dm_connector_unregister(struct drm_connector = *connector) { @@ -1886,7 +1886,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_connector_unregister(= struct drm_connector *conne cec_notifier_conn_unregister(amdgpu_dm_connector->notifier); drm_dp_aux_unregister(&amdgpu_dm_connector->dm_dp_aux.aux); } -EXPORT_IF_KUNIT(amdgpu_dm_connector_unregister); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_unregister); =20 VISIBLE_IF_KUNIT void amdgpu_dm_connector_destroy(struct drm_connector *co= nnector) { @@ -1929,7 +1929,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_connector_destroy(str= uct drm_connector *connecto =20 kfree(connector); } -EXPORT_IF_KUNIT(amdgpu_dm_connector_destroy); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_destroy); =20 void amdgpu_dm_connector_funcs_reset(struct drm_connector *connector) { @@ -1963,7 +1963,7 @@ void amdgpu_dm_connector_funcs_reset(struct drm_conne= ctor *connector) state->abm_level =3D amdgpu_dm_abm_level; } } -EXPORT_IF_KUNIT(amdgpu_dm_connector_funcs_reset); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_funcs_reset); =20 struct drm_connector_state * amdgpu_dm_connector_atomic_duplicate_state(struct drm_connector *connector) @@ -1989,7 +1989,7 @@ amdgpu_dm_connector_atomic_duplicate_state(struct drm= _connector *connector) new_state->pbn =3D state->pbn; return &new_state->base; } -EXPORT_IF_KUNIT(amdgpu_dm_connector_atomic_duplicate_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_atomic_duplicate_state); =20 VISIBLE_IF_KUNIT int amdgpu_dm_connector_late_register(struct drm_connector *connector) @@ -2021,7 +2021,7 @@ amdgpu_dm_connector_late_register(struct drm_connecto= r *connector) =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_connector_late_register); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_late_register); =20 VISIBLE_IF_KUNIT void amdgpu_dm_connector_funcs_force(struct drm_connector= *connector) { @@ -2059,7 +2059,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_connector_funcs_force= (struct drm_connector *conn &dc_em_sink->edid_caps); } } -EXPORT_IF_KUNIT(amdgpu_dm_connector_funcs_force); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_funcs_force); =20 static const struct drm_connector_funcs amdgpu_dm_connector_funcs =3D { .reset =3D amdgpu_dm_connector_funcs_reset, @@ -2125,7 +2125,7 @@ VISIBLE_IF_KUNIT void create_eml_sink(struct amdgpu_d= m_connector *aconnector) dc_sink_retain(aconnector->dc_sink); } } -EXPORT_IF_KUNIT(create_eml_sink); +EXPORT_SYMBOL_IF_KUNIT(create_eml_sink); =20 VISIBLE_IF_KUNIT void handle_edid_mgmt(struct amdgpu_dm_connector *aconnec= tor) { @@ -2142,7 +2142,7 @@ VISIBLE_IF_KUNIT void handle_edid_mgmt(struct amdgpu_= dm_connector *aconnector) =20 create_eml_sink(aconnector); } -EXPORT_IF_KUNIT(handle_edid_mgmt); +EXPORT_SYMBOL_IF_KUNIT(handle_edid_mgmt); =20 VISIBLE_IF_KUNIT enum dc_status dm_validate_stream_and_context(struct dc *= dc, struct dc_stream_state *stream) @@ -2206,7 +2206,7 @@ VISIBLE_IF_KUNIT enum dc_status dm_validate_stream_an= d_context(struct dc *dc, =20 return dc_result; } -EXPORT_IF_KUNIT(dm_validate_stream_and_context); +EXPORT_SYMBOL_IF_KUNIT(dm_validate_stream_and_context); =20 static enum dc_status dm_validate_stream_color_format(const struct drm_connector_state *drm_stat= e, @@ -2455,7 +2455,7 @@ amdgpu_dm_create_validate_stream_for_sink(struct drm_= connector *connector, */ return NULL; } -EXPORT_IF_KUNIT(amdgpu_dm_create_validate_stream_for_sink); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_create_validate_stream_for_sink); =20 enum drm_mode_status amdgpu_dm_connector_mode_valid(struct drm_connector *= connector, const struct drm_display_mode *mode) @@ -2509,7 +2509,7 @@ enum drm_mode_status amdgpu_dm_connector_mode_valid(s= truct drm_connector *connec /* TODO: error handling*/ return result; } -EXPORT_IF_KUNIT(amdgpu_dm_connector_mode_valid); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_mode_valid); =20 int amdgpu_dm_fill_hdr_info_packet(const struct drm_connector_state *state, struct dc_info_packet *out) @@ -2569,7 +2569,7 @@ int amdgpu_dm_fill_hdr_info_packet(const struct drm_c= onnector_state *state, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_fill_hdr_info_packet); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_fill_hdr_info_packet); =20 static int amdgpu_dm_connector_atomic_check(struct drm_connector *conn, @@ -2686,7 +2686,7 @@ int amdgpu_dm_convert_dc_color_depth_into_bpc(enum dc= _color_depth display_color_ } return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_convert_dc_color_depth_into_bpc); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_convert_dc_color_depth_into_bpc); =20 VISIBLE_IF_KUNIT int to_drm_connector_type(enum signal_type st, uint32_t c= onnector_id) { @@ -2722,7 +2722,7 @@ VISIBLE_IF_KUNIT int to_drm_connector_type(enum signa= l_type st, uint32_t connect return DRM_MODE_CONNECTOR_Unknown; } } -EXPORT_IF_KUNIT(to_drm_connector_type); +EXPORT_SYMBOL_IF_KUNIT(to_drm_connector_type); =20 VISIBLE_IF_KUNIT struct drm_encoder *amdgpu_dm_connector_to_encoder(struct= drm_connector *connector) { @@ -2734,7 +2734,7 @@ VISIBLE_IF_KUNIT struct drm_encoder *amdgpu_dm_connec= tor_to_encoder(struct drm_c =20 return NULL; } -EXPORT_IF_KUNIT(amdgpu_dm_connector_to_encoder); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_to_encoder); =20 VISIBLE_IF_KUNIT void amdgpu_dm_get_native_mode(struct drm_connector *conn= ector) { @@ -2764,7 +2764,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_get_native_mode(struc= t drm_connector *connector) =20 } } -EXPORT_IF_KUNIT(amdgpu_dm_get_native_mode); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_get_native_mode); =20 VISIBLE_IF_KUNIT struct drm_display_mode * amdgpu_dm_create_common_mode(struct drm_encoder *encoder, @@ -2789,7 +2789,7 @@ amdgpu_dm_create_common_mode(struct drm_encoder *enco= der, return mode; =20 } -EXPORT_IF_KUNIT(amdgpu_dm_create_common_mode); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_create_common_mode); =20 static const struct amdgpu_dm_mode_size { char name[DRM_DISPLAY_MODE_LEN]; @@ -2857,7 +2857,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_connector_add_common_= modes(struct drm_encoder *e amdgpu_dm_connector->num_modes++; } } -EXPORT_IF_KUNIT(amdgpu_dm_connector_add_common_modes); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_add_common_modes); =20 void amdgpu_set_panel_orientation(struct drm_connector *connector) { @@ -2964,7 +2964,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_connector_ddc_get_mod= es(struct drm_connector *co amdgpu_dm_connector->num_modes =3D 0; } } -EXPORT_IF_KUNIT(amdgpu_dm_connector_ddc_get_modes); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_ddc_get_modes); =20 VISIBLE_IF_KUNIT bool is_duplicate_mode(struct amdgpu_dm_connector *aconne= ctor, struct drm_display_mode *mode) @@ -2978,7 +2978,7 @@ VISIBLE_IF_KUNIT bool is_duplicate_mode(struct amdgpu= _dm_connector *aconnector, =20 return false; } -EXPORT_IF_KUNIT(is_duplicate_mode); +EXPORT_SYMBOL_IF_KUNIT(is_duplicate_mode); =20 VISIBLE_IF_KUNIT uint add_fs_modes(struct amdgpu_dm_connector *aconnector) { @@ -3055,7 +3055,7 @@ VISIBLE_IF_KUNIT uint add_fs_modes(struct amdgpu_dm_c= onnector *aconnector) out: return new_modes_count; } -EXPORT_IF_KUNIT(add_fs_modes); +EXPORT_SYMBOL_IF_KUNIT(add_fs_modes); =20 VISIBLE_IF_KUNIT void amdgpu_dm_connector_add_freesync_modes(struct drm_co= nnector *connector, const struct drm_edid *drm_edid) @@ -3080,7 +3080,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_connector_add_freesyn= c_modes(struct drm_connecto amdgpu_dm_connector->num_modes +=3D add_fs_modes(amdgpu_dm_connector); } -EXPORT_IF_KUNIT(amdgpu_dm_connector_add_freesync_modes); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_connector_add_freesync_modes); =20 static int amdgpu_dm_connector_get_modes(struct drm_connector *connector) { @@ -3357,13 +3357,13 @@ VISIBLE_IF_KUNIT int amdgpu_dm_i2c_xfer(struct i2c_= adapter *i2c_adap, kfree(cmd.payloads); return result; } -EXPORT_IF_KUNIT(amdgpu_dm_i2c_xfer); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_i2c_xfer); =20 VISIBLE_IF_KUNIT u32 amdgpu_dm_i2c_func(struct i2c_adapter *adap) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; } -EXPORT_IF_KUNIT(amdgpu_dm_i2c_func); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_i2c_func); =20 static const struct i2c_algorithm amdgpu_dm_i2c_algo =3D { .master_xfer =3D amdgpu_dm_i2c_xfer, @@ -3766,7 +3766,7 @@ VISIBLE_IF_KUNIT void parse_edid_displayid_vrr(struct= drm_connector *connector, j++; } } -EXPORT_IF_KUNIT(parse_edid_displayid_vrr); +EXPORT_SYMBOL_IF_KUNIT(parse_edid_displayid_vrr); =20 VISIBLE_IF_KUNIT int get_amd_vsdb(struct amdgpu_dm_connector *aconnector, struct amdgpu_hdmi_vsdb_info *vsdb_info) @@ -3778,7 +3778,7 @@ VISIBLE_IF_KUNIT int get_amd_vsdb(struct amdgpu_dm_co= nnector *aconnector, =20 return connector->display_info.amd_vsdb.version !=3D 0; } -EXPORT_IF_KUNIT(get_amd_vsdb); +EXPORT_SYMBOL_IF_KUNIT(get_amd_vsdb); =20 VISIBLE_IF_KUNIT int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconn= ector, const struct edid *edid, @@ -3811,7 +3811,7 @@ VISIBLE_IF_KUNIT int parse_hdmi_amd_vsdb(struct amdgp= u_dm_connector *aconnector, =20 return valid_vsdb_found ? i : -ENODEV; } -EXPORT_IF_KUNIT(parse_hdmi_amd_vsdb); +EXPORT_SYMBOL_IF_KUNIT(parse_hdmi_amd_vsdb); =20 /** * amdgpu_dm_update_freesync_caps - Update Freesync capabilities diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c b/driver= s/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c index c58cbf00543f..c36d2499d2d5 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c @@ -60,7 +60,7 @@ enum amdgpu_dm_pipe_crc_source dm_parse_crc_source(const = char *source) =20 return AMDGPU_DM_PIPE_CRC_SOURCE_INVALID; } -EXPORT_IF_KUNIT(dm_parse_crc_source); +EXPORT_SYMBOL_IF_KUNIT(dm_parse_crc_source); =20 VISIBLE_IF_KUNIT bool dm_is_crc_source_crtc(enum amdgpu_dm_pipe_crc_source src) @@ -68,7 +68,7 @@ bool dm_is_crc_source_crtc(enum amdgpu_dm_pipe_crc_source= src) return (src =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_CRTC) || (src =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER); } -EXPORT_IF_KUNIT(dm_is_crc_source_crtc); +EXPORT_SYMBOL_IF_KUNIT(dm_is_crc_source_crtc); =20 VISIBLE_IF_KUNIT bool dm_is_crc_source_dprx(enum amdgpu_dm_pipe_crc_source src) @@ -76,7 +76,7 @@ bool dm_is_crc_source_dprx(enum amdgpu_dm_pipe_crc_source= src) return (src =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_DPRX) || (src =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER); } -EXPORT_IF_KUNIT(dm_is_crc_source_dprx); +EXPORT_SYMBOL_IF_KUNIT(dm_is_crc_source_dprx); =20 VISIBLE_IF_KUNIT bool dm_need_crc_dither(enum amdgpu_dm_pipe_crc_source src) @@ -85,7 +85,7 @@ bool dm_need_crc_dither(enum amdgpu_dm_pipe_crc_source sr= c) (src =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER) || (src =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_NONE); } -EXPORT_IF_KUNIT(dm_need_crc_dither); +EXPORT_SYMBOL_IF_KUNIT(dm_need_crc_dither); =20 /** * dm_need_dp_aux() - Does this source transition require the DP AUX handl= e? @@ -104,7 +104,7 @@ bool dm_need_dp_aux(enum amdgpu_dm_pipe_crc_source sour= ce, return dm_is_crc_source_dprx(source) || (source =3D=3D AMDGPU_DM_PIPE_CRC_SOURCE_NONE && dm_is_crc_source_= dprx(cur_crc_src)); } -EXPORT_IF_KUNIT(dm_need_dp_aux); +EXPORT_SYMBOL_IF_KUNIT(dm_need_dp_aux); =20 /** * dm_crc_source_should_start_dprx() - Should drm_dp_start_crc() be called? @@ -124,7 +124,7 @@ bool dm_crc_source_should_start_dprx(enum amdgpu_dm_pip= e_crc_source source, amdgpu_dm_is_valid_crc_source(source) && dm_is_crc_source_dprx(source); } -EXPORT_IF_KUNIT(dm_crc_source_should_start_dprx); +EXPORT_SYMBOL_IF_KUNIT(dm_crc_source_should_start_dprx); =20 /** * dm_crc_source_should_stop_dprx() - Should drm_dp_stop_crc() be called? @@ -144,7 +144,7 @@ bool dm_crc_source_should_stop_dprx(enum amdgpu_dm_pipe= _crc_source source, !amdgpu_dm_is_valid_crc_source(source) && dm_is_crc_source_dprx(cur_crc_src); } -EXPORT_IF_KUNIT(dm_crc_source_should_stop_dprx); +EXPORT_SYMBOL_IF_KUNIT(dm_crc_source_should_stop_dprx); =20 const char *const *amdgpu_dm_crtc_get_crc_sources(struct drm_crtc *crtc, size_t *count) @@ -152,7 +152,7 @@ const char *const *amdgpu_dm_crtc_get_crc_sources(struc= t drm_crtc *crtc, *count =3D ARRAY_SIZE(pipe_crc_sources); return pipe_crc_sources; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_get_crc_sources); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_get_crc_sources); =20 #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY static void update_phy_id_mapping(struct amdgpu_device *adev) @@ -565,7 +565,7 @@ amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc,= const char *src_name, *values_cnt =3D 3; return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_verify_crc_source); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_verify_crc_source); =20 int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc, struct dm_crtc_state *dm_crtc_state, @@ -643,7 +643,7 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc= *crtc, =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_configure_crc_source); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_configure_crc_source); =20 int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_n= ame) { @@ -821,7 +821,7 @@ int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc= , const char *src_name) =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_set_crc_source); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_set_crc_source); =20 /** * amdgpu_dm_crtc_handle_crc_irq: Report to DRM the CRC on given CRTC. @@ -879,7 +879,7 @@ void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crt= c) drm_crtc_accurate_vblank_count(crtc), crcs); } } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_handle_crc_irq); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_handle_crc_irq); =20 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) void amdgpu_dm_crtc_handle_crc_window_irq(struct drm_crtc *crtc) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drive= rs/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c index 790296cec5d6..76353167655c 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c @@ -59,7 +59,7 @@ void amdgpu_dm_crtc_handle_vblank(struct amdgpu_crtc *acr= tc) =20 spin_unlock_irqrestore(&dev->event_lock, flags); } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_handle_vblank); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_handle_vblank); =20 bool amdgpu_dm_crtc_modeset_required(struct drm_crtc_state *crtc_state, struct dc_stream_state *new_stream, @@ -67,7 +67,7 @@ bool amdgpu_dm_crtc_modeset_required(struct drm_crtc_stat= e *crtc_state, { return crtc_state->active && drm_atomic_crtc_needs_modeset(crtc_state); } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_modeset_required); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_modeset_required); =20 bool amdgpu_dm_crtc_vrr_active_irq(struct amdgpu_crtc *acrtc) =20 @@ -77,7 +77,7 @@ bool amdgpu_dm_crtc_vrr_active_irq(struct amdgpu_crtc *ac= rtc) acrtc->dm_irq_params.freesync_config.state =3D=3D VRR_STATE_ACTIVE_FIXED; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_vrr_active_irq); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_vrr_active_irq); =20 int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crtc, bool enable) { @@ -97,14 +97,14 @@ int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crt= c, bool enable) acrtc->crtc_id, enable ? "en" : "dis", rc); return rc; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_set_vupdate_irq); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_set_vupdate_irq); =20 bool amdgpu_dm_crtc_vrr_active(const struct dm_crtc_state *dm_state) { return dm_state->freesync_config.state =3D=3D VRR_STATE_ACTIVE_VARIABLE || dm_state->freesync_config.state =3D=3D VRR_STATE_ACTIVE_FIXED; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_vrr_active); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_vrr_active); =20 /** * amdgpu_dm_crtc_set_static_screen_optimze() - Toggle static screen optim= izations. @@ -139,7 +139,7 @@ void amdgpu_dm_crtc_set_static_screen_optimze( amdgpu_dm_psr_set_event(dm, stream, set_vsync_event, psr_event_vsync, set_vsync_event); } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_set_static_screen_optimze); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_set_static_screen_optimze); =20 bool amdgpu_dm_is_headless(struct amdgpu_device *adev) { @@ -167,7 +167,7 @@ bool amdgpu_dm_is_headless(struct amdgpu_device *adev) drm_connector_list_iter_end(&iter); return is_headless; } -EXPORT_IF_KUNIT(amdgpu_dm_is_headless); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_is_headless); =20 VISIBLE_IF_KUNIT void amdgpu_dm_idle_worker(struct work_struct *work) { @@ -203,7 +203,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_idle_worker(struct work= _struct *work) } idle_work->dm->idle_workqueue->running =3D false; } -EXPORT_IF_KUNIT(amdgpu_dm_idle_worker); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_idle_worker); =20 struct idle_workqueue *idle_create_workqueue(struct amdgpu_device *adev) { @@ -220,7 +220,7 @@ struct idle_workqueue *idle_create_workqueue(struct amd= gpu_device *adev) =20 return idle_work; } -EXPORT_IF_KUNIT(idle_create_workqueue); +EXPORT_SYMBOL_IF_KUNIT(idle_create_workqueue); =20 VISIBLE_IF_KUNIT void amdgpu_dm_crtc_vblank_control_worker(struct work_str= uct *work) { @@ -247,7 +247,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_crtc_vblank_control_wor= ker(struct work_struct *w =20 kfree(vblank_work); } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_vblank_control_worker); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_vblank_control_worker); =20 static inline int amdgpu_dm_crtc_set_vblank(struct drm_crtc *crtc, bool en= able) { @@ -401,13 +401,13 @@ int amdgpu_dm_crtc_enable_vblank(struct drm_crtc *crt= c) { return amdgpu_dm_crtc_set_vblank(crtc, true); } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_enable_vblank); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_enable_vblank); =20 void amdgpu_dm_crtc_disable_vblank(struct drm_crtc *crtc) { amdgpu_dm_crtc_set_vblank(crtc, false); } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_disable_vblank); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_disable_vblank); =20 VISIBLE_IF_KUNIT void amdgpu_dm_crtc_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *state) @@ -424,7 +424,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_crtc_destroy_state(stru= ct drm_crtc *crtc, =20 kfree(state); } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_destroy_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_destroy_state); =20 VISIBLE_IF_KUNIT struct drm_crtc_state *amdgpu_dm_crtc_duplicate_state(str= uct drm_crtc *crtc) { @@ -461,7 +461,7 @@ VISIBLE_IF_KUNIT struct drm_crtc_state *amdgpu_dm_crtc_= duplicate_state(struct dr =20 return &state->base; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_duplicate_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_duplicate_state); =20 static void amdgpu_dm_crtc_destroy(struct drm_crtc *crtc) { @@ -488,7 +488,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_crtc_reset_state(struct= drm_crtc *crtc) =20 __drm_atomic_helper_crtc_reset(crtc, &state->base); } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_reset_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_reset_state); =20 #ifdef CONFIG_DEBUG_FS static int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc) @@ -622,7 +622,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_crtc_count_crtc_active_p= lanes(struct drm_crtc_sta =20 return num_active; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_count_crtc_active_planes); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_count_crtc_active_planes); =20 VISIBLE_IF_KUNIT void amdgpu_dm_crtc_update_crtc_active_planes(struct drm_= crtc *crtc, struct drm_crtc_state *new_crtc_state) @@ -638,7 +638,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_crtc_update_crtc_active= _planes(struct drm_crtc * dm_new_crtc_state->active_planes =3D amdgpu_dm_crtc_count_crtc_active_planes(new_crtc_state); } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_update_crtc_active_planes); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_update_crtc_active_planes); =20 VISIBLE_IF_KUNIT bool amdgpu_dm_crtc_helper_mode_fixup(struct drm_crtc *cr= tc, const struct drm_display_mode *mode, @@ -646,7 +646,7 @@ VISIBLE_IF_KUNIT bool amdgpu_dm_crtc_helper_mode_fixup(= struct drm_crtc *crtc, { return true; } -EXPORT_IF_KUNIT(amdgpu_dm_crtc_helper_mode_fixup); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_crtc_helper_mode_fixup); =20 static int amdgpu_dm_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_commit *state) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c b/dri= vers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c index d6c33c107e11..c017778a4700 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_cursor.c @@ -171,7 +171,7 @@ bool amdgpu_dm_should_update_native_cursor(struct drm_a= tomic_commit *state, =20 return dm_new_crtc_state->cursor_mode =3D=3D DM_CURSOR_NATIVE_MODE; } -EXPORT_IF_KUNIT(amdgpu_dm_should_update_native_cursor); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_should_update_native_cursor); =20 VISIBLE_IF_KUNIT void dm_get_oriented_plane_size(struct drm_plane_state *p= lane_state, int *src_w, int *src_h) @@ -190,7 +190,7 @@ VISIBLE_IF_KUNIT void dm_get_oriented_plane_size(struct= drm_plane_state *plane_s break; } } -EXPORT_IF_KUNIT(dm_get_oriented_plane_size); +EXPORT_SYMBOL_IF_KUNIT(dm_get_oriented_plane_size); =20 VISIBLE_IF_KUNIT void dm_get_plane_scale(struct drm_plane_state *plane_state, @@ -202,7 +202,7 @@ dm_get_plane_scale(struct drm_plane_state *plane_state, *out_plane_scale_w =3D plane_src_w ? plane_state->crtc_w * 1000 / plane_s= rc_w : 0; *out_plane_scale_h =3D plane_src_h ? plane_state->crtc_h * 1000 / plane_s= rc_h : 0; } -EXPORT_IF_KUNIT(dm_get_plane_scale); +EXPORT_SYMBOL_IF_KUNIT(dm_get_plane_scale); =20 /** * DOC: Cursor Modes - Native vs Overlay diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c b/drive= rs/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c index ecf1faca4d4b..387cf811327a 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_dmub.c @@ -82,7 +82,7 @@ void dm_dmub_aux_setconfig_callback(struct amdgpu_device = *adev, if (notify->type =3D=3D DMUB_NOTIFICATION_AUX_REPLY) complete(&adev->dm.dmub_aux_transfer_done); } -EXPORT_IF_KUNIT(dm_dmub_aux_setconfig_callback); +EXPORT_SYMBOL_IF_KUNIT(dm_dmub_aux_setconfig_callback); =20 void dm_dmub_aux_fused_io_callback(struct amdgpu_device *adev, struct dmub_notification *notify) @@ -106,7 +106,7 @@ void dm_dmub_aux_fused_io_callback(struct amdgpu_device= *adev, memcpy(sync->reply_data, req, sizeof(*req)); complete(&sync->replied); } -EXPORT_IF_KUNIT(dm_dmub_aux_fused_io_callback); +EXPORT_SYMBOL_IF_KUNIT(dm_dmub_aux_fused_io_callback); =20 /** * dm_register_dmub_notify_callback - Sets callback for DMUB notify @@ -133,7 +133,7 @@ bool dm_register_dmub_notify_callback(struct amdgpu_dev= ice *adev, =20 return true; } -EXPORT_IF_KUNIT(dm_register_dmub_notify_callback); +EXPORT_SYMBOL_IF_KUNIT(dm_register_dmub_notify_callback); =20 int dm_dmub_hw_init(struct amdgpu_device *adev) { @@ -322,7 +322,7 @@ int dm_dmub_hw_init(struct amdgpu_device *adev) =20 return 0; } -EXPORT_IF_KUNIT(dm_dmub_hw_init); +EXPORT_SYMBOL_IF_KUNIT(dm_dmub_hw_init); =20 void dm_dmub_hw_resume(struct amdgpu_device *adev) { @@ -352,7 +352,7 @@ void dm_dmub_hw_resume(struct amdgpu_device *adev) drm_err(adev_to_drm(adev), "DMUB interface failed to initialize: status= =3D%d\n", r); } } -EXPORT_IF_KUNIT(dm_dmub_hw_resume); +EXPORT_SYMBOL_IF_KUNIT(dm_dmub_hw_resume); =20 static enum dmub_status dm_dmub_send_vbios_gpint_command(struct amdgpu_device *adev, @@ -444,7 +444,7 @@ VISIBLE_IF_KUNIT void *dm_dmub_get_vbios_bounding_box(s= truct amdgpu_device *adev return NULL; =20 } -EXPORT_IF_KUNIT(dm_dmub_get_vbios_bounding_box); +EXPORT_SYMBOL_IF_KUNIT(dm_dmub_get_vbios_bounding_box); =20 enum dmub_ips_disable_type dm_get_default_ips_mode( struct amdgpu_device *adev) @@ -466,7 +466,7 @@ enum dmub_ips_disable_type dm_get_default_ips_mode( =20 return ret; } -EXPORT_IF_KUNIT(dm_get_default_ips_mode); +EXPORT_SYMBOL_IF_KUNIT(dm_get_default_ips_mode); =20 static uint32_t amdgpu_dm_dmub_reg_read(void *ctx, uint32_t address) { @@ -694,7 +694,7 @@ int dm_dmub_sw_init(struct amdgpu_device *adev) =20 return 0; } -EXPORT_IF_KUNIT(dm_dmub_sw_init); +EXPORT_SYMBOL_IF_KUNIT(dm_dmub_sw_init); =20 int dm_init_microcode(struct amdgpu_device *adev) { @@ -770,7 +770,7 @@ int dm_init_microcode(struct amdgpu_device *adev) "%s", fw_name_dmub); return r; } -EXPORT_IF_KUNIT(dm_init_microcode); +EXPORT_SYMBOL_IF_KUNIT(dm_init_microcode); =20 int amdgpu_dm_process_dmub_aux_transfer_sync( struct dc_context *ctx, @@ -840,7 +840,7 @@ int amdgpu_dm_process_dmub_aux_transfer_sync( mutex_unlock(&adev->dm.dpia_aux_lock); return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_process_dmub_aux_transfer_sync); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_process_dmub_aux_transfer_sync); =20 VISIBLE_IF_KUNIT void abort_fused_io( struct dc_context *ctx, @@ -856,7 +856,7 @@ VISIBLE_IF_KUNIT void abort_fused_io( io->request =3D *request; dm_execute_dmub_cmd(ctx, &command, DM_DMUB_WAIT_TYPE_NO_WAIT); } -EXPORT_IF_KUNIT(abort_fused_io); +EXPORT_SYMBOL_IF_KUNIT(abort_fused_io); =20 static bool execute_fused_io( struct amdgpu_device *dev, @@ -944,7 +944,7 @@ int amdgpu_dm_process_dmub_set_config_sync( mutex_unlock(&adev->dm.dpia_aux_lock); return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_process_dmub_set_config_sync); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_process_dmub_set_config_sync); =20 bool dm_execute_dmub_cmd(const struct dc_context *ctx, union dmub_rb_cmd *= cmd, enum dm_dmub_wait_type wait_type) { @@ -953,7 +953,7 @@ bool dm_execute_dmub_cmd(const struct dc_context *ctx, = union dmub_rb_cmd *cmd, e guard(spinlock_irqsave)(&adev->dm.dmub_lock); return dc_dmub_srv_cmd_run(ctx->dmub_srv, cmd, wait_type); } -EXPORT_IF_KUNIT(dm_execute_dmub_cmd); +EXPORT_SYMBOL_IF_KUNIT(dm_execute_dmub_cmd); =20 bool dm_execute_dmub_cmd_list(const struct dc_context *ctx, unsigned int c= ount, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c b/d= rivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c index 7e484adb4120..3a76510856d6 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c @@ -50,7 +50,7 @@ bool amdgpu_dm_is_dc_timing_adjust_needed(struct dm_crtc_= state *old_state, else return false; } -EXPORT_IF_KUNIT(amdgpu_dm_is_dc_timing_adjust_needed); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_is_dc_timing_adjust_needed); =20 bool amdgpu_dm_is_timing_unchanged_for_freesync(struct drm_crtc_state *old_crtc= _state, @@ -81,7 +81,7 @@ amdgpu_dm_is_timing_unchanged_for_freesync(struct drm_crt= c_state *old_crtc_state =20 return false; } -EXPORT_IF_KUNIT(amdgpu_dm_is_timing_unchanged_for_freesync); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_is_timing_unchanged_for_freesync); =20 void amdgpu_dm_set_freesync_fixed_config(struct dm_crtc_state *dm_new_crtc= _state) { @@ -97,7 +97,7 @@ void amdgpu_dm_set_freesync_fixed_config(struct dm_crtc_s= tate *dm_new_crtc_state res =3D div_u64(num, den); dm_new_crtc_state->freesync_config.fixed_refresh_in_uhz =3D res; } -EXPORT_IF_KUNIT(amdgpu_dm_set_freesync_fixed_config); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_freesync_fixed_config); =20 void amdgpu_dm_reset_freesync_config_for_crtc( struct dm_crtc_state *new_crtc_state) @@ -107,7 +107,7 @@ void amdgpu_dm_reset_freesync_config_for_crtc( memset(&new_crtc_state->vrr_infopacket, 0, sizeof(new_crtc_state->vrr_infopacket)); } -EXPORT_IF_KUNIT(amdgpu_dm_reset_freesync_config_for_crtc); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_reset_freesync_config_for_crtc); =20 void amdgpu_dm_get_freesync_config_for_crtc( struct dm_crtc_state *new_crtc_state, @@ -152,7 +152,7 @@ void amdgpu_dm_get_freesync_config_for_crtc( out: new_crtc_state->freesync_config =3D config; } -EXPORT_IF_KUNIT(amdgpu_dm_get_freesync_config_for_crtc); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_get_freesync_config_for_crtc); =20 void amdgpu_dm_update_freesync_state_on_stream( struct amdgpu_display_manager *dm, diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c b/drive= rs/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c index 20c1ce8cda44..9b77d403671e 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c @@ -48,7 +48,7 @@ bool lp_write_i2c(void *handle, uint32_t address, const u= int8_t *data, uint32_t =20 return dm_helpers_submit_i2c(link->ctx, link, &cmd); } -EXPORT_IF_KUNIT(lp_write_i2c); +EXPORT_SYMBOL_IF_KUNIT(lp_write_i2c); =20 VISIBLE_IF_KUNIT bool lp_read_i2c(void *handle, uint32_t address, uint8_t offset, uint8_t *= data, uint32_t size) @@ -62,7 +62,7 @@ bool lp_read_i2c(void *handle, uint32_t address, uint8_t = offset, uint8_t *data, =20 return dm_helpers_submit_i2c(link->ctx, link, &cmd); } -EXPORT_IF_KUNIT(lp_read_i2c); +EXPORT_SYMBOL_IF_KUNIT(lp_read_i2c); =20 VISIBLE_IF_KUNIT bool lp_write_dpcd(void *handle, uint32_t address, const uint8_t *data, ui= nt32_t size) @@ -71,7 +71,7 @@ bool lp_write_dpcd(void *handle, uint32_t address, const = uint8_t *data, uint32_t =20 return dm_helpers_dp_write_dpcd(link->ctx, link, address, data, size); } -EXPORT_IF_KUNIT(lp_write_dpcd); +EXPORT_SYMBOL_IF_KUNIT(lp_write_dpcd); =20 VISIBLE_IF_KUNIT bool lp_read_dpcd(void *handle, uint32_t address, uint8_t= *data, uint32_t size) { @@ -79,7 +79,7 @@ VISIBLE_IF_KUNIT bool lp_read_dpcd(void *handle, uint32_t= address, uint8_t *data =20 return dm_helpers_dp_read_dpcd(link->ctx, link, address, data, size); } -EXPORT_IF_KUNIT(lp_read_dpcd); +EXPORT_SYMBOL_IF_KUNIT(lp_read_dpcd); =20 VISIBLE_IF_KUNIT bool lp_atomic_write_poll_read_i2c( void *handle, @@ -94,7 +94,7 @@ VISIBLE_IF_KUNIT bool lp_atomic_write_poll_read_i2c( =20 return dm_atomic_write_poll_read_i2c(link, write, poll, read, poll_timeou= t_us, poll_mask_msb); } -EXPORT_IF_KUNIT(lp_atomic_write_poll_read_i2c); +EXPORT_SYMBOL_IF_KUNIT(lp_atomic_write_poll_read_i2c); =20 VISIBLE_IF_KUNIT bool lp_atomic_write_poll_read_aux( void *handle, @@ -109,7 +109,7 @@ VISIBLE_IF_KUNIT bool lp_atomic_write_poll_read_aux( =20 return dm_atomic_write_poll_read_aux(link, write, poll, read, poll_timeou= t_us, poll_mask_msb); } -EXPORT_IF_KUNIT(lp_atomic_write_poll_read_aux); +EXPORT_SYMBOL_IF_KUNIT(lp_atomic_write_poll_read_aux); =20 VISIBLE_IF_KUNIT uint8_t *psp_get_srm(struct psp_context *psp, uint32_t *srm_version, uint3= 2_t *srm_size) @@ -135,7 +135,7 @@ uint8_t *psp_get_srm(struct psp_context *psp, uint32_t = *srm_version, uint32_t *s =20 return hdcp_cmd->out_msg.hdcp_get_srm.srm_buf; } -EXPORT_IF_KUNIT(psp_get_srm); +EXPORT_SYMBOL_IF_KUNIT(psp_get_srm); =20 VISIBLE_IF_KUNIT int psp_set_srm(struct psp_context *psp, @@ -165,7 +165,7 @@ int psp_set_srm(struct psp_context *psp, *srm_version =3D hdcp_cmd->out_msg.hdcp_set_srm.srm_version; return 0; } -EXPORT_IF_KUNIT(psp_set_srm); +EXPORT_SYMBOL_IF_KUNIT(psp_set_srm); =20 VISIBLE_IF_KUNIT void process_output(struct hdcp_workqueue *hdcp_work) @@ -188,7 +188,7 @@ void process_output(struct hdcp_workqueue *hdcp_work) =20 schedule_delayed_work(&hdcp_work->property_validate_dwork, msecs_to_jiffi= es(0)); } -EXPORT_IF_KUNIT(process_output); +EXPORT_SYMBOL_IF_KUNIT(process_output); =20 VISIBLE_IF_KUNIT bool hdcp_get_content_protection_from_status( @@ -215,7 +215,7 @@ bool hdcp_get_content_protection_from_status( =20 return false; } -EXPORT_IF_KUNIT(hdcp_get_content_protection_from_status); +EXPORT_SYMBOL_IF_KUNIT(hdcp_get_content_protection_from_status); =20 VISIBLE_IF_KUNIT void hdcp_get_link_display_adjustments( @@ -252,7 +252,7 @@ void hdcp_get_link_display_adjustments( link_adjust->hdcp2.use_sw_locality_fallback =3D hdcp_lc_enable_sw_fallback; } -EXPORT_IF_KUNIT(hdcp_get_link_display_adjustments); +EXPORT_SYMBOL_IF_KUNIT(hdcp_get_link_display_adjustments); =20 VISIBLE_IF_KUNIT void link_lock(struct hdcp_workqueue *work, bool lock) @@ -266,7 +266,7 @@ void link_lock(struct hdcp_workqueue *work, bool lock) mutex_unlock(&work[i].mutex); } } -EXPORT_IF_KUNIT(link_lock); +EXPORT_SYMBOL_IF_KUNIT(link_lock); =20 VISIBLE_IF_KUNIT void hdcp_update_display_encryption_control(struct hdcp_workqueue *hdcp_wo= rk, @@ -290,7 +290,7 @@ void hdcp_update_display_encryption_control(struct hdcp= _workqueue *hdcp_work, cancel_delayed_work(&hdcp_w->property_validate_dwork); } } -EXPORT_IF_KUNIT(hdcp_update_display_encryption_control); +EXPORT_SYMBOL_IF_KUNIT(hdcp_update_display_encryption_control); =20 void hdcp_update_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index, @@ -322,7 +322,7 @@ void hdcp_update_display(struct hdcp_workqueue *hdcp_wo= rk, =20 process_output(hdcp_w); } -EXPORT_IF_KUNIT(hdcp_update_display); +EXPORT_SYMBOL_IF_KUNIT(hdcp_update_display); =20 VISIBLE_IF_KUNIT void hdcp_remove_display(struct hdcp_workqueue *hdcp_work, @@ -355,7 +355,7 @@ void hdcp_remove_display(struct hdcp_workqueue *hdcp_wo= rk, } process_output(hdcp_w); } -EXPORT_IF_KUNIT(hdcp_remove_display); +EXPORT_SYMBOL_IF_KUNIT(hdcp_remove_display); =20 void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int lin= k_index) { @@ -379,7 +379,7 @@ void hdcp_reset_display(struct hdcp_workqueue *hdcp_wor= k, unsigned int link_inde =20 process_output(hdcp_w); } -EXPORT_IF_KUNIT(hdcp_reset_display); +EXPORT_SYMBOL_IF_KUNIT(hdcp_reset_display); =20 void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work, unsigned int link= _index) { @@ -387,7 +387,7 @@ void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work= , unsigned int link_index =20 schedule_work(&hdcp_w->cpirq_work); } -EXPORT_IF_KUNIT(hdcp_handle_cpirq); +EXPORT_SYMBOL_IF_KUNIT(hdcp_handle_cpirq); =20 VISIBLE_IF_KUNIT void event_callback(struct work_struct *work) @@ -406,7 +406,7 @@ void event_callback(struct work_struct *work) =20 process_output(hdcp_work); } -EXPORT_IF_KUNIT(event_callback); +EXPORT_SYMBOL_IF_KUNIT(event_callback); =20 VISIBLE_IF_KUNIT void event_property_update(struct work_struct *work) @@ -468,7 +468,7 @@ void event_property_update(struct work_struct *work) drm_modeset_unlock(&dev->mode_config.connection_mutex); } } -EXPORT_IF_KUNIT(event_property_update); +EXPORT_SYMBOL_IF_KUNIT(event_property_update); =20 VISIBLE_IF_KUNIT void event_property_validate(struct work_struct *work) @@ -520,7 +520,7 @@ void event_property_validate(struct work_struct *work) } } } -EXPORT_IF_KUNIT(event_property_validate); +EXPORT_SYMBOL_IF_KUNIT(event_property_validate); =20 VISIBLE_IF_KUNIT void event_watchdog_timer(struct work_struct *work) @@ -541,7 +541,7 @@ void event_watchdog_timer(struct work_struct *work) =20 process_output(hdcp_work); } -EXPORT_IF_KUNIT(event_watchdog_timer); +EXPORT_SYMBOL_IF_KUNIT(event_watchdog_timer); =20 VISIBLE_IF_KUNIT void event_cpirq(struct work_struct *work) @@ -556,7 +556,7 @@ void event_cpirq(struct work_struct *work) =20 process_output(hdcp_work); } -EXPORT_IF_KUNIT(event_cpirq); +EXPORT_SYMBOL_IF_KUNIT(event_cpirq); =20 void hdcp_destroy(struct kobject *kobj, struct hdcp_workqueue *hdcp_work) { @@ -573,7 +573,7 @@ void hdcp_destroy(struct kobject *kobj, struct hdcp_wor= kqueue *hdcp_work) kfree(hdcp_work->srm_temp); kfree(hdcp_work); } -EXPORT_IF_KUNIT(hdcp_destroy); +EXPORT_SYMBOL_IF_KUNIT(hdcp_destroy); =20 VISIBLE_IF_KUNIT bool enable_assr(void *handle, struct dc_link *link) @@ -609,7 +609,7 @@ bool enable_assr(void *handle, struct dc_link *link) =20 return true; } -EXPORT_IF_KUNIT(enable_assr); +EXPORT_SYMBOL_IF_KUNIT(enable_assr); =20 VISIBLE_IF_KUNIT void update_config(void *handle, struct cp_psp_stream_config *config) @@ -698,7 +698,7 @@ void update_config(void *handle, struct cp_psp_stream_c= onfig *config) hdcp_w->aconnector[conn_index] =3D aconnector; process_output(hdcp_w); } -EXPORT_IF_KUNIT(update_config); +EXPORT_SYMBOL_IF_KUNIT(update_config); =20 /** * DOC: Add sysfs interface for set/get srm @@ -771,7 +771,7 @@ VISIBLE_IF_KUNIT ssize_t srm_data_write(struct file *fi= lp, struct kobject *kobj, =20 return count; } -EXPORT_IF_KUNIT(srm_data_write); +EXPORT_SYMBOL_IF_KUNIT(srm_data_write); =20 VISIBLE_IF_KUNIT ssize_t srm_data_read(struct file *filp, struct kobject *= kobj, const struct bin_attribute *bin_attr, char *buffer, @@ -809,7 +809,7 @@ VISIBLE_IF_KUNIT ssize_t srm_data_read(struct file *fil= p, struct kobject *kobj, link_lock(work, false); return ret; } -EXPORT_IF_KUNIT(srm_data_read); +EXPORT_SYMBOL_IF_KUNIT(srm_data_read); =20 /* From the hdcp spec (5.Renewability) SRM needs to be stored in a non-vol= atile memory. * @@ -926,5 +926,5 @@ struct hdcp_workqueue *hdcp_create_workqueue(struct amd= gpu_device *adev, =20 return NULL; } -EXPORT_IF_KUNIT(hdcp_create_workqueue); +EXPORT_SYMBOL_IF_KUNIT(hdcp_create_workqueue); =20 diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/dr= ivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index ca5d7ca99f8f..e734374a484c 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -95,7 +95,7 @@ VISIBLE_IF_KUNIT u32 edid_extract_panel_id(struct edid *e= did) (u32)edid->mfg_id[1] << 16 | (u32)EDID_PRODUCT_ID(edid); } -EXPORT_IF_KUNIT(edid_extract_panel_id); +EXPORT_SYMBOL_IF_KUNIT(edid_extract_panel_id); =20 VISIBLE_IF_KUNIT void apply_edid_quirks(struct dc_link *link, struct edid = *edid, struct dc_edid_caps *edid_caps) @@ -151,7 +151,7 @@ VISIBLE_IF_KUNIT void apply_edid_quirks(struct dc_link = *link, struct edid *edid, return; } } -EXPORT_IF_KUNIT(apply_edid_quirks); +EXPORT_SYMBOL_IF_KUNIT(apply_edid_quirks); =20 /** * dm_helpers_parse_edid_caps() - Parse edid caps @@ -248,7 +248,7 @@ enum dc_edid_status dm_helpers_parse_edid_caps( =20 return result; } -EXPORT_IF_KUNIT(dm_helpers_parse_edid_caps); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_parse_edid_caps); =20 VISIBLE_IF_KUNIT void fill_dc_mst_payload_table_from_drm(struct dc_link *link, @@ -300,13 +300,13 @@ fill_dc_mst_payload_table_from_drm(struct dc_link *li= nk, /* Overwrite the old table */ *table =3D new_table; } -EXPORT_IF_KUNIT(fill_dc_mst_payload_table_from_drm); +EXPORT_SYMBOL_IF_KUNIT(fill_dc_mst_payload_table_from_drm); =20 void dm_helpers_dp_update_branch_info( struct dc_context *ctx, const struct dc_link *link) {} -EXPORT_IF_KUNIT(dm_helpers_dp_update_branch_info); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_update_branch_info); =20 VISIBLE_IF_KUNIT void dm_helpers_construct_old_payload( struct drm_dp_mst_topology_mgr *mgr, @@ -339,7 +339,7 @@ VISIBLE_IF_KUNIT void dm_helpers_construct_old_payload( old_payload->time_slots =3D allocated_time_slots; old_payload->pbn =3D allocated_time_slots * pbn_per_slot; } -EXPORT_IF_KUNIT(dm_helpers_construct_old_payload); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_construct_old_payload); =20 /* * Writes payload allocation table in immediate downstream device. @@ -392,7 +392,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table( =20 return true; } -EXPORT_IF_KUNIT(dm_helpers_dp_mst_write_payload_allocation_table); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_mst_write_payload_allocation_table); =20 /* * poll pending down reply @@ -401,7 +401,7 @@ void dm_helpers_dp_mst_poll_pending_down_reply( struct dc_context *ctx, const struct dc_link *link) {} -EXPORT_IF_KUNIT(dm_helpers_dp_mst_poll_pending_down_reply); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_mst_poll_pending_down_reply); =20 /* * Clear payload allocation table before enable MST DP link. @@ -410,7 +410,7 @@ void dm_helpers_dp_mst_clear_payload_allocation_table( struct dc_context *ctx, const struct dc_link *link) {} -EXPORT_IF_KUNIT(dm_helpers_dp_mst_clear_payload_allocation_table); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_mst_clear_payload_allocation_table); =20 /* * Polls for ACT (allocation change trigger) handled and sends @@ -441,7 +441,7 @@ enum act_return_status dm_helpers_dp_mst_poll_for_alloc= ation_change_trigger( =20 return ACT_SUCCESS; } -EXPORT_IF_KUNIT(dm_helpers_dp_mst_poll_for_allocation_change_trigger); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_mst_poll_for_allocation_change_trigge= r); =20 void dm_helpers_dp_mst_send_payload_allocation( struct dc_context *ctx, @@ -476,7 +476,7 @@ void dm_helpers_dp_mst_send_payload_allocation( clr_flag, false); } } -EXPORT_IF_KUNIT(dm_helpers_dp_mst_send_payload_allocation); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_mst_send_payload_allocation); =20 void dm_helpers_dp_mst_update_mst_mgr_for_deallocation( struct dc_context *ctx, @@ -505,7 +505,7 @@ void dm_helpers_dp_mst_update_mst_mgr_for_deallocation( amdgpu_dm_set_mst_status(&aconnector->mst_status, set_flag, true); amdgpu_dm_set_mst_status(&aconnector->mst_status, clr_flag, false); } -EXPORT_IF_KUNIT(dm_helpers_dp_mst_update_mst_mgr_for_deallocation); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_mst_update_mst_mgr_for_deallocation); =20 void dm_dtn_log_begin(struct dc_context *ctx, struct dc_log_buffer_ctx *log_ctx) @@ -519,7 +519,7 @@ void dm_dtn_log_begin(struct dc_context *ctx, =20 dm_dtn_log_append_v(ctx, log_ctx, "%s", msg); } -EXPORT_IF_KUNIT(dm_dtn_log_begin); +EXPORT_SYMBOL_IF_KUNIT(dm_dtn_log_begin); =20 __printf(3, 4) void dm_dtn_log_append_v(struct dc_context *ctx, @@ -582,7 +582,7 @@ void dm_dtn_log_append_v(struct dc_context *ctx, if (n > 0) log_ctx->pos +=3D n; } -EXPORT_IF_KUNIT(dm_dtn_log_append_v); +EXPORT_SYMBOL_IF_KUNIT(dm_dtn_log_append_v); =20 void dm_dtn_log_end(struct dc_context *ctx, struct dc_log_buffer_ctx *log_ctx) @@ -596,7 +596,7 @@ void dm_dtn_log_end(struct dc_context *ctx, =20 dm_dtn_log_append_v(ctx, log_ctx, "%s", msg); } -EXPORT_IF_KUNIT(dm_dtn_log_end); +EXPORT_SYMBOL_IF_KUNIT(dm_dtn_log_end); =20 bool dm_helpers_dp_mst_start_top_mgr( struct dc_context *ctx, @@ -631,7 +631,7 @@ bool dm_helpers_dp_mst_start_top_mgr( =20 return true; } -EXPORT_IF_KUNIT(dm_helpers_dp_mst_start_top_mgr); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_mst_start_top_mgr); =20 bool dm_helpers_dp_mst_stop_top_mgr( struct dc_context *ctx, @@ -654,7 +654,7 @@ bool dm_helpers_dp_mst_stop_top_mgr( =20 return false; } -EXPORT_IF_KUNIT(dm_helpers_dp_mst_stop_top_mgr); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_mst_stop_top_mgr); =20 bool dm_helpers_dp_read_dpcd( struct dc_context *ctx, @@ -672,7 +672,7 @@ bool dm_helpers_dp_read_dpcd( return drm_dp_dpcd_read(&aconnector->dm_dp_aux.aux, address, data, size) =3D=3D size; } -EXPORT_IF_KUNIT(dm_helpers_dp_read_dpcd); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_read_dpcd); =20 bool dm_helpers_dp_write_dpcd( struct dc_context *ctx, @@ -689,7 +689,7 @@ bool dm_helpers_dp_write_dpcd( return drm_dp_dpcd_write(&aconnector->dm_dp_aux.aux, address, (uint8_t *)data, size) > 0; } -EXPORT_IF_KUNIT(dm_helpers_dp_write_dpcd); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_write_dpcd); =20 bool dm_helpers_submit_i2c( struct dc_context *ctx, @@ -725,7 +725,7 @@ bool dm_helpers_submit_i2c( =20 return result; } -EXPORT_IF_KUNIT(dm_helpers_submit_i2c); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_submit_i2c); =20 bool dm_helpers_execute_fused_io( struct dc_context *ctx, @@ -739,7 +739,7 @@ bool dm_helpers_execute_fused_io( =20 return amdgpu_dm_execute_fused_io(dev, link, commands, count, timeout_us); } -EXPORT_IF_KUNIT(dm_helpers_execute_fused_io); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_execute_fused_io); =20 VISIBLE_IF_KUNIT bool execute_synaptics_rc_command(struct drm_dp_aux *aux, bool is_write_cmd, @@ -813,7 +813,7 @@ VISIBLE_IF_KUNIT bool execute_synaptics_rc_command(stru= ct drm_dp_aux *aux, DRM_ERROR("%s: write cmd ..., err =3D %d\n", __func__, ret); return false; } -EXPORT_IF_KUNIT(execute_synaptics_rc_command); +EXPORT_SYMBOL_IF_KUNIT(execute_synaptics_rc_command); =20 VISIBLE_IF_KUNIT void apply_synaptics_fifo_reset_wa(struct drm_dp_aux *aux) { @@ -879,7 +879,7 @@ VISIBLE_IF_KUNIT void apply_synaptics_fifo_reset_wa(str= uct drm_dp_aux *aux) =20 drm_dbg_dp(aux->drm_dev, "Done\n"); } -EXPORT_IF_KUNIT(apply_synaptics_fifo_reset_wa); +EXPORT_SYMBOL_IF_KUNIT(apply_synaptics_fifo_reset_wa); =20 /* MST Dock */ static const uint8_t SYNAPTICS_DEVICE_ID[] =3D "SYNA"; @@ -920,7 +920,7 @@ VISIBLE_IF_KUNIT uint8_t write_dsc_enable_synaptics_non= _virtual_dpcd_mst( =20 return ret; } -EXPORT_IF_KUNIT(write_dsc_enable_synaptics_non_virtual_dpcd_mst); +EXPORT_SYMBOL_IF_KUNIT(write_dsc_enable_synaptics_non_virtual_dpcd_mst); =20 bool dm_helpers_dp_write_dsc_enable( struct dc_context *ctx, @@ -1004,20 +1004,20 @@ bool dm_helpers_dp_write_dsc_enable( =20 return ret; } -EXPORT_IF_KUNIT(dm_helpers_dp_write_dsc_enable); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_write_dsc_enable); =20 #if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST) uint dm_helpers_get_dc_debug_mask(void) { return amdgpu_dc_debug_mask; } -EXPORT_IF_KUNIT(dm_helpers_get_dc_debug_mask); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_get_dc_debug_mask); =20 void dm_helpers_set_dc_debug_mask(uint debug_mask) { amdgpu_dc_debug_mask =3D debug_mask; } -EXPORT_IF_KUNIT(dm_helpers_set_dc_debug_mask); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_set_dc_debug_mask); #endif =20 bool dm_helpers_dp_write_hblank_reduction(struct dc_context *ctx, const st= ruct dc_stream_state *stream) @@ -1025,7 +1025,7 @@ bool dm_helpers_dp_write_hblank_reduction(struct dc_c= ontext *ctx, const struct d // TODO return false; } -EXPORT_IF_KUNIT(dm_helpers_dp_write_hblank_reduction); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_write_hblank_reduction); =20 bool dm_helpers_is_dp_sink_present(struct dc_link *link) { @@ -1042,7 +1042,7 @@ bool dm_helpers_is_dp_sink_present(struct dc_link *li= nk) mutex_unlock(&aconnector->dm_dp_aux.aux.hw_mutex); return dp_sink_present; } -EXPORT_IF_KUNIT(dm_helpers_is_dp_sink_present); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_is_dp_sink_present); =20 VISIBLE_IF_KUNIT int dm_helpers_probe_acpi_edid(void *data, u8 *buf, unsigned int block, size_t= len) @@ -1082,7 +1082,7 @@ dm_helpers_probe_acpi_edid(void *data, u8 *buf, unsig= ned int block, size_t len) =20 return r; } -EXPORT_IF_KUNIT(dm_helpers_probe_acpi_edid); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_probe_acpi_edid); =20 VISIBLE_IF_KUNIT const struct drm_edid * dm_helpers_read_acpi_edid(struct amdgpu_dm_connector *aconnector) @@ -1105,7 +1105,7 @@ dm_helpers_read_acpi_edid(struct amdgpu_dm_connector = *aconnector) =20 return drm_edid_read_custom(connector, dm_helpers_probe_acpi_edid, connec= tor); } -EXPORT_IF_KUNIT(dm_helpers_read_acpi_edid); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_read_acpi_edid); =20 VISIBLE_IF_KUNIT const struct drm_edid * dm_helpers_read_vbios_hardcoded_edid(struct dc_link *link, struct amdgpu_d= m_connector *aconnector) @@ -1145,7 +1145,7 @@ dm_helpers_read_vbios_hardcoded_edid(struct dc_link *= link, struct amdgpu_dm_conn =20 return edid; } -EXPORT_IF_KUNIT(dm_helpers_read_vbios_hardcoded_edid); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_read_vbios_hardcoded_edid); =20 VISIBLE_IF_KUNIT uint8_t get_max_frl_rate(uint8_t max_lanes, uint8_t max_r= ate_per_lane) { @@ -1168,7 +1168,7 @@ VISIBLE_IF_KUNIT uint8_t get_max_frl_rate(uint8_t max= _lanes, uint8_t max_rate_pe =20 return max_frl_rate; } -EXPORT_IF_KUNIT(get_max_frl_rate); +EXPORT_SYMBOL_IF_KUNIT(get_max_frl_rate); =20 VISIBLE_IF_KUNIT uint8_t get_dsc_max_slices(uint8_t max_slices, int clk_pe= r_slice) { @@ -1193,7 +1193,7 @@ VISIBLE_IF_KUNIT uint8_t get_dsc_max_slices(uint8_t m= ax_slices, int clk_per_slic =20 return dsc_max_slices; } -EXPORT_IF_KUNIT(get_dsc_max_slices); +EXPORT_SYMBOL_IF_KUNIT(get_dsc_max_slices); =20 void populate_hdmi_info_from_connector(bool enable_frl, struct drm_hdmi_in= fo *hdmi, struct dc_edid_caps *edid_caps) { @@ -1214,7 +1214,7 @@ void populate_hdmi_info_from_connector(bool enable_fr= l, struct drm_hdmi_info *hd } } } -EXPORT_IF_KUNIT(populate_hdmi_info_from_connector); +EXPORT_SYMBOL_IF_KUNIT(populate_hdmi_info_from_connector); =20 enum dc_edid_status dm_helpers_read_local_edid( struct dc_context *ctx, @@ -1346,7 +1346,7 @@ int dm_helper_dmub_aux_transfer_sync( return amdgpu_dm_process_dmub_aux_transfer_sync(ctx, link->link_index, pa= yload, operation_result); } -EXPORT_IF_KUNIT(dm_helper_dmub_aux_transfer_sync); +EXPORT_SYMBOL_IF_KUNIT(dm_helper_dmub_aux_transfer_sync); =20 int dm_helpers_dmub_set_config_sync(struct dc_context *ctx, const struct dc_link *link, @@ -1361,21 +1361,21 @@ void dm_set_dcn_clocks(struct dc_context *ctx, stru= ct dc_clocks *clks) { /* TODO: something */ } -EXPORT_IF_KUNIT(dm_set_dcn_clocks); +EXPORT_SYMBOL_IF_KUNIT(dm_set_dcn_clocks); =20 void dm_helpers_dmu_timeout(struct dc_context *ctx) { // TODO: //amdgpu_device_gpu_recover(dc_context->driver-context, NULL); } -EXPORT_IF_KUNIT(dm_helpers_dmu_timeout); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dmu_timeout); =20 void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, u= nsigned int param, unsigned int timeout_us) { // TODO: //amdgpu_device_gpu_recover(dc_context->driver-context, NULL); } -EXPORT_IF_KUNIT(dm_helpers_smu_timeout); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_smu_timeout); =20 void dm_helpers_init_panel_settings( struct dc_context *ctx, @@ -1394,7 +1394,7 @@ void dm_helpers_init_panel_settings( panel_config->dsc.disable_dsc_edp =3D false; panel_config->dsc.force_dsc_edp_policy =3D 0; } -EXPORT_IF_KUNIT(dm_helpers_init_panel_settings); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_init_panel_settings); =20 void dm_helpers_override_panel_settings( struct dc_context *ctx, @@ -1412,7 +1412,7 @@ void dm_helpers_override_panel_settings( link->panel_config.psr.disallow_replay =3D true; } } -EXPORT_IF_KUNIT(dm_helpers_override_panel_settings); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_override_panel_settings); =20 void *dm_helpers_allocate_gpu_mem( struct dc_context *ctx, @@ -1448,7 +1448,7 @@ bool dm_helpers_dmub_outbox_interrupt_control(struct = dc_context *ctx, bool enabl enable ? "en" : "dis", ret); return ret; } -EXPORT_IF_KUNIT(dm_helpers_dmub_outbox_interrupt_control); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dmub_outbox_interrupt_control); =20 void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *s= tream) { @@ -1474,7 +1474,7 @@ void dm_helpers_mst_enable_stream_features(const stru= ct dc_stream_state *stream) &new_downspread.raw, sizeof(new_downspread)); } -EXPORT_IF_KUNIT(dm_helpers_mst_enable_stream_features); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_mst_enable_stream_features); =20 bool dm_helpers_dp_handle_test_pattern_request( struct dc_context *ctx, @@ -1613,13 +1613,13 @@ bool dm_helpers_dp_handle_test_pattern_request( =20 return false; } -EXPORT_IF_KUNIT(dm_helpers_dp_handle_test_pattern_request); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_handle_test_pattern_request); =20 void dm_set_phyd32clk(struct dc_context *ctx, int freq_khz) { // TODO } -EXPORT_IF_KUNIT(dm_set_phyd32clk); +EXPORT_SYMBOL_IF_KUNIT(dm_set_phyd32clk); =20 void dm_helpers_enable_periodic_detection(struct dc_context *ctx, bool ena= ble) { @@ -1631,7 +1631,7 @@ void dm_helpers_enable_periodic_detection(struct dc_c= ontext *ctx, bool enable) schedule_work(&adev->dm.idle_workqueue->work); } } -EXPORT_IF_KUNIT(dm_helpers_enable_periodic_detection); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_enable_periodic_detection); =20 void dm_helpers_dp_mst_update_branch_bandwidth( struct dc_context *ctx, @@ -1639,7 +1639,7 @@ void dm_helpers_dp_mst_update_branch_bandwidth( { // TODO } -EXPORT_IF_KUNIT(dm_helpers_dp_mst_update_branch_bandwidth); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_dp_mst_update_branch_bandwidth); =20 VISIBLE_IF_KUNIT const uint32_t dm_freesync_pcon_whitelist[] =3D { DP_BRANCH_DEVICE_ID_0060AD, @@ -1648,13 +1648,13 @@ VISIBLE_IF_KUNIT const uint32_t dm_freesync_pcon_wh= itelist[] =3D { DP_BRANCH_DEVICE_ID_001CF8, DP_BRANCH_DEVICE_ID_001FF2, }; -EXPORT_IF_KUNIT(dm_freesync_pcon_whitelist); +EXPORT_SYMBOL_IF_KUNIT(dm_freesync_pcon_whitelist); =20 VISIBLE_IF_KUNIT uint32_t dm_freesync_pcon_whitelist_count(void) { return ARRAY_SIZE(dm_freesync_pcon_whitelist); } -EXPORT_IF_KUNIT(dm_freesync_pcon_whitelist_count); +EXPORT_SYMBOL_IF_KUNIT(dm_freesync_pcon_whitelist_count); =20 VISIBLE_IF_KUNIT bool dm_is_freesync_pcon_whitelist(const uint32_t branch_= dev_id) { @@ -1666,7 +1666,7 @@ VISIBLE_IF_KUNIT bool dm_is_freesync_pcon_whitelist(c= onst uint32_t branch_dev_id =20 return false; } -EXPORT_IF_KUNIT(dm_is_freesync_pcon_whitelist); +EXPORT_SYMBOL_IF_KUNIT(dm_is_freesync_pcon_whitelist); =20 enum adaptive_sync_type dm_get_adaptive_sync_support_type(struct dc_link *= link) { @@ -1686,21 +1686,21 @@ enum adaptive_sync_type dm_get_adaptive_sync_suppor= t_type(struct dc_link *link) =20 return as_type; } -EXPORT_IF_KUNIT(dm_get_adaptive_sync_support_type); +EXPORT_SYMBOL_IF_KUNIT(dm_get_adaptive_sync_support_type); =20 bool dm_helpers_is_fullscreen(struct dc_context *ctx, struct dc_stream_sta= te *stream) { // TODO return false; } -EXPORT_IF_KUNIT(dm_helpers_is_fullscreen); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_is_fullscreen); =20 bool dm_helpers_is_hdr_on(struct dc_context *ctx, struct dc_stream_state *= stream) { // TODO return false; } -EXPORT_IF_KUNIT(dm_helpers_is_hdr_on); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_is_hdr_on); =20 static int mccs_operation_vcp_request(unsigned int vcp_code, struct dc_lin= k *link, union vcp_reply *reply) @@ -1826,7 +1826,7 @@ void dm_helpers_read_mccs_caps(struct dc_context *ctx= , struct dc_link *link, } } } -EXPORT_IF_KUNIT(dm_helpers_read_mccs_caps); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_read_mccs_caps); =20 static int mccs_operation_vcp_set(unsigned int vcp_code, struct dc_link *l= ink, uint16_t value) { @@ -1901,7 +1901,7 @@ void dm_helpers_mccs_vcp_set(struct dc_context *ctx, = struct dc_link *link, drm_dbg_driver(dev, "%s: Failed to set VCP code %d", __func__, sink->edid_caps.freesync_vcp_code); } -EXPORT_IF_KUNIT(dm_helpers_mccs_vcp_set); +EXPORT_SYMBOL_IF_KUNIT(dm_helpers_mccs_vcp_set); =20 bool dm_helpers_submit_i2c_over_aux(struct ddc_service *ddc, uint32_t addr= ess, uint8_t offset, uint8_t *cmdBuffer, uint32_t len, bool read) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c b/driver= s/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c index 2a551ccf79fa..01379bce00ec 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c @@ -327,7 +327,7 @@ void *amdgpu_dm_irq_register_interrupt(struct amdgpu_de= vice *adev, =20 return handler_data; } -EXPORT_IF_KUNIT(amdgpu_dm_irq_register_interrupt); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_register_interrupt); =20 /** * amdgpu_dm_irq_unregister_interrupt() - Remove a handler from the DM IRQ= table @@ -372,7 +372,7 @@ void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_d= evice *adev, ih, irq_source); } } -EXPORT_IF_KUNIT(amdgpu_dm_irq_unregister_interrupt); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_unregister_interrupt); =20 /** * amdgpu_dm_irq_init() - Initialize DM IRQ management @@ -422,7 +422,7 @@ int amdgpu_dm_irq_init(struct amdgpu_device *adev) =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_irq_init); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_init); =20 /** * amdgpu_dm_irq_fini() - Tear down DM IRQ management @@ -504,7 +504,7 @@ void amdgpu_dm_irq_fini(struct amdgpu_device *adev) adev->dm.irq_wq =3D NULL; } } -EXPORT_IF_KUNIT(amdgpu_dm_irq_fini); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_fini); =20 void amdgpu_dm_irq_suspend(struct amdgpu_device *adev) { @@ -551,7 +551,7 @@ void amdgpu_dm_irq_suspend(struct amdgpu_device *adev) if (dev->mode_config.poll_enabled) drm_kms_helper_poll_disable(dev); } -EXPORT_IF_KUNIT(amdgpu_dm_irq_suspend); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_suspend); =20 void amdgpu_dm_irq_resume_early(struct amdgpu_device *adev) { @@ -573,7 +573,7 @@ void amdgpu_dm_irq_resume_early(struct amdgpu_device *a= dev) =20 DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); } -EXPORT_IF_KUNIT(amdgpu_dm_irq_resume_early); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_resume_early); =20 void amdgpu_dm_irq_resume_late(struct amdgpu_device *adev) { @@ -602,7 +602,7 @@ void amdgpu_dm_irq_resume_late(struct amdgpu_device *ad= ev) if (dev->mode_config.poll_enabled) drm_kms_helper_poll_enable(dev); } -EXPORT_IF_KUNIT(amdgpu_dm_irq_resume_late); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_resume_late); =20 /* * amdgpu_dm_irq_schedule_work - schedule all work items registered for the @@ -663,7 +663,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_irq_schedule_work(struc= t amdgpu_device *adev, out_unlock: DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); } -EXPORT_IF_KUNIT(amdgpu_dm_irq_schedule_work); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_schedule_work); =20 /* * amdgpu_dm_irq_immediate_work @@ -688,7 +688,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_irq_immediate_work(stru= ct amdgpu_device *adev, =20 DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); } -EXPORT_IF_KUNIT(amdgpu_dm_irq_immediate_work); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_immediate_work); =20 /** * amdgpu_dm_irq_handler - Generic DM IRQ handler @@ -719,7 +719,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_irq_handler(struct amdgp= u_device *adev, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_irq_handler); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_irq_handler); =20 VISIBLE_IF_KUNIT enum dc_irq_source amdgpu_dm_hpd_to_dal_irq_source(unsign= ed int type) { @@ -740,7 +740,7 @@ VISIBLE_IF_KUNIT enum dc_irq_source amdgpu_dm_hpd_to_da= l_irq_source(unsigned int return DC_IRQ_SOURCE_INVALID; } } -EXPORT_IF_KUNIT(amdgpu_dm_hpd_to_dal_irq_source); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_hpd_to_dal_irq_source); =20 VISIBLE_IF_KUNIT int amdgpu_dm_set_hpd_irq_state(struct amdgpu_device *ade= v, struct amdgpu_irq_src *source, @@ -753,7 +753,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_set_hpd_irq_state(struct= amdgpu_device *adev, dc_interrupt_set(adev->dm.dc, src, st); return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_set_hpd_irq_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_hpd_irq_state); =20 static inline int dm_irq_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, @@ -802,7 +802,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_set_pflip_irq_state(stru= ct amdgpu_device *adev, IRQ_TYPE_PFLIP, __func__); } -EXPORT_IF_KUNIT(amdgpu_dm_set_pflip_irq_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_pflip_irq_state); =20 VISIBLE_IF_KUNIT int amdgpu_dm_set_crtc_irq_state(struct amdgpu_device *ad= ev, struct amdgpu_irq_src *source, @@ -817,7 +817,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_set_crtc_irq_state(struc= t amdgpu_device *adev, IRQ_TYPE_VBLANK, __func__); } -EXPORT_IF_KUNIT(amdgpu_dm_set_crtc_irq_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_crtc_irq_state); =20 VISIBLE_IF_KUNIT int amdgpu_dm_set_vline0_irq_state(struct amdgpu_device *= adev, struct amdgpu_irq_src *source, @@ -832,7 +832,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_set_vline0_irq_state(str= uct amdgpu_device *adev, IRQ_TYPE_VLINE0, __func__); } -EXPORT_IF_KUNIT(amdgpu_dm_set_vline0_irq_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_vline0_irq_state); =20 VISIBLE_IF_KUNIT int amdgpu_dm_set_dmub_outbox_irq_state(struct amdgpu_dev= ice *adev, struct amdgpu_irq_src *source, @@ -845,7 +845,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_set_dmub_outbox_irq_stat= e(struct amdgpu_device *a dc_interrupt_set(adev->dm.dc, irq_source, st); return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_set_dmub_outbox_irq_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_dmub_outbox_irq_state); =20 VISIBLE_IF_KUNIT int amdgpu_dm_set_vupdate_irq_state(struct amdgpu_device = *adev, struct amdgpu_irq_src *source, @@ -860,7 +860,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_set_vupdate_irq_state(st= ruct amdgpu_device *adev, IRQ_TYPE_VUPDATE, __func__); } -EXPORT_IF_KUNIT(amdgpu_dm_set_vupdate_irq_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_vupdate_irq_state); =20 VISIBLE_IF_KUNIT int amdgpu_dm_set_dmub_trace_irq_state(struct amdgpu_devi= ce *adev, struct amdgpu_irq_src *source, @@ -873,7 +873,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_set_dmub_trace_irq_state= (struct amdgpu_device *ad dc_interrupt_set(adev->dm.dc, irq_source, st); return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_set_dmub_trace_irq_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_dmub_trace_irq_state); =20 static const struct amdgpu_irq_src_funcs dm_crtc_irq_funcs =3D { .set =3D amdgpu_dm_set_crtc_irq_state, @@ -933,7 +933,7 @@ void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev) adev->hpd_irq.num_types =3D adev->mode_info.num_hpd; adev->hpd_irq.funcs =3D &dm_hpd_irq_funcs; } -EXPORT_IF_KUNIT(amdgpu_dm_set_irq_funcs); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_irq_funcs); =20 void amdgpu_dm_outbox_init(struct amdgpu_device *adev) { @@ -941,7 +941,7 @@ void amdgpu_dm_outbox_init(struct amdgpu_device *adev) DC_IRQ_SOURCE_DMCUB_OUTBOX, true); } -EXPORT_IF_KUNIT(amdgpu_dm_outbox_init); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_outbox_init); =20 /** * amdgpu_dm_hpd_init - hpd setup callback. @@ -1024,7 +1024,7 @@ void amdgpu_dm_hpd_init(struct amdgpu_device *adev) if (use_polling) drm_kms_helper_poll_init(dev); } -EXPORT_IF_KUNIT(amdgpu_dm_hpd_init); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_hpd_init); =20 /** * amdgpu_dm_hpd_fini - hpd tear down callback. @@ -1078,7 +1078,7 @@ void amdgpu_dm_hpd_fini(struct amdgpu_device *adev) if (dev->mode_config.poll_enabled) drm_kms_helper_poll_fini(dev); } -EXPORT_IF_KUNIT(amdgpu_dm_hpd_fini); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_hpd_fini); =20 /* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D HPD handling =3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D */ static void force_connector_state( @@ -1189,7 +1189,7 @@ VISIBLE_IF_KUNIT void dm_handle_hpd_rx_offload_work(s= truct work_struct *work) kfree(offload_work); =20 } -EXPORT_IF_KUNIT(dm_handle_hpd_rx_offload_work); +EXPORT_SYMBOL_IF_KUNIT(dm_handle_hpd_rx_offload_work); =20 struct hpd_rx_irq_offload_work_queue *amdgpu_dm_hpd_rx_irq_create_workqueu= e(struct amdgpu_device *adev) { @@ -1226,7 +1226,7 @@ struct hpd_rx_irq_offload_work_queue *amdgpu_dm_hpd_r= x_irq_create_workqueue(stru kfree(hpd_rx_offload_wq); return NULL; } -EXPORT_IF_KUNIT(amdgpu_dm_hpd_rx_irq_create_workqueue); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_hpd_rx_irq_create_workqueue); =20 void amdgpu_dm_hpd_rx_irq_work_suspend(struct amdgpu_display_manager *dm) { @@ -1237,7 +1237,7 @@ void amdgpu_dm_hpd_rx_irq_work_suspend(struct amdgpu_= display_manager *dm) flush_workqueue(dm->hpd_rx_offload_wq[i].wq); } } -EXPORT_IF_KUNIT(amdgpu_dm_hpd_rx_irq_work_suspend); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_hpd_rx_irq_work_suspend); =20 VISIBLE_IF_KUNIT bool are_sinks_equal(const struct dc_sink *sink1, const s= truct dc_sink *sink2) { @@ -1254,7 +1254,7 @@ VISIBLE_IF_KUNIT bool are_sinks_equal(const struct dc= _sink *sink1, const struct return false; return true; } -EXPORT_IF_KUNIT(are_sinks_equal); +EXPORT_SYMBOL_IF_KUNIT(are_sinks_equal); =20 =20 /** @@ -1331,7 +1331,7 @@ void amdgpu_dm_hdmi_hpd_debounce_work(struct work_str= uct *work) dc_allow_idle_optimizations(dc, true); } } -EXPORT_IF_KUNIT(amdgpu_dm_hdmi_hpd_debounce_work); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_hdmi_hpd_debounce_work); =20 VISIBLE_IF_KUNIT void handle_hpd_irq_helper(struct amdgpu_dm_connector *ac= onnector, enum dc_detect_reason reason) @@ -1431,7 +1431,7 @@ VISIBLE_IF_KUNIT void handle_hpd_irq_helper(struct am= dgpu_dm_connector *aconnect } } } -EXPORT_IF_KUNIT(handle_hpd_irq_helper); +EXPORT_SYMBOL_IF_KUNIT(handle_hpd_irq_helper); =20 VISIBLE_IF_KUNIT void handle_hpd_irq(void *param) { @@ -1440,7 +1440,7 @@ VISIBLE_IF_KUNIT void handle_hpd_irq(void *param) handle_hpd_irq_helper(aconnector, DETECT_REASON_HPD); =20 } -EXPORT_IF_KUNIT(handle_hpd_irq); +EXPORT_SYMBOL_IF_KUNIT(handle_hpd_irq); =20 VISIBLE_IF_KUNIT void schedule_hpd_rx_offload_work(struct amdgpu_device *adev, @@ -1462,7 +1462,7 @@ schedule_hpd_rx_offload_work(struct amdgpu_device *ad= ev, queue_work(offload_wq->wq, &offload_work->work); drm_dbg_kms(adev_to_drm(adev), "queue work to handle hpd_rx offload work"= ); } -EXPORT_IF_KUNIT(schedule_hpd_rx_offload_work); +EXPORT_SYMBOL_IF_KUNIT(schedule_hpd_rx_offload_work); =20 VISIBLE_IF_KUNIT void handle_hpd_rx_irq(void *param) { @@ -1597,7 +1597,7 @@ VISIBLE_IF_KUNIT void handle_hpd_rx_irq(void *param) =20 mutex_unlock(&aconnector->hpd_lock); } -EXPORT_IF_KUNIT(handle_hpd_rx_irq); +EXPORT_SYMBOL_IF_KUNIT(handle_hpd_rx_irq); =20 /** * dmub_hpd_callback - DMUB HPD interrupt processing callback. @@ -1673,7 +1673,7 @@ VISIBLE_IF_KUNIT void dmub_hpd_callback(struct amdgpu= _device *adev, } } } -EXPORT_IF_KUNIT(dmub_hpd_callback); +EXPORT_SYMBOL_IF_KUNIT(dmub_hpd_callback); =20 /** * dmub_hpd_sense_callback - DMUB HPD sense processing callback. @@ -1688,7 +1688,7 @@ VISIBLE_IF_KUNIT void dmub_hpd_sense_callback(struct = amdgpu_device *adev, { drm_dbg_driver(adev_to_drm(adev), "DMUB HPD SENSE callback.\n"); } -EXPORT_IF_KUNIT(dmub_hpd_sense_callback); +EXPORT_SYMBOL_IF_KUNIT(dmub_hpd_sense_callback); =20 int amdgpu_dm_register_hpd_handlers(struct amdgpu_device *adev) { @@ -1770,7 +1770,7 @@ int amdgpu_dm_register_hpd_handlers(struct amdgpu_dev= ice *adev) } return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_register_hpd_handlers); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_register_hpd_handlers); =20 /* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D IRQ handlers =3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D */ struct amdgpu_crtc * @@ -1793,7 +1793,7 @@ amdgpu_dm_get_crtc_by_otg_inst(struct amdgpu_device *= adev, =20 return NULL; } -EXPORT_IF_KUNIT(amdgpu_dm_get_crtc_by_otg_inst); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_get_crtc_by_otg_inst); =20 /** * dm_pflip_high_irq() - Handle pageflip interrupt @@ -1898,7 +1898,7 @@ VISIBLE_IF_KUNIT void dm_pflip_high_irq(void *interru= pt_params) "crtc:%d[%p], pflip_stat:AMDGPU_FLIP_NONE, vrr[%d]-fp %d\n", amdgpu_crtc->crtc_id, amdgpu_crtc, vrr_active, (int)!e); } -EXPORT_IF_KUNIT(dm_pflip_high_irq); +EXPORT_SYMBOL_IF_KUNIT(dm_pflip_high_irq); =20 VISIBLE_IF_KUNIT void dm_handle_vmin_vmax_update(struct work_struct *offlo= ad_work) { @@ -1915,7 +1915,7 @@ VISIBLE_IF_KUNIT void dm_handle_vmin_vmax_update(stru= ct work_struct *offload_wor kfree(work->adjust); kfree(work); } -EXPORT_IF_KUNIT(dm_handle_vmin_vmax_update); +EXPORT_SYMBOL_IF_KUNIT(dm_handle_vmin_vmax_update); =20 static void schedule_dc_vmin_vmax(struct amdgpu_device *adev, struct dc_stream_state *stream, @@ -2151,7 +2151,7 @@ VISIBLE_IF_KUNIT void dm_vupdate_high_irq(void *inter= rupt_params) } } } -EXPORT_IF_KUNIT(dm_vupdate_high_irq); +EXPORT_SYMBOL_IF_KUNIT(dm_vupdate_high_irq); =20 /** * dm_crtc_high_irq() - Handles CRTC interrupt @@ -2174,7 +2174,7 @@ VISIBLE_IF_KUNIT void dm_crtc_high_irq(void *interrup= t_params) =20 dm_crtc_high_irq_handler(adev, acrtc); } -EXPORT_IF_KUNIT(dm_crtc_high_irq); +EXPORT_SYMBOL_IF_KUNIT(dm_crtc_high_irq); =20 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) /** @@ -2219,7 +2219,7 @@ VISIBLE_IF_KUNIT void dm_handle_hpd_work(struct work_= struct *work) kfree(dmub_hpd_wrk); =20 } -EXPORT_IF_KUNIT(dm_handle_hpd_work); +EXPORT_SYMBOL_IF_KUNIT(dm_handle_hpd_work); =20 VISIBLE_IF_KUNIT const char *dmub_notification_type_str(enum dmub_notifica= tion_type e) { @@ -2244,7 +2244,7 @@ VISIBLE_IF_KUNIT const char *dmub_notification_type_s= tr(enum dmub_notification_t return ""; } } -EXPORT_IF_KUNIT(dmub_notification_type_str); +EXPORT_SYMBOL_IF_KUNIT(dmub_notification_type_str); =20 #define DMUB_TRACE_MAX_READ 64 /** @@ -2318,7 +2318,7 @@ VISIBLE_IF_KUNIT void dm_dmub_outbox1_low_irq(void *i= nterrupt_params) } while (notify.pending_notification); } } -EXPORT_IF_KUNIT(dm_dmub_outbox1_low_irq); +EXPORT_SYMBOL_IF_KUNIT(dm_dmub_outbox1_low_irq); =20 /* Register IRQ sources and initialize IRQ callbacks */ int amdgpu_dm_dce110_register_irq_handlers(struct amdgpu_device *adev) @@ -2457,7 +2457,7 @@ int amdgpu_dm_dce110_register_irq_handlers(struct amd= gpu_device *adev) =20 return r; } -EXPORT_IF_KUNIT(amdgpu_dm_dce110_register_irq_handlers); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_dce110_register_irq_handlers); =20 /* Register IRQ sources and initialize IRQ callbacks */ int amdgpu_dm_dcn10_register_irq_handlers(struct amdgpu_device *adev) @@ -2576,7 +2576,7 @@ int amdgpu_dm_dcn10_register_irq_handlers(struct amdg= pu_device *adev) =20 return r; } -EXPORT_IF_KUNIT(amdgpu_dm_dcn10_register_irq_handlers); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_dcn10_register_irq_handlers); =20 /* Register Outbox IRQ sources and initialize IRQ callbacks */ int amdgpu_dm_register_outbox_irq_handlers(struct amdgpu_device *adev) @@ -2614,4 +2614,4 @@ int amdgpu_dm_register_outbox_irq_handlers(struct amd= gpu_device *adev) =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_register_outbox_irq_handlers); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_register_outbox_irq_handlers); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c b/driver= s/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c index b4cedf760f6b..6d2ecc2ae6ff 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c @@ -128,7 +128,7 @@ bool dm_ism_next_state(enum amdgpu_dm_ism_state current= _state, } return true; } -EXPORT_IF_KUNIT(dm_ism_next_state); +EXPORT_SYMBOL_IF_KUNIT(dm_ism_next_state); =20 VISIBLE_IF_KUNIT uint64_t dm_ism_get_sso_delay(const struct amdgpu_dm_ism *ism, @@ -153,7 +153,7 @@ uint64_t dm_ism_get_sso_delay(const struct amdgpu_dm_is= m *ism, =20 return sso_delay_ns; } -EXPORT_IF_KUNIT(dm_ism_get_sso_delay); +EXPORT_SYMBOL_IF_KUNIT(dm_ism_get_sso_delay); =20 /** * dm_ism_get_idle_allow_delay - Calculate hysteresis-based idle allow del= ay @@ -224,7 +224,7 @@ uint64_t dm_ism_get_idle_allow_delay(const struct amdgp= u_dm_ism *ism, =20 return ret_ns; } -EXPORT_IF_KUNIT(dm_ism_get_idle_allow_delay); +EXPORT_SYMBOL_IF_KUNIT(dm_ism_get_idle_allow_delay); =20 /** * dm_ism_insert_record - Insert a record into the circular history buffer @@ -246,7 +246,7 @@ void dm_ism_insert_record(struct amdgpu_dm_ism *ism) record->duration_ns =3D record->timestamp_ns - ism->last_idle_timestamp_ns; } -EXPORT_IF_KUNIT(dm_ism_insert_record); +EXPORT_SYMBOL_IF_KUNIT(dm_ism_insert_record); =20 =20 VISIBLE_IF_KUNIT @@ -254,7 +254,7 @@ void dm_ism_set_last_idle_ts(struct amdgpu_dm_ism *ism) { ism->last_idle_timestamp_ns =3D ktime_get_ns(); } -EXPORT_IF_KUNIT(dm_ism_set_last_idle_ts); +EXPORT_SYMBOL_IF_KUNIT(dm_ism_set_last_idle_ts); =20 =20 VISIBLE_IF_KUNIT @@ -273,7 +273,7 @@ bool dm_ism_trigger_event(struct amdgpu_dm_ism *ism, =20 return gotNextState; } -EXPORT_IF_KUNIT(dm_ism_trigger_event); +EXPORT_SYMBOL_IF_KUNIT(dm_ism_trigger_event); =20 =20 static void dm_ism_commit_idle_optimization_state(struct amdgpu_dm_ism *is= m, @@ -354,7 +354,7 @@ enum amdgpu_dm_ism_event dm_ism_dispatch_next_event( } return DM_ISM_NUM_EVENTS; } -EXPORT_IF_KUNIT(dm_ism_dispatch_next_event); +EXPORT_SYMBOL_IF_KUNIT(dm_ism_dispatch_next_event); =20 static enum amdgpu_dm_ism_event dm_ism_dispatch_power_state( struct amdgpu_dm_ism *ism, @@ -502,7 +502,7 @@ void amdgpu_dm_ism_commit_event(struct amdgpu_dm_ism *i= sm, =20 } while (next_event < DM_ISM_NUM_EVENTS); } -EXPORT_IF_KUNIT(amdgpu_dm_ism_commit_event); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_ism_commit_event); =20 =20 static void dm_ism_delayed_work_func(struct work_struct *work) @@ -569,7 +569,7 @@ void amdgpu_dm_ism_disable(struct amdgpu_display_manage= r *dm) disable_delayed_work_sync(&ism->sso_delayed_work); } } -EXPORT_IF_KUNIT(amdgpu_dm_ism_disable); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_ism_disable); =20 /** * amdgpu_dm_ism_force_full_power - Force every CRTC's ISM FSM to FULL_POW= ER @@ -605,7 +605,7 @@ void amdgpu_dm_ism_force_full_power(struct amdgpu_displ= ay_manager *dm) DM_ISM_EVENT_EXIT_IDLE_REQUESTED); } } -EXPORT_IF_KUNIT(amdgpu_dm_ism_force_full_power); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_ism_force_full_power); =20 /** * amdgpu_dm_ism_enable - enable the ISM @@ -629,7 +629,7 @@ void amdgpu_dm_ism_enable(struct amdgpu_display_manager= *dm) enable_delayed_work(&ism->sso_delayed_work); } } -EXPORT_IF_KUNIT(amdgpu_dm_ism_enable); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_ism_enable); =20 void amdgpu_dm_ism_init(struct amdgpu_dm_ism *ism, struct amdgpu_dm_ism_config *config) @@ -644,7 +644,7 @@ void amdgpu_dm_ism_init(struct amdgpu_dm_ism *ism, INIT_DELAYED_WORK(&ism->delayed_work, dm_ism_delayed_work_func); INIT_DELAYED_WORK(&ism->sso_delayed_work, dm_ism_sso_delayed_work_func); } -EXPORT_IF_KUNIT(amdgpu_dm_ism_init); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_ism_init); =20 =20 void amdgpu_dm_ism_fini(struct amdgpu_dm_ism *ism) @@ -652,4 +652,4 @@ void amdgpu_dm_ism_fini(struct amdgpu_dm_ism *ism) cancel_delayed_work_sync(&ism->sso_delayed_work); cancel_delayed_work_sync(&ism->delayed_work); } -EXPORT_IF_KUNIT(amdgpu_dm_ism_fini); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_ism_fini); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/= drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index 8c996d5aa7b8..e09ed1b2fac5 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -79,7 +79,7 @@ VISIBLE_IF_KUNIT ssize_t dm_dp_aux_transfer_result(ssize_= t result, =20 return result; } -EXPORT_IF_KUNIT(dm_dp_aux_transfer_result); +EXPORT_SYMBOL_IF_KUNIT(dm_dp_aux_transfer_result); =20 /* * Derive the AUX payload transaction flags from a DP AUX request field. @@ -93,7 +93,7 @@ VISIBLE_IF_KUNIT void dm_dp_aux_fill_payload_flags(u8 req= uest, payload->write_status_update =3D (request & DP_AUX_I2C_WRITE_STATUS_UPDATE) !=3D 0; } -EXPORT_IF_KUNIT(dm_dp_aux_fill_payload_flags); +EXPORT_SYMBOL_IF_KUNIT(dm_dp_aux_fill_payload_flags); =20 /* * This function handles both native AUX and I2C-Over-AUX transactions. @@ -166,7 +166,7 @@ VISIBLE_IF_KUNIT ssize_t dm_dp_aux_transfer(struct drm_= dp_aux *aux, =20 return result; } -EXPORT_IF_KUNIT(dm_dp_aux_transfer); +EXPORT_SYMBOL_IF_KUNIT(dm_dp_aux_transfer); =20 static void dm_dp_mst_connector_destroy(struct drm_connector *connector) @@ -216,7 +216,7 @@ amdgpu_dm_mst_reset_mst_connector_setting(struct amdgpu= _dm_connector *aconnector aconnector->mst_local_bw =3D 0; aconnector->vc_full_pbn =3D 0; } -EXPORT_IF_KUNIT(amdgpu_dm_mst_reset_mst_connector_setting); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_mst_reset_mst_connector_setting); =20 static void amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector) @@ -273,7 +273,7 @@ bool needs_dsc_aux_workaround(struct dc_link *link) =20 return false; } -EXPORT_IF_KUNIT(needs_dsc_aux_workaround); +EXPORT_SYMBOL_IF_KUNIT(needs_dsc_aux_workaround); =20 #if defined(CONFIG_DRM_AMD_DC_FP) static bool is_synaptics_cascaded_panamera(struct dc_link *link, struct dr= m_dp_mst_port *port) @@ -355,7 +355,7 @@ VISIBLE_IF_KUNIT bool retrieve_downstream_port_device(s= truct amdgpu_dm_connector =20 return true; } -EXPORT_IF_KUNIT(retrieve_downstream_port_device); +EXPORT_SYMBOL_IF_KUNIT(retrieve_downstream_port_device); =20 VISIBLE_IF_KUNIT bool retrieve_branch_specific_data(struct amdgpu_dm_conne= ctor *aconnector) { @@ -384,7 +384,7 @@ VISIBLE_IF_KUNIT bool retrieve_branch_specific_data(str= uct amdgpu_dm_connector * =20 return true; } -EXPORT_IF_KUNIT(retrieve_branch_specific_data); +EXPORT_SYMBOL_IF_KUNIT(retrieve_branch_specific_data); =20 static int dm_dp_mst_get_modes(struct drm_connector *connector) { @@ -530,7 +530,7 @@ dm_mst_atomic_best_encoder(struct drm_connector *connec= tor, =20 return &adev->dm.mst_encoders[acrtc->crtc_id].base; } -EXPORT_IF_KUNIT(dm_mst_atomic_best_encoder); +EXPORT_SYMBOL_IF_KUNIT(dm_mst_atomic_best_encoder); =20 VISIBLE_IF_KUNIT int dm_dp_mst_detect(struct drm_connector *connector, @@ -602,7 +602,7 @@ dm_dp_mst_detect(struct drm_connector *connector, =20 return connection_status; } -EXPORT_IF_KUNIT(dm_dp_mst_detect); +EXPORT_SYMBOL_IF_KUNIT(dm_dp_mst_detect); =20 VISIBLE_IF_KUNIT int dm_dp_mst_atomic_check(struct drm_connector *connecto= r, struct drm_atomic_commit *state) @@ -613,7 +613,7 @@ VISIBLE_IF_KUNIT int dm_dp_mst_atomic_check(struct drm_= connector *connector, =20 return drm_dp_atomic_release_time_slots(state, mst_mgr, mst_port); } -EXPORT_IF_KUNIT(dm_dp_mst_atomic_check); +EXPORT_SYMBOL_IF_KUNIT(dm_dp_mst_atomic_check); =20 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_= funcs =3D { .get_modes =3D dm_dp_mst_get_modes, @@ -654,7 +654,7 @@ dm_dp_create_fake_mst_encoders(struct amdgpu_device *ad= ev) drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs); } } -EXPORT_IF_KUNIT(dm_dp_create_fake_mst_encoders); +EXPORT_SYMBOL_IF_KUNIT(dm_dp_create_fake_mst_encoders); =20 static struct drm_connector * dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, @@ -757,7 +757,7 @@ VISIBLE_IF_KUNIT u8 dm_mst_msg_ready_mask(enum mst_msg_= ready_type msg_rdy_type) return DP_DOWN_REP_MSG_RDY | DP_UP_REQ_MSG_RDY; } } -EXPORT_IF_KUNIT(dm_mst_msg_ready_mask); +EXPORT_SYMBOL_IF_KUNIT(dm_mst_msg_ready_mask); =20 /* * Select the DPCD ESI address and read length based on the DPCD revision. @@ -775,7 +775,7 @@ VISIBLE_IF_KUNIT void dm_mst_select_esi_dpcd(u8 dpcd_re= v, int *dpcd_addr, *dpcd_addr =3D DP_SINK_COUNT_ESI; } } -EXPORT_IF_KUNIT(dm_mst_select_esi_dpcd); +EXPORT_SYMBOL_IF_KUNIT(dm_mst_select_esi_dpcd); =20 void dm_handle_mst_sideband_msg_ready_event( struct drm_dp_mst_topology_mgr *mgr, @@ -860,13 +860,13 @@ void dm_handle_mst_sideband_msg_ready_event( if (process_count =3D=3D max_process_count) DRM_DEBUG_DRIVER("Loop exceeded max iterations\n"); } -EXPORT_IF_KUNIT(dm_handle_mst_sideband_msg_ready_event); +EXPORT_SYMBOL_IF_KUNIT(dm_handle_mst_sideband_msg_ready_event); =20 VISIBLE_IF_KUNIT void dm_handle_mst_down_rep_msg_ready(struct drm_dp_mst_t= opology_mgr *mgr) { dm_handle_mst_sideband_msg_ready_event(mgr, DOWN_REP_MSG_RDY_EVENT); } -EXPORT_IF_KUNIT(dm_handle_mst_down_rep_msg_ready); +EXPORT_SYMBOL_IF_KUNIT(dm_handle_mst_down_rep_msg_ready); =20 static const struct drm_dp_mst_topology_cbs dm_mst_cbs =3D { .add_connector =3D dm_dp_add_mst_connector, @@ -901,7 +901,7 @@ void amdgpu_dm_initialize_dp_connector(struct amdgpu_di= splay_manager *dm, =20 drm_connector_attach_dp_subconnector_property(&aconnector->base); } -EXPORT_IF_KUNIT(amdgpu_dm_initialize_dp_connector); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_initialize_dp_connector); =20 uint32_t dm_mst_get_pbn_divider(struct dc_link *link) { @@ -918,7 +918,7 @@ uint32_t dm_mst_get_pbn_divider(struct dc_link *link) =20 return dfixed_const(pbn_div_x100) / 100; } -EXPORT_IF_KUNIT(dm_mst_get_pbn_divider); +EXPORT_SYMBOL_IF_KUNIT(dm_mst_get_pbn_divider); =20 struct dsc_mst_fairness_params { struct dc_crtc_timing *timing; @@ -2116,4 +2116,4 @@ enum dc_status dm_dp_mst_is_port_support_mode( #endif return DC_OK; } -EXPORT_IF_KUNIT(dm_dp_mst_is_port_support_mode); +EXPORT_SYMBOL_IF_KUNIT(dm_dp_mst_is_port_support_mode); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 08153ffb38cb..aceab4f13254 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -98,7 +98,7 @@ const struct drm_format_info *amdgpu_dm_plane_get_format_= info(u32 pixel_format, { return amdgpu_lookup_format_info(pixel_format, modifier); } -EXPORT_IF_KUNIT(amdgpu_dm_plane_get_format_info); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_get_format_info); =20 void amdgpu_dm_plane_fill_blending_from_plane_state(const struct drm_plane= _state *plane_state, bool *per_pixel_alpha, bool *pre_multiplied_alpha, @@ -152,7 +152,7 @@ void amdgpu_dm_plane_fill_blending_from_plane_state(con= st struct drm_plane_state =20 } } -EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_blending_from_plane_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_fill_blending_from_plane_state); =20 VISIBLE_IF_KUNIT void amdgpu_dm_plane_add_modifier(uint64_t **mods, uint64= _t *size, uint64_t *cap, uint64_t mod) @@ -179,7 +179,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_plane_add_modifier(uint= 64_t **mods, uint64_t *si (*mods)[*size] =3D mod; *size +=3D 1; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_add_modifier); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_add_modifier); =20 VISIBLE_IF_KUNIT void amdgpu_dm_plane_add_modifier_dedup(uint64_t **mods, = uint64_t *size, uint64_t *cap, uint64_t mod) @@ -195,13 +195,13 @@ VISIBLE_IF_KUNIT void amdgpu_dm_plane_add_modifier_de= dup(uint64_t **mods, uint64 =20 amdgpu_dm_plane_add_modifier(mods, size, cap, mod); } -EXPORT_IF_KUNIT(amdgpu_dm_plane_add_modifier_dedup); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_add_modifier_dedup); =20 VISIBLE_IF_KUNIT bool amdgpu_dm_plane_modifier_has_dcc(uint64_t modifier) { return IS_AMD_FMT_MOD(modifier) && AMD_FMT_MOD_GET(DCC, modifier); } -EXPORT_IF_KUNIT(amdgpu_dm_plane_modifier_has_dcc); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_modifier_has_dcc); =20 VISIBLE_IF_KUNIT unsigned int amdgpu_dm_plane_modifier_gfx9_swizzle_mode(u= int64_t modifier) { @@ -210,7 +210,7 @@ VISIBLE_IF_KUNIT unsigned int amdgpu_dm_plane_modifier_= gfx9_swizzle_mode(uint64_ =20 return AMD_FMT_MOD_GET(TILE, modifier); } -EXPORT_IF_KUNIT(amdgpu_dm_plane_modifier_gfx9_swizzle_mode); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_modifier_gfx9_swizzle_mode); =20 VISIBLE_IF_KUNIT int amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier( struct dc_tiling_info *tiling_info, @@ -245,7 +245,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_plane_fill_gfx6_tiling_i= nfo_from_modifier( =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier= ); =20 VISIBLE_IF_KUNIT void amdgpu_dm_plane_fill_gfx9_tiling_info_from_device(const struct amdgpu= _device *adev, @@ -268,7 +268,7 @@ void amdgpu_dm_plane_fill_gfx9_tiling_info_from_device(= const struct amdgpu_devic if (amdgpu_ip_version(adev, GC_HWIP, 0) >=3D IP_VERSION(10, 3, 0)) tiling_info->gfx9.num_pkrs =3D adev->gfx.config.gb_addr_config_fields.nu= m_pkrs; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_gfx9_tiling_info_from_device); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_fill_gfx9_tiling_info_from_device); =20 VISIBLE_IF_KUNIT void amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier(const struct amdg= pu_device *adev, @@ -298,7 +298,7 @@ void amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifie= r(const struct amdgpu_dev /* for DCC we know it isn't rb aligned, so rb_per_se doesn't matter. */ } } -EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier= ); =20 VISIBLE_IF_KUNIT int amdgpu_dm_plane_validate_dcc(struct amdgpu_device *ad= ev, const enum surface_pixel_format format, @@ -348,7 +348,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_plane_validate_dcc(struc= t amdgpu_device *adev, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_validate_dcc); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_validate_dcc); =20 VISIBLE_IF_KUNIT int amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers(struct= amdgpu_device *adev, const struct amdgpu_framebuffer *afb, @@ -400,7 +400,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_plane_fill_gfx9_attrs_fr= om_modifiers(struct amdgp =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers); =20 VISIBLE_IF_KUNIT int amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers(struc= t amdgpu_device *adev, const struct amdgpu_framebuffer *afb, @@ -441,7 +441,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_plane_fill_gfx12_attrs_f= rom_modifiers(struct amdg =20 return ret; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers); =20 static void amdgpu_dm_plane_add_gfx10_1_modifiers(const struct amdgpu_devi= ce *adev, uint64_t **mods, @@ -1069,7 +1069,7 @@ int amdgpu_dm_plane_get_plane_modifiers(struct amdgpu= _device *adev, unsigned int =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_get_plane_modifiers); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_get_plane_modifiers); =20 VISIBLE_IF_KUNIT int amdgpu_dm_plane_get_plane_formats(const struct drm_pl= ane *plane, const struct dc_plane_cap *plane_cap, @@ -1129,7 +1129,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_plane_get_plane_format= s(const struct drm_plane *p =20 return num_formats; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_get_plane_formats); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_get_plane_formats); =20 int amdgpu_dm_plane_fill_plane_buffer_attributes(struct amdgpu_device *ade= v, const struct amdgpu_framebuffer *afb, @@ -1219,7 +1219,7 @@ int amdgpu_dm_plane_fill_plane_buffer_attributes(stru= ct amdgpu_device *adev, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_plane_buffer_attributes); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_fill_plane_buffer_attributes); =20 static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane, struct drm_plane_state *new_state) @@ -1387,7 +1387,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_plane_get_min_max_dc_= plane_scaling(struct drm_de if (*min_downscale =3D=3D 1) *min_downscale =3D 1000; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_get_min_max_dc_plane_scaling); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_get_min_max_dc_plane_scaling); =20 int amdgpu_dm_plane_helper_check_state(struct drm_plane_state *state, struct drm_crtc_state *new_crtc_state) @@ -1442,7 +1442,7 @@ int amdgpu_dm_plane_helper_check_state(struct drm_pla= ne_state *state, return drm_atomic_helper_check_plane_state( state, new_crtc_state, min_scale, max_scale, true, true); } -EXPORT_IF_KUNIT(amdgpu_dm_plane_helper_check_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_helper_check_state); =20 int amdgpu_dm_plane_fill_dc_scaling_info(struct amdgpu_device *adev, const struct drm_plane_state *state, @@ -1526,7 +1526,7 @@ int amdgpu_dm_plane_fill_dc_scaling_info(struct amdgp= u_device *adev, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_fill_dc_scaling_info); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_fill_dc_scaling_info); =20 VISIBLE_IF_KUNIT int amdgpu_dm_plane_atomic_check(struct drm_plane *plane, struct drm_atomic_commit *state) @@ -1574,7 +1574,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_plane_atomic_check(str= uct drm_plane *plane, =20 return -EINVAL; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_atomic_check); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_atomic_check); =20 VISIBLE_IF_KUNIT int amdgpu_dm_plane_atomic_async_check(struct drm_plane *= plane, struct drm_atomic_commit *state, bool flip) @@ -1599,7 +1599,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_plane_atomic_async_che= ck(struct drm_plane *plane, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_atomic_async_check); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_atomic_async_check); =20 int amdgpu_dm_plane_get_cursor_position(struct drm_plane *plane, struct dr= m_crtc *crtc, struct dc_cursor_position *position) @@ -1647,7 +1647,7 @@ int amdgpu_dm_plane_get_cursor_position(struct drm_pl= ane *plane, struct drm_crtc =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_get_cursor_position); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_get_cursor_position); =20 void amdgpu_dm_plane_handle_cursor_update(struct drm_plane *plane, struct drm_plane_state *old_plane_state) @@ -1772,7 +1772,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_plane_panic_flush(str= uct drm_plane *plane) =20 dc_plane_force_dcc_and_tiling_disable(dc_plane_state, fb->modifier ? true= : false); } -EXPORT_IF_KUNIT(amdgpu_dm_plane_panic_flush); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_panic_flush); =20 static const struct drm_plane_helper_funcs dm_plane_helper_funcs =3D { .prepare_fb =3D amdgpu_dm_plane_helper_prepare_fb, @@ -1809,7 +1809,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_plane_drm_plane_reset= (struct drm_plane *plane) amdgpu_state->shaper_tf =3D AMDGPU_TRANSFER_FUNCTION_DEFAULT; amdgpu_state->blend_tf =3D AMDGPU_TRANSFER_FUNCTION_DEFAULT; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_drm_plane_reset); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_drm_plane_reset); =20 VISIBLE_IF_KUNIT struct drm_plane_state * amdgpu_dm_plane_drm_plane_duplicate_state(struct drm_plane *plane) @@ -1851,7 +1851,7 @@ amdgpu_dm_plane_drm_plane_duplicate_state(struct drm_= plane *plane) =20 return &dm_plane_state->base; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_drm_plane_duplicate_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_drm_plane_duplicate_state); =20 VISIBLE_IF_KUNIT bool amdgpu_dm_plane_format_mod_supported(struct drm_plan= e *plane, uint32_t format, @@ -1922,7 +1922,7 @@ VISIBLE_IF_KUNIT bool amdgpu_dm_plane_format_mod_supp= orted(struct drm_plane *pla =20 return true; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_format_mod_supported); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_format_mod_supported); =20 VISIBLE_IF_KUNIT void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_p= lane *plane, struct drm_plane_state *state) @@ -1945,7 +1945,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_plane_drm_plane_destr= oy_state(struct drm_plane * =20 drm_atomic_helper_plane_destroy_state(plane, state); } -EXPORT_IF_KUNIT(amdgpu_dm_plane_drm_plane_destroy_state); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_drm_plane_destroy_state); =20 #ifdef AMD_PRIVATE_COLOR static void @@ -2299,5 +2299,5 @@ bool amdgpu_dm_plane_is_video_format(uint32_t format) =20 return false; } -EXPORT_IF_KUNIT(amdgpu_dm_plane_is_video_format); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_plane_is_video_format); =20 diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/dri= vers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c index 13901a1e6907..a2b2c9cee7ea 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c @@ -83,7 +83,7 @@ VISIBLE_IF_KUNIT void build_pm_display_cfg( pm_display_cfg->displays[i].pixel_clock =3D dc_cfg->pixel_clock; } } -EXPORT_IF_KUNIT(build_pm_display_cfg); +EXPORT_SYMBOL_IF_KUNIT(build_pm_display_cfg); =20 bool dm_pp_apply_display_requirements( const struct dc_context *ctx, @@ -102,7 +102,7 @@ bool dm_pp_apply_display_requirements( =20 return true; } -EXPORT_IF_KUNIT(dm_pp_apply_display_requirements); +EXPORT_SYMBOL_IF_KUNIT(dm_pp_apply_display_requirements); =20 VISIBLE_IF_KUNIT void get_default_clock_levels( enum dm_pp_clock_type clk_type, @@ -135,7 +135,7 @@ VISIBLE_IF_KUNIT void get_default_clock_levels( break; } } -EXPORT_IF_KUNIT(get_default_clock_levels); +EXPORT_SYMBOL_IF_KUNIT(get_default_clock_levels); =20 VISIBLE_IF_KUNIT enum amd_pp_clock_type dc_to_pp_clock_type( enum dm_pp_clock_type dm_pp_clk_type) @@ -178,7 +178,7 @@ VISIBLE_IF_KUNIT enum amd_pp_clock_type dc_to_pp_clock_= type( =20 return amd_pp_clk_type; } -EXPORT_IF_KUNIT(dc_to_pp_clock_type); +EXPORT_SYMBOL_IF_KUNIT(dc_to_pp_clock_type); =20 VISIBLE_IF_KUNIT void pp_to_dc_clock_levels( const struct amd_pp_clocks *pp_clks, @@ -205,7 +205,7 @@ VISIBLE_IF_KUNIT void pp_to_dc_clock_levels( dc_clks->clocks_in_khz[i] =3D pp_clks->clock[i]; } } -EXPORT_IF_KUNIT(pp_to_dc_clock_levels); +EXPORT_SYMBOL_IF_KUNIT(pp_to_dc_clock_levels); =20 VISIBLE_IF_KUNIT void pp_to_dc_clock_levels_with_latency( const struct pp_clock_levels_with_latency *pp_clks, @@ -233,7 +233,7 @@ VISIBLE_IF_KUNIT void pp_to_dc_clock_levels_with_latenc= y( clk_level_info->data[i].latency_in_us =3D pp_clks->data[i].latency_in_us; } } -EXPORT_IF_KUNIT(pp_to_dc_clock_levels_with_latency); +EXPORT_SYMBOL_IF_KUNIT(pp_to_dc_clock_levels_with_latency); =20 VISIBLE_IF_KUNIT void pp_to_dc_clock_levels_with_voltage( const struct pp_clock_levels_with_voltage *pp_clks, @@ -262,7 +262,7 @@ VISIBLE_IF_KUNIT void pp_to_dc_clock_levels_with_voltag= e( clk_level_info->data[i].voltage_in_mv =3D pp_clks->data[i].voltage_in_mv; } } -EXPORT_IF_KUNIT(pp_to_dc_clock_levels_with_voltage); +EXPORT_SYMBOL_IF_KUNIT(pp_to_dc_clock_levels_with_voltage); =20 VISIBLE_IF_KUNIT void cap_clock_levels_to_validation( struct dm_pp_clock_levels *dc_clks, @@ -296,7 +296,7 @@ VISIBLE_IF_KUNIT void cap_clock_levels_to_validation( } } } -EXPORT_IF_KUNIT(cap_clock_levels_to_validation); +EXPORT_SYMBOL_IF_KUNIT(cap_clock_levels_to_validation); =20 bool dm_pp_get_clock_levels_by_type( const struct dc_context *ctx, @@ -337,7 +337,7 @@ bool dm_pp_get_clock_levels_by_type( =20 return true; } -EXPORT_IF_KUNIT(dm_pp_get_clock_levels_by_type); +EXPORT_SYMBOL_IF_KUNIT(dm_pp_get_clock_levels_by_type); =20 bool dm_pp_get_clock_levels_by_type_with_latency( const struct dc_context *ctx, @@ -358,7 +358,7 @@ bool dm_pp_get_clock_levels_by_type_with_latency( =20 return true; } -EXPORT_IF_KUNIT(dm_pp_get_clock_levels_by_type_with_latency); +EXPORT_SYMBOL_IF_KUNIT(dm_pp_get_clock_levels_by_type_with_latency); =20 bool dm_pp_get_clock_levels_by_type_with_voltage( const struct dc_context *ctx, @@ -379,7 +379,7 @@ bool dm_pp_get_clock_levels_by_type_with_voltage( =20 return true; } -EXPORT_IF_KUNIT(dm_pp_get_clock_levels_by_type_with_voltage); +EXPORT_SYMBOL_IF_KUNIT(dm_pp_get_clock_levels_by_type_with_voltage); =20 bool dm_pp_notify_wm_clock_changes( const struct dc_context *ctx, @@ -399,7 +399,7 @@ bool dm_pp_notify_wm_clock_changes( =20 return false; } -EXPORT_IF_KUNIT(dm_pp_notify_wm_clock_changes); +EXPORT_SYMBOL_IF_KUNIT(dm_pp_notify_wm_clock_changes); =20 bool dm_pp_apply_clock_for_voltage_request( const struct dc_context *ctx, @@ -421,7 +421,7 @@ bool dm_pp_apply_clock_for_voltage_request( =20 return true; } -EXPORT_IF_KUNIT(dm_pp_apply_clock_for_voltage_request); +EXPORT_SYMBOL_IF_KUNIT(dm_pp_apply_clock_for_voltage_request); =20 VISIBLE_IF_KUNIT void build_wm_clock_ranges_soc15( const struct pp_smu_wm_range_sets *ranges, @@ -466,7 +466,7 @@ VISIBLE_IF_KUNIT void build_wm_clock_ranges_soc15( ranges->writer_wm_sets[i].min_drain_clk_mhz * 1000; } } -EXPORT_IF_KUNIT(build_wm_clock_ranges_soc15); +EXPORT_SYMBOL_IF_KUNIT(build_wm_clock_ranges_soc15); =20 VISIBLE_IF_KUNIT void pp_rv_set_wm_ranges(struct pp_smu *pp, struct pp_smu_wm_range_sets *ranges) @@ -480,7 +480,7 @@ VISIBLE_IF_KUNIT void pp_rv_set_wm_ranges(struct pp_smu= *pp, amdgpu_dpm_set_watermarks_for_clocks_ranges(adev, &wm_with_clock_ranges); } -EXPORT_IF_KUNIT(pp_rv_set_wm_ranges); +EXPORT_SYMBOL_IF_KUNIT(pp_rv_set_wm_ranges); =20 VISIBLE_IF_KUNIT void pp_rv_set_pme_wa_enable(struct pp_smu *pp) { @@ -489,7 +489,7 @@ VISIBLE_IF_KUNIT void pp_rv_set_pme_wa_enable(struct pp= _smu *pp) =20 amdgpu_dpm_notify_smu_enable_pwe(adev); } -EXPORT_IF_KUNIT(pp_rv_set_pme_wa_enable); +EXPORT_SYMBOL_IF_KUNIT(pp_rv_set_pme_wa_enable); =20 VISIBLE_IF_KUNIT void pp_rv_set_active_display_count(struct pp_smu *pp, in= t count) { @@ -498,7 +498,7 @@ VISIBLE_IF_KUNIT void pp_rv_set_active_display_count(st= ruct pp_smu *pp, int coun =20 amdgpu_dpm_set_active_display_count(adev, count); } -EXPORT_IF_KUNIT(pp_rv_set_active_display_count); +EXPORT_SYMBOL_IF_KUNIT(pp_rv_set_active_display_count); =20 VISIBLE_IF_KUNIT void pp_rv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, i= nt clock) { @@ -507,7 +507,7 @@ VISIBLE_IF_KUNIT void pp_rv_set_min_deep_sleep_dcfclk(s= truct pp_smu *pp, int clo =20 amdgpu_dpm_set_min_deep_sleep_dcefclk(adev, clock); } -EXPORT_IF_KUNIT(pp_rv_set_min_deep_sleep_dcfclk); +EXPORT_SYMBOL_IF_KUNIT(pp_rv_set_min_deep_sleep_dcfclk); =20 VISIBLE_IF_KUNIT void pp_rv_set_hard_min_dcefclk_by_freq(struct pp_smu *pp= , int clock) { @@ -516,7 +516,7 @@ VISIBLE_IF_KUNIT void pp_rv_set_hard_min_dcefclk_by_fre= q(struct pp_smu *pp, int =20 amdgpu_dpm_set_hard_min_dcefclk_by_freq(adev, clock); } -EXPORT_IF_KUNIT(pp_rv_set_hard_min_dcefclk_by_freq); +EXPORT_SYMBOL_IF_KUNIT(pp_rv_set_hard_min_dcefclk_by_freq); =20 VISIBLE_IF_KUNIT void pp_rv_set_hard_min_fclk_by_freq(struct pp_smu *pp, i= nt mhz) { @@ -525,7 +525,7 @@ VISIBLE_IF_KUNIT void pp_rv_set_hard_min_fclk_by_freq(s= truct pp_smu *pp, int mhz =20 amdgpu_dpm_set_hard_min_fclk_by_freq(adev, mhz); } -EXPORT_IF_KUNIT(pp_rv_set_hard_min_fclk_by_freq); +EXPORT_SYMBOL_IF_KUNIT(pp_rv_set_hard_min_fclk_by_freq); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_wm_ranges(struct pp_smu *pp, struct pp_smu_wm_range_sets *ranges) @@ -537,7 +537,7 @@ VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_wm_ranges= (struct pp_smu *pp, =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_nv_set_wm_ranges); +EXPORT_SYMBOL_IF_KUNIT(pp_nv_set_wm_ranges); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_display_count(struct pp_smu = *pp, int count) { @@ -554,7 +554,7 @@ VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_display_c= ount(struct pp_smu *pp, i =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_nv_set_display_count); +EXPORT_SYMBOL_IF_KUNIT(pp_nv_set_display_count); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int mhz) @@ -572,7 +572,7 @@ pp_nv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int = mhz) =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_nv_set_min_deep_sleep_dcfclk); +EXPORT_SYMBOL_IF_KUNIT(pp_nv_set_min_deep_sleep_dcfclk); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_hard_min_dcefclk_by_freq( struct pp_smu *pp, int mhz) @@ -596,7 +596,7 @@ VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_hard_min_= dcefclk_by_freq( =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_nv_set_hard_min_dcefclk_by_freq); +EXPORT_SYMBOL_IF_KUNIT(pp_nv_set_hard_min_dcefclk_by_freq); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int mhz) @@ -620,7 +620,7 @@ pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int = mhz) =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_nv_set_hard_min_uclk_by_freq); +EXPORT_SYMBOL_IF_KUNIT(pp_nv_set_hard_min_uclk_by_freq); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_pstate_handshake_support( struct pp_smu *pp, bool pstate_handshake_supported) @@ -634,7 +634,7 @@ VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_pstate_ha= ndshake_support( =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_nv_set_pstate_handshake_support); +EXPORT_SYMBOL_IF_KUNIT(pp_nv_set_pstate_handshake_support); =20 VISIBLE_IF_KUNIT bool pp_smu_nv_clock_id_to_pp(enum pp_smu_nv_clock_id clo= ck_id, enum amd_pp_clock_type *clock_type) @@ -655,7 +655,7 @@ VISIBLE_IF_KUNIT bool pp_smu_nv_clock_id_to_pp(enum pp_= smu_nv_clock_id clock_id, =20 return true; } -EXPORT_IF_KUNIT(pp_smu_nv_clock_id_to_pp); +EXPORT_SYMBOL_IF_KUNIT(pp_smu_nv_clock_id_to_pp); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_voltage_by_freq(struct pp_sm= u *pp, enum pp_smu_nv_clock_id clock_id, int mhz) @@ -681,7 +681,7 @@ VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_set_voltage_b= y_freq(struct pp_smu *pp, =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_nv_set_voltage_by_freq); +EXPORT_SYMBOL_IF_KUNIT(pp_nv_set_voltage_by_freq); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_get_maximum_sustainable_clocks( struct pp_smu *pp, struct pp_smu_nv_clock_table *max_clocks) @@ -699,7 +699,7 @@ VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_get_maximum_s= ustainable_clocks( =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_nv_get_maximum_sustainable_clocks); +EXPORT_SYMBOL_IF_KUNIT(pp_nv_get_maximum_sustainable_clocks); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_get_uclk_dpm_states(struct pp_sm= u *pp, unsigned int *clock_values_in_khz, unsigned int *num_states) @@ -718,7 +718,7 @@ VISIBLE_IF_KUNIT enum pp_smu_status pp_nv_get_uclk_dpm_= states(struct pp_smu *pp, =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_nv_get_uclk_dpm_states); +EXPORT_SYMBOL_IF_KUNIT(pp_nv_get_uclk_dpm_states); =20 VISIBLE_IF_KUNIT enum pp_smu_status pp_rn_get_dpm_clock_table( struct pp_smu *pp, struct dpm_clocks *clock_table) @@ -735,7 +735,7 @@ VISIBLE_IF_KUNIT enum pp_smu_status pp_rn_get_dpm_clock= _table( =20 return PP_SMU_RESULT_OK; } -EXPORT_IF_KUNIT(pp_rn_get_dpm_clock_table); +EXPORT_SYMBOL_IF_KUNIT(pp_rn_get_dpm_clock_table); =20 void dm_pp_get_funcs( struct dc_context *ctx, @@ -791,7 +791,7 @@ void dm_pp_get_funcs( break; } } -EXPORT_IF_KUNIT(dm_pp_get_funcs); +EXPORT_SYMBOL_IF_KUNIT(dm_pp_get_funcs); =20 int amdgpu_dm_smu_write_watermarks_table(struct amdgpu_device *adev) { @@ -843,4 +843,4 @@ int amdgpu_dm_smu_write_watermarks_table(struct amdgpu_= device *adev) =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_smu_write_watermarks_table); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_smu_write_watermarks_table); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c b/driver= s/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c index 522fc81d09b5..af3c5066d267 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c @@ -60,7 +60,7 @@ bool link_supports_psrsu(struct dc_link *link) /* Temporarily disable PSR-SU to avoid glitches */ return false; } -EXPORT_IF_KUNIT(link_supports_psrsu); +EXPORT_SYMBOL_IF_KUNIT(link_supports_psrsu); =20 VISIBLE_IF_KUNIT void amdgpu_dm_psr_fill_caps(struct dc_link *link, struct psr_caps *caps) @@ -91,7 +91,7 @@ void amdgpu_dm_psr_fill_caps(struct dc_link *link, struct= psr_caps *caps) caps->rate_control_caps =3D 0; /* TODO: read in rc caps from aux */ caps->psr_power_opt_flag =3D power_opts; } -EXPORT_IF_KUNIT(amdgpu_dm_psr_fill_caps); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_psr_fill_caps); =20 /* * amdgpu_dm_set_psr_caps() - set link psr capabilities @@ -135,7 +135,7 @@ bool amdgpu_dm_set_psr_caps(struct dc_link *link, struc= t amdgpu_dm_connector *ac amdgpu_dm_psr_fill_caps(link, &aconnector->psr_caps); return true; } -EXPORT_IF_KUNIT(amdgpu_dm_set_psr_caps); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_psr_caps); =20 /* * amdgpu_dm_psr_is_active_allowed() - check if psr is allowed on any stre= am @@ -159,7 +159,7 @@ bool amdgpu_dm_psr_is_active_allowed(struct amdgpu_disp= lay_manager *dm) } return false; } -EXPORT_IF_KUNIT(amdgpu_dm_psr_is_active_allowed); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_psr_is_active_allowed); =20 /* * amdgpu_dm_psr_set_event() - set or clear PSR event for stream @@ -192,7 +192,7 @@ bool amdgpu_dm_psr_set_event(struct amdgpu_display_mana= ger *dm, struct dc_stream return mod_power_set_psr_event(dm->power_module, stream, set_event, event, wait_for_disable); } -EXPORT_IF_KUNIT(amdgpu_dm_psr_set_event); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_psr_set_event); =20 #if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST) /** @@ -204,7 +204,7 @@ unsigned int amdgpu_dm_psr_get_dc_feature_mask(void) { return amdgpu_dc_feature_mask; } -EXPORT_IF_KUNIT(amdgpu_dm_psr_get_dc_feature_mask); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_psr_get_dc_feature_mask); =20 /** * amdgpu_dm_psr_set_dc_feature_mask() - Set DC feature mask for KUnit tes= ts. @@ -214,7 +214,7 @@ void amdgpu_dm_psr_set_dc_feature_mask(unsigned int fea= ture_mask) { amdgpu_dc_feature_mask =3D feature_mask; } -EXPORT_IF_KUNIT(amdgpu_dm_psr_set_dc_feature_mask); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_psr_set_dc_feature_mask); =20 /** * amdgpu_dm_psr_get_dc_debug_mask() - Get DC debug mask for KUnit tests. @@ -225,7 +225,7 @@ unsigned int amdgpu_dm_psr_get_dc_debug_mask(void) { return amdgpu_dc_debug_mask; } -EXPORT_IF_KUNIT(amdgpu_dm_psr_get_dc_debug_mask); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_psr_get_dc_debug_mask); =20 /** * amdgpu_dm_psr_set_dc_debug_mask() - Set DC debug mask for KUnit tests. @@ -235,5 +235,5 @@ void amdgpu_dm_psr_set_dc_debug_mask(unsigned int debug= _mask) { amdgpu_dc_debug_mask =3D debug_mask; } -EXPORT_IF_KUNIT(amdgpu_dm_psr_set_dc_debug_mask); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_psr_set_dc_debug_mask); #endif diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c b/dri= vers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c index 259966703cef..dad996e1a31c 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c @@ -177,7 +177,7 @@ void retrieve_dmi_info(struct amdgpu_display_manager *d= m) drm_info(dev, "support_edp0_on_dp1 attached\n"); } } -EXPORT_IF_KUNIT(retrieve_dmi_info); +EXPORT_SYMBOL_IF_KUNIT(retrieve_dmi_info); =20 struct amdgpu_stutter_quirk { u16 chip_vendor; @@ -209,4 +209,4 @@ bool dm_should_disable_stutter(struct pci_dev *pdev) } return false; } -EXPORT_IF_KUNIT(dm_should_disable_stutter); +EXPORT_SYMBOL_IF_KUNIT(dm_should_disable_stutter); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c b/dri= vers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c index ee2e4754b089..975261f7297b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c @@ -33,7 +33,6 @@ #include "dc/inc/link_service.h" #include "dm_helpers.h" =20 - /* * amdgpu_dm_link_supports_replay() - check if the link supports replay * @link: link @@ -70,7 +69,7 @@ bool amdgpu_dm_link_supports_replay(struct dc_link *link,= struct amdgpu_dm_conne =20 return true; } -EXPORT_IF_KUNIT(amdgpu_dm_link_supports_replay); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_link_supports_replay); =20 /* * amdgpu_dm_set_replay_caps() - setup Replay capabilities @@ -128,7 +127,7 @@ bool amdgpu_dm_set_replay_caps(struct dc_link *link, st= ruct amdgpu_dm_connector =20 return true; } -EXPORT_IF_KUNIT(amdgpu_dm_set_replay_caps); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_set_replay_caps); =20 /* * amdgpu_dm_link_setup_replay() - config replay settings @@ -167,7 +166,7 @@ bool amdgpu_dm_link_setup_replay(struct dc_stream_state= *stream, static_coasting_vtotal); return true; } -EXPORT_IF_KUNIT(amdgpu_dm_link_setup_replay); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_link_setup_replay); =20 /* * amdgpu_dm_replay_set_event() - set or clear replay event for a stream @@ -207,4 +206,4 @@ bool amdgpu_dm_replay_set_event(struct amdgpu_display_m= anager *dm, return mod_power_set_replay_event(dm->power_module, stream, set_event, event, wait_for_disable); } -EXPORT_IF_KUNIT(amdgpu_dm_replay_set_event); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_replay_set_event); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/d= rivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c index 6dbc8d1b4ecd..e284b1d17dba 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c @@ -45,7 +45,7 @@ { return current_time_stamp - last_time_stamp; } -EXPORT_IF_KUNIT(dm_get_elapse_time_in_ns); +EXPORT_SYMBOL_IF_KUNIT(dm_get_elapse_time_in_ns); =20 void dm_perf_trace_timestamp(const char *func_name, unsigned int line, str= uct dc_context *ctx) { @@ -55,17 +55,17 @@ void dm_perf_trace_timestamp(const char *func_name, uns= igned int line, struct dc &ctx->perf_trace->last_entry_write, func_name, line); } -EXPORT_IF_KUNIT(dm_perf_trace_timestamp); +EXPORT_SYMBOL_IF_KUNIT(dm_perf_trace_timestamp); =20 void dm_trace_smu_enter(uint32_t msg_id, uint32_t param_in, unsigned int d= elay, struct dc_context *ctx) { } -EXPORT_IF_KUNIT(dm_trace_smu_enter); +EXPORT_SYMBOL_IF_KUNIT(dm_trace_smu_enter); =20 void dm_trace_smu_exit(bool success, uint32_t response, struct dc_context = *ctx) { } -EXPORT_IF_KUNIT(dm_trace_smu_exit); +EXPORT_SYMBOL_IF_KUNIT(dm_trace_smu_exit); =20 /**** power component interfaces ****/ =20 @@ -95,7 +95,7 @@ bool dm_query_extended_brightness_caps(struct dc_context = *ctx, sizeof(struct dm_bl_data_point) * pCaps->num_data_points); return true; } -EXPORT_IF_KUNIT(dm_query_extended_brightness_caps); +EXPORT_SYMBOL_IF_KUNIT(dm_query_extended_brightness_caps); =20 void* dm_allocate_gpu_mem( diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c b/drivers= /gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c index 76eb3b0a0721..cbaa9ad57572 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c @@ -75,7 +75,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_wb_encoder_atomic_check(st= ruct drm_encoder *encod =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_wb_encoder_atomic_check); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_wb_encoder_atomic_check); =20 =20 VISIBLE_IF_KUNIT int amdgpu_dm_wb_connector_get_modes(struct drm_connector= *connector) @@ -83,7 +83,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_wb_connector_get_modes(str= uct drm_connector *conn /* Maximum resolution supported by DWB */ return drm_add_modes_noedid(connector, 3840, 2160); } -EXPORT_IF_KUNIT(amdgpu_dm_wb_connector_get_modes); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_wb_connector_get_modes); =20 VISIBLE_IF_KUNIT int amdgpu_dm_wb_prepare_job(struct drm_writeback_connect= or *wb_connector, struct drm_writeback_job *job) @@ -148,7 +148,7 @@ VISIBLE_IF_KUNIT int amdgpu_dm_wb_prepare_job(struct dr= m_writeback_connector *wb amdgpu_bo_unreserve(rbo); return r; } -EXPORT_IF_KUNIT(amdgpu_dm_wb_prepare_job); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_wb_prepare_job); =20 VISIBLE_IF_KUNIT void amdgpu_dm_wb_cleanup_job(struct drm_writeback_connec= tor *connector, struct drm_writeback_job *job) @@ -170,7 +170,7 @@ VISIBLE_IF_KUNIT void amdgpu_dm_wb_cleanup_job(struct d= rm_writeback_connector *c amdgpu_bo_unreserve(rbo); amdgpu_bo_unref(&rbo); } -EXPORT_IF_KUNIT(amdgpu_dm_wb_cleanup_job); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_wb_cleanup_job); =20 static const struct drm_encoder_helper_funcs amdgpu_dm_wb_encoder_helper_f= uncs =3D { .atomic_check =3D amdgpu_dm_wb_encoder_atomic_check, @@ -220,4 +220,4 @@ int amdgpu_dm_wb_connector_init(struct amdgpu_display_m= anager *dm, =20 return 0; } -EXPORT_IF_KUNIT(amdgpu_dm_wb_connector_init); +EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_wb_connector_init); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_audio_te= st.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_audio_test.c index 040a7a9c0335..61ad1c3cc452 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_audio_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_audio_test.c @@ -1255,5 +1255,6 @@ static struct kunit_suite dm_audio_test_suite =3D { kunit_test_suite(dm_audio_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_audio"); MODULE_AUTHOR("AMD"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_backligh= t_test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_backlight_= test.c index 7ca17f803f9d..dee8e744c16f 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_backlight_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_backlight_test.c @@ -1991,5 +1991,6 @@ static struct kunit_suite dm_backlight_test_suite =3D= { kunit_test_suite(dm_backlight_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_backlight"); MODULE_AUTHOR("AMD"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_te= st.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c index 8c2f7ab5f8d3..74d7496b9128 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c @@ -3036,5 +3036,6 @@ static struct kunit_suite dm_color_test_suite =3D { kunit_test_suite(dm_color_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_color"); MODULE_AUTHOR("AMD"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_colorop_= test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_colorop_test= .c index 2e557ff66818..af1f5bfa1203 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_colorop_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_colorop_test.c @@ -345,5 +345,6 @@ static struct kunit_suite dm_colorop_test_suite =3D { kunit_test_suite(dm_colorop_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_colorop"); MODULE_AUTHOR("AMD"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_connecto= r_test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_connector_= test.c index a54fd9529dc9..6811bbd32834 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_connector_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_connector_test.c @@ -5689,3 +5689,4 @@ kunit_test_suite(amdgpu_dm_connector_test_suite); MODULE_AUTHOR("AMD"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_connector"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crc_test= .c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crc_test.c index 29a513dab9cd..57b3f696b6d8 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crc_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crc_test.c @@ -967,5 +967,6 @@ static struct kunit_suite dm_crc_test_suite =3D { kunit_test_suite(dm_crc_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_crc"); MODULE_AUTHOR("AMD"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crtc_tes= t.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crtc_test.c index 4dacddd23878..eb9d5b9c835d 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crtc_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crtc_test.c @@ -1937,3 +1937,4 @@ kunit_test_suite(amdgpu_dm_crtc_test_suite); MODULE_AUTHOR("AMD"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_crtc"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_cursor_t= est.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_cursor_test.c index 3da76794ece9..f33f528159f3 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_cursor_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_cursor_test.c @@ -266,3 +266,4 @@ kunit_test_suite(amdgpu_dm_cursor_test_suite); MODULE_AUTHOR("AMD"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_cursor"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_dmub_tes= t.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_dmub_test.c index ead43eeb38c7..f5b1db23618b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_dmub_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_dmub_test.c @@ -1417,3 +1417,4 @@ kunit_test_suite(amdgpu_dm_dmub_test_suite); MODULE_AUTHOR("AMD"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_dmub"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_freesync= _test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_freesync_te= st.c index 0ae636dcbbe4..967a8001c653 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_freesync_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_freesync_test.c @@ -451,3 +451,4 @@ kunit_test_suite(amdgpu_dm_freesync_test_suite); MODULE_AUTHOR("AMD"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_freesync"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_hdcp_tes= t.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_hdcp_test.c index cfdcc44581b1..6f1a7c0c6024 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_hdcp_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_hdcp_test.c @@ -2617,5 +2617,6 @@ static struct kunit_suite dm_hdcp_test_suite =3D { kunit_test_suite(dm_hdcp_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_hdcp"); MODULE_AUTHOR("AMD"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_helpers_= test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_helpers_test= .c index 058e1ad15dfe..df4e2741a263 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_helpers_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_helpers_test.c @@ -3905,3 +3905,4 @@ kunit_test_suite(amdgpu_dm_helpers_test_suite); =20 MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_helpers"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_irq_test= .c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_irq_test.c index 28c36217f6a2..fab625427fd0 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_irq_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_irq_test.c @@ -4091,3 +4091,4 @@ kunit_test_suite(amdgpu_dm_irq_test_suite); MODULE_AUTHOR("AMD"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_irq"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_ism_test= .c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_ism_test.c index 6394b967ac3a..176518ea2f65 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_ism_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_ism_test.c @@ -1274,5 +1274,6 @@ static struct kunit_suite dm_ism_test_suite =3D { kunit_test_suite(dm_ism_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_ism"); MODULE_AUTHOR("AMD"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_kunit_he= lpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_kunit_helpe= rs.c index aad122c7229f..6c1472fcaf16 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_kunit_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_kunit_helpers.c @@ -192,4 +192,5 @@ struct drm_device *dm_kunit_alloc_drm_with_connector_li= st(struct kunit *test) EXPORT_SYMBOL(dm_kunit_alloc_drm_with_connector_list); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit test helpers for amdgpu_dm tests"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_mst_type= s_test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_mst_types_= test.c index caedad4197bd..3f556d1f62fa 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_mst_types_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_mst_types_test.c @@ -1426,4 +1426,5 @@ static struct kunit_suite dm_mst_types_test_suite =3D= { kunit_test_suite(dm_mst_types_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_mst_types"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_te= st.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c index ba97092c7bb8..8fb8c6525ee1 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c @@ -3135,3 +3135,4 @@ kunit_test_suite(amdgpu_dm_plane_test_suite); =20 MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_plane"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_pp_smu_t= est.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_pp_smu_test.c index fbd07af60230..2a67ba9d79a3 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_pp_smu_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_pp_smu_test.c @@ -2471,4 +2471,5 @@ static struct kunit_suite dm_pp_smu_test_suite =3D { kunit_test_suite(dm_pp_smu_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_pp_smu"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test= .c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c index 0a484ea7c0e8..6d1cc3a09648 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c @@ -754,5 +754,6 @@ static struct kunit_suite dm_psr_test_suite =3D { kunit_test_suite(dm_psr_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_psr"); MODULE_AUTHOR("AMD"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_quirks_t= est.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_quirks_test.c index 150c53a68bed..a44b49f6cc1c 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_quirks_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_quirks_test.c @@ -166,3 +166,4 @@ kunit_test_suite(amdgpu_dm_quirks_test_suite); MODULE_AUTHOR("AMD"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_quirks"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_replay_t= est.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_replay_test.c index 6f633b1bbaca..766018e65d53 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_replay_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_replay_test.c @@ -622,5 +622,6 @@ static struct kunit_suite dm_replay_test_suite =3D { kunit_test_suite(dm_replay_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_replay"); MODULE_AUTHOR("AMD"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_services= _test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_services_te= st.c index e48bac7fb024..7344adadcd08 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_services_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_services_test.c @@ -311,3 +311,4 @@ kunit_test_suite(amdgpu_dm_services_test_suite); =20 MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_services"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_test.c b= /drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_test.c index 3c10eec9b1e0..7414c2bfd5dd 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_test.c @@ -1230,3 +1230,4 @@ kunit_test_suite(amdgpu_dm_test_suite); MODULE_AUTHOR("AMD"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm"); MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_wb_test.= c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_wb_test.c index 3454cf371414..8fbd71804789 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_wb_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_wb_test.c @@ -434,4 +434,5 @@ static struct kunit_suite dm_wb_test_suite =3D { kunit_test_suite(dm_wb_test_suite); =20 MODULE_LICENSE("Dual MIT/GPL"); +MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING"); MODULE_DESCRIPTION("KUnit tests for amdgpu_dm_wb"); diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_sink.c b/drivers/gpu/dr= m/amd/display/dc/core/dc_sink.c index 38ef295e43d6..cb53afc18cb7 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_sink.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_sink.c @@ -61,7 +61,7 @@ void dc_sink_retain(struct dc_sink *sink) { kref_get(&sink->refcount); } -EXPORT_IF_KUNIT(dc_sink_retain); +EXPORT_SYMBOL_IF_KUNIT(dc_sink_retain); =20 static void dc_sink_free(struct kref *kref) { @@ -74,7 +74,7 @@ void dc_sink_release(struct dc_sink *sink) { kref_put(&sink->refcount, dc_sink_free); } -EXPORT_IF_KUNIT(dc_sink_release); +EXPORT_SYMBOL_IF_KUNIT(dc_sink_release); =20 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params) { @@ -96,7 +96,7 @@ struct dc_sink *dc_sink_create(const struct dc_sink_init_= data *init_params) alloc_fail: return NULL; } -EXPORT_IF_KUNIT(dc_sink_create); +EXPORT_SYMBOL_IF_KUNIT(dc_sink_create); =20 /*************************************************************************= ****** * Protected functions - visible only inside of DC (not visible in DM) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/= drm/amd/display/dc/core/dc_stream.c index 9f3068e899e1..9b2893be09b1 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c @@ -205,7 +205,7 @@ void dc_stream_release(struct dc_stream_state *stream) kref_put(&stream->refcount, dc_stream_free); } } -EXPORT_IF_KUNIT(dc_stream_release); +EXPORT_SYMBOL_IF_KUNIT(dc_stream_release); =20 struct dc_stream_state *dc_create_stream_for_sink( struct dc_sink *sink) diff --git a/drivers/gpu/drm/amd/display/dc/dm_helpers.h b/drivers/gpu/drm/= amd/display/dc/dm_helpers.h index ac1522fc2e70..6d7cdab1006f 100644 --- a/drivers/gpu/drm/amd/display/dc/dm_helpers.h +++ b/drivers/gpu/drm/amd/display/dc/dm_helpers.h @@ -196,11 +196,9 @@ void dm_helpers_mccs_vcp_set( =20 #if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST) #define INLINE_IFN_KUNIT inline -#define EXPORT_IF_KUNIT(symbol) EXPORT_SYMBOL(symbol) =20 #else #define INLINE_IFN_KUNIT -#define EXPORT_IF_KUNIT(symbol) #endif =20 bool dm_helpers_submit_i2c_over_aux( --=20 2.55.0 From nobody Fri Sep 25 23:09:45 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5ADB24EBAF0 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-visibility-unification-v1-3-6a962e5b3351@redhat.com> References: <20260907-visibility-unification-v1-0-6a962e5b3351@redhat.com> In-Reply-To: <20260907-visibility-unification-v1-0-6a962e5b3351@redhat.com> To: Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Jonathan Corbet , Shuah Khan , Randy Dunlap Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Maxime Ripard , Albert Esteve X-Developer-Signature: v=1; a=ed25519-sha256; t=1788787740; l=2429; i=aesteve@redhat.com; s=20260827; h=from:subject:message-id; bh=FMk6nmYE8//ZlncdjePunFwhXKADEtkS5BFhT5MPsos=; b=uI+7yjzvElbGaGDTZmc07bb3MZwvXKjag8NkjsgSbHeGBt92E0Wd8XNnt+RuCTSb3/UN6htA/ zABNdSgKNVRC4R7ZZgqsJvQNKFQWsaWZip/xK2zs0J04GKYOEDpibnU X-Developer-Key: i=aesteve@redhat.com; a=ed25519; pk=zI2RBeZgocwYm3AkJW4CtjoJnKoDZrfBl1xe5Ed6h+U= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 This helper was originally static inline. INLINE_IFN_KUNIT only added inline for KUnit builds, which dropped that hint from production. There is no equivalent in kunit/visibility.h, and tests do not need one: they call the exported symbol from another translation unit. Use an unconditional inline with VISIBLE_IF_KUNIT instead so production stays static inline. kernel-doc already strips inline, so the dedicated xform can go too. Signed-off-by: Albert Esteve Acked-by: Maxime Ripard Suggested-by: Maxime Ripard --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 2 +- drivers/gpu/drm/amd/display/dc/dm_helpers.h | 7 ------- tools/lib/python/kdoc/xforms_lists.py | 1 - 3 files changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index e3f4ee6e8380..eea7e7dcfa30 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -173,7 +173,7 @@ void amdgpu_dm_init_color_mod(void) } EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_init_color_mod); =20 -VISIBLE_IF_KUNIT INLINE_IFN_KUNIT +VISIBLE_IF_KUNIT inline struct fixed31_32 amdgpu_dm_fixpt_from_s3132(__u64 x) { struct fixed31_32 val; diff --git a/drivers/gpu/drm/amd/display/dc/dm_helpers.h b/drivers/gpu/drm/= amd/display/dc/dm_helpers.h index 6d7cdab1006f..cabcbc2599e6 100644 --- a/drivers/gpu/drm/amd/display/dc/dm_helpers.h +++ b/drivers/gpu/drm/amd/display/dc/dm_helpers.h @@ -194,13 +194,6 @@ void dm_helpers_mccs_vcp_set( struct dc_link *link, struct dc_sink *sink); =20 -#if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST) -#define INLINE_IFN_KUNIT inline - -#else -#define INLINE_IFN_KUNIT -#endif - bool dm_helpers_submit_i2c_over_aux( struct ddc_service *ddc, uint32_t address, diff --git a/tools/lib/python/kdoc/xforms_lists.py b/tools/lib/python/kdoc/= xforms_lists.py index b49b81da74d9..cab4a49e4fc4 100644 --- a/tools/lib/python/kdoc/xforms_lists.py +++ b/tools/lib/python/kdoc/xforms_lists.py @@ -105,7 +105,6 @@ class CTransforms: (CMatch("__attribute_const__"), ""), (CMatch("__attribute__"), ""), (CMatch("VISIBLE_IF_KUNIT"), ""), - (CMatch("INLINE_IFN_KUNIT"), ""), =20 # # HACK: this is similar to process_export() hack. It is meant to --=20 2.55.0