From nobody Fri Sep 25 23:10:23 2026 Received: from mx1.white.stw.pengutronix.de (mx1.white.stw.pengutronix.de [185.203.200.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 591C84FECF9; Mon, 7 Sep 2026 15:32:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.200.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788795134; cv=none; b=Db7zRAl3MME+Aqfp/7Dat/t+Rhwk0asoSMJI1Qd6fBpcKqzZCHtgS6CT2rbC6WHD785SIXntG1gw4V2zkhGeilRuF/ZU/W6d7XH7XHznErdrwpW6yq5XnahsSMuKp7GE7+3acF+cLmrswFE3dEPtoQ+iOu28aesFTsw8CaC/J4g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788795134; c=relaxed/simple; bh=EQMkaOVTpT52GS7Jl1JQVmtzQ3gVPjCNyXibIxxmu6g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LwY5BXtgkZtQ8s38guKbvlbTHw27Q/g4gK4NQAb4q8z8vibu0pk689wkigFABN5KSxAf3Kvgm11bfD2WqRObTP9E/rbBWKlXFr0k4leM2meJWPOZgLN6BDu1KuJNYV1dFyY+ohJCowAdsZMuU+wtuKocSq6eYou8LPOIcsN8Ro8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.200.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de X-PTX-Original-Recipient: samuel@sholland.org X-PTX-Original-Recipient: linux-sunxi@lists.linux.dev X-PTX-Original-Recipient: o.schinagl@ultimaker.com X-PTX-Original-Recipient: broonie@linaro.org X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-PTX-Original-Recipient: linux-spi@vger.kernel.org X-PTX-Original-Recipient: jernej.skrabec@gmail.com X-PTX-Original-Recipient: mr.nuke.me@gmail.com X-PTX-Original-Recipient: mkl@pengutronix.de X-PTX-Original-Recipient: kernel@pengutronix.de X-PTX-Original-Recipient: jre@pengutronix.de X-PTX-Original-Recipient: mripard@kernel.org X-PTX-Original-Recipient: wens@kernel.org X-PTX-Original-Recipient: broonie@kernel.org X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org Received: from drehscheibe.grey.stw.pengutronix.de (drehscheibe.grey.stw.pengutronix.de [IPv6:2a0a:edc0:0:c01:1d::a2]) (Authenticated sender: relay-from-drehscheibe.grey.stw.pengutronix.de) by mx1.white.stw.pengutronix.de (Postfix) with ESMTPSA id 2A5A0201A9D; Mon, 07 Sep 2026 17:32:04 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x3bKG-000Ym1-0B; Mon, 07 Sep 2026 17:32:04 +0200 From: Jonas Rebmann Date: Mon, 07 Sep 2026 17:31:40 +0200 Subject: [PATCH v2 1/6] spi: spi-sun4i: sun4i_spi_transfer_one(): fix transfers for SUN4I_FIFO_DEPTH Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-spi-sun4i-fixes-v2-1-7e805662b9bd@pengutronix.de> References: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> In-Reply-To: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Mark Brown , kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=1955; i=jre@pengutronix.de; h=from:subject:message-id; bh=wfQL1QSfCbWufR3wGkkwcQx1sGdHXFdbWwqElB1tnxg=; b=owGbwMvMwCV2ZcYT3onnbjcwnlZLYsiad+NjRFbFEebQs1Vu/xuTbC6/29fSFW5XYFasNTNhz 0SeljlFHaUsDGJcDLJiiiyxanIKQsb+180q7WJh5rAygQxh4OIUgIm0TmNkmHxc5+FP1u0ekdpO 86Xz3i2QStnwPeJcXfT95e/PJd1jv8jwT/f6n7gubdF1V6Y8n52gJcpUmOrD9oDd7Ue1/Kf1MpN TeQA= X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 From: Marc Kleine-Budde In commit 6d9fe44bd73d ("spi: sun4i: fix FIFO limit"), the TX-FIFO is filled max to SUN4I_FIFO_DEPTH - 1 (=3D 63) bytes to work around timeouts observed on A10s SoCs. Commit 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") added support for transfers larger than the FIFO size. But this commit only enabled the TX-FIFO empty interrupt for transfers larger than the FIFO (=3D 64) bytes. This breaks transfers with exactly 64 bytes: the TX-FIFO is only filled with 63 bytes but the interrupt to refill the FIFO is not triggered. The problem can be reproduced with the following command: | spidev_test -D /dev/spidev0.1 -S 64 -s 20000000 -I 1 | | [ 7797.548745] spi_master spi0: spi0.1: timeout transferring 64 bytes@200= 00000Hz for 110(100)ms | [ 7797.557237] spidev spi0.1: SPI transfer failed: -110 | [ 7797.562308] spi_master spi0: failed to transfer one message from queue | [ 7797.568936] spi_master spi0: noqueue transfer failed To fix the problem enable the TX-FIFO interrupt if the total TX length is larger than SUN4I_FIFO_DEPTH - 1 (=3D 63) bytes. Fixes: 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index d5c16392cd4d..2e2324453905 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -322,7 +322,7 @@ static int sun4i_spi_transfer_one(struct spi_controller= *host, sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TC | SUN4I_INT_CTL_RF_F34); /* Only enable Tx FIFO interrupt if we really need it */ - if (tx_len > SUN4I_FIFO_DEPTH) + if (tx_len > SUN4I_FIFO_DEPTH - 1) sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TF_E34); =20 /* Start the transfer */ --=20 2.55.0.123.gf60db8d575 From nobody Fri Sep 25 23:10:23 2026 Received: from mx1.white.stw.pengutronix.de (mx1.white.stw.pengutronix.de [185.203.200.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5854F4F797B; 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Mon, 07 Sep 2026 17:32:04 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x3bKG-000Ym1-0P; Mon, 07 Sep 2026 17:32:04 +0200 From: Jonas Rebmann Date: Mon, 07 Sep 2026 17:31:41 +0200 Subject: [PATCH v2 2/6] spi: spi-sun4i: sun4i_spi_fill_fifo(): always apply A10 FIFO fill level workaround Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-spi-sun4i-fixes-v2-2-7e805662b9bd@pengutronix.de> References: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> In-Reply-To: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Mark Brown , kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2965; i=jre@pengutronix.de; h=from:subject:message-id; bh=TyIg6fa906BvVGJmUbL2uFkFKtz0nx9DEAKb+ItgMx8=; b=owGbwMvMwCV2ZcYT3onnbjcwnlZLYsiad+NjfujlU9Xca7e9//dESvhjwtX8LhmWsFDdCv1m0 fZ9rm3XOkpZGMS4GGTFFFli1eQUhIz9r5tV2sXCzGFlAhnCwMUpABMpmMbwP3yD74O1ml7hrqzJ CoaeJ4VXMM/l+z+HfbHnWaf1grUdCxn+l1zYM1/zl6Khw6Nva2ZM1M5Vk+EOOV9Qv9agY8/Jo1v 1WQA= X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 From: Marc Kleine-Budde In commit 6d9fe44bd73d ("spi: sun4i: fix FIFO limit"), the TX FIFO is filled max to SUN4I_FIFO_DEPTH - 1 (=3D 63) bytes to work around timeouts observed on A10s SoCs. Commit 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") added support for transfers larger than the FIFO size. This commit did not consider the A10 workaround (limit the TX FIFO fill size to SUN4I_FIFO_DEPTH - 1 (=3D 63) bytes) for refilling the TX FIFO in the IRQ handler. To apply the workaround independent from where sun4i_spi_fill_fifo() is called, remove the length argument from the function and directly take the max fill level of SUN4I_FIFO_DEPTH - 1 into account when calculating the free space in the FIFO. Due to the lack of HW this patch has not been tested on an A10 SoC, but on an A20 SoC. It was not possible to reproduce the timeout on the A20. Fixes: 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 2e2324453905..3649bcabcc9a 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -142,15 +142,21 @@ static inline void sun4i_spi_drain_fifo(struct sun4i_= spi *sspi, int len) } } =20 -static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len) +static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi) { u32 cnt; + int len; u8 byte; =20 - /* See how much data we can fit */ - cnt =3D SUN4I_FIFO_DEPTH - sun4i_spi_get_tx_fifo_count(sspi); + /* + * See how much data we can fit + * + * Filling the FIFO fully causes timeout for some reason + * at least on spi2 on A10s + */ + cnt =3D SUN4I_FIFO_DEPTH - 1 - sun4i_spi_get_tx_fifo_count(sspi); =20 - len =3D min3(len, (int)cnt, sspi->len); + len =3D min_t(int, cnt, sspi->len); =20 while (len--) { byte =3D sspi->tx_buf ? *sspi->tx_buf++ : 0; @@ -311,12 +317,8 @@ static int sun4i_spi_transfer_one(struct spi_controlle= r *host, sun4i_spi_write(sspi, SUN4I_BURST_CNT_REG, SUN4I_BURST_CNT(tfr->len)); sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len)); =20 - /* - * Fill the TX FIFO - * Filling the FIFO fully causes timeout for some reason - * at least on spi2 on A10s - */ - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); + /* Fill the TX FIFO */ + sun4i_spi_fill_fifo(sspi); =20 /* Enable the interrupts */ sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TC | @@ -373,7 +375,7 @@ static irqreturn_t sun4i_spi_handler(int irq, void *dev= _id) =20 /* Transmit FIFO 3/4 empty */ if (status & SUN4I_INT_CTL_TF_E34) { - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH); + sun4i_spi_fill_fifo(sspi); =20 if (!sspi->len) /* nothing left to transmit */ --=20 2.55.0.123.gf60db8d575 From nobody Fri Sep 25 23:10:23 2026 Received: from mx1.white.stw.pengutronix.de (mx1.white.stw.pengutronix.de [185.203.200.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59E11501F28; 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Mon, 07 Sep 2026 17:32:04 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x3bKG-000Ym1-0b; Mon, 07 Sep 2026 17:32:04 +0200 From: Jonas Rebmann Date: Mon, 07 Sep 2026 17:31:42 +0200 Subject: [PATCH v2 3/6] spi: spi-sun4i: sun4i_spi_transfer_one(): fix setting of clock rate Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-spi-sun4i-fixes-v2-3-7e805662b9bd@pengutronix.de> References: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> In-Reply-To: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Mark Brown , kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2341; i=jre@pengutronix.de; h=from:subject:message-id; bh=pSbHNGpfbi6ot6AXey1gYf0jWgNZ6badXvRmVMsMld4=; b=owGbwMvMwCV2ZcYT3onnbjcwnlZLYsiad+OTx/prk2vF5qltXybckXXhyeFgXT5bowvJJx9pX JGXXSm7pKOUhUGMi0FWTJElVk1OQcjY/7pZpV0szBxWJpAhDFycAjCR2bsZGZZ9dd+zfPnUM+Fh T78ECnVt+Lzr7pxJxa0pfC1G3cw9rvGMDKc3i5z8f/bJ/rKjGSbmv7IX90umGztNc3A5Jv1axff EPl4A X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 From: Marc Kleine-Budde A SPI transfer defines the _maximum_ speed of the SPI transfer. However the driver doesn't take into account that the clock divider is always rounded down (due to integer arithmetic). This results in a too high clock rate for the SPI transfer. E.g.: with an mclk_rate of 24 MHz and an SPI transfer speed of 10 MHz, the original code calculates a reg of "0", which results in an effective divider of "2" and a 12 MHz clock for the SPI transfer. Use DIV_ROUND_UP() instead of a plain integer division to fix the problem. While there simplify the divider calculation for the CDR1 case, use order_base_2() instead of two ilog2() calculations. Fixes: b5f6517948cc ("spi: sunxi: Add Allwinner A10 SPI controller driver") Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 3649bcabcc9a..8a9dcd3b6b8f 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -212,7 +212,7 @@ static int sun4i_spi_transfer_one(struct spi_controller= *host, struct spi_transfer *tfr) { struct sun4i_spi *sspi =3D spi_controller_get_devdata(host); - unsigned int mclk_rate, div; + unsigned int mclk_rate, div, div_cdr1, div_cdr2; unsigned long time_left; unsigned int start, end, tx_time; unsigned int tx_len =3D 0; @@ -296,15 +296,13 @@ static int sun4i_spi_transfer_one(struct spi_controll= er *host, * First try CDR2, and if we can't reach the expected * frequency, fall back to CDR1. */ - div =3D mclk_rate / (2 * tfr->speed_hz); - if (div <=3D (SUN4I_CLK_CTL_CDR2_MASK + 1)) { - if (div > 0) - div--; - - reg =3D SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS; + div_cdr1 =3D DIV_ROUND_UP(mclk_rate, tfr->speed_hz); + div_cdr2 =3D DIV_ROUND_UP(div_cdr1, 2); + if (div_cdr2 <=3D (SUN4I_CLK_CTL_CDR2_MASK + 1)) { + reg =3D SUN4I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN4I_CLK_CTL_DRS; } else { - div =3D ilog2(mclk_rate) - ilog2(tfr->speed_hz); - reg =3D SUN4I_CLK_CTL_CDR1(div); + div =3D min(SUN4I_CLK_CTL_CDR1_MASK + 1, order_base_2(div_cdr1)); + reg =3D SUN4I_CLK_CTL_CDR1(div - 1); } =20 sun4i_spi_write(sspi, SUN4I_CLK_CTL_REG, reg); --=20 2.55.0.123.gf60db8d575 From nobody Fri Sep 25 23:10:23 2026 Received: from mx1.white.stw.pengutronix.de (mx1.white.stw.pengutronix.de [185.203.200.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82B3A509EF1; Mon, 7 Sep 2026 15:32:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.200.13 ARC-Seal: i=1; a=rsa-sha256; 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spf=pass smtp.mailfrom=pengutronix.de X-PTX-Original-Recipient: samuel@sholland.org X-PTX-Original-Recipient: linux-sunxi@lists.linux.dev X-PTX-Original-Recipient: o.schinagl@ultimaker.com X-PTX-Original-Recipient: t.schramm@manjaro.org X-PTX-Original-Recipient: broonie@linaro.org X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-PTX-Original-Recipient: linux-spi@vger.kernel.org X-PTX-Original-Recipient: jernej.skrabec@gmail.com X-PTX-Original-Recipient: mr.nuke.me@gmail.com X-PTX-Original-Recipient: mkl@pengutronix.de X-PTX-Original-Recipient: kernel@pengutronix.de X-PTX-Original-Recipient: jre@pengutronix.de X-PTX-Original-Recipient: mripard@kernel.org X-PTX-Original-Recipient: wens@kernel.org X-PTX-Original-Recipient: broonie@kernel.org X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org Received: from drehscheibe.grey.stw.pengutronix.de (drehscheibe.grey.stw.pengutronix.de [IPv6:2a0a:edc0:0:c01:1d::a2]) (Authenticated sender: relay-from-drehscheibe.grey.stw.pengutronix.de) by mx1.white.stw.pengutronix.de (Postfix) with ESMTPSA id 5AFD2202010; Mon, 07 Sep 2026 17:32:04 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x3bKG-000Ym1-0p; Mon, 07 Sep 2026 17:32:04 +0200 From: Jonas Rebmann Date: Mon, 07 Sep 2026 17:31:43 +0200 Subject: [PATCH v2 4/6] spi: spi-sun4i: sun4i_spi_handler(): fix race condition between transfer completion and RX FIFO interrupt Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-spi-sun4i-fixes-v2-4-7e805662b9bd@pengutronix.de> References: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> In-Reply-To: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Mark Brown , kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann , Tobias Schramm X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=3887; i=jre@pengutronix.de; h=from:subject:message-id; bh=QMi2ysI1afuHQu9XDhv19lMvyJMVahR5/aTnItq6LYk=; b=owGbwMvMwCV2ZcYT3onnbjcwnlZLYsiad+NTZfKu09JKKRdPBSkzhd3e8O3zFwWW5oXamS8qt 0/inTujsKOUhUGMi0FWTJElVk1OQcjY/7pZpV0szBxWJpAhDFycAjCRbQsY/tlwMG//Uh0Sc2vW wpCLqxUkGo7zrXFsf8uScGLmgeIJTzcz/A87YOt++i/r7pjDrj7X0qtX9gdUuX4Ne+JUFn1bfcF UXmYA X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 From: Marc Kleine-Budde In commit 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size"), support for transfers larger than the FIFO size was added. This commit moves the draining of the RX-FIFO from sun4i_spi_transfer_one() (after completion of the transfer) to the IRQ handler when the IRQ "transfer complete" is handled. In addition, the IRQ "RX-FIFO 3/4 full" is activated for all transfers. However, this does not take into account that the RX-IRQ for transfers that exceed 3/4 of the FIFO size is still pending after the IRQ "transfer complete" has been processed. All interrupt sources are only deactivated after the wait_for_completion_timeout() in sun4i_spi_transfer_one(). This opens a race window for "RX-FIFO 3/4 full" interrupts to come. The sequence is as follows: | sun4i_spi_transfer_one() | sun4i_spi_fill_fifo() // fill TX-FIFO with 48 bytes | // enable RX-FIFO 3/4 full IRQ | wait_for_completion_timeout(); | | // SPI controller transfers 48 bytes | // SPI controller issues "transfer complete" and "RX-FIFO 3/4 full" IRQ | | // IRQ handler start | sun4i_spi_handler() | // ACK "transfer complete" IRQ | sun4i_spi_drain_fifo(); | complete(); ----. | return IRQ_HANDLED; \ | // IRQ handler end \__ race | / window | // wait_for_completion_timeout() continues / | // disable all IRQ sources ----' Avoid the race condition by disabling all interrupts when handling the "transfer complete" IRQ and before calling complete(). Also move the draining of the RX-FIFO back into sun4i_spi_transfer_one() where it was before commit 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size"). This has the added benefit of spending a little less time in the IRQ handler. Cc: Tobias Schramm Fixes: 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size") Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 8a9dcd3b6b8f..ea8be0170fbf 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -82,6 +82,8 @@ struct sun4i_spi { =20 struct completion done; =20 + int irq; + const u8 *tx_buf; u8 *rx_buf; int len; @@ -333,6 +335,7 @@ static int sun4i_spi_transfer_one(struct spi_controller= *host, start =3D jiffies; time_left =3D wait_for_completion_timeout(&sspi->done, msecs_to_jiffies(tx_time)); + end =3D jiffies; if (!time_left) { dev_warn(&host->dev, @@ -340,12 +343,11 @@ static int sun4i_spi_transfer_one(struct spi_controll= er *host, dev_name(&spi->dev), tfr->len, tfr->speed_hz, jiffies_to_msecs(end - start), tx_time); ret =3D -ETIMEDOUT; - goto out; + sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0); 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Mon, 07 Sep 2026 17:32:04 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x3bKG-000Ym1-12; Mon, 07 Sep 2026 17:32:04 +0200 From: Jonas Rebmann Date: Mon, 07 Sep 2026 17:31:44 +0200 Subject: [PATCH v2 5/6] spi: spi-sun4i: sun4i_spi_transfer_one(): add error handling at clock setup Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-spi-sun4i-fixes-v2-5-7e805662b9bd@pengutronix.de> References: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> In-Reply-To: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Mark Brown , kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=1118; i=jre@pengutronix.de; h=from:subject:message-id; bh=drC6FXUT8sD00Zc/eQa38tjuPOCL2PtR/zc6tWq5MmI=; b=owGbwMvMwCV2ZcYT3onnbjcwnlZLYsiad+PzyQP37gb1VZ4u0Lyy/E+6WceXXZWtH9bdyPsiN cFU5N5Npo5SFgYxLgZZMUWWWDU5BSFj/+tmlXaxMHNYmUCGMHBxCsBEZLQZ/pdv/HCpto53K2e4 zdn5xkG1udVqbxavORwV/It72e2qzMsM/8wyJ1285Hpd+f4eEU5ZvR1mmgcmuSamNOy/d+x4PPe pRj4A X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 Bail out if clk_get_rate() or clk_set_rate() fail during sun4i_spi_transfer_one(). This might happen if the clock isn't known yet or fails to set the requested rate. This also ensures that mclk_rate is nonzero and can be safely divided by in a future commit. Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index ea8be0170fbf..94e1c7bbd632 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -279,9 +279,17 @@ static int sun4i_spi_transfer_one(struct spi_controlle= r *host, =20 /* Ensure that we have a parent clock fast enough */ mclk_rate =3D clk_get_rate(sspi->mclk); + if (!mclk_rate) + return -EINVAL; + if (mclk_rate < (2 * tfr->speed_hz)) { - clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); + ret =3D clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); + if (ret) + return ret; + mclk_rate =3D clk_get_rate(sspi->mclk); + if (!mclk_rate) + return -EINVAL; } =20 /* --=20 2.55.0.123.gf60db8d575 From nobody Fri Sep 25 23:10:23 2026 Received: from mx1.white.stw.pengutronix.de (mx1.white.stw.pengutronix.de [185.203.200.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 358044F6466; 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Mon, 07 Sep 2026 17:32:04 +0200 (CEST) Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1x3bKG-000Ym1-1E; Mon, 07 Sep 2026 17:32:04 +0200 From: Jonas Rebmann Date: Mon, 07 Sep 2026 17:31:45 +0200 Subject: [PATCH v2 6/6] spi: spi-sun4i: sun4i_spi_transfer_one(): report effectively used speed_hz of transfer Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-spi-sun4i-fixes-v2-6-7e805662b9bd@pengutronix.de> References: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> In-Reply-To: <20260907-spi-sun4i-fixes-v2-0-7e805662b9bd@pengutronix.de> To: Mark Brown , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Alexandru Gagniuc , Olliver Schinagl Cc: linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Mark Brown , kernel@pengutronix.de, Marc Kleine-Budde , Jonas Rebmann X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=1170; i=jre@pengutronix.de; h=from:subject:message-id; bh=3aSZoSVdfFoP0s52cZnANn1FnxYo6HhRQHzmKTWne0U=; b=owGbwMvMwCV2ZcYT3onnbjcwnlZLYsiad+NzwuO7K5dtjcsonh3whTkrXDvU0vuA6cVz9hOib isVJW+e11HKwiDGxSArpsgSqyanIGTsf92s0i4WZg4rE8gQBi5OAZjIyV6Gf/pvNH34LmSuLhfy frzramZ7atpSpR18yTopXwWUF3fMSGb4X161plR75eWFgkFO0uq692RsrqxwnqUrsuj/I+ldTzt 2swEA X-Developer-Key: i=jre@pengutronix.de; a=openpgp; fpr=0B7B750D5D3CD21B3B130DE8B61515E135CD49B5 From: Marc Kleine-Budde Report the effectively used speed_hz for the transfer by setting tfr->effective_speed_hz. For more information see commit 5d7e2b5ed585 ("spi: core: allow reporting the effectivly used speed_hz for a transfer"), which adds this feature to the SPI core. Signed-off-by: Marc Kleine-Budde Signed-off-by: Jonas Rebmann --- drivers/spi/spi-sun4i.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 94e1c7bbd632..59941b38b757 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -310,9 +310,11 @@ static int sun4i_spi_transfer_one(struct spi_controlle= r *host, div_cdr2 =3D DIV_ROUND_UP(div_cdr1, 2); if (div_cdr2 <=3D (SUN4I_CLK_CTL_CDR2_MASK + 1)) { reg =3D SUN4I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN4I_CLK_CTL_DRS; + tfr->effective_speed_hz =3D mclk_rate / (2 * div_cdr2); } else { div =3D min(SUN4I_CLK_CTL_CDR1_MASK + 1, order_base_2(div_cdr1)); reg =3D SUN4I_CLK_CTL_CDR1(div - 1); + tfr->effective_speed_hz =3D mclk_rate / (1 << div); } =20 sun4i_spi_write(sspi, SUN4I_CLK_CTL_REG, reg); --=20 2.55.0.123.gf60db8d575