From nobody Fri Sep 25 23:10:47 2026 Received: from mail-244106.protonmail.ch (mail-244106.protonmail.ch [109.224.244.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48A084F4756; Mon, 7 Sep 2026 14:51:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792696; cv=none; b=aaOJjN3AO2pZuVLjX9E454lYhqx6lBWwYlo3SKzmWWAYgigq+8oYiWtxSK12GJAdGwxqVzOI4b8C3nxCedSeMltKXtoowu+C2V9Q7ktyQA3jAn473JlSg+rtdMQz5kJ2InfXf9kXp+aXfHOLOrCaUgb8X5YA4qpEE1M9UkFcgQw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792696; c=relaxed/simple; bh=Vy2kFGWf40LZZu/OrRKxOp27EqZPY3iYxkaZKLnSAbQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ib498JqgSQtIBxEgJ1V5hoCz1RJVr4a4rvLQFsF1ohKWk5ikbfC0mfrQe7zo/bgYOiN94AKyIVPNU3zbzFX3iN2V45Dd3vTOhAn4y47c0HxK8xEIDsYt+XyE7UKfl40NP7xtAoLXsBt0uOPqPSRFK5xb/SwBflWwer9lAqiQOIM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=BcU48kST; arc=none smtp.client-ip=109.224.244.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="BcU48kST" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1788792672; x=1789051872; bh=sNcmNScEhpmF/4cOJIi/n2ntDi0iE/3WYicZo1sq86I=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=BcU48kSTDX9Yiqi3coxWDMX7dJF4tFCEj83oN0Kt/66J0zD5HBrx7wj1TtjKOZail cAtMR0UcgTCfKL36QSVd8VLK2b2CnfkqfJLqldw6agk9l2nyzPuV3Qr857x+ATgCML xaf9oIXQsvVo2zPKLTeBYz0mnNrNL4gAA8CiZyNK1TfN7Kr/l06/60yqoG1dXfStsQ P63zvW3AxFEtUsi4/trW8jIQlx3lkgvDq/lN1aKJt/KoMYqZ5AOuSwttnzg4Jnl1NY bJ5ANNBp/3wPvFcwGCn4paJNHnJx9Fzrd1uzT2x0B68injoE8nCH7jfY6F8/DHUMEK 3Bk/akxXFSH4g== X-Pm-Submission-Id: 4hdql22ZZXz2ScNn From: Esben Haabendal Date: Mon, 07 Sep 2026 16:50:56 +0200 Subject: [PATCH v8 1/9] dt-bindings: iio: accel: mma8452: Add drive-open-drain Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-mma8452-open-drain-v8-1-c17407e22118@geanix.com> References: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> In-Reply-To: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788792664; l=1037; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=Vy2kFGWf40LZZu/OrRKxOp27EqZPY3iYxkaZKLnSAbQ=; b=COdXucptIvyz6knRu3ltK+3KoEYxg7biJdMGuZX42DNH9cemGNDiZpSg7jj4GerfrGmGrBTrB E0ZO8zNH2tBCGT3Uvk/I/XOEWJ6bNoqs9epYQ+ysBU8PxPzg89TiACk X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Add new boolean to configure selected interrupt pin to open drain instead of the default push-pull mode. Acked-by: Rob Herring (Arm) Signed-off-by: Esben Haabendal --- Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml b= /Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml index b0dd2b4e116a..20701aa725d0 100644 --- a/Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml +++ b/Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml @@ -39,6 +39,12 @@ properties: minItems: 1 maxItems: 2 =20 + drive-open-drain: + $ref: /schemas/types.yaml#/definitions/flag + description: the interrupt line will be configured as open drain, whic= h is + useful if several sensors share the same interrupt line. (This bindi= ng is + taken from pinctrl.) + vdd-supply: true vddio-supply: true =20 --=20 2.55.0 From nobody Fri Sep 25 23:10:47 2026 Received: from mail-43172.protonmail.ch (mail-43172.protonmail.ch [185.70.43.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 755E94FC8C2; Mon, 7 Sep 2026 14:51:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792697; cv=none; b=QjoV5xu17imcY3138u3ywOBOiKmSCz2alNtfWFiCNc5YMyyb0AiAPOb2KWspldF01LrWst4H4biMAq+u75WUkm9AyJEIwpSrnEK+fBw8RiCtWqLvtYRhSwJp1ObPhwJr8Z2E9F+zhvzlfGYfbIImGQaV7mbrzmOC7vZi4wvbJm4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792697; c=relaxed/simple; bh=5aHhFmRHH7hXWezUncCFq6AliuOuzN9v+On7qJIecuQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mgOVzA/o+cBduKYFz9wxr38cDgNeQ66fK1BhcpUb1mGef52pFHrvN4LUNx9ZaSd6XNrc7igAdNBffRQrzeVoqJZy/jU2hQVgSxyYlKOELs7lftHFTC1rvDSSfm5P6dJdWtL4BXcNCHLQyo8DhYssXc4NfWUXw0cFNwMg4s/Yylg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=PqU4aRMZ; arc=none smtp.client-ip=185.70.43.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="PqU4aRMZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1788792675; x=1789051875; bh=zOE/xhizi9/jAXNjhr878qhJ9pvevPWCdRYDdJUXczg=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=PqU4aRMZZUPSE/h5PfLqlt6nHBY6QAWuP4oFzOstDeZkKTOwv4t6ch8vjUBTHE1sD 57LwOI9vEKFfIK3+y3ZjC4dQR8e9Utm4GOQ3qOWXHsOQT4OP45yI+K4jImpPXVyXiS Gbrx3jw01gzvN8GxbQsW0MFctogmcojLLlr7MUktmEZBeoYKGRvJBYsch6kXH2hMjY SvpZFumEkTCzy23lKe89cn3i3Ci5NyQdKvN5tLmL57KLHkVK+39fZiTqslmoAP9Qxk gHT4yQah6LUTSxjN5JMr0DGF4WuGNDXdeOX8BFjo79BuD1TiqAcrdw+i1+hAkbe6je p5v+Ae6/YZL/A== X-Pm-Submission-Id: 4hdql42T6Jz1DFGT From: Esben Haabendal Date: Mon, 07 Sep 2026 16:50:57 +0200 Subject: [PATCH v8 2/9] iio: accel: mma8452: Fix use-after-free bug in error error path Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-mma8452-open-drain-v8-2-c17407e22118@geanix.com> References: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> In-Reply-To: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Joshua Crofts X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788792664; l=1204; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=5aHhFmRHH7hXWezUncCFq6AliuOuzN9v+On7qJIecuQ=; b=tUwM07OBNBaUq8CnaH0j0TKVCSIhrdYPShQmZYg4zmm5bh9TUKvxco+tUDPd5d/MIGZI9wkof JGyzXt8o/zgD4HVnVXLiX5isbvXyIjtdQ+bItpkcRVFUykKk4lN+Udw X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= If mma8452_probe() fails in iio_device_register() or later, we could end up with runtime suspend callback being called with a now freed device pointer. Fixes: 96c0cb2bbfe0 ("iio: mma8452: add support for runtime power managemen= t") Cc: stable@vger.kernel.org Reviewed-by: Joshua Crofts Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index fe62a903f0e2..a937cbd84f30 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -1681,7 +1681,7 @@ static int mma8452_probe(struct i2c_client *client) =20 ret =3D iio_device_register(indio_dev); if (ret < 0) - goto free_irq; + goto runtime_suspend; =20 ret =3D mma8452_set_freefall_mode(data, false); if (ret < 0) @@ -1692,6 +1692,10 @@ static int mma8452_probe(struct i2c_client *client) unregister_device: iio_device_unregister(indio_dev); =20 +runtime_suspend: + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); + free_irq: if (client->irq) free_irq(client->irq, indio_dev); --=20 2.55.0 From nobody Fri Sep 25 23:10:47 2026 Received: from mail-43172.protonmail.ch (mail-43172.protonmail.ch [185.70.43.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5DBB4F7987 for ; Mon, 7 Sep 2026 14:51:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792699; cv=none; b=ZIfm6A9zNGQlJUw+O7al5nL/LccLnwRvYxNfddj3+BMNkfeK+NyEn4j/kTJcitz4fpIfq+3xkrh1FYN4Rb+2J4SKVWOxJZJYG6cPa303U3FW6NQhhqumpPZNFAhbC8sjafux8AqW9ReVAldQcqAc6DMLENEiMTPHAq7v0CBqZC4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792699; c=relaxed/simple; bh=/w2tP6jJm9Pa7PWjow2JuCQ6uthTilvQLfGJba/Y+xE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KdK8vFaZ5We/5bp4hyM/kcpbDAFJBL+YQidksDBZjWerdYgjOt8ioclKNuAMV9lt0jOkOv20MpoQLauNptG7T6j7JQMMwzNUNbq0PTmGS95jzvczpckDRMlcKkSc7NOATame+gaDJE3KM27X8IHQr+MzOqriFZz//pVnXAsZ7/8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=B8f1Fui3; arc=none smtp.client-ip=185.70.43.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="B8f1Fui3" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1788792678; x=1789051878; bh=GgJW7yM8729h7XWq075MBG7+8NNptLe3gc5PN/8g9BU=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=B8f1Fui3U3QcSjigLrSrm862yC8mQlu/H+Vyd/rSYI8+FvLVXSH/yu6G5G5d7ZTdE rWVNnsyO0OZawffkazmo6D0fV4eOACIz0THO8eHEPuf5XxHHDbmHohlRrLj2HqH04g xtrpGXNfj9u6R1C6WDigRtLD2XwvbghAasemKyWZ4QEJrHJWC5lKGwhiged78GYkf2 DhyVU5YkQxwHottheGQH3Dwa09uqwsleAzgahMpbW0CPc3RePeaFBn2w/aA3gz1rb6 L8aiwpXiAjilCy8LWXyNgsMQZjPW0txu+n8NvQ0P8n1/G1gU2Yketk4cFt9PYtLADh 2QC+XRP2JhAiw== X-Pm-Submission-Id: 4hdql82qC7z1DDXL From: Esben Haabendal Date: Mon, 07 Sep 2026 16:50:58 +0200 Subject: [PATCH v8 3/9] iio: accel: mma8452: Optimize struct mma8452_data member orders Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-mma8452-open-drain-v8-3-c17407e22118@geanix.com> References: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> In-Reply-To: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Joshua Crofts , Andy Shevchenko X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788792664; l=1020; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=/w2tP6jJm9Pa7PWjow2JuCQ6uthTilvQLfGJba/Y+xE=; b=QbKXU7ryf13LAvyjt0CI/G4wjrXWHa2iEhuUA+/rnJi7Y+gNMRyF7s1h2zyThA7/tm8dfbTew TrEO85qyqjLAXdEpD8zzBwpl3hVNoFc9HZidZZP+9EV6CvuoUwEXJPt X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Reorder struct mma8452_data members to avoid holes. Reviewed-by: Joshua Crofts Reviewed-by: Andy Shevchenko Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index a937cbd84f30..6c5a8d65c8a4 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -108,10 +108,7 @@ struct mma8452_data { struct i2c_client *client; struct mutex lock; struct iio_mount_matrix orientation; - u8 ctrl_reg1; - u8 data_cfg; const struct mma_chip_info *chip_info; - int sleep_val; struct regulator_bulk_data regs[2]; =20 /* Ensure correct alignment of time stamp when present */ @@ -119,6 +116,10 @@ struct mma8452_data { __be16 channels[3]; aligned_s64 ts; } buffer; + + int sleep_val; + u8 ctrl_reg1; + u8 data_cfg; }; =20 /** --=20 2.55.0 From nobody Fri Sep 25 23:10:47 2026 Received: from mail-43170.protonmail.ch (mail-43170.protonmail.ch [185.70.43.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 770934F7983; Mon, 7 Sep 2026 14:51:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792704; cv=none; b=LEsipSGhXVP/FZgm7p1aNk7gvriKxdReMgAwLpHZXd0x/zOuxNRLjOwDjPp8r1Imec+8iyxZAtwtPi0AN/lIy96h+W38PY6ivwW1seBtk0V2OxBMW4M4SuXf0CLNntJZ+vVBGHXOcz95torxfDm5M7T03GRbryVC+bw18ZBDKQI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792704; c=relaxed/simple; bh=FxIdIXoSNaCCte0K/xoBAacBHBSvdO4pARP4HR40A4w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kNrWeMfcQX4ijFgXAhRMJyPLzHljBnTdvsOSaINJsY0l+CODSJP/kb7pvzMMPdfZQarpNzrFxm3Sr1tzcUnxPHiqb6oNQyr3ydOsbFQ7P+sPWznBys948orExV+tSVmnn3skalEJKxyGqMz62+J/XxaaQhE3o/mSK9PnVwrVJN4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=XcuiQdgJ; arc=none smtp.client-ip=185.70.43.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="XcuiQdgJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1788792679; x=1789051879; bh=AOqx3BY6tvy0nrGfle5izkbvmpZC9DpZCxHEczJltAk=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=XcuiQdgJaYEi2/uLEzbHnFAaTFF3NKJiJ75mcmAuYPeBgA0YPd7V7PARMW7Mp//Po kSBpf+0SvWrZPE07jNfjacF9mw3oyOc4LjLzdHC9tEVvqYPUlbAXPXgd779Ng2yrFu V17DfNijorUI9ZZ9RUtFIZB2qkoc172w5puKyVZ6ZyZzjJv01EccivqyGq8K+4P6Bh PHjcPjyT/SkOvWW+pimt7cHxlfXD5b0/ibNS+v3EGj0Fo8lTTHX5SewINltewcZcXF KO6UEgd4WCKrj3Pq9P12+OD28kb45AcjHxQ0HJzUjQ7UHAt9RjO7oOgrSD0jWW0hVu FMqZfI66zfXwA== X-Pm-Submission-Id: 4hdqlC08cmz2Schr From: Esben Haabendal Date: Mon, 07 Sep 2026 16:50:59 +0200 Subject: [PATCH v8 4/9] iio: accel: mma8452: Only apply trigger type when not set by firmware Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-mma8452-open-drain-v8-4-c17407e22118@geanix.com> References: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> In-Reply-To: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788792664; l=1389; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=FxIdIXoSNaCCte0K/xoBAacBHBSvdO4pARP4HR40A4w=; b=JwJklVxPa0HnqAnXyT7O5FTlWn8Plnnhsq0/zaefKnIxUWWm2wVhBCeFE34Q0bwJC6gXdOPNB CZbOgyYgk8UCOhmdrakm2nbnzSUmRabJj3z5yrCdIHH8vBQ0BfFczHt X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Instead of unconditionally overriding the trigger type, it is better to only apply a default when no trigger type is set by firmware. This should be reasonably backward compatible, and should only potentially cause problems if systems exist where firmware specifies an incorrect trigger type. With a bit of luck, there are no such systems. Reviewed-by: Andy Shevchenko Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 6c5a8d65c8a4..05851274596e 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -1665,9 +1665,16 @@ static int mma8452_probe(struct i2c_client *client) goto trigger_cleanup; =20 if (client->irq) { + unsigned long irq_flags; + + irq_flags =3D irq_get_trigger_type(client->irq); + if (irq_flags =3D=3D IRQ_TYPE_NONE) { + dev_info(dev, "invalid irq type, setting default active low\n"); + irq_flags =3D IRQF_TRIGGER_LOW; + } + irq_flags |=3D IRQF_ONESHOT; ret =3D request_threaded_irq(client->irq, NULL, mma8452_interrupt, - IRQF_TRIGGER_LOW | IRQF_ONESHOT, - client->name, indio_dev); + irq_flags, client->name, indio_dev); if (ret) goto buffer_cleanup; } --=20 2.55.0 From nobody Fri Sep 25 23:10:47 2026 Received: from mail-43171.protonmail.ch (mail-43171.protonmail.ch [185.70.43.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74D734F7994 for ; Mon, 7 Sep 2026 14:51:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792690; cv=none; b=TXUsrU6epx+6eD3AO4w68gwMUm7OimwxT71GXktCZoJ9lwjHqsCLOg2VeizdyHYDrjyxjsHMvdNWIqrECO4gzvNr4xDxqTacvXfEnGx97E0cSLWssfkSXKjX1AfXTMhONo8Li633zo8WO8Gq+mg7mFQYZXpRdMuLTpNzoa72/A4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792690; c=relaxed/simple; bh=NN2LnoCdHfS4ylhxuHPETWJSkY6TTaBOKGZCXk9fjG8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QWQUvR4w7bMDFhaUt1c1EArwWzQC+WgKyQ+GqpFCYEpx1Zv0GzEsvTWWao9xSJRMe3A77m3qC3yNRWjs14BEs+4QskvWe7XMCyiEbEPxF55E4NMMKoEohPyonVQr3WdH4AMLuW1xgJUitwFZrWEtEc0Jt+BS7PbbygcHMMaOiro= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=GZyt4zc6; arc=none smtp.client-ip=185.70.43.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="GZyt4zc6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1788792682; x=1789051882; bh=I1LRz5bGR3NXE1FNM1AxIMg31OS/Wgjc9VK8Q0Q63o0=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=GZyt4zc6fDz082/QnLVzRMJvKJmj15mEiIKqI3UxsMptP/JCwdiZlMCPW7hW5PrYN d4Vx5lwjC4/g3zzIK6DBP1ZVEFkQuBrxA9IweZlgDd9e/c+dVeNdA66MBEh2O7C7c0 gfRVvLSDX2nK26cS/fWpnosvXXAglnv8ul7nxkeGo6918Z4/QYLBetP+9Z7GOVD7uZ 3dVraOQhLf6C3eYv1+KLRwGDVl7xqfBkxSP2bcCAFhUA+XHLRROqFdril7qQr6s2zP j8SBilbX9M6kKf+JgtgBNdrhJkQdcZ0mmEs+PSXjydqKCs4tWJfr3Mzv3dxPerokcs pCBocUaTlLKXQ== X-Pm-Submission-Id: 4hdqlD50NSz2Sd4k From: Esben Haabendal Date: Mon, 07 Sep 2026 16:51:00 +0200 Subject: [PATCH v8 5/9] iio: accel: mma8452: Fix unintended comment indent Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-mma8452-open-drain-v8-5-c17407e22118@geanix.com> References: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> In-Reply-To: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788792664; l=2111; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=NN2LnoCdHfS4ylhxuHPETWJSkY6TTaBOKGZCXk9fjG8=; b=IxzFVNTY2Ep9omKe9qlxJEkUA5bU5LaZsgjZ/FWDeyulL2s+J4Qvem/Uwsy4r6kyAAhZjmDZj zrJfkiDz0MxDez8FVaP1n85EyeHMdLlcQRD/CTZRea9d/6U3d11Zq9G X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= The extra space this block was indented with looks quite untraditional, and does not align with the common style used in the kernel. Signed-off-by: Esben Haabendal Reviewed-by: Joshua Crofts --- drivers/iio/accel/mma8452.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 05851274596e..c6af68d2a297 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -122,21 +122,21 @@ struct mma8452_data { u8 data_cfg; }; =20 - /** - * struct mma8452_event_regs - chip specific data related to events - * @ev_cfg: event config register address - * @ev_cfg_ele: latch bit in event config register - * @ev_cfg_chan_shift: number of the bit to enable events in X - * direction; in event config register - * @ev_src: event source register address - * @ev_ths: event threshold register address - * @ev_ths_mask: mask for the threshold value - * @ev_count: event count (period) register address - * - * Since not all chips supported by the driver support comparing high pass - * filtered data for events (interrupts), different interrupt sources are - * used for different chips and the relevant registers are included here. - */ +/** + * struct mma8452_event_regs - chip specific data related to events + * @ev_cfg: event config register address + * @ev_cfg_ele: latch bit in event config register + * @ev_cfg_chan_shift: number of the bit to enable events in X + * direction; in event config register + * @ev_src: event source register address + * @ev_ths: event threshold register address + * @ev_ths_mask: mask for the threshold value + * @ev_count: event count (period) register address + * + * Since not all chips supported by the driver support comparing high pass + * filtered data for events (interrupts), different interrupt sources are + * used for different chips and the relevant registers are included here. + */ struct mma8452_event_regs { u8 ev_cfg; u8 ev_cfg_ele; --=20 2.55.0 From nobody Fri Sep 25 23:10:47 2026 Received: from mail-106112.protonmail.ch (mail-106112.protonmail.ch [79.135.106.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A86B4FB9AE for ; Mon, 7 Sep 2026 14:51:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.112 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792702; cv=none; b=awXj2IWAVncCtKl3anKOmGFQdHoYblEBiybiyLVQrqQmfU8cBAL4T/LvP6p0n6pmTCBMwhLjO0wDGc6YsthtBu5CKiQ64OjaMOu7LXXdCSKr3ZODWr0moJkTkUF8I63N3ObGGXbNzXLMe5zZtAWLZROcXdV1+Vojh611VUm205M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792702; c=relaxed/simple; bh=n+2ur0mO1O06HHQSlDD4hKB9J0Qh+/SnMNMi2uaqzCw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mrd93KuOwKFb5kt1n2Zi6GXCCnyG2YyaYKagm8YOsDRRSgQdmgajuhRkJTJVhZdjlMrTLwCweEkCdlJHvoHFA2tiOyw7AeDTbIgcOFd0qStZbjCeEm009WDdcrQGGk6FeHhUKCzRpDDMeVPKGv6nsvP9RKjaakZtY48r8RN1JrA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=d4oh+6ZV; arc=none smtp.client-ip=79.135.106.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="d4oh+6ZV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1788792684; x=1789051884; bh=xTI6Jpz3mbGWtyBI7AXBaUs5FytAzB58eQV9Bg7VxBk=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=d4oh+6ZVss81wROtlYAxfJPmpn3/syVVQPQmhCtSdWt9YXN7xUeSn1vhOcUNlNtk0 L70IEU6NYNTZLuKsBQ9mXunFjQ6xNh6Vc8tG0IMefOmQo30T07qEGa2mpawo9ShG66 768yoc/kmG9XOrUiciEBL+/gOzMV9ug/3gWLNPEhByVO0rq9MAPlzoAZVU3vvFwEp0 +4jKxgDy1fc3MChagIKzodxRB8fAmyJEbuP4VjlzjfnihjIgAMGf9wtFGur9pLRflq 9M568e5xps4I03rlhuH28cNT+hIcMsUMA8hEV0y5yPRh2ZjJ2pEg5sbvPS6i2JBgLh hdmwgz3rwoSNw== X-Pm-Submission-Id: 4hdqlH3v4zz1DFG2 From: Esben Haabendal Date: Mon, 07 Sep 2026 16:51:01 +0200 Subject: [PATCH v8 6/9] iio: accel: mma8452: Add comment block for struct mma8452_data Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-mma8452-open-drain-v8-6-c17407e22118@geanix.com> References: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> In-Reply-To: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788792664; l=1346; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=n+2ur0mO1O06HHQSlDD4hKB9J0Qh+/SnMNMi2uaqzCw=; b=JfPSjJTWsQask37ej3+k8IXL+OR2IxAUyDUDUs/S3x4+Isypbu3hwBzlOoQb6EbKaOjst8N8V OzyP6he4qh+D2GriV3CMKZPqYmwQ2xnVeZGuWbUC3vxm/lC24V+4PHe X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= The struct mma8452_data is central for this driver, and it makes sense to have a description of the fields in it to make it easier to work with the driver. Signed-off-by: Esben Haabendal Reviewed-by: Joshua Crofts --- drivers/iio/accel/mma8452.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index c6af68d2a297..2c1b97b77bc1 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -104,6 +104,22 @@ =20 #define MMA8452_AUTO_SUSPEND_DELAY_MS 2000 =20 +/** + * struct mma8452_data - IIO device private data structure + * @client: the I2C client object + * @lock: mutex for synchronziation of register + * read-modify-write and holding chip in STANDBY + * mode while writing to registers + * @orientation: mounting matrix, flipped axis etc + * @chip_info: chip specific data + * @vdd_reg: reference to VDD regulator + * @vddio_reg: reference to VDDIO regulator + * @buffer: triggered buffer + * @sleep_val: time in ms to sleep while waiting for drdy + * @ctrl_reg1: CTRL_REG1 register shadow value + * @data_cfg: DATA_CFG register shadow value + * @open_drain: true for irq pin in open-drain mode + */ struct mma8452_data { struct i2c_client *client; struct mutex lock; --=20 2.55.0 From nobody Fri Sep 25 23:10:47 2026 Received: from mail-106111.protonmail.ch (mail-106111.protonmail.ch [79.135.106.111]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C5703BB113; Mon, 7 Sep 2026 14:51:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.111 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792703; cv=none; b=dxC2zMyuE45I2vbifHYCsS8O9hKkWGAFVUi1z81DOhE1WSGftN7QkbYQ4X/B/ALDhoOJo5A/1IbS5B2L0uXbrF26LO0VFLBfvnLu+ZFa7nbkrhulC1Trmz+FAkxkc/p/3aGabFAh4YTPsRa+hPQD4BJtd0VLROr8V9r6FWxkRXk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792703; c=relaxed/simple; bh=VU3Y10yCGpg+zmCnQaJJEMBjTuK+919XG+6NtyAbZeI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BlZBZZ7oypx7TlNks8eSXuPHyCpsmVX5eFzV2Ii14DXi9GYjJEF+5HUAG13R/KZkjDPsiI8vHiVLYvCL69ZLERVrChsEEPFq+MaAE4N4qjrbd7OXgX0vZEsytF71vQXWxljSM4eKIr8Y3ElloA93QAAKr/5gEeHa//R1Ypa2wCA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=SQbL6SqH; arc=none smtp.client-ip=79.135.106.111 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="SQbL6SqH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1788792687; x=1789051887; bh=maq+KPOCXrwfeg6YIPsRpiDqdaJtrTEPMyZmADR5n9c=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=SQbL6SqHnsEGXYUxPSv47LWDNxpTWsRWBS3yVtT2U1AHjoNL2O+1yzQpigHFlLYr3 dW7i+vW77hJUey+ryf7KZquoEGNcS9gmdmBvX+oHCsy2l9GZZt8l45qXSyWyUhbbPM bKyULaxggNDGFYveZi3HWjN3uQrvWMVl21wEBBqFckehFpcTCtRXEYaTtC1M3G+ftG BLLzPRgeAQjO6CeWJ2w9aeYnsetvSwnsdOM1Tj6xHKGwSKLRADwFPLpU+WerngeSlr jVTFvOv1jRzp4wJKoJoqAa416gXhaAQ8Mv8Yl7q4CzxY8Z5Gaupm2iDuQx8SDXYZee UJlcw6yTMN+og== X-Pm-Submission-Id: 4hdqlK5pqGz2SdlZ From: Esben Haabendal Date: Mon, 07 Sep 2026 16:51:02 +0200 Subject: [PATCH v8 7/9] iio: accel: mma8452: Allow open drain interrupt pin configuration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-mma8452-open-drain-v8-7-c17407e22118@geanix.com> References: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> In-Reply-To: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788792664; l=2386; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=VU3Y10yCGpg+zmCnQaJJEMBjTuK+919XG+6NtyAbZeI=; b=qv6D1H2+8t+2Y+HtkWC9jUTUIASbgY9eqHTNvs80GASGBFEeIz2dtK3pVpb90UPNkxqahs+bD EoJjiemI+MzAJsy8dhED3zrXlk1CeTh+capASTiT+ukJqcF054+AoSI X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= When designing systems sharing the interrupt for mma8452 chips, it is helpful to be able to configure the irq pin in open-drain mode (default is push-pull). Reviewed-by: Andy Shevchenko Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 2c1b97b77bc1..b5ab85a86e72 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -83,6 +83,8 @@ #define MMA8452_CTRL_REG2_RST BIT(6) #define MMA8452_CTRL_REG2_MODS_SHIFT 3 #define MMA8452_CTRL_REG2_MODS_MASK 0x1b +#define MMA8452_CTRL_REG3 0x2c +#define MMA8452_CTRL_REG3_PP_OD BIT(0) #define MMA8452_CTRL_REG4 0x2d #define MMA8452_CTRL_REG5 0x2e #define MMA8452_OFF_X 0x2f @@ -136,6 +138,7 @@ struct mma8452_data { int sleep_val; u8 ctrl_reg1; u8 data_cfg; + bool open_drain; }; =20 /** @@ -659,6 +662,22 @@ static int mma8452_set_power_mode(struct mma8452_data = *data, u8 mode) return mma8452_change_config(data, MMA8452_CTRL_REG2, reg); } =20 +static int mma8452_set_interrupt_pin_mode(struct mma8452_data *data) +{ + int reg; + + reg =3D i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG3); + if (reg < 0) + return reg; + + if (data->open_drain) + reg |=3D MMA8452_CTRL_REG3_PP_OD; + else + reg &=3D ~MMA8452_CTRL_REG3_PP_OD; + + return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG3, reg); +} + /* returns >0 if in freefall mode, 0 if not or <0 if an error occurred */ static int mma8452_freefall_mode_enabled(struct mma8452_data *data) { @@ -1665,6 +1684,11 @@ static int mma8452_probe(struct i2c_client *client) goto disable_regulators; } =20 + data->open_drain =3D device_property_read_bool(dev, "drive-open-drain"); + ret =3D mma8452_set_interrupt_pin_mode(data); + if (ret) + goto trigger_cleanup; + data->ctrl_reg1 =3D MMA8452_CTRL_ACTIVE | (MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT); =20 @@ -1792,6 +1816,10 @@ static int mma8452_runtime_resume(struct device *dev) return ret; } =20 + ret =3D mma8452_set_interrupt_pin_mode(data); + if (ret) + goto runtime_resume_failed; + ret =3D mma8452_active(data); if (ret < 0) goto runtime_resume_failed; --=20 2.55.0 From nobody Fri Sep 25 23:10:47 2026 Received: from mail-244108.protonmail.ch (mail-244108.protonmail.ch [109.224.244.108]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4395C4FDE78; Mon, 7 Sep 2026 14:51:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.108 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792714; cv=none; b=B+ea+2ojFT8jGbMEDJ8SY0K8kQSd1NelTKI7WTEJUlnmXKyqqH34UOhfJ3rhnKsiqarrEAshBoY2F4bamPSw+44nvtRspPXqOlPCuDM5Kt74CFb8Vqy6kY7dbE/4rm4eHDMeweRiKgsz1CvMRaOBNjaX89m4hG11Xgryizfw3q0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792714; c=relaxed/simple; bh=YMUh/CZnOrJNlDcvQGl6NX9gWyC0FcabPLF83G7xim4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Qcp4pgwsI0eABiryHtpTQmtM/2J30A3WDGFRsLjGxx/9iERorl5QeId7lXrFJayY118N2Lvv71bC1L5CjSKPNQIg74SfWzyeBdmjzxOWW/cJWO86wMLUy/Eth4E3WFBDlZIJgQvyvOO1+fjQgJi40/phiSyhYEFqzNeb7Gv93XY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=WG9lzDY1; arc=none smtp.client-ip=109.224.244.108 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="WG9lzDY1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1788792690; x=1789051890; bh=hZ8NkLxsb0aqcM9RjB1a62QpnBhkF5zI8oO1WOkPQXc=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=WG9lzDY1FwO/AvGgCIyx5I7r42vsIfkC3tdk2UEh5oV9ZlR4VyymYOCRlWTX8SlhQ RrEqNirHbYVVLnL5WVR8pI9XtQJbBIFCtXO5d/rDxJM/ZnuBRSWM4ZGa//9WA7eF+b FLb7WqepUENYxfuaugAIcEIxQ3OvY5JXSyAg8rpoLsBpbtkbpKzo9yFYqZkQWXjium NxbMxyRFTffVxqt4vfSc0frsH6SngTQtVp5TlCTNnhB73/WUXj8p8kKE5P/nGgPzPJ ssVKh2o+i1B0zGa+FxhIr8ZRVyeT91jYp3HmQ25EweRg5qlgFUGaw54a/f0F0j9Ag3 4EUHCMZU6+f7Q== X-Pm-Submission-Id: 4hdqlN23S0z1DDnS From: Esben Haabendal Date: Mon, 07 Sep 2026 16:51:03 +0200 Subject: [PATCH v8 8/9] iio: accel: mma8452: Use proper error code when missing device model Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-mma8452-open-drain-v8-8-c17407e22118@geanix.com> References: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> In-Reply-To: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Joshua Crofts , Andy Shevchenko X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788792664; l=915; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=YMUh/CZnOrJNlDcvQGl6NX9gWyC0FcabPLF83G7xim4=; b=ACW3w2nL0o3Gi0RJ9J1uUFWnGe3rNRlzCSDDtO27Szdeo+B46oTTIDOrLRgnopkHhpVmyPKKY TUXS2EfllgMDdKuxOvgf3GgkzqpS7awUMzbifiRrDiV85dArC9C4lYc X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Switch -ENODEV error on i2c_get_match_data() failure to -ENODATA to satisfy the IIO coding style. Reviewed-by: Joshua Crofts Reviewed-by: Andy Shevchenko Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index b5ab85a86e72..fda29df5d109 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -1591,7 +1591,7 @@ static int mma8452_probe(struct i2c_client *client) =20 data->chip_info =3D i2c_get_match_data(client); if (!data->chip_info) - return dev_err_probe(dev, -ENODEV, "unknown device model\n"); + return dev_err_probe(dev, -ENODATA, "unknown device model\n"); =20 ret =3D iio_read_mount_matrix(dev, &data->orientation); if (ret) --=20 2.55.0 From nobody Fri Sep 25 23:10:47 2026 Received: from mail-43171.protonmail.ch (mail-43171.protonmail.ch [185.70.43.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3EC3D4F649E for ; Mon, 7 Sep 2026 14:51:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792710; cv=none; b=t8nM3/JyITiYSpM/XET6lsNT3SHQcPl5nhjmSPyeS6cjmF89+qEufEm80RrINJFuSuRZk3Vpm4ivXZ288byo/UROvBC4Acc9CmIJD8UjeKN5H+drOexdnIm7IqsJlJ7EGJXdydWqofRo1QZNIyNmP95fNy166ndui55MqG6I5IA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788792710; c=relaxed/simple; bh=QS9aYfbmfIv6QXPJQGDYfxAk4etGaeLWslH0rEhE8Pk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dof2epOHQSwseHhVQrhEBLBOEUlZu6e5ieBDhFBntlYtMZ/oyiJbG0wVsCyC2i+4+5FB09zgomHxJXMxGsAQsZV8RsujmCUzsfZQGk80S6IwkwRTWWGUfJ3BesNx2MLRovUX7VLPupPllZc6+Hous3p9DgT11jVIXTMYvNeAc0Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=MNQUfaEs; arc=none smtp.client-ip=185.70.43.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="MNQUfaEs" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1788792693; x=1789051893; bh=4liMP45ZTYTUyBGTr1IveZVJzSjGQLRIEvbf+8sOCdo=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=MNQUfaEsBGQD716gLTug8FpXzU8fop1oCeTHjCOugKJbbQHBw5Ge+AvNp+PeEYsMY CTniuCVUPgb+kHI76DvH/Wsf4f0KIQZaQUMzMz0RGrgoI13FXLV6kGx1T+6kp18G+f Fql4uC9lIW1PKXe8jxFg6huagSGb8xlJNarhZa4n5Yqm4bqZ4eKg0U4E3XrOm1Slga 7Da6fs9EGHDaBVg2jmyNDRAxDszFdWdtRdGn4vAnVwBmrJ4A+mjkQ/eC+oywdDK7NS OK8D7w/8YUg2bBzaJAD5TRO1MsTmV21SHx2UTeYEkW3kqPT5HL5uKR21JMTicP+gMY dVwvGux7hM/2g== X-Pm-Submission-Id: 4hdqlR3B9Tz2Sdlq From: Esben Haabendal Date: Mon, 07 Sep 2026 16:51:04 +0200 Subject: [PATCH v8 9/9] iio: accel: mma8452: Support interrupt sharing Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260907-mma8452-open-drain-v8-9-c17407e22118@geanix.com> References: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> In-Reply-To: <20260907-mma8452-open-drain-v8-0-c17407e22118@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788792664; l=5437; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=QS9aYfbmfIv6QXPJQGDYfxAk4etGaeLWslH0rEhE8Pk=; b=uQ0czhzM4AeHc+l3mB3bOkbv4koIjr56DXos2VurVm7izggA0d13w66I/899DfWDupmTAJ19B 1/1ra6dQbQoD0RidNoCux2tFd7e9tVmC205Ren8595E2rsXthZ3Agxm X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Adding support for sharing interrupt line with other device requires the interrupt handler to handle runtime PM suspension properly, ignoring the irq if the device is suspended (maybe even off). And while at it, we use the PM reference to ensure we do not get suspended while processing an irq. In order to prevent the chip from raising irq while suspended (that is when using fixed regulator, where suspend just means setting the device in STANDBY mode), we disable all interrupt sources by clearing CTRL_REG4, and then restores the value again when resuming. With that in place, it is safe to add the IRQF_SHARED flag. Keep in mind that the device by default is using push-pull for the irq pin, which might require additional hardware design to allow interrupt sharing. Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 67 +++++++++++++++++++++++++++++++++++++++--= ---- 1 file changed, 58 insertions(+), 9 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index fda29df5d109..e521dca37f76 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -120,6 +120,7 @@ * @sleep_val: time in ms to sleep while waiting for drdy * @ctrl_reg1: CTRL_REG1 register shadow value * @data_cfg: DATA_CFG register shadow value + * @ctrl_reg4: CTRL_REG4 register value to restore on resume * @open_drain: true for irq pin in open-drain mode */ struct mma8452_data { @@ -138,6 +139,7 @@ struct mma8452_data { int sleep_val; u8 ctrl_reg1; u8 data_cfg; + u8 ctrl_reg4; bool open_drain; }; =20 @@ -1083,15 +1085,21 @@ static irqreturn_t mma8452_interrupt(int irq, void = *p) { struct iio_dev *indio_dev =3D p; struct mma8452_data *data =3D iio_priv(indio_dev); + struct device *dev =3D &data->client->dev; irqreturn_t ret =3D IRQ_NONE; + int pm_status; int src; =20 + pm_status =3D pm_runtime_get_if_active(dev); + if (pm_status =3D=3D 0) + return IRQ_NONE; /* device is powered down */ + src =3D i2c_smbus_read_byte_data(data->client, MMA8452_INT_SRC); if (src < 0) - return IRQ_NONE; + goto out_runtime_put; =20 if (!(src & (data->chip_info->enabled_events | MMA8452_INT_DRDY))) - return IRQ_NONE; + goto out_runtime_put; =20 if (src & MMA8452_INT_DRDY) { iio_trigger_poll_nested(indio_dev->trig); @@ -1117,6 +1125,10 @@ static irqreturn_t mma8452_interrupt(int irq, void *= p) ret =3D IRQ_HANDLED; } =20 +out_runtime_put: + if (pm_status > 0) + pm_runtime_put_autosuspend(dev); + return ret; } =20 @@ -1712,7 +1724,7 @@ static int mma8452_probe(struct i2c_client *client) dev_info(dev, "invalid irq type, setting default active low\n"); irq_flags =3D IRQF_TRIGGER_LOW; } - irq_flags |=3D IRQF_ONESHOT; + irq_flags |=3D IRQF_ONESHOT | IRQF_SHARED; ret =3D request_threaded_irq(client->irq, NULL, mma8452_interrupt, irq_flags, client->name, indio_dev); if (ret) @@ -1784,29 +1796,62 @@ static void mma8452_remove(struct i2c_client *clien= t) #ifdef CONFIG_PM static int mma8452_runtime_suspend(struct device *dev) { - struct iio_dev *indio_dev =3D i2c_get_clientdata(to_i2c_client(dev)); + struct i2c_client *client =3D to_i2c_client(dev); + struct iio_dev *indio_dev =3D i2c_get_clientdata(client); struct mma8452_data *data =3D iio_priv(indio_dev); int ret; =20 - scoped_guard(mutex, &data->lock) - ret =3D mma8452_standby(data); + guard(mutex)(&data->lock); + + ret =3D i2c_smbus_read_byte_data(client, MMA8452_CTRL_REG4); if (ret < 0) { - dev_err(dev, "powering off device failed\n"); + dev_warn(dev, "backing up CTRL_REG4 failed\n"); return -EAGAIN; + } else + data->ctrl_reg4 =3D ret; + + ret =3D i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG4, 0); + if (ret) { + dev_warn(dev, "disabling interrupt sources (CTRL_REG4) failed\n"); + return -EAGAIN; + } + + ret =3D mma8452_standby(data); + if (ret < 0) { + dev_err(dev, "transition to STANDBY mode failed\n"); + ret =3D -EAGAIN; + goto out_restore_ctrl_reg4; } =20 + /* + * Interrupt line should be deasserted now, so we just need ensure any + * mid-flight irq is completed (will return IRQ_NONE due to + * pm_status=3D=3D0). + */ + if (client->irq) + synchronize_irq(client->irq); + ret =3D regulator_bulk_disable(ARRAY_SIZE(data->regs), data->regs); if (ret) { dev_err(dev, "failed to disable regulators\n"); - return ret; + goto out_active; } =20 return 0; + +out_active: + if (mma8452_active(data)) + dev_warn(dev, "failed to switch back to ACTIVE mode\n"); +out_restore_ctrl_reg4: + if (i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG4, data->ctrl_reg4)) + dev_warn(dev, "restoring CTRL_REG4 failed\n"); + return ret; } =20 static int mma8452_runtime_resume(struct device *dev) { - struct iio_dev *indio_dev =3D i2c_get_clientdata(to_i2c_client(dev)); + struct i2c_client *client =3D to_i2c_client(dev); + struct iio_dev *indio_dev =3D i2c_get_clientdata(client); struct mma8452_data *data =3D iio_priv(indio_dev); int ret, sleep_val; =20 @@ -1820,6 +1865,10 @@ static int mma8452_runtime_resume(struct device *dev) if (ret) goto runtime_resume_failed; =20 + ret =3D i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG4, data->ctrl_r= eg4); + if (ret) + goto runtime_resume_failed; + ret =3D mma8452_active(data); if (ret < 0) goto runtime_resume_failed; --=20 2.55.0