From nobody Sat Sep 26 03:11:18 2026 Received: from dggsgout12.his.huawei.com (dggsgout12.his.huawei.com [45.249.212.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1A8D3009CB; Sat, 5 Sep 2026 08:53:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788598436; cv=none; b=OzlnPcN4hrWGvROVO76eqwe/hdyMdzXgdoUOHq/7ERR6G/Iq1pSzMiFA3a2BJRaCwWfJp8r5tZDqCxmDP6swh2c0MlFghPARTahkC2e4ptqZ4/dy9Dv5gDm7/xlu/zp+FQYYaD0sxrqNp4T1MMFLwMYp0xcqFunuvAeWm+WgOSA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788598436; c=relaxed/simple; bh=LtmEqjUp5mWwzlQzvf9HOuaWEFUP6DTut8OWTcjlQ7A=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MGI7qVIQdaMK1v77f3zBLerOB+xWU6X7tTOPFDNk1wkG6W4XvouYPQNiduabGkro4lpiGxdYOkJQnCRSNk+2tsV24lI3fqJAsuQ3O8Tkpgu/jIM62Jzluzp1IS3TenD+Qu29oOMcjKR51fYXZy2O/ZjrMompPIE+3M9irXdtZJI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=huaweicloud.com; spf=pass smtp.mailfrom=huaweicloud.com; arc=none smtp.client-ip=45.249.212.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=huaweicloud.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huaweicloud.com Received: from mail.maildlp.com (unknown [172.19.163.170]) by dggsgout12.his.huawei.com (SkyGuard) with ESMTPS id 4hcRtY2N6gzKHMLW; Sat, 5 Sep 2026 16:52:53 +0800 (CST) Received: from mail02.huawei.com (unknown [10.116.40.112]) by mail.maildlp.com (Postfix) with ESMTP id 027FA4056D; Sat, 5 Sep 2026 16:53:50 +0800 (CST) Received: from ultra.huawei.com (unknown [10.90.53.71]) by APP1 (Coremail) with UTF8SMTPA id cCh0CgBnTwqc2JtqP8lOAw--.13006S3; Sat, 05 Sep 2026 16:53:49 +0800 (CST) From: Pu Lehui To: bpf@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Feng Jiang Cc: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Eduard Zingerman , Kumar Kartikeya Dwivedi , Martin KaFai Lau , Song Liu , Yonghong Song , Jiri Olsa , Emil Tsalapatis , Ihor Solodrai , Puranjay Mohan , Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Pu Lehui Subject: [PATCH bpf-next v5 1/3] riscv, bpf: Remap BPF_REG_0 and RV_REG_TCC Date: Sat, 5 Sep 2026 08:58:55 +0000 Message-Id: <20260905085857.14143-2-pulehui@huaweicloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260905085857.14143-1-pulehui@huaweicloud.com> References: <20260905085857.14143-1-pulehui@huaweicloud.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: cCh0CgBnTwqc2JtqP8lOAw--.13006S3 X-Coremail-Antispam: 1UD129KBjvJXoW3JF1ftr48Zr4rXry3KF47XFb_yoW7WFyfp3 4UW3srJa4kta13W347GF1UXw4fJrnYq39rCr1xKayayF1DtryrXa1kKr45try5JrsYkw4r AF1v9wsY9a1UJrJanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUPFb4IE77IF4wAFF20E14v26rWj6s0DM7CY07I20VC2zVCF04k2 6cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28IrcIa0xkI8VA2jI8067AKxVWUGw A2048vs2IY020Ec7CjxVAFwI0_Xr0E3s1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxS w2x7M28EF7xvwVC0I7IYx2IY67AKxVWUCVW8JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxV W8JVWxJwA2z4x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx 0E2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWU JVW8JwACjcxG0xvY0x0EwIxGrwACI402YVCY1x02628vn2kIc2xKxwCY1x0262kKe7AKxV W8ZVWrXwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E 14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_GFv_WrylIx kGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAF wI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F 4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr1j6F4UJbIYCTnIWIevJa73UjIFyTuYvjxUIw0e DUUUU X-CM-SenderInfo: psxovxtxl6x35dzhxuhorxvhhfrp/ Content-Type: text/plain; charset="utf-8" From: Pu Lehui To prepare for supporting bpf stack arguments and unifying the calling convention between bpf2bpf calls and kfunc calls, remap BPF_REG_0 to t6 and RV_REG_TCC to t5. In the riscv abi, a0-a7 are designated for function argument passing. Freeing a5 and a6 allows bpf2bpf calls to pass extra arguments (6th to 8th) via a5-a7 consistently with kfuncs. Signed-off-by: Pu Lehui Acked-by: Bj=C3=B6rn T=C3=B6pel --- arch/riscv/net/bpf_jit_comp64.c | 10 +++++----- arch/riscv/net/bpf_timed_may_goto.S | 8 ++++---- .../testing/selftests/bpf/progs/verifier_jit_inline.c | 2 +- tools/testing/selftests/bpf/progs/verifier_ldsx.c | 6 +++--- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp6= 4.c index e7378be171a9..fc1c8c5480b6 100644 --- a/arch/riscv/net/bpf_jit_comp64.c +++ b/arch/riscv/net/bpf_jit_comp64.c @@ -23,11 +23,11 @@ /* fentry and TCC init insns will be skipped on tailcall */ #define RV_TAILCALL_OFFSET ((RV_FENTRY_NINSNS + 1) * 4) =20 -#define RV_REG_TCC RV_REG_A6 +#define RV_REG_TCC RV_REG_T5 #define RV_REG_ARENA RV_REG_S7 /* For storing arena_vm_start */ =20 static const int regmap[] =3D { - [BPF_REG_0] =3D RV_REG_A5, + [BPF_REG_0] =3D RV_REG_T6, [BPF_REG_1] =3D RV_REG_A0, [BPF_REG_2] =3D RV_REG_A1, [BPF_REG_3] =3D RV_REG_A2, @@ -47,13 +47,13 @@ static const int pt_regmap[] =3D { [RV_REG_A2] =3D offsetof(struct pt_regs, a2), [RV_REG_A3] =3D offsetof(struct pt_regs, a3), [RV_REG_A4] =3D offsetof(struct pt_regs, a4), - [RV_REG_A5] =3D offsetof(struct pt_regs, a5), [RV_REG_S1] =3D offsetof(struct pt_regs, s1), [RV_REG_S2] =3D offsetof(struct pt_regs, s2), [RV_REG_S3] =3D offsetof(struct pt_regs, s3), [RV_REG_S4] =3D offsetof(struct pt_regs, s4), [RV_REG_S5] =3D offsetof(struct pt_regs, s5), [RV_REG_T0] =3D offsetof(struct pt_regs, t0), + [RV_REG_T6] =3D offsetof(struct pt_regs, t6), }; =20 enum { @@ -239,7 +239,7 @@ static void __build_epilogue(bool is_tail_call, struct = rv_jit_context *ctx) emit_addi(RV_REG_SP, RV_REG_SP, stack_adjust, ctx); /* Set return value. */ if (!is_tail_call) - emit_addiw(RV_REG_A0, RV_REG_A5, 0, ctx); + emit_addiw(RV_REG_A0, regmap[BPF_REG_0], 0, ctx); emit_jalr(RV_REG_ZERO, is_tail_call ? RV_REG_T3 : RV_REG_RA, is_tail_call ? RV_TAILCALL_OFFSET : 0, ctx); } @@ -1075,7 +1075,7 @@ static int __arch_prepare_bpf_trampoline(struct bpf_t= ramp_image *im, =20 save_ret =3D flags & (BPF_TRAMP_F_CALL_ORIG | BPF_TRAMP_F_RET_FENTRY_RET); if (save_ret) - stack_size +=3D 16; /* Save both A5 (BPF R0) and A0 */ + stack_size +=3D 16; /* Save both RV_REG_T6 (BPF R0) and RV_REG_A0 */ retval_off =3D stack_size; =20 stack_size +=3D nr_arg_slots * 8; diff --git a/arch/riscv/net/bpf_timed_may_goto.S b/arch/riscv/net/bpf_timed= _may_goto.S index 02c637d87420..fcf850f244c9 100644 --- a/arch/riscv/net/bpf_timed_may_goto.S +++ b/arch/riscv/net/bpf_timed_may_goto.S @@ -10,7 +10,7 @@ * - output: updated count in BPF_REG_AX (t0) * * Calls bpf_check_timed_may_goto(ptr) with the standard RISC-V ABI, where - * ptr =3D BPF_REG_FP (s5) + BPF_REG_AX (t0). BPF R0-R5 (a5, a0-a4) are sa= ved + * ptr =3D BPF_REG_FP (s5) + BPF_REG_AX (t0). BPF R0-R5 (t6, a0-a4) are sa= ved * across the call; BPF_REG_FP (s5) is callee-saved and needs no saving. */ =20 @@ -20,8 +20,8 @@ SYM_FUNC_START(arch_bpf_timed_may_goto) REG_S s0, 6*SZREG(sp) addi s0, sp, 8*SZREG =20 - /* Save BPF registers R0-R5 (a5, a0-a4) */ - REG_S a5, 5*SZREG(sp) + /* Save BPF registers R0-R5 (t6, a0-a4) */ + REG_S t6, 5*SZREG(sp) REG_S a0, 4*SZREG(sp) REG_S a1, 3*SZREG(sp) REG_S a2, 2*SZREG(sp) @@ -38,7 +38,7 @@ SYM_FUNC_START(arch_bpf_timed_may_goto) REG_L a2, 2*SZREG(sp) REG_L a1, 3*SZREG(sp) REG_L a0, 4*SZREG(sp) - REG_L a5, 5*SZREG(sp) + REG_L t6, 5*SZREG(sp) =20 REG_L s0, 6*SZREG(sp) REG_L ra, 7*SZREG(sp) diff --git a/tools/testing/selftests/bpf/progs/verifier_jit_inline.c b/tool= s/testing/selftests/bpf/progs/verifier_jit_inline.c index 02e562f56f9d..5b92da2ab75c 100644 --- a/tools/testing/selftests/bpf/progs/verifier_jit_inline.c +++ b/tools/testing/selftests/bpf/progs/verifier_jit_inline.c @@ -11,7 +11,7 @@ __jited(" addq %gs:{{.*}}, %rax") __arch_arm64 __jited(" mrs x8, SP_EL0") __arch_riscv64 -__jited(" mv a5, tp") +__jited(" mv t6, tp") __arch_loongarch __jited(" move $a5, $tp") int inline_bpf_get_current_task(void) diff --git a/tools/testing/selftests/bpf/progs/verifier_ldsx.c b/tools/test= ing/selftests/bpf/progs/verifier_ldsx.c index 7e25e1b8cd0b..49e8cd4bb4f9 100644 --- a/tools/testing/selftests/bpf/progs/verifier_ldsx.c +++ b/tools/testing/selftests/bpf/progs/verifier_ldsx.c @@ -289,11 +289,11 @@ __jited("ldrsh x22, [x11, #0x18]") __jited("add x11, x0, x28") __jited("ldrsb x22, [x11, #0x20]") __arch_riscv64 -__jited("add t2, a5, s7") +__jited("add t2, t6, s7") __jited("lw s3, 0x10(t2)") -__jited("add t2, a5, s7") +__jited("add t2, t6, s7") __jited("lh s3, 0x18(t2)") -__jited("add t2, a5, s7") +__jited("add t2, t6, s7") __jited("lb s3, 0x20(t2)") __jited("add t2, a0, s7") __jited("lw s4, 0x10(t2)") --=20 2.34.1 From nobody Sat Sep 26 03:11:18 2026 Received: from dggsgout11.his.huawei.com (dggsgout11.his.huawei.com [45.249.212.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2311311C32; Sat, 5 Sep 2026 08:53:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788598436; cv=none; b=ArvnYqPHzhx2nmCTQrXWkQdLm4LtM2hAvnraX+IU92mTQOMsWwOA3uKU0601xusdpYYNHzQbrpZtXvSRzuEcOzqG4xuxysLsuaasTBjxSnE5GaS5+Ulvsaw26xoTc/6MYH8GJW/43j6rFi83/BlmzNgN4nglgiDNparkHIiccKM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788598436; c=relaxed/simple; bh=X5puYXhBV5Q/+iT7DxMv9s/n72YYx/2s6Mx0VWlMF9Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=AE5ouT63F/XAvhIDPn36WYum12h66Yq341xtSMrV7eRbZghfa1C2XCGMHqxew0bFnLGCP+yX57IQE2lrNS3ZGkr01fiFa2n/wUQUFDZrf+9MGUXvQhxWhAY9BePHnwTvCor/l2nlIt2nikpK43XA+cFvKwsTsrxmPsvYIqT0Ks8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=huaweicloud.com; spf=pass smtp.mailfrom=huaweicloud.com; arc=none smtp.client-ip=45.249.212.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=huaweicloud.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huaweicloud.com Received: from mail.maildlp.com (unknown [172.19.163.198]) by dggsgout11.his.huawei.com (SkyGuard) with ESMTPS id 4hcRtm0G4GzYQv1J; Sat, 5 Sep 2026 16:53:04 +0800 (CST) Received: from mail02.huawei.com (unknown [10.116.40.112]) by mail.maildlp.com (Postfix) with ESMTP id 150E340577; Sat, 5 Sep 2026 16:53:50 +0800 (CST) Received: from ultra.huawei.com (unknown [10.90.53.71]) by APP1 (Coremail) with UTF8SMTPA id cCh0CgBnTwqc2JtqP8lOAw--.13006S4; Sat, 05 Sep 2026 16:53:49 +0800 (CST) From: Pu Lehui To: bpf@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Feng Jiang Cc: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Eduard Zingerman , Kumar Kartikeya Dwivedi , Martin KaFai Lau , Song Liu , Yonghong Song , Jiri Olsa , Emil Tsalapatis , Ihor Solodrai , Puranjay Mohan , Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Pu Lehui Subject: [PATCH bpf-next v5 2/3] riscv, bpf: Add BPF stack arguments support for RV64 JIT Date: Sat, 5 Sep 2026 08:58:56 +0000 Message-Id: <20260905085857.14143-3-pulehui@huaweicloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260905085857.14143-1-pulehui@huaweicloud.com> References: <20260905085857.14143-1-pulehui@huaweicloud.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: cCh0CgBnTwqc2JtqP8lOAw--.13006S4 X-Coremail-Antispam: 1UD129KBjvJXoWxtw18KF13Xw4xtFy7JF4Dtwb_yoW3XFW8p3 WDGr1SkrWvqw40qFyDtFnrXr13CrsYv3W7KrZ7GayrJa12qrWkG3WYka1ayFy5CryrWw1x AFWq9rW3C395t37anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUPIb4IE77IF4wAFF20E14v26rWj6s0DM7CY07I20VC2zVCF04k2 6cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28IrcIa0xkI8VA2jI8067AKxVWUXw A2048vs2IY020Ec7CjxVAFwI0_Xr0E3s1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxS w2x7M28EF7xvwVC0I7IYx2IY67AKxVWUCVW8JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxV WxJVW8Jr1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v2 6rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMc Ij6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_ Jr0_Gr1lF7xvr2IYc2Ij64vIr41lFIxGxcIEc7CjxVA2Y2ka0xkIwI1lc7CjxVAaw2AFwI 0_GFv_Wryl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG 67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r4a6rW5MI IYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E 14v26F4j6r4UJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Gr 0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8Jr0_Cr1UYxBIdaVFxhVjvjDU0xZFpf9x07jI sjbUUUUU= X-CM-SenderInfo: psxovxtxl6x35dzhxuhorxvhhfrp/ Content-Type: text/plain; charset="utf-8" From: Feng Jiang Implement bpf_jit_supports_stack_args() on RV64 JIT to allow bpf subprogs and kfuncs to pass and receive more than 5 arguments. In the riscv abi, the first 8 arguments are passed in registers a0 to a7, and arguments 9+ reside on the stack. To align bpf stack arguments with this calling convention and unify bpf2bpf calls with kfuncs, map the first 3 bpf stack arguments (6th to 8th) directly to a5 to a7, and store or load the remaining arguments (9th+) at SP or FP. Reserve outgoing stack space in the prologue accordingly when stack_arg_cnt exceeds 3. In addition, update kfunc argument sign extension to handle all 8 register arguments as well as any arguments passed on the stack. Co-developed-by: Pu Lehui Signed-off-by: Feng Jiang Signed-off-by: Pu Lehui Acked-by: Bj=C3=B6rn T=C3=B6pel --- arch/riscv/net/bpf_jit.h | 4 ++ arch/riscv/net/bpf_jit_comp64.c | 80 ++++++++++++++++++++++++++++----- arch/riscv/net/bpf_jit_core.c | 7 +++ 3 files changed, 81 insertions(+), 10 deletions(-) diff --git a/arch/riscv/net/bpf_jit.h b/arch/riscv/net/bpf_jit.h index 419b9d795f2a..5c4f53060c91 100644 --- a/arch/riscv/net/bpf_jit.h +++ b/arch/riscv/net/bpf_jit.h @@ -12,6 +12,9 @@ #include #include =20 +#define RV_MAX_REG_ARGS 8 +#define RV_EXTRA_STK_ARGS (RV_MAX_REG_ARGS - MAX_BPF_FUNC_REG_ARGS) + /* verify runtime detection extension status */ #define rv_ext_enabled(ext) \ (IS_ENABLED(CONFIG_RISCV_ISA_##ext) && riscv_has_extension_likely(RISCV_I= SA_EXT_##ext)) @@ -82,6 +85,7 @@ struct rv_jit_context { unsigned long flags; int stack_size; int tcc_offset; + int stack_arg_sz; u64 arena_vm_start; u64 user_vm_start; }; diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp6= 4.c index fc1c8c5480b6..7f84447a31ff 100644 --- a/arch/riscv/net/bpf_jit_comp64.c +++ b/arch/riscv/net/bpf_jit_comp64.c @@ -15,7 +15,6 @@ #include #include "bpf_jit.h" =20 -#define RV_MAX_REG_ARGS 8 #define RV_FENTRY_NINSNS 2 #define RV_FENTRY_NBYTES (RV_FENTRY_NINSNS * 4) /* imm that allows emit_imm to emit max count insns */ @@ -498,6 +497,18 @@ static void emit_ldx(u8 rd, s16 off, u8 rs, u8 size, b= ool sign_ext, ctx->ex_jmp_off =3D ctx->ninsns; } =20 +static void emit_stack_arg_ldx(u8 rd, s16 off, struct rv_jit_context *ctx) +{ + int idx =3D off / 8 - 1; + + if (idx < RV_EXTRA_STK_ARGS) { + emit_mv(rd, RV_REG_A5 + idx, ctx); + return; + } + + emit_ldx_insn(rd, (idx - RV_EXTRA_STK_ARGS) * 8, RV_REG_FP, BPF_DW, false= , ctx); +} + static void emit_st(u8 rd, s16 off, s32 imm, u8 size, struct rv_jit_contex= t *ctx) { emit_imm(RV_REG_T1, imm, ctx); @@ -515,6 +526,19 @@ static void emit_st(u8 rd, s16 off, s32 imm, u8 size, = struct rv_jit_context *ctx ctx->ex_jmp_off =3D ctx->ninsns; } =20 +static void emit_stack_arg_st(s16 off, s32 imm, struct rv_jit_context *ctx) +{ + int idx =3D -off / 8 - 1; + + if (idx < RV_EXTRA_STK_ARGS) { + emit_imm(RV_REG_A5 + idx, imm, ctx); + return; + } + + emit_imm(RV_REG_T1, imm, ctx); + emit_stx_insn(RV_REG_SP, (idx - RV_EXTRA_STK_ARGS) * 8, RV_REG_T1, BPF_DW= , ctx); +} + static void emit_stx(u8 rd, s16 off, u8 rs, u8 size, struct rv_jit_context= *ctx) { if (is_12b_int(off)) { @@ -531,6 +555,18 @@ static void emit_stx(u8 rd, s16 off, u8 rs, u8 size, s= truct rv_jit_context *ctx) ctx->ex_jmp_off =3D ctx->ninsns; } =20 +static void emit_stack_arg_stx(s16 off, u8 rs, struct rv_jit_context *ctx) +{ + int idx =3D -off / 8 - 1; + + if (idx < RV_EXTRA_STK_ARGS) { + emit_mv(RV_REG_A5 + idx, rs, ctx); + return; + } + + emit_stx_insn(RV_REG_SP, (idx - RV_EXTRA_STK_ARGS) * 8, rs, BPF_DW, ctx); +} + static int emit_atomic_ld_st(u8 rd, u8 rs, const struct bpf_insn *insn, struct rv_jit_context *ctx) { @@ -1824,11 +1860,21 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, = struct rv_jit_context *ctx, return -EINVAL; =20 for (idx =3D 0; idx < fm->nr_args; idx++) { - u8 reg =3D bpf_to_rv_reg(BPF_REG_1 + idx, ctx); bool sign =3D fm->arg_flags[idx] & BTF_FMODEL_SIGNED_ARG; - - if (sign_extend(reg, reg, fm->arg_size[idx], sign, ctx)) - return -EINVAL; + u8 arg_sz =3D fm->arg_size[idx]; + + if (arg_sz =3D=3D 8 || (arg_sz !=3D 4 && !sign)) + continue; + + if (idx < RV_MAX_REG_ARGS) { + if (sign_extend(RV_REG_A0 + idx, RV_REG_A0 + idx, arg_sz, sign, ctx)) + return -EINVAL; + } else { + emit_ld(RV_REG_T1, (idx - RV_MAX_REG_ARGS) * 8, RV_REG_SP, ctx); + if (sign_extend(RV_REG_T1, RV_REG_T1, arg_sz, sign, ctx)) + return -EINVAL; + emit_sd(RV_REG_SP, (idx - RV_MAX_REG_ARGS) * 8, RV_REG_T1, ctx); + } } } =20 @@ -1927,7 +1973,10 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, s= truct rv_jit_context *ctx, rs =3D RV_REG_T2; } =20 - emit_ldx(rd, off, rs, BPF_SIZE(code), sign_ext, ctx); + if (is_stack_arg_ldx(insn)) + emit_stack_arg_ldx(rd, off, ctx); + else + emit_ldx(rd, off, rs, BPF_SIZE(code), sign_ext, ctx); =20 ret =3D add_exception_handler(insn, rd, ctx); if (ret) @@ -1957,7 +2006,10 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, s= truct rv_jit_context *ctx, rd =3D RV_REG_T3; } =20 - emit_st(rd, off, imm, BPF_SIZE(code), ctx); + if (is_stack_arg_st(insn)) + emit_stack_arg_st(off, imm, ctx); + else + emit_st(rd, off, imm, BPF_SIZE(code), ctx); =20 ret =3D add_exception_handler(insn, REG_DONT_CLEAR_MARKER, ctx); if (ret) @@ -1979,7 +2031,10 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, s= truct rv_jit_context *ctx, rd =3D RV_REG_T2; } =20 - emit_stx(rd, off, rs, BPF_SIZE(code), ctx); + if (is_stack_arg_stx(insn)) + emit_stack_arg_stx(off, rs, ctx); + else + emit_stx(rd, off, rs, BPF_SIZE(code), ctx); =20 ret =3D add_exception_handler(insn, REG_DONT_CLEAR_MARKER, ctx); if (ret) @@ -2029,9 +2084,9 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, st= ruct rv_jit_context *ctx, =20 void bpf_jit_build_prologue(struct rv_jit_context *ctx, bool is_subprog) { - int i, stack_adjust =3D 0, store_offset, bpf_stack_adjust; + int i, stack_adjust =3D 0, store_offset, bpf_stack_adjust =3D ctx->stack_= arg_sz; =20 - bpf_stack_adjust =3D round_up(ctx->prog->aux->stack_depth, STACK_ALIGN); + bpf_stack_adjust +=3D round_up(ctx->prog->aux->stack_depth, STACK_ALIGN); if (bpf_stack_adjust) mark_fp(ctx); =20 @@ -2190,3 +2245,8 @@ bool bpf_jit_supports_timed_may_goto(void) { return true; } + +bool bpf_jit_supports_stack_args(void) +{ + return true; +} diff --git a/arch/riscv/net/bpf_jit_core.c b/arch/riscv/net/bpf_jit_core.c index cbfcd287ea16..2fb0b4e198b9 100644 --- a/arch/riscv/net/bpf_jit_core.c +++ b/arch/riscv/net/bpf_jit_core.c @@ -48,6 +48,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_verifier_= env *env, struct bpf_pr int pass =3D 0, prev_ninsns =3D 0, i; struct rv_jit_data *jit_data; struct rv_jit_context *ctx; + u16 stack_arg_cnt; =20 if (!prog->jit_requested) return prog; @@ -71,6 +72,12 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_verifier= _env *env, struct bpf_pr =20 ctx->arena_vm_start =3D bpf_arena_get_kern_vm_start(prog->aux->arena); ctx->user_vm_start =3D bpf_arena_get_user_vm_start(prog->aux->arena); + + stack_arg_cnt =3D bpf_out_stack_arg_cnt(env, prog); + /* First 3 stack args in regs, rest on stack */ + ctx->stack_arg_sz =3D stack_arg_cnt > RV_EXTRA_STK_ARGS ? + round_up((stack_arg_cnt - RV_EXTRA_STK_ARGS) * 8, STACK_ALIGN) : 0; + ctx->prog =3D prog; ctx->offset =3D kvzalloc_objs(int, prog->len); if (!ctx->offset) --=20 2.34.1 From nobody Sat Sep 26 03:11:18 2026 Received: from dggsgout11.his.huawei.com (dggsgout11.his.huawei.com [45.249.212.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B22913112BD; Sat, 5 Sep 2026 08:53:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788598437; cv=none; b=fGWqHV4PIMM++WA5ePhdFXX1gxbalVlwp49ZBgokHj+bxMcEXDtBeFUQvgZNtNz9jd1SVN7y6gUeOc7HJEBwvjYUynKgedEliSrfsoBTN47q8PQ+KnOyfudf5qy6jV1dRtJ6C8/YqeS8P9RYJuqjDUeDRmbl+PNicot97L7hGoY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788598437; c=relaxed/simple; bh=GHPQKzsP3RbwNes7z6+2vb3acznUeHY+PH1A9vDIlr0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TSAr4eSvvzm988Yi9yinJCJgLkZrEI/DSem+8jcLeouQ4/HparYOyZK69ACEBVau9h1eNooZqYGksseNdNQTzA4J+6ys5xwC3HYrNK8CoyAr21QjbHdAJYRGl2XjNyXLRYRSMKqMuVweWk98Z3zxmH+ht6S4dcD0injzqNlrMlI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=huaweicloud.com; spf=pass smtp.mailfrom=huaweicloud.com; arc=none smtp.client-ip=45.249.212.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=huaweicloud.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huaweicloud.com Received: from mail.maildlp.com (unknown [172.19.163.198]) by dggsgout11.his.huawei.com (SkyGuard) with ESMTPS id 4hcRtm0hzZzYQv1M; Sat, 5 Sep 2026 16:53:04 +0800 (CST) Received: from mail02.huawei.com (unknown [10.116.40.112]) by mail.maildlp.com (Postfix) with ESMTP id 261F340578; Sat, 5 Sep 2026 16:53:50 +0800 (CST) Received: from ultra.huawei.com (unknown [10.90.53.71]) by APP1 (Coremail) with UTF8SMTPA id cCh0CgBnTwqc2JtqP8lOAw--.13006S5; Sat, 05 Sep 2026 16:53:49 +0800 (CST) From: Pu Lehui To: bpf@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Feng Jiang Cc: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Eduard Zingerman , Kumar Kartikeya Dwivedi , Martin KaFai Lau , Song Liu , Yonghong Song , Jiri Olsa , Emil Tsalapatis , Ihor Solodrai , Puranjay Mohan , Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Pu Lehui Subject: [PATCH bpf-next v5 3/3] selftests/bpf: Enable stack argument tests for RV64 Date: Sat, 5 Sep 2026 08:58:57 +0000 Message-Id: <20260905085857.14143-4-pulehui@huaweicloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260905085857.14143-1-pulehui@huaweicloud.com> References: <20260905085857.14143-1-pulehui@huaweicloud.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: cCh0CgBnTwqc2JtqP8lOAw--.13006S5 X-Coremail-Antispam: 1UD129KBjvPXoW5Ar1fGFyrKF4UXw47XFW5p5X_Cr1fWoZxKF 9Iy3WUCan7Zw47uF1fJFy8Wr48KF1fJF4IkryrtF9Fyr1rCr1jyw4fZF1Fq39Ygas0gFyD C3yqvFykGF1kn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3AaLa J3UjIYCTnIWjp_UUUO07kC6x804xWl14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAv wI8IcIk0rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JrWl82 xGYIkIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI 8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Cr 0_Gr1UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AKxVW0 oVCq3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7V C0I7IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j 6r4UM4x0Y48IcxkI7VAKI48JM4IIrI8v6xkF7I0E8cxan2IY04v7MxkF7I0En4kS14v26r 4a6rW5MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAF wI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVW8ZVWrXwCIc4 0Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AK xVWxJVW8Jr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F 4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr1j6F4UJbIYCTnIWIevJa73UjIFyTuYvjxUIF4i UUUUU X-CM-SenderInfo: psxovxtxl6x35dzhxuhorxvhhfrp/ Content-Type: text/plain; charset="utf-8" From: Feng Jiang Enable the stack argument selftests for RV64. The riscv guard is restricted to __riscv_xlen =3D=3D 64 since stack arguments are only supported by the RV64 JIT. Keep the __BPF_FEATURE_STACK_ARGUMENT gate, defined by clang with BPF stack argument support [1]. [1] https://github.com/llvm/llvm-project/pull/189060 Signed-off-by: Feng Jiang Acked-by: Bj=C3=B6rn T=C3=B6pel --- tools/testing/selftests/bpf/progs/btf__stack_arg_precision.c | 3 ++- .../selftests/bpf/progs/btf__verifier_stack_arg_order.c | 3 ++- tools/testing/selftests/bpf/progs/stack_arg.c | 3 ++- tools/testing/selftests/bpf/progs/stack_arg_kfunc.c | 3 ++- tools/testing/selftests/bpf/progs/stack_arg_precision.c | 3 ++- tools/testing/selftests/bpf/progs/verifier_stack_arg.c | 3 ++- tools/testing/selftests/bpf/progs/verifier_stack_arg_order.c | 3 ++- 7 files changed, 14 insertions(+), 7 deletions(-) diff --git a/tools/testing/selftests/bpf/progs/btf__stack_arg_precision.c b= /tools/testing/selftests/bpf/progs/btf__stack_arg_precision.c index 8d38aafe66a2..ab12397a9b52 100644 --- a/tools/testing/selftests/bpf/progs/btf__stack_arg_precision.c +++ b/tools/testing/selftests/bpf/progs/btf__stack_arg_precision.c @@ -4,7 +4,8 @@ #include #include "../test_kmods/bpf_testmod_kfunc.h" =20 -#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64)) && \ +#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64) || \ + (defined(__TARGET_ARCH_riscv) && __riscv_xlen =3D=3D 64)) && \ defined(__BPF_FEATURE_STACK_ARGUMENT) =20 long subprog_call_mem_kfunc(long a, long b, long c, long d, long e, long s= ize) diff --git a/tools/testing/selftests/bpf/progs/btf__verifier_stack_arg_orde= r.c b/tools/testing/selftests/bpf/progs/btf__verifier_stack_arg_order.c index 99bc115f8380..a980a3a399d3 100644 --- a/tools/testing/selftests/bpf/progs/btf__verifier_stack_arg_order.c +++ b/tools/testing/selftests/bpf/progs/btf__verifier_stack_arg_order.c @@ -3,7 +3,8 @@ #include #include =20 -#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64)) && \ +#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64) || \ + (defined(__TARGET_ARCH_riscv) && __riscv_xlen =3D=3D 64)) && \ defined(__BPF_FEATURE_STACK_ARGUMENT) =20 int subprog_bad_order_6args(int a, int b, int c, int d, int e, int f) diff --git a/tools/testing/selftests/bpf/progs/stack_arg.c b/tools/testing/= selftests/bpf/progs/stack_arg.c index 944e3bb603e7..3e9ed37c57bb 100644 --- a/tools/testing/selftests/bpf/progs/stack_arg.c +++ b/tools/testing/selftests/bpf/progs/stack_arg.c @@ -21,7 +21,8 @@ struct { =20 int timer_result; =20 -#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64)) && \ +#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64) || \ + (defined(__TARGET_ARCH_riscv) && __riscv_xlen =3D=3D 64)) && \ defined(__BPF_FEATURE_STACK_ARGUMENT) =20 const volatile bool has_stack_arg =3D true; diff --git a/tools/testing/selftests/bpf/progs/stack_arg_kfunc.c b/tools/te= sting/selftests/bpf/progs/stack_arg_kfunc.c index 345f2da2e361..b6b1a8aa7f44 100644 --- a/tools/testing/selftests/bpf/progs/stack_arg_kfunc.c +++ b/tools/testing/selftests/bpf/progs/stack_arg_kfunc.c @@ -6,7 +6,8 @@ #include "bpf_kfuncs.h" #include "../test_kmods/bpf_testmod_kfunc.h" =20 -#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64)) && \ +#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64) || \ + (defined(__TARGET_ARCH_riscv) && __riscv_xlen =3D=3D 64)) && \ defined(__BPF_FEATURE_STACK_ARGUMENT) =20 const volatile bool has_stack_arg =3D true; diff --git a/tools/testing/selftests/bpf/progs/stack_arg_precision.c b/tool= s/testing/selftests/bpf/progs/stack_arg_precision.c index ce0301a41fa9..7baa9c1c8e31 100644 --- a/tools/testing/selftests/bpf/progs/stack_arg_precision.c +++ b/tools/testing/selftests/bpf/progs/stack_arg_precision.c @@ -6,7 +6,8 @@ #include "../test_kmods/bpf_testmod_kfunc.h" #include "bpf_misc.h" =20 -#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64)) && \ +#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64) || \ + (defined(__TARGET_ARCH_riscv) && __riscv_xlen =3D=3D 64)) && \ defined(__BPF_FEATURE_STACK_ARGUMENT) =20 /* Force kfunc extern BTF generation for inline asm call below. diff --git a/tools/testing/selftests/bpf/progs/verifier_stack_arg.c b/tools= /testing/selftests/bpf/progs/verifier_stack_arg.c index 51d22faf4559..f6a4a6aa0e61 100644 --- a/tools/testing/selftests/bpf/progs/verifier_stack_arg.c +++ b/tools/testing/selftests/bpf/progs/verifier_stack_arg.c @@ -12,7 +12,8 @@ struct { __type(value, long long); } map_hash_8b SEC(".maps"); =20 -#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64)) && \ +#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64) || \ + (defined(__TARGET_ARCH_riscv) && __riscv_xlen =3D=3D 64)) && \ defined(__BPF_FEATURE_STACK_ARGUMENT) =20 __noinline __used diff --git a/tools/testing/selftests/bpf/progs/verifier_stack_arg_order.c b= /tools/testing/selftests/bpf/progs/verifier_stack_arg_order.c index 8e4325273b3d..57f22691744a 100644 --- a/tools/testing/selftests/bpf/progs/verifier_stack_arg_order.c +++ b/tools/testing/selftests/bpf/progs/verifier_stack_arg_order.c @@ -5,7 +5,8 @@ #include #include "bpf_misc.h" =20 -#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64)) && \ +#if (defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64) || \ + (defined(__TARGET_ARCH_riscv) && __riscv_xlen =3D=3D 64)) && \ defined(__BPF_FEATURE_STACK_ARGUMENT) =20 __noinline __used __naked --=20 2.34.1