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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3339aa33e96sm10170457eec.12.2026.09.04.18.30.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2026 18:30:29 -0700 (PDT) From: Vishnu Saini Date: Sat, 05 Sep 2026 07:00:15 +0530 Subject: [PATCH v3 1/3] arm64: dts: qcom: lemans-evk: Add LVDS display overlay Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260905-lvds-support-v3-1-b40a1b03f63c@oss.qualcomm.com> References: <20260905-lvds-support-v3-0-b40a1b03f63c@oss.qualcomm.com> In-Reply-To: <20260905-lvds-support-v3-0-b40a1b03f63c@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vishnu Saini , venkata.valluru@oss.qualcomm.com, Jessica Zhang X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788571821; l=4286; i=vishnu.saini@oss.qualcomm.com; s=20251113; h=from:subject:message-id; bh=EP4wlhd1hff0Y5G3evRfbFP30T5A4yZx5Fq/svMeQP4=; b=U3Aillio6qxZoQH0zLL3Cx2FL0BYeCo6V5ypn8+nTZsCRAI1ApCr6J+QjPpe5Kd5fKzzG09lU 7gHnz7YolAbBWbb/kS+e4C7sm2/udI+RMAlXSXYac0QktLSiqxlciAI X-Developer-Key: i=vishnu.saini@oss.qualcomm.com; a=ed25519; pk=8hlXlF8j/3GeOaDK3w2LYhkv9FanCQru0c7kRH/It7k= X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA1MDAxMSBTYWx0ZWRfX5r9jT20A1WBg Taj4tPCEcErcMG9sR+v6TLbE7jLFr2QtuWkR4tRNAxPxkruWvA/L6fveYRF7V3VFVuy6HP2ZLYt Tnlaw0t6BK8vAg80A0Urtjyo3KT7mns= X-Proofpoint-GUID: DNM1Qn5xMb27s_RkG3vrvjFCFC64W4T1 X-Authority-Analysis: v=2.4 cv=LreiDHdc c=1 sm=1 tr=0 ts=6a9b70b7 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=XDEuxvGYp64Eb9E-atsA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-ORIG-GUID: DNM1Qn5xMb27s_RkG3vrvjFCFC64W4T1 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA1MDAxMSBTYWx0ZWRfX49UnbL08r4kk sjKt8U/pdrD1aaNYoLpmzi+W3PUZHIgaUf9lSFH9YWcOyetjlu9rbmJJjSSqWA9TLwG6a+WxWIu CWxr7X66kFoKTDe1wk7cdnSOINW64Val4/hyZADH+e3bLdApCvL99fzO5e/YdnLiDhcZ55VBO8z WOtGZrPKJ0x8Th8U5XaLM1rfkrMevzti71lh7ATMvxwMeVM/u1OntXyHpya89aJOF/RQYQoEOH2 0B5iwcuY1O9YPXuhQ1uJLCKfzKwBzP526xhVVU/JiRhAH50XRWjSVj78C0VaBpbXNNvpEyrz6uo ovR0zqObTTyVz1LF3bhTh09tYgB/M7RnzxAh/cUk43ATOnqJKCFh3KH3B8XBL79H36+Qcd0CCT3 eLHs1ty+sYszIzyjwdsGnkDEcwAVayaPRUGf16LTUx0I36bmhppO4mxvcsVdsXrQdQoQmfNRYpu vrm01Cs2RzkXca1iZ4w== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-05_01,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 bulkscore=0 phishscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609050011 The Lemans EVK IFP mezzanine supports LVDS display output using the Lontium LT9211C DSI-to-LVDS bridge. The bridge is connected to the DSI0 output and drives a dual-channel 1920x1080 LVDS panel in VESA-24 mapping. Add a DTBO overlay, lemans-evk-lvds-boe,dv215fhm-r01.dtso, that wires up the LT9211C bridge on I2C1 (address 0x2d) with reset on GPIO37, a panel-lvds node for the boe,dv215fhm-r01 panel (matched against the panel-simple-lvds-dual-ports binding, which supplies the panel's size and timing internally), and an LCD display bias regulator supplied through the GPIO expander. DSI power is provided by vreg_s4a. The overlay is built as a composite DTB combining the base lemans-evk.dtb, the IFP mezzanine overlay, and this LVDS overlay. Signed-off-by: Vishnu Saini --- arch/arm64/boot/dts/qcom/Makefile | 4 + .../dts/qcom/lemans-evk-lvds-boe,dv215fhm-r01.dtso | 113 +++++++++++++++++= ++++ 2 files changed, 117 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 6c2ac11133ca..6c119fd77774 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -58,6 +58,10 @@ lemans-evk-el2-dtbs :=3D lemans-evk.dtb lemans-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk-el2.dtb lemans-evk-ifp-mezzanine-dtbs :=3D lemans-evk.dtb lemans-evk-ifp-mezzanine= .dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk-ifp-mezzanine.dtb + +lemans-evk-lvds-boe,dv215fhm-r01-dtbs :=3D lemans-evk.dtb lemans-evk-ifp-m= ezzanine.dtbo lemans-evk-lvds-boe,dv215fhm-r01.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk-lvds-boe,dv215fhm-r01.dtb + dtb-$(CONFIG_ARCH_QCOM) +=3D mahua-crd.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D milos-fairphone-fp6.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D milos-nothing-asteroids.dtb diff --git a/arch/arm64/boot/dts/qcom/lemans-evk-lvds-boe,dv215fhm-r01.dtso= b/arch/arm64/boot/dts/qcom/lemans-evk-lvds-boe,dv215fhm-r01.dtso new file mode 100644 index 000000000000..bd3e13c46a1e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/lemans-evk-lvds-boe,dv215fhm-r01.dtso @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model =3D "Qualcomm Technologies, Inc. Lemans EVK LVDS"; + + panel_lvds: panel-lvds { + compatible =3D "boe,dv215fhm-r01"; + power-supply =3D <&lcd_disp_bias>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dual-lvds-odd-pixels; + + panel_in_lvds_odd: endpoint { + remote-endpoint =3D <<9211c_out_odd>; + }; + }; + + port@1 { + reg =3D <1>; + dual-lvds-even-pixels; + + panel_in_lvds_even: endpoint { + remote-endpoint =3D <<9211c_out_even>; + }; + }; + }; + }; + + lcd_disp_bias: regulator-lcd-disp-bias { + compatible =3D "regulator-fixed"; + regulator-name =3D "lcd_disp_bias"; + regulator-min-microvolt =3D <5500000>; + regulator-max-microvolt =3D <5500000>; + gpio =3D <&expander3 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&i2c1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&qup_i2c1_default>; + + status =3D "okay"; + + lt9211c_codec: lvds-bridge@2d { + compatible =3D "lontium,lt9211c"; + reg =3D <0x2d>; + reset-gpios =3D <&tlmm 37 GPIO_ACTIVE_HIGH>; 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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3339aa33e96sm10170457eec.12.2026.09.04.18.30.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2026 18:30:33 -0700 (PDT) From: Vishnu Saini Date: Sat, 05 Sep 2026 07:00:16 +0530 Subject: [PATCH v3 2/3] arm64: dts: qcom: monaco-evk: Add LVDS display overlay Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260905-lvds-support-v3-2-b40a1b03f63c@oss.qualcomm.com> References: <20260905-lvds-support-v3-0-b40a1b03f63c@oss.qualcomm.com> In-Reply-To: <20260905-lvds-support-v3-0-b40a1b03f63c@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vishnu Saini , venkata.valluru@oss.qualcomm.com, Jessica Zhang X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788571821; l=4303; i=vishnu.saini@oss.qualcomm.com; s=20251113; h=from:subject:message-id; bh=TjkylalUGxIke/ZZSHmCZIbPIqjC2JgfNl/TIVr8fK0=; b=2q6At6IM1kq4xBAh7nKHa3+MwBoESkuzCZdfTxa4njG0pclU4EHNXnMVlvVCQSaPciTr9pKgW xAd3MtW38SZDy0qB45Y4oF/shKXfAE3lmV+RtxFL2BlKET1trATUmjf X-Developer-Key: i=vishnu.saini@oss.qualcomm.com; a=ed25519; pk=8hlXlF8j/3GeOaDK3w2LYhkv9FanCQru0c7kRH/It7k= X-Authority-Analysis: v=2.4 cv=F+xnsKhN c=1 sm=1 tr=0 ts=6a9b70bc cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=Jm0fHEQTX3kIzYgV1EAA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-ORIG-GUID: VqG_kQnlV7mkG02V7-QIxtGxfh-xcrzz X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA1MDAxMSBTYWx0ZWRfX2RYOb2b+Cgit 0FVVh36BcTrv0g18QbuyxV7S+vLbzT1wcB6nqzTF63+rJJCxjrYPpNr82Kn2WC4VPTZQirqmWbK G7hHTrGhwialdwhOY0UnhkC5UABTFKk= X-Proofpoint-GUID: VqG_kQnlV7mkG02V7-QIxtGxfh-xcrzz X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA1MDAxMSBTYWx0ZWRfX5c+HbnFNDOYV ZwECY7yM6sUgtyB1sca2/dFctY2iOnSykiO4QxT+YjkEkfhvwFQwRWy0Mo89GQuKpPVCasvka4d 4YomAGgqensmsnkSGDFufmb6AnDwrhNij3x3/eHHlOewswZorwCyCo3fYZBjm8dlj8cHkoEzUPS h3MkBeYvRq42aG0S0jmYpwX9Th7NWIqiwdlaLKmd3BcxIhmP4RNITjx/x1XMiRncpNpJgUx+owd zIOhjbB13Mg3uLXhdrGFNh9qnNhwHS80WBpOzBFuzza2ne8FO3GccNTqNVCPXDcGVFHqHHrgR8N F1wh3OiZD1U6GL/7drZAFwQvNuwTMy/+vda4IHBWNoOAt4uj7tzy37RDqANqWiaCjlZ+5PicoQU ttS7+2PxXYklBntf3Imd8dI3Aea3ZoFOxsAM0d+aKiy/9+Jfp7tW0D3EhJVzjSGFlwgAY4jFNul uAd0S2hMeqht7nfnZEg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-05_01,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 adultscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609050011 The Monaco-EVK mezzanine supports LVDS display output using the Lontium LT9211C DSI-to-LVDS bridge. The bridge is connected to the DSI0 output and drives a dual-channel 1920x1080 LVDS panel in VESA-24 mapping. Add a DTBO overlay, monaco-evk-lvds-boe,dv215fhm-r01.dtso, that wires up the LT9211C bridge on I2C8 (address 0x2d) with reset on GPIO66, a panel-lvds node for the boe,dv215fhm-r01 panel (matched against the panel-simple-lvds-dual-ports binding, which supplies the panel's size and timing internally), and an LCD display bias regulator supplied through the GPIO expander. DSI power is provided by vreg_l5a. The overlay is built as a composite DTB combining the base monaco-evk.dtb, the IFP mezzanine overlay, and this LVDS overlay. Signed-off-by: Vishnu Saini --- arch/arm64/boot/dts/qcom/Makefile | 4 + .../dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso | 114 +++++++++++++++++= ++++ 2 files changed, 118 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 6c119fd77774..8cf82e7067e2 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -80,6 +80,10 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-ac-evk-ifp-mezzanine= .dtb dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-evk-el2.dtb monaco-evk-ifp-mezzanine-dtbs :=3D monaco-evk.dtb monaco-evk-ifp-mezzanine= .dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-evk-ifp-mezzanine.dtb + +monaco-evk-lvds-boe,dv215fhm-r01-dtbs :=3D monaco-evk.dtb monaco-evk-ifp-m= ezzanine.dtbo monaco-evk-lvds-boe,dv215fhm-r01.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-evk-lvds-boe,dv215fhm-r01.dtb + dtb-$(CONFIG_ARCH_QCOM) +=3D msm8216-samsung-fortuna3g.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-acer-a1-724.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D msm8916-alcatel-idol347.dtb diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso= b/arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso new file mode 100644 index 000000000000..b796df28037b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model =3D "Qualcomm Technologies, Inc. Monaco EVK LVDS"; + + panel_lvds: panel-lvds { + compatible =3D "boe,dv215fhm-r01"; + power-supply =3D <&lcd_disp_bias>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dual-lvds-odd-pixels; + + panel_in_lvds_odd: endpoint { + remote-endpoint =3D <<9211c_out_odd>; + }; + }; + + port@1 { + reg =3D <1>; + dual-lvds-even-pixels; + + panel_in_lvds_even: endpoint { + remote-endpoint =3D <<9211c_out_even>; + }; + }; + }; + }; + + lcd_disp_bias: regulator-lcd-disp-bias { + compatible =3D "regulator-fixed"; + regulator-name =3D "lcd_disp_bias"; + regulator-min-microvolt =3D <5500000>; + regulator-max-microvolt =3D <5500000>; + gpio =3D <&expander3 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&i2c8 { + #address-cells =3D <1>; + #size-cells =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&qup_i2c8_data_clk>; + + status =3D "okay"; + + lt9211c_codec: lvds-bridge@2d { + compatible =3D "lontium,lt9211c"; + reg =3D <0x2d>; + reset-gpios =3D <&tlmm 66 GPIO_ACTIVE_HIGH>; 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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3339aa33e96sm10170457eec.12.2026.09.04.18.30.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2026 18:30:38 -0700 (PDT) From: Vishnu Saini Date: Sat, 05 Sep 2026 07:00:17 +0530 Subject: [PATCH v3 3/3] arm64: dts: qcom: qcs6490-rb3gen2: Add LVDS display overlay Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260905-lvds-support-v3-3-b40a1b03f63c@oss.qualcomm.com> References: <20260905-lvds-support-v3-0-b40a1b03f63c@oss.qualcomm.com> In-Reply-To: <20260905-lvds-support-v3-0-b40a1b03f63c@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vishnu Saini , venkata.valluru@oss.qualcomm.com, Jessica Zhang X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788571821; l=4364; i=vishnu.saini@oss.qualcomm.com; s=20251113; h=from:subject:message-id; bh=lp5GSr6dro/MHpnWBR/CKVwMj1uEeL7tJ18Z/HaXDW0=; b=LQB/IRje+CR1Ov0URj40aSCPy3t7eP3fgqM2OR83fm3VezT9Oq7JuV4Dz13/wtL01PnYiTd0D MTPVGJxOCo8B2k7Kvq7gBX9uUP66nLwduk3CI/7s0JX7wvBfLVyzEtE X-Developer-Key: i=vishnu.saini@oss.qualcomm.com; a=ed25519; pk=8hlXlF8j/3GeOaDK3w2LYhkv9FanCQru0c7kRH/It7k= X-Authority-Analysis: v=2.4 cv=dfSwG3Xe c=1 sm=1 tr=0 ts=6a9b70c0 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=So681qseQLv-PdXLquQA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA1MDAxMSBTYWx0ZWRfX+PX2qT6heC+7 /XoZyb2wCpiR81kzCseN86SoMrJ08DspnmnzdZIShKwKsk4KN9EITRsp0deOD4qTxtwdQttjPOf iRC9LvoCCmOVcLA8+osQY06Z1000nsUQs3wf7ZepWxeH0QV+o22Ugp0G5IzECIUT41RgrFAn6uW 1arnaj6bG7aAXJkm/vtuWbCxHBPKzMTY6S0bpfF9ZXt8pEV4ezfb2Ps1g0qs4/lhW8doo5dJ7GD K96Kb+ErlpJpFcuo5YIyCpZfHrLN1NB2YQn5QJKmfcsbvmJm/axqQ0c9sIwVcCL2PW05zsM/l/L iI+4EpPr7LiWh4jozn+RDKeiOjT/W+ViSFsUtfFHS3iqFs9Src+eoW4/yQG5eNJU6rZIkk9m8LB 9ggPMKd6d4tNhLqOKcuYWh6aUTnj8h6InbtzXyePhWSNm8/fQsBs5IYp1urm/b803il48YSfW0A SXbdWcCALelUaoAFpkw== X-Proofpoint-GUID: ReoF0QNs2FYc0Ffx5REKzjAC2qwFH6mW X-Proofpoint-ORIG-GUID: ReoF0QNs2FYc0Ffx5REKzjAC2qwFH6mW X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA1MDAxMSBTYWx0ZWRfXxb4FNi3JQ3+9 UNou3vkdz8g64dLE15SzLHkAz/Szpb8UXU9T+kWqOsJjpvcpPcdv9VxcXai5sGlN48q/yZ0XMAx ICiykKzNz3qlo2IgAn1JqvWpe6Qwulc= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-05_01,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 phishscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 adultscore=0 impostorscore=0 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609050011 The QCS6490 RB3 Gen2 industrial mezzanine supports LVDS display output using the Lontium LT9211C DSI-to-LVDS bridge as an alternative to the default HDMI output via the LT9611UXC bridge. Add a DTBO overlay, qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01.dtso, that disables HDMI (hdmi-connector and lt9611_codec) and wires up the LT9211C bridge on I2C1 (address 0x29) with reset on GPIO117. The overlay adds a dual-channel panel-lvds node for the boe,dv215fhm-r01 panel, matched against the panel-simple-lvds-dual-ports binding which supplies the panel's size and timing internally. The overlay is built as a composite DTB combining the base qcs6490-rb3gen2.dtb, the industrial mezzanine overlay, and this LVDS overlay. Signed-off-by: Vishnu Saini --- arch/arm64/boot/dts/qcom/Makefile | 6 ++ ...industrial-mezzanine-lvds-boe,dv215fhm-r01.dtso | 106 +++++++++++++++++= ++++ 2 files changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 8cf82e7067e2..d3c09bb4d1a9 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -196,6 +196,12 @@ qcs6490-rb3gen2-vision-mezzanine-dtbs :=3D qcs6490-rb3= gen2.dtb qcs6490-rb3gen2-vis qcs6490-rb3gen2-industrial-mezzanine-dtbs :=3D qcs6490-rb3gen2.dtb qcs6490= -rb3gen2-industrial-mezzanine.dtbo =20 dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-rb3gen2-industrial-mezzanine.dtb + +qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01-dtbs :=3D \ + qcs6490-rb3gen2.dtb qcs6490-rb3gen2-industrial-mezzanine.dtbo \ + qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-rb3gen2-industrial-mezzanine-lvds-boe= ,dv215fhm-r01.dtb + dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-rb3gen2-vision-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-thundercomm-minipc-g1iot.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-thundercomm-rubikpi3.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-= lvds-boe,dv215fhm-r01.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-indus= trial-mezzanine-lvds-boe,dv215fhm-r01.dtso new file mode 100644 index 000000000000..5501ea09f43b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-lvds-bo= e,dv215fhm-r01.dtso @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model =3D "Qualcomm Technologies, Inc. Industrial RB3gen2 LVDS"; + + hdmi-connector { + status =3D "disabled"; + }; + + panel_lvds: panel-lvds { + compatible =3D "boe,dv215fhm-r01"; + power-supply =3D <&lcd_disp_bias>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dual-lvds-odd-pixels; + + panel_in_lvds_odd: endpoint { + remote-endpoint =3D <<9211c_out_odd>; + }; + }; + + port@1 { + reg =3D <1>; + dual-lvds-even-pixels; + + panel_in_lvds_even: endpoint { + remote-endpoint =3D <<9211c_out_even>; + }; + }; + }; + }; + + lcd_disp_bias: regulator-lcd-disp-bias { + compatible =3D "regulator-fixed"; + regulator-name =3D "lcd_disp_bias"; + regulator-min-microvolt =3D <5500000>; + regulator-max-microvolt =3D <5500000>; + vin-supply =3D <&vreg_l18b_1p8>; + }; +}; + +&i2c1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + status =3D "okay"; + + lvds_bridge: lvds-bridge@29 { + compatible =3D "lontium,lt9211c"; + reg =3D <0x29>; + reset-gpios =3D <&tlmm 117 GPIO_ACTIVE_HIGH>; + vccio-supply =3D <&vreg_l18b_1p8>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + lt9211c_in: endpoint { + data-lanes =3D <1 2 3 4>; + remote-endpoint =3D <&mdss_dsi0_out>; + }; + }; + + port@2 { + reg =3D <2>; + + lt9211c_out_odd: endpoint { + remote-endpoint =3D <&panel_in_lvds_odd>; + }; + }; + + port@3 { + reg =3D <3>; + + lt9211c_out_even: endpoint { + remote-endpoint =3D <&panel_in_lvds_even>; + }; + }; + }; + }; +}; + +<9611_codec { + status =3D "disabled"; +}; + +&mdss_dsi0_out { + remote-endpoint =3D <<9211c_in>; +}; + --=20 2.34.1