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Unlike standard USB2, which uses 3.3V signaling, eUSB2 uses low-voltage differential signaling (~0.4V) and requires a repeater to interface with external USB2 ports. Because of these differences, eUSB2 PHY initialization sequences, voltage tuning, and register configuration are distinct from USB2. Additionally, eUSB2 targets handle wakeup interrupts differently depending on device speed when operating in host mode. According to the eUSB2 specification, remote wakeup signaling in host mode is detected via different data-line assertions based on the connected device speed: - Low-speed devices: the host repeater drives eD+ to logic '1' upon detecting a K-state on the USB lines during remote wakeup (eUSB2 spec, Section 5.5.14). - Full-speed/high-speed devices: the host repeater drives eD- to logic '1' upon detecting a K-state during remote wakeup (eUSB2 spec, Sections 5.5.15 and 5.5.18). Since the eUSB2 PHY's DP and DM lines need to be configured differently from USB2 PHYs, controllers should be able to query the PHY type and configure wakeup interrupts accordingly. Add PHY_TYPE_EUSB2 to distinguish eUSB2 PHYs from standard USB2 PHYs. Acked-by: Krzysztof Kozlowski Signed-off-by: Krishna Kurapati Reviewed-by: Manivannan Sadhasivam --- include/dt-bindings/phy/phy.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h index 979b5dfd8353..555a022c8c0b 100644 --- a/include/dt-bindings/phy/phy.h +++ b/include/dt-bindings/phy/phy.h @@ -24,6 +24,7 @@ #define PHY_TYPE_CPHY 11 #define PHY_TYPE_USXGMII 12 #define PHY_TYPE_XAUI 13 +#define PHY_TYPE_EUSB2 14 =20 #define PHY_POL_NORMAL 0 #define PHY_POL_INVERT 1 --=20 2.34.1 From nobody Sat Sep 26 01:54:44 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 992DA4B2032 for ; Sat, 5 Sep 2026 15:29:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; 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Add support to cache the PHY_TYPE and add the following helpers: - phy_set_type() for the phy drivers (like m31_eusb2 or snps-eusb2) to declare what type of PHY they are (in this case PHY_TYPE_EUSB2). - phy_get_type() for the consumers (like USB controllers) to query the type of phy connected to them. Reviewed-by: Thinh Nguyen Signed-off-by: Krishna Kurapati Reviewed-by: Manivannan Sadhasivam --- include/linux/phy/phy.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index ea47975e288a..038c2b58bbe1 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -21,6 +21,8 @@ #include #include =20 +#include + struct phy; =20 enum phy_mode { @@ -152,11 +154,13 @@ struct phy_ops { * @bus_width: Data path width implemented by PHY * @max_link_rate: Maximum link rate supported by PHY (units to be decided= by producer and consumer) * @mode: PHY mode + * @type: PHY type */ struct phy_attrs { u32 bus_width; u32 max_link_rate; enum phy_mode mode; + int type; }; =20 /** @@ -262,6 +266,20 @@ static inline enum phy_mode phy_get_mode(struct phy *p= hy) { return phy->attrs.mode; } + +static inline int phy_get_type(struct phy *phy) +{ + if (phy) + return phy->attrs.type; + + return PHY_NONE; +} + +static inline void phy_set_type(struct phy *phy, int type) +{ + phy->attrs.type =3D type; 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Set the phy type to EUSB2 to let the controller know the phy type when queried during its probe. Reviewed-by: Thinh Nguyen Signed-off-by: Krishna Kurapati Reviewed-by: Manivannan Sadhasivam --- drivers/phy/phy-snps-eusb2.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/phy/phy-snps-eusb2.c b/drivers/phy/phy-snps-eusb2.c index af4fa17ac6cb..ab405108c727 100644 --- a/drivers/phy/phy-snps-eusb2.c +++ b/drivers/phy/phy-snps-eusb2.c @@ -596,6 +596,8 @@ static int snps_eusb2_hsphy_probe(struct platform_devic= e *pdev) return PTR_ERR(generic_phy); } =20 + phy_set_type(generic_phy, PHY_TYPE_EUSB2); + dev_set_drvdata(dev, phy); phy_set_drvdata(generic_phy, phy); =20 --=20 2.34.1 From nobody Sat Sep 26 01:54:45 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 677C84B26FA for ; Sat, 5 Sep 2026 15:29:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; 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Set the phy type to EUSB2 to let the controller know the phy type when queried during its probe. Reviewed-by: Thinh Nguyen Signed-off-by: Krishna Kurapati --- drivers/phy/qualcomm/phy-qcom-m31-eusb2.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c b/drivers/phy/qualco= mm/phy-qcom-m31-eusb2.c index 275df38256de..72fa71003fd9 100644 --- a/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c @@ -277,6 +277,8 @@ static int m31eusb2_phy_probe(struct platform_device *p= dev) return dev_err_probe(dev, PTR_ERR(phy->phy), "failed to create phy\n"); =20 + phy_set_type(phy->phy, PHY_TYPE_EUSB2); + ret =3D devm_regulator_bulk_get_const(dev, M31_EUSB_NUM_VREGS, m31_eusb_phy_vregs, &phy->vregs); if (ret) --=20 2.34.1 From nobody Sat Sep 26 01:54:45 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 515774BB5C7 for ; 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a=ed25519-sha256; t=1788622149; l=6273; i=krishna.kurapati@oss.qualcomm.com; s=20260707; h=from:subject:message-id; bh=0vlezWZK4fA+Na166NVdgqHlRZAT3nhTjycS7km+CQc=; b=fqAYeayRuF80MQHmjWGW+p52Hhfe0N8b2XCwhMvq5pKCiatZ8e5jgunbPWytfIT0k+gB6d1gi bAgj4qvkvF0DWRCds99/v2AFIEAG/P3q0GAWHMD7oDU0kzoqjHoVrhR X-Developer-Key: i=krishna.kurapati@oss.qualcomm.com; a=ed25519; pk=6PmiuwGCdov3wRO+bdmRlRxRtmJyDKz3ED57LLPVgds= X-Authority-Analysis: v=2.4 cv=X45i7mTe c=1 sm=1 tr=0 ts=6a9c3567 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=jIQo8A4GAAAA:8 a=EUspDBNiAAAA:8 a=Sf5RIT6NobiIG8tfIdUA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-ORIG-GUID: i-Dqzw7A-u8f14242Y3bJ1LrpDxsqj9h X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA1MDE3MCBTYWx0ZWRfX8Sg/CvbHdmd8 YoIiAdkFp/KrpHy1j89sr2uU+Pu9HRv/qmLYVRxHpjnvwmaycFfksoiOhwaIZ9334rj39QivRAw aMuwCp/OcZE50cgZmqbKT/EqByZHeEvBNU6n6wG7Mprh+2vjxG0u2kQ7K9zNkqpeBGit2SmhYmk eMbCwGtr5VAKykiqTKdJWeG58+4DeXsAoYrIxn9YJxUEwvU+MEgTd6l0l4P/9UyReRl5WXNnU91 4JZW1iDJGcmzLxskIn1NzksDQ9hSZU+T3boCxRoxiXWbekiMaGq2mL5RBGlnyNeZk6Nza3jAIVm v9IsW1LIhNW6dwldpc5b7mHBXj8abxAqkvU+8QDKmsqMBND9x4G0qw/EFEt1bXImSJnG6PQQcRj rj80UgeVOjQiuz1qMQoWkq5LVAbS6cVAXJOcJSvNr+eYGK6/MC8682eI/EwiSPfHqd26uexsTpV +CUQkh3U0HEIMF/Fb6Q== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA1MDE3MCBTYWx0ZWRfX4Z8Q+eiBeMbb cykQjBv0W6wpQ/ioVpRYsVoDoSzr4bs7iCZE7TMBXZt4qx0DdNz3UCPeJs1m/y1qkn4Al34I3/Q uR6YYJAo1/dU+eOW72QhFlFzJfUvolI= X-Proofpoint-GUID: i-Dqzw7A-u8f14242Y3bJ1LrpDxsqj9h X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-05_05,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 suspectscore=0 clxscore=1015 adultscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609050170 eUSB2 targets handle wakeup interrupts differently depending on device speed when operating in host mode. According to the eUSB2 specification, remote wakeup signaling in host mode is detected via different data-line assertions based on the connected device speed. When a low-speed device is connected, the host repeater drives eD+ to logic '1' upon detecting a K-state on the USB lines during remote wakeup (eUSB2 specification, Section 5.5.14). When a full-speed or high-speed device is connected, the host repeater drives eD- to logic '1' upon detecting a K-state on the USB line during remote wakeup (eUSB2 specification, Sections 5.5.15 and 5.5.18). Since the eUSB2 PHY's "DP" and "DM" interrupt lines monitor the eD+ and eD- line states, query the phy type and configure the wakeup interrupts accordingly. Acked-by: Thinh Nguyen Signed-off-by: Krishna Kurapati --- drivers/usb/dwc3/dwc3-qcom.c | 63 +++++++++++++++++++++++++++++++++-------= ---- 1 file changed, 48 insertions(+), 15 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index ba26e61df915..2d1e66ff72ed 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -86,6 +86,7 @@ struct dwc3_qcom { struct icc_path *icc_path_apps; =20 enum usb_role current_role; + bool has_eusb2_phy; }; =20 #define to_dwc3_qcom(d) container_of((d), struct dwc3_qcom, dwc) @@ -273,15 +274,23 @@ static void dwc3_qcom_disable_wakeup_irq(int irq) disable_irq_nosync(irq); } =20 -static void dwc3_qcom_disable_port_interrupts(struct dwc3_qcom_port *port) +static void dwc3_qcom_disable_port_interrupts(struct dwc3_qcom *qcom, int = port_index) { + struct dwc3_qcom_port *port =3D &qcom->ports[port_index]; + dwc3_qcom_disable_wakeup_irq(port->qusb2_phy_irq); =20 if (port->usb2_speed =3D=3D USB_SPEED_LOW) { - dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); + if (qcom->has_eusb2_phy) + dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); + else + dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); } else if ((port->usb2_speed =3D=3D USB_SPEED_HIGH) || (port->usb2_speed =3D=3D USB_SPEED_FULL)) { - dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); + if (qcom->has_eusb2_phy) + dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); + else + dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); } else { dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); @@ -290,26 +299,38 @@ static void dwc3_qcom_disable_port_interrupts(struct = dwc3_qcom_port *port) dwc3_qcom_disable_wakeup_irq(port->ss_phy_irq); } =20 -static void dwc3_qcom_enable_port_interrupts(struct dwc3_qcom_port *port) +static void dwc3_qcom_enable_port_interrupts(struct dwc3_qcom *qcom, int p= ort_index) { + struct dwc3_qcom_port *port =3D &qcom->ports[port_index]; + dwc3_qcom_enable_wakeup_irq(port->qusb2_phy_irq, 0); =20 /* * Configure DP/DM line interrupts based on the USB2 device attached to - * the root hub port. When HS/FS device is connected, configure the DP li= ne - * as falling edge to detect both disconnect and remote wakeup scenarios.= When - * LS device is connected, configure DM line as falling edge to detect bo= th - * disconnect and remote wakeup. When no device is connected, configure b= oth - * DP and DM lines as rising edge to detect HS/HS/LS device connect scena= rio. + * the root hub port. For non-eUSB2 targets, when HS/FS device is connect= ed, + * configure the DP line as falling edge to detect disconnect and remote + * wakeup. When LS device is connected, configure the DM line as falling = edge + * for the same. For eUSB2 targets, the lines are swapped and rising edge= is + * used: DP line for LS and DM line for HS/FS device detection. When no + * device is connected, configure both DP and DM lines as rising edge to + * detect HS/FS/LS device connect scenario. */ =20 if (port->usb2_speed =3D=3D USB_SPEED_LOW) { - dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, - IRQ_TYPE_EDGE_FALLING); + if (qcom->has_eusb2_phy) + dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, + IRQ_TYPE_EDGE_RISING); + else + dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, + IRQ_TYPE_EDGE_FALLING); } else if ((port->usb2_speed =3D=3D USB_SPEED_HIGH) || (port->usb2_speed =3D=3D USB_SPEED_FULL)) { - dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, - IRQ_TYPE_EDGE_FALLING); + if (qcom->has_eusb2_phy) + dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, + IRQ_TYPE_EDGE_RISING); + else + dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, + IRQ_TYPE_EDGE_FALLING); } else { dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, IRQ_TYPE_EDGE_RISING); @@ -325,7 +346,7 @@ static void dwc3_qcom_disable_interrupts(struct dwc3_qc= om *qcom) int i; =20 for (i =3D 0; i < qcom->num_ports; i++) - dwc3_qcom_disable_port_interrupts(&qcom->ports[i]); + dwc3_qcom_disable_port_interrupts(qcom, i); } =20 static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) @@ -333,7 +354,7 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qco= m *qcom) int i; =20 for (i =3D 0; i < qcom->num_ports; i++) - dwc3_qcom_enable_port_interrupts(&qcom->ports[i]); + dwc3_qcom_enable_port_interrupts(qcom, i); } =20 static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) @@ -628,6 +649,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) int ret; bool ignore_pipe_clk; bool wakeup_source; + struct phy *phy; =20 qcom =3D devm_kzalloc(&pdev->dev, sizeof(*qcom), GFP_KERNEL); if (!qcom) @@ -698,6 +720,17 @@ static int dwc3_qcom_probe(struct platform_device *pde= v) if (ret) goto clk_disable; =20 + phy =3D devm_of_phy_get_by_index(dev, dev->of_node, 0); + if (IS_ERR(phy)) { + if (PTR_ERR(phy) !=3D -ENODEV) { + ret =3D dev_err_probe(dev, PTR_ERR(phy), + "failed to get usb2 phy\n"); + goto clk_disable; + } + phy =3D NULL; + } + qcom->has_eusb2_phy =3D (phy_get_type(phy) =3D=3D PHY_TYPE_EUSB2); + qcom->mode =3D usb_get_dr_mode(dev); =20 if (qcom->mode =3D=3D USB_DR_MODE_HOST) { --=20 2.34.1