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Fri, 04 Sep 2026 09:24:39 -0700 (PDT) From: Magnus Lindholm To: richard.henderson@linaro.org, mattst88@gmail.com, linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org Cc: linmag7@gmail.com Subject: [PATCH 1/3] alpha: do not clear remote MMU contexts in migrate_flush_tlb_page() Date: Fri, 4 Sep 2026 18:23:29 +0200 Message-ID: <20260904162424.376504-2-linmag7@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260904162424.376504-1-linmag7@gmail.com> References: <20260904162424.376504-1-linmag7@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After the on_each_cpu() rendezvous, migrate_flush_tlb_page() walks the other CPUs and zeroes their mm->context[cpu] when mm_users is at most one, described as mimicking flush_tlb_mm()'s mm_users<=3D1 optimization. It is not one. flush_tlb_mm() tests mm_users before deciding whether to send the IPIs; here every CPU has already been visited and waited for, so nothing is saved. The callback has also just set each CPU's own slot correctly, so the loop only overwrites it and does so while that CPU may still be running in the address space. Remove it. Every runtime write to mm->context[] then targets the writing CPU's own slot, which is the invariant the next patch depends on when it reads those slots to decide whether a shootdown can be skipped. Fixes: dd5712f3379c ("alpha: fix user-space corruption during memory compac= tion") Signed-off-by: Magnus Lindholm --- arch/alpha/mm/tlbflush.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/arch/alpha/mm/tlbflush.c b/arch/alpha/mm/tlbflush.c index ccbc317b9a34..239c72b8a741 100644 --- a/arch/alpha/mm/tlbflush.c +++ b/arch/alpha/mm/tlbflush.c @@ -90,22 +90,6 @@ void migrate_flush_tlb_page(struct vm_area_struct *vma, = unsigned long addr) */ preempt_disable(); on_each_cpu(ipi_flush_mm_and_page, &d, 1); - - /* - * mimic flush_tlb_mm()'s mm_users<=3D1 optimization. - */ - if (atomic_read(&mm->mm_users) <=3D 1) { - - int cpu, this_cpu; - this_cpu =3D smp_processor_id(); - - for (cpu =3D 0; cpu < NR_CPUS; cpu++) { - if (!cpu_online(cpu) || cpu =3D=3D this_cpu) - continue; - if (READ_ONCE(mm->context[cpu])) - WRITE_ONCE(mm->context[cpu], 0); - } - } preempt_enable(); } =20 --=20 2.43.0 From nobody Sat Sep 26 04:29:59 2026 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1A7342589D for ; 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Fri, 04 Sep 2026 09:24:41 -0700 (PDT) Received: from buildhost.darklands.se ([2001:9b1:ff:d701:51eb:176f:63d9:53f8]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c260d4a8bacsm132556766b.17.2026.09.04.09.24.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2026 09:24:40 -0700 (PDT) From: Magnus Lindholm To: richard.henderson@linaro.org, mattst88@gmail.com, linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org Cc: linmag7@gmail.com Subject: [PATCH 2/3] alpha: do not skip TLB shootdown IPIs for kthread-borrowed mms Date: Fri, 4 Sep 2026 18:23:30 +0200 Message-ID: <20260904162424.376504-3-linmag7@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260904162424.376504-1-linmag7@gmail.com> References: <20260904162424.376504-1-linmag7@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" flush_tlb_mm(), flush_tlb_page() and flush_icache_user_page() skip the shootdown IPI when mm_users <=3D 1, on the assumption that no other CPU can be running the mm. A task that borrows an mm through kthread_use_mm() takes mmgrab() rather than mmget(), so it never appears in mm_users, and kthread_use_mm() may be handed an mm that is already the caller's active_mm and loaded on that CPU. Such a CPU was not only left without an IPI, its mm->context[cpu] was cleared from under it. mm->context[cpu] is already the record of which CPUs hold an ASN for the mm. Test it rather than clearing it: take the shortcut only when no other CPU has one, and otherwise fall through to the IPI, which invalidates those CPUs properly. A CPU that merely ran the mm in the past also holds a context and now costs an IPI, which errs in the safe direction. Dropping that clearing loop leaves every runtime write to mm->context[] targeting the writing CPU's own slot, so the array becomes a lockless publication of which CPUs may be using the mm, with a single writer per slot. Mark the two stores that are now observed from other CPUs; flush_tlb_other() already uses WRITE_ONCE(). The uniprocessor flush_icache_user_page() is left alone, as nothing reads another CPU's slot there, and init_new_context() runs before the mm is shared. The reads also need ordering against the changes that led to the flush. A CPU that publishes a context is in turn ordered before it goes on to access the mm, by two different barriers: kthread_use_mm() issues one through mmdrop_lazy_tlb() for the initial direct switch, and if the task later migrates, the context published from ev5_switch_mm() is followed by the scheduler's post-switch barrier, on alpha the mb() in arch_spin_unlock() from finish_lock_switch(), as described in Documentation/scheduler/membarrier.rst. So a CPU either already holds a context and is seen here, or it allocates a fresh one before going on to use the mm, and a fresh ASN carries nothing over from the previous context. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Magnus Lindholm --- arch/alpha/include/asm/mmu_context.h | 2 +- arch/alpha/kernel/smp.c | 48 ++++++++++++++-------------- arch/alpha/mm/fault.c | 2 +- 3 files changed, 26 insertions(+), 26 deletions(-) diff --git a/arch/alpha/include/asm/mmu_context.h b/arch/alpha/include/asm/= mmu_context.h index 825d3b9605c9..a829f557396d 100644 --- a/arch/alpha/include/asm/mmu_context.h +++ b/arch/alpha/include/asm/mmu_context.h @@ -147,7 +147,7 @@ ev5_switch_mm(struct mm_struct *prev_mm, struct mm_stru= ct *next_mm, mmc =3D next_mm->context[cpu]; if ((mmc ^ asn) & ~HARDWARE_ASN_MASK) { mmc =3D __get_new_mm_context(next_mm, cpu); - next_mm->context[cpu] =3D mmc; + WRITE_ONCE(next_mm->context[cpu], mmc); } #ifdef CONFIG_SMP else diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c index e21bc3920bec..c4d12d8312a7 100644 --- a/arch/alpha/kernel/smp.c +++ b/arch/alpha/kernel/smp.c @@ -631,6 +631,24 @@ ipi_flush_tlb_mm(void *x) flush_tlb_other(mm); } =20 +/* True if a CPU other than this one holds an ASN for MM. */ +static bool +mm_context_elsewhere(struct mm_struct *mm) +{ + int cpu, this_cpu =3D smp_processor_id(); + + /* Pairs with the barrier the publishing CPU issues before using MM. */ + smp_mb(); + + for_each_online_cpu(cpu) { + if (cpu =3D=3D this_cpu) + continue; + if (READ_ONCE(mm->context[cpu])) + return true; + } + return false; +} + void flush_tlb_mm(struct mm_struct *mm) { @@ -638,14 +656,8 @@ flush_tlb_mm(struct mm_struct *mm) =20 if (mm =3D=3D current->active_mm) { flush_tlb_current(mm); - if (atomic_read(&mm->mm_users) <=3D 1) { - int cpu, this_cpu =3D smp_processor_id(); - for (cpu =3D 0; cpu < NR_CPUS; cpu++) { - if (!cpu_online(cpu) || cpu =3D=3D this_cpu) - continue; - if (mm->context[cpu]) - mm->context[cpu] =3D 0; - } + if (atomic_read(&mm->mm_users) <=3D 1 && + !mm_context_elsewhere(mm)) { preempt_enable(); return; } @@ -690,14 +702,8 @@ flush_tlb_page(struct vm_area_struct *vma, unsigned lo= ng addr) /* As in ipi_flush_tlb_page(): a targeted tbi() needs MM current. */ if (mm =3D=3D current->mm) { flush_tlb_current_page(mm, vma, addr); - if (atomic_read(&mm->mm_users) <=3D 1) { - int cpu, this_cpu =3D smp_processor_id(); - for (cpu =3D 0; cpu < NR_CPUS; cpu++) { - if (!cpu_online(cpu) || cpu =3D=3D this_cpu) - continue; - if (mm->context[cpu]) - mm->context[cpu] =3D 0; - } + if (atomic_read(&mm->mm_users) <=3D 1 && + !mm_context_elsewhere(mm)) { preempt_enable(); return; } @@ -747,14 +753,8 @@ flush_icache_user_page(struct vm_area_struct *vma, str= uct page *page, =20 if (mm =3D=3D current->active_mm) { __load_new_mm_context(mm); - if (atomic_read(&mm->mm_users) <=3D 1) { - int cpu, this_cpu =3D smp_processor_id(); - for (cpu =3D 0; cpu < NR_CPUS; cpu++) { - if (!cpu_online(cpu) || cpu =3D=3D this_cpu) - continue; - if (mm->context[cpu]) - mm->context[cpu] =3D 0; - } + if (atomic_read(&mm->mm_users) <=3D 1 && + !mm_context_elsewhere(mm)) { preempt_enable(); return; } diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c index a9816bbc9f34..7bbba9010dac 100644 --- a/arch/alpha/mm/fault.c +++ b/arch/alpha/mm/fault.c @@ -45,7 +45,7 @@ __load_new_mm_context(struct mm_struct *next_mm) struct pcb_struct *pcb; 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Fri, 04 Sep 2026 09:24:42 -0700 (PDT) Received: from buildhost.darklands.se ([2001:9b1:ff:d701:51eb:176f:63d9:53f8]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c260d4a8bacsm132556766b.17.2026.09.04.09.24.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2026 09:24:42 -0700 (PDT) From: Magnus Lindholm To: richard.henderson@linaro.org, mattst88@gmail.com, linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org Cc: linmag7@gmail.com Subject: [PATCH 3/3] alpha: load the MMU context when switch_mm() switches the current task Date: Fri, 4 Sep 2026 18:23:31 +0200 Message-ID: <20260904162424.376504-4-linmag7@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260904162424.376504-1-linmag7@gmail.com> References: <20260904162424.376504-1-linmag7@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" ev5_switch_mm() only prepares the incoming PCB. The context is installed by PAL_swpctx, which alpha_switch_to() issues against that PCB on the way out of the scheduler. Two callers reach switch_mm_irqs_off() without going through alpha_switch_to(): kthread_use_mm(), which borrows an mm for the current kernel thread, and sched_force_init_mm() on the CPU-hotplug teardown path. Neither explicitly loads the context, so the task can carry on running under whatever was loaded before while current->mm says otherwise. Its user accesses can therefore resolve in the wrong address space, and because do_page_fault() resolves faults against current->mm without reloading, a fault taken that way repeats indefinitely. sched_force_init_mm() needs CONFIG_HOTPLUG_CPU, which alpha does not support, so kthread_use_mm() is the only one of the two reachable in practice; the fix below tests the caller's identity rather than special-casing either one. The scheduler passes the incoming task, which is not current until alpha_switch_to() runs; both direct callers pass current. Test for that and load the context the way activate_mm() does. Both hold interrupts disabled across switch_mm_irqs_off(), so this completes before any shootdown can be taken and needs no asn_lock handshake. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Magnus Lindholm --- arch/alpha/include/asm/mmu_context.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/alpha/include/asm/mmu_context.h b/arch/alpha/include/asm/= mmu_context.h index a829f557396d..caa6a9c4e3ca 100644 --- a/arch/alpha/include/asm/mmu_context.h +++ b/arch/alpha/include/asm/mmu_context.h @@ -130,6 +130,8 @@ __get_new_mm_context(struct mm_struct *mm, long cpu) return next; } =20 +extern void __load_new_mm_context(struct mm_struct *); + __EXTERN_INLINE void ev5_switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm, struct task_struct *next) @@ -139,6 +141,12 @@ ev5_switch_mm(struct mm_struct *prev_mm, struct mm_str= uct *next_mm, unsigned long mmc; long cpu =3D smp_processor_id(); =20 + /* A direct switch never reaches alpha_switch_to(); load it here. */ + if (next =3D=3D current) { + __load_new_mm_context(next_mm); + return; + } + #ifdef CONFIG_SMP cpu_data[cpu].asn_lock =3D 1; barrier(); @@ -160,7 +168,6 @@ ev5_switch_mm(struct mm_struct *prev_mm, struct mm_stru= ct *next_mm, task_thread_info(next)->pcb.asn =3D mmc & HARDWARE_ASN_MASK; } =20 -extern void __load_new_mm_context(struct mm_struct *); asmlinkage void do_page_fault(unsigned long address, unsigned long mmcsr, long cause, struct pt_regs *regs); =20 --=20 2.43.0