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Fri, 04 Sep 2026 15:57:05 -0700 (PDT) Received: from localhost ([2a00:79e0:2e7c:8:5597:62ab:c321:4a7f]) by smtp.gmail.com with UTF8SMTPSA id 5a478bee46e88-3339aa37dbdsm8157345eec.11.2026.09.04.15.57.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Sep 2026 15:57:04 -0700 (PDT) From: Brian Norris To: Matthias Brugger , AngeloGioacchino Del Regno Cc: Chen-Yu Tsai , linux-mediatek@lists.infradead.org, Julius Werner , linux-kernel@vger.kernel.org, Conor Dooley , Rob Herring , linux-arm-kernel@lists.infradead.org, Brian Norris , Krzysztof Kozlowski , Doug Anderson , chrome-platform@lists.linux.dev, Tzung-Bi Shih , devicetree@vger.kernel.org Subject: [PATCH v2] arm64: dts: mediatek: Add #{address,size}-cells to Chromium-based /firmware Date: Fri, 4 Sep 2026 15:56:22 -0700 Message-ID: <20260904155621.v2.1.I33d1d66d4724587a981f706243cdc2f264670a40@changeid> X-Mailer: git-send-email 2.55.0.979.g7e5102b832-goog Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Chromium/Depthcharge bootloaders may dynamically add a few device nodes to a system's DTB under a /firmware node. A typical DT looks something like the following: / { firmware { ranges; coreboot { compatible =3D "coreboot"; reg =3D <...>; ...; }; }; }; Notably, the /firmware node has an empty 'ranges', but does not have address/size-cells. Commit 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") started requiring #address-cells for a device's parent if we want to use the reg resource in a device node. This leads to errors like the following: [ 7.763870] coreboot_table firmware:coreboot: probe with driver coreboot= _table failed with error -22 Add appropriate #{address,size}-cells to work around the problem. Note that Google has also patched the Depthcharge bootloader source to add {address,size}-cells [1], but bootloader updates are typically delivered only via Google OS updates. Not all users install Google software updates, and even if they do, Google may not produce updated binaries for all/older devices. [1] https://lore.kernel.org/all/20241209092809.GA3246424@google.com/ https://crrev.com/c/6051580 ("coreboot: Insert #address-cells and #size-cells for firmware node") Closes: https://lore.kernel.org/all/aeKlYzTiL0OB1y3g@google.com/ Fixes: 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-= translatable addresses") Signed-off-by: Brian Norris Reviewed-by: Chen-Yu Tsai Reviewed-by: Douglas Anderson --- v1 series: https://lore.kernel.org/all/20260428200712.2660635-1-briannorris@chromium.o= rg/ There is a little more background in the v1 cover letter. I didn't feel like a new cover letter was needed for a single patch-resend. Changes in v2: * resent separately from the series, since the rest were applied by their maintainers * trim other-arch maintainers from CC list * Add Reviewed-by * Add missing linux-mediatek@lists.infradead.org Cc. It claims to be moderated, and its "join" seems broken, so I'll probably get bounced. (https://lists.openwrt.org/mailman/subscribe/linux-mediatek is disabled, and linux-mediatek-join@lists.openwrt.org gives me error 550) * otherwise, no change from v1 arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 +++++ 6 files changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot= /dts/mediatek/mt8173-elm.dtsi index a0573bc359fb..777da2129e77 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -16,6 +16,11 @@ aliases { mmc2 =3D &mmc3; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index 69cab9f9c530..fa359440ed60 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -22,6 +22,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells <2>; + #size-cells <2>; + }; + backlight_lcd0: backlight_lcd0 { compatible =3D "pwm-backlight"; pwms =3D <&pwm0 0 500000>; diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi b/arch/arm64/= boot/dts/mediatek/mt8186-corsola.dtsi index ff20376a44d7..2b327d9ef65e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi @@ -26,6 +26,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + memory@40000000 { device_type =3D "memory"; /* The size should be filled in by the bootloader. */ diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8188-geralt.dtsi index f382f90c48f5..c65805f2a7e0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi @@ -41,6 +41,11 @@ dmic-codec { wakeup-delay-ms =3D <100>; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + memory@40000000 { device_type =3D "memory"; /* The size will be filled in by the bootloader */ diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 40d34b16dc80..e8ebbb74987f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -25,6 +25,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index ef7afc436aef..f06ca2bc165d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -42,6 +42,11 @@ dmic-codec { wakeup-delay-ms =3D <50>; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; --=20 2.55.0.979.g7e5102b832-goog