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charset="utf-8" Fix typos in comments, reported by scripts/checkpatch.pl using the misspelling list in scripts/spelling.txt. Only touches comments, no code changes. Assisted-by: Cursor:claude-opus-5 Signed-off-by: Hemanth Selam Reviewed-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a5xx_power.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 2 +- drivers/gpu/drm/msm/dsi/dsi.c | 2 +- drivers/gpu/drm/msm/dsi/dsi_manager.c | 2 +- drivers/gpu/drm/msm/msm_gem.h | 2 +- drivers/gpu/drm/msm/msm_ringbuffer.h | 2 +- drivers/gpu/drm/msm/registers/gen_header.py | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/= adreno/a5xx_power.c index d6da7351cfbb..95f432de2bcc 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_power.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c @@ -8,7 +8,7 @@ /* * The GPMU data block is a block of shared registers that can be used to * communicate back and forth. These "registers" are by convention with th= e GPMU - * firwmare and not bound to any specific hardware design + * firmware and not bound to any specific hardware design */ =20 #define AGC_INIT_BASE REG_A5XX_GPMU_DATA_RAM_BASE diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/= adreno/adreno_gpu.c index 8cd2020d4b7e..667ed411076d 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -518,7 +518,7 @@ int adreno_set_param(struct msm_gpu *gpu, struct msm_co= ntext *ctx, return UERR(EINVAL, drm, "requires per-process pgtables"); =20 /* - * We can only swtich to VM_BIND mode if the VM has not yet + * We can only switch to VM_BIND mode if the VM has not yet * been created: */ if (ctx->vm) diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c b/drivers/gpu/drm/m= sm/disp/mdp5/mdp5_plane.c index 841f444a8d68..cb9606c21ba2 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c @@ -245,7 +245,7 @@ static int mdp5_plane_atomic_check_with_state(struct dr= m_crtc_state *crtc_state, new_hwpipe =3D true; =20 /* - * (re)allocte hw pipe if we're either requesting for 2 hw pipes + * (re)allocate hw pipe if we're either requesting for 2 hw pipes * or we're switching from 2 hw pipes to 1 hw pipe because the * new src_w can be supported by 1 hw pipe itself. */ diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c index 3c9f01ed6271..1a1a59151e5c 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.c +++ b/drivers/gpu/drm/msm/dsi/dsi.c @@ -246,7 +246,7 @@ int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struc= t drm_device *dev, if (msm_dsi_is_bonded_dsi(msm_dsi) && !msm_dsi_is_master_dsi(msm_dsi)) { /* - * Do not return an eror here, + * Do not return an error here, * Just skip creating encoder/connector for the slave-DSI. */ return 0; diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/ds= i/dsi_manager.c index 959daa88b1d0..36c7ae94b1c8 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c @@ -347,7 +347,7 @@ static void dsi_mgr_bridge_post_disable(struct drm_brid= ge *bridge, /* * Do nothing with the host if it is slave-DSI in case of bonded DSI. * It is safe to call dsi_mgr_phy_disable() here because a single PHY - * won't be diabled until both PHYs request disable. + * won't be disabled until both PHYs request disable. */ if (is_bonded_dsi && !IS_MASTER_DSI_LINK(id)) goto disable_phy; diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index dff60cbc9d95..a8e983b243b8 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -346,7 +346,7 @@ msm_gem_unlock(struct drm_gem_object *obj) =20 /** * msm_gem_lock_vm_and_obj() - Helper to lock an obj + VM - * @exec: the exec context helper which will be initalized + * @exec: the exec context helper which will be initialized * @obj: the GEM object to lock * @vm: the VM to lock * diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h b/drivers/gpu/drm/msm/msm= _ringbuffer.h index 3631ec283c6e..486280ca478e 100644 --- a/drivers/gpu/drm/msm/msm_ringbuffer.h +++ b/drivers/gpu/drm/msm/msm_ringbuffer.h @@ -101,7 +101,7 @@ struct msm_ringbuffer { =20 /* * preempt_lock protects preemption and serializes wptr updates against - * preemption. Can be aquired from irq context. + * preemption. Can be acquired from irq context. */ spinlock_t preempt_lock; =20 diff --git a/drivers/gpu/drm/msm/registers/gen_header.py b/drivers/gpu/drm/= msm/registers/gen_header.py index d3b56a9d84fb..d6bfb7b7d7b3 100644 --- a/drivers/gpu/drm/msm/registers/gen_header.py +++ b/drivers/gpu/drm/msm/registers/gen_header.py @@ -576,7 +576,7 @@ class Parser(object): raise self.error(e) =20 def parse_varset(self, attrs): - # Inherit the varset from the enclosing domain if not overriden: + # Inherit the varset from the enclosing domain if not overridden: varset =3D self.current_varset if "varset" in attrs: varset =3D self.enums[attrs["varset"]] --=20 2.48.1 From nobody Sat Sep 26 04:40:59 2026 Received: from mail-oo1-f41.google.com (mail-oo1-f41.google.com [209.85.161.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 108434756DF for ; Fri, 4 Sep 2026 12:06:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 04 Sep 2026 05:06:19 -0700 (PDT) Received: from volcano9f6e-hostos.amd.com ([165.204.217.251]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3339b8f44d7sm6321674eec.22.2026.09.04.05.06.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2026 05:06:19 -0700 (PDT) From: Hemanth Selam To: Rob Clark , Sean Paul , Konrad Dybcio , Akhil P Oommen , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Sumit Semwal , =?UTF-8?q?Christian=20K=C3=B6nig?= Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org Subject: [PATCH 2/2] drm: fix repeated words in comments Date: Fri, 4 Sep 2026 17:35:57 +0530 Message-ID: <20260904120601.18363-3-hemanth.selam@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20260904120601.18363-1-hemanth.selam@gmail.com> References: <20260904120601.18363-1-hemanth.selam@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Drop words accidentally written twice, reported by checkpatch.pl as a possible repeated word. Only touches comments, no code changes. Assisted-by: Cursor:claude-opus-5 Signed-off-by: Hemanth Selam Reviewed-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 4 ++-- drivers/gpu/drm/msm/msm_gem.c | 4 ++-- drivers/gpu/drm/msm/msm_gem_shrinker.c | 2 +- include/uapi/drm/msm_drm.h | 4 ++-- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/ad= reno/a6xx_gmu.c index 27cac853975f..16fed0066f00 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -1759,7 +1759,7 @@ static int a6xx_gmu_rpmh_arc_votes_init(struct device= *dev, u32 *votes, } =20 /* - * Look for a level in in the secondary list that matches. If + * Look for a level in the secondary list that matches. If * nothing fits, use the maximum non zero vote */ =20 @@ -2378,7 +2378,7 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct d= evice_node *node) if (ret) goto err_memory; =20 - /* Allocate memory for for the HFI queues */ + /* Allocate memory for the HFI queues */ ret =3D a6xx_gmu_memory_alloc(gmu, &gmu->hfi, SZ_16K, 0, "hfi"); if (ret) goto err_memory; diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index c4cff3d53d81..7ad450b574bf 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -502,8 +502,8 @@ void msm_gem_unpin_locked(struct drm_gem_object *obj) =20 /* Special unpin path for use in fence-signaling path, avoiding the need * to hold the obj lock by only depending on things that a protected by - * the LRU lock. In particular we know that that we already have backing - * and and that the object's dma_resv has the fence for the current + * the LRU lock. In particular we know that we already have backing + * and that the object's dma_resv has the fence for the current * submit/job which will prevent us racing against page eviction. */ void msm_gem_unpin_active(struct drm_gem_object *obj) diff --git a/drivers/gpu/drm/msm/msm_gem_shrinker.c b/drivers/gpu/drm/msm/m= sm_gem_shrinker.c index 9d2788f79ace..d84cbb64bc56 100644 --- a/drivers/gpu/drm/msm/msm_gem_shrinker.c +++ b/drivers/gpu/drm/msm/msm_gem_shrinker.c @@ -47,7 +47,7 @@ with_vm_locks(void (*fn)(struct drm_gem_object *obj), struct drm_gem_object *obj) { /* - * Track last locked entry for for unwinding locks in error and + * Track last locked entry for unwinding locks in error and * success paths */ struct drm_gpuvm_bo *vm_bo, *last_locked =3D NULL; diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h index 3d363f12f66a..9b6b30189230 100644 --- a/include/uapi/drm/msm_drm.h +++ b/include/uapi/drm/msm_drm.h @@ -102,7 +102,7 @@ struct drm_msm_timespec { * * With VM_BIND enabled, userspace does not include a submit_bo table in t= he * SUBMIT ioctl (this will be rejected), the resident set is determined by - * the the VM_BIND ops. + * the VM_BIND ops. * * Enabling VM_BIND will fail on devices which do not have per-process pgt= ables. * And it is not allowed to disable VM_BIND once it has been enabled. @@ -366,7 +366,7 @@ struct drm_msm_vm_bind_op { __u64 obj_offset; /** @iova: Address to operate on */ __u64 iova; - /** @range: Number of bites to to map/unmap */ + /** @range: Number of bites to map/unmap */ __u64 range; /** @flags: Bitmask of MSM_VM_BIND_OP_FLAG_x */ __u32 flags; --=20 2.48.1