From nobody Sat Sep 26 04:31:01 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2B8A388E43; Fri, 4 Sep 2026 19:49:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551402; cv=none; b=P9UqmX8vn/+4vPGvvy5bDbW7ov0wdew/crhC1Rfl5nEDZJfspooa87IGJ4/cbUYslADJFo76+b+uoro0qkPKuKslBZ/2C+5KjoiYixlp3sf58/DIeo6NyH9IjQNtYeXRSBu7ATWLTjCrnX3osYWid5FBrKwUZLHS1AE2pYhJK6I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551402; c=relaxed/simple; bh=rI32QZw98we+ntHwY9st1ekgx9DWK4kBa8XWenvbwZg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jYvWkOYjQrumHalGe/ayRK7LnQO7astxSzGr4gLi/XMMvbQDpUQtGN+5Ck2XNsp8ZXNEz0ABHftcG7WqNSQENiOilIwoHXCM+GBSPX1TYyLRUq2hwQv/87hsM2TOd+QTZL6GHnml3O60TxsbCgtMF411Yh74akguc/lazlonDdM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=tVWtVHW0; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="tVWtVHW0" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1788551392; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=t9kPiXnFYja0TaA3Fv1fam8HrPrCv5WaiJ5ki+auGng=; b=tVWtVHW0ZeXN31E9KQgHkWz7KBNDJKy3pQ3XooH4GfStsHTHFsi8g0AR8q4zRzn3whVAoH EVG+zXPWYhyRU7Yktd+LEC/4FG6CzJcOCQXO6zXTYcAdhZxxZwjZxaEovzcbkyU/L8q3X/ fx3kHwcNZIKTXc9SuVHqtOO0TeVnh7g= Date: Fri, 04 Sep 2026 21:49:34 +0200 Subject: [PATCH 1/6] dt-bindings: arm: cpus: Add Apple A18 Pro CPU core compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260904-apple-a18-pro-initial-devicetrees-v1-1-0c25401d165d@cyberchaos.dev> References: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> In-Reply-To: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian Add "apple,tahiti-e" and "apple,tahiti-p" compatibles for the A18 Pro efficiency and performance CPU cores respectively. As with the M4 cores, there is no longer a generational codename, so we assign the core compatible based on SoC codename ("Tahiti") plus core type (E-Core / P-Core). Signed-off-by: Yureka Lilian Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentatio= n/devicetree/bindings/arm/cpus.yaml index c3facc98bf83..9c02cc7e4b37 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -95,6 +95,8 @@ properties: - apple,mistral - apple,monsoon - apple,sawtooth + - apple,tahiti-e + - apple,tahiti-p - apple,twister - apple,typhoon - arm,arm710t --=20 2.55.0 From nobody Sat Sep 26 04:31:01 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2DD7E3A872C; Fri, 4 Sep 2026 19:49:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551403; cv=none; b=kjOZlwe2mBC6dC86MWvgGfavLKz/zzmKA+4BEMCSK4oLD+CEL2CFnE314N2lTYfmoYXmzQhDnD7tyJcqKwhY+zLPSWDZWab8I436PEstkWyI10HM94ztTbN+p+2F9rkNpp0VLvL4F3WK9hXWbyKxMlWK03Zeo7Dlakt8qFJora8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551403; c=relaxed/simple; bh=7Gcnf5wCDoLtr4HIfOgKcPzRilxfUnW8awfERfv910s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OCPhVVwihDQIoarrn6GVgjaWT42Tu8xaWdqeSu8SwQZyb3wCZzKYdxmEd+GDLRTvyLgerKIJW81vgZgeaMRNWimd9vnaFoKeswz/f0qt5Jwn6ZwGYLvGixEDxYrDWjTlTffbrI+t0ScauVZegaOiaV3Yr4lHxU3Iyu95oFLmEU4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=pgS0yDhQ; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="pgS0yDhQ" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1788551393; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=a7TJP6C/Qw+F87kAw4tMQffqwL/vexUGjzH8ez3okMs=; b=pgS0yDhQ6/AJ3YT8siKQ5zNoq981WT1j3XtdWCFqEa8ay20AocZtID9b+KFzVp//Df9C9m YFNtGMQU+Ui8AL5hw7DPzXSYKW5RPf0qd0/KAe9epZ5kYjm8C0P0YlxFbRTGe9viofYp58 oRinQQX949VtWLgXMN175FAq/8fY460= Date: Fri, 04 Sep 2026 21:49:35 +0200 Subject: [PATCH 2/6] dt-bindings: arm: apple: apple,pmgr: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260904-apple-a18-pro-initial-devicetrees-v1-2-0c25401d165d@cyberchaos.dev> References: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> In-Reply-To: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The PMGR blocks on the Apple silicon A18 Pro SoC (t8140) is compatible with the M1-M4 SoCs. Add "apple,t8140-pmgr" as A18 Pro specific compatible. Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/arm/apple.yaml | 11 +++++++++= ++ Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 + 2 files changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 5d87a4fef193..7c3e7131a5e7 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -82,6 +82,10 @@ description: | - iPhone 8 Plus - iPhone X =20 + Devices based on the "A18 Pro" SoC: + + - MacBook Neo (A18 Pro, 2026) + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -300,6 +304,13 @@ properties: - const: apple,t8015 - const: apple,arm-platform =20 + - description: Apple A18 Pro SoC based platforms + items: + - enum: + - apple,j700 # MacBook Neo (A18 Pro, 2026) + - const: apple,t8140 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/= Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml index da660fa13f77..bf21a5b3a4ac 100644 --- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml +++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml @@ -42,6 +42,7 @@ properties: - apple,t6031-pmgr - apple,t8122-pmgr - apple,t8132-pmgr + - apple,t8140-pmgr - const: apple,t8103-pmgr - const: syscon - const: simple-mfd --=20 2.55.0 From nobody Sat Sep 26 04:31:01 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3AF123B27DC; Fri, 4 Sep 2026 19:49:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551403; cv=none; b=nEvCYqk5oa4xxXbKnt/HVFftYvL6/TRsxtrIGcHcWK5zAkxOO4Shy0fLX74OoAOpit9DW56inpJGGsl8e48xjwCfiCf+lBUScIkXI0FQBml4664D62KPQ5Oui/SNVmZQolAibNB+XIKRQuS4nUjP8MxQh/KDUUq+SqPDjj7N3fI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551403; c=relaxed/simple; bh=tEPA6uRdYuQ6PY6zBqXkquvyO5/4DfLy75Cass7/Zyw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DZWcKltT3wjkyl3XLreZxrA7zYUVnFknHh/LTsyWjmAM9MRR1HsRtiSeUITXmJBDVbwhRmPZsAHfHMo6ZwFhj6tD20d5IuNGDczLNP6Bx7dobNybX1ChFcDa0d1OJlnj+FYNAgQY9wLX8eJsoxlshPJ220YktZYgutD/gyjJWxQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=FHQrs/iB; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="FHQrs/iB" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1788551395; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MnQifhsyepgUfl4SRUFqkKt3aBBkCt2ItCLaLcqAOuc=; b=FHQrs/iBkK93NwDUDAltwIWR4AePBtQMwY68TLgCqyxrEm2asYvfonuUbA4Fn7ehDML64z oKLCU98/XLEWnRXh5cYdAYuzOwUjuOGUoaSWpBv5DtoTiI83cy/nxydANNAqzTMwGfBqYc UkBPfsuseMWiYkFsc6weo5xfJgVfzmA= Date: Fri, 04 Sep 2026 21:49:36 +0200 Subject: [PATCH 3/6] dt-bindings: arm: power: apple,pmgr-pwrstate: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260904-apple-a18-pro-initial-devicetrees-v1-3-0c25401d165d@cyberchaos.dev> References: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> In-Reply-To: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The device power state management of the PMGR blocks on the Apple silicon A18 Pro SoC (t8140) is compatible with the M1-M4 SoCs. Add "apple,t8140-pmgr-pwrstate" as A18 Pro specific compatible. Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.ya= ml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml index b24ea8e54e11..dcffdd12c8c7 100644 --- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -49,6 +49,7 @@ properties: - apple,t6031-pmgr-pwrstate - apple,t8122-pmgr-pwrstate - apple,t8132-pmgr-pwrstate + - apple,t8140-pmgr-pwrstate - const: apple,t8103-pmgr-pwrstate =20 reg: --=20 2.55.0 From nobody Sat Sep 26 04:31:01 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 320973B71D9; Fri, 4 Sep 2026 19:49:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551404; cv=none; b=HJwWuXwjesZjOxG3QF9lHVUmcgTIbtknR+ViWSJkyoPzEVjhfwwXqOvsyAN5AEKNftF4Aot2G6+3be4GmRyO33GltWemfP4by2TohpYKNxrALVeduajp6+yezp10GHuXW9zEZHRIQEVnV8v+R4S7eTJ/ny4nldvKaklQ5ZtgufE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551404; c=relaxed/simple; bh=/OmSYrm0FCFYc9hbupI51jfnKBd1bG7XnXmGhQ5kzOU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gMV3XX1NK2u3iRyshvGQ7qI9Xzqjj/lxSj494CYSChGFH47f0FZFwoDOG1Nq8qffXLYHdXAACLtK15pF5JwlkRwl03gDS2Us4yXOca+AmTVZV5B7IySRDn5AEktq/mPeOW7BhSs1+RfYqQrXydih1P6qcnYvw6izRj4bB/4x0bU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=orRiY2wu; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="orRiY2wu" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1788551397; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hfhvNN0fjj6swoLbh/0FaAvtFZVMTHuJaXk4F3s84AQ=; b=orRiY2wupK3rLMxbW7L52E0Jw+dWTnnQVzD/aWVuK+WPPOXvHsSLmDRxg7jotHxutG2teS 2UyI5PdGLzzh3x4DaxZX6cJBZeCPOU+ptB9S4BW4d30lyhcrTwJI2Y/7KQ6k6OBozv4T4Y 95kGdKad823Wl8Vzt+JWP7iCbysTt3c= Date: Fri, 04 Sep 2026 21:49:37 +0200 Subject: [PATCH 4/6] dt-bindings: interrupt-controller: apple,aic2: Add apple,t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260904-apple-a18-pro-initial-devicetrees-v1-4-0c25401d165d@cyberchaos.dev> References: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> In-Reply-To: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The Apple t8140 (A18 Pro) SoC uses an AIC3 as interrupt controller, same as the M1-M4 SoCs. Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml | 1= + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic= 2.yaml index 1cb886785173..e3cadc5ad39d 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -46,6 +46,7 @@ properties: - apple,t6030-aic3 - apple,t6031-aic3 - apple,t8132-aic3 + - apple,t8140-aic3 - const: apple,t8122-aic3 - const: apple,t8122-aic3 =20 --=20 2.55.0 From nobody Sat Sep 26 04:31:01 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9C553939B0; Fri, 4 Sep 2026 19:50:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551408; cv=none; b=rSvw7zAG5z3UZlbuc2X29Mb2EIWp0vTq6O91vgG3eMKP5tj3nfUGlLeYA+2F9rA7/5nbSxUPjS0oCGEM7LWcc7DzMfqtzI9WHGQL9XfhQVQu3vwKHkJONiGzRFPcqZTlphPOlkEdvHO3b47nGy7qYLMQ+C36lbXokxDys0q3zMg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551408; c=relaxed/simple; bh=CXj+icXWNtP+kWIdP0einQIx1r24LE2szcQxXlI1FL4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OhF3I2QlmOaP7P5IneeW2Lrb9a8030tZ9Lw94U3y0SdSRT+Huc3wcUnkw4eb/i22ANq0EU6vSOoy/pFBcu7GtaFrb3Dx//lNXjB3luwDk8TMOPs2rO3dteSFx45EPwUas+p4X6pYzIDbi27mzCV1++B1aVJHTGc395PyCMk2KOg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=nVRBG4E/; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="nVRBG4E/" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1788551398; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=03++u1hMJUN4CZOnETD7tedBCxAbjIXy0LEGbGeWhRE=; b=nVRBG4E/PeFU3TVNNZq9jmhM9oC8orfOE0SM/nLoLI9Jb25QDoa6i/Z385rmKqw9oAn04E ZQb/PGvX0RxghI3/613mbbsW1lLzjYEZZUxzJaiQj7kBaR9CL8FM/DbiLcWh1/4PfRtRNs Abjw+at8jUcdu38LoKyZQkMtsosmC2o= Date: Fri, 04 Sep 2026 21:49:38 +0200 Subject: [PATCH 5/6] dt-bindings: watchdog: apple,wdt: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260904-apple-a18-pro-initial-devicetrees-v1-5-0c25401d165d@cyberchaos.dev> References: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> In-Reply-To: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The watchdog on the Apple t8140 (A18 Pro) SoC is compatible with the M1-M4 SoCs. Add "apple,t8140-wdt" as SoC specific compatible. Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/watchdog/apple,wdt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml b/Do= cumentation/devicetree/bindings/watchdog/apple,wdt.yaml index ca4cf01db59f..1af924157f7c 100644 --- a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml @@ -22,6 +22,7 @@ properties: - apple,t6031-wdt - apple,t8122-wdt - apple,t8132-wdt + - apple,t8140-wdt - const: apple,t8103-wdt - items: - enum: --=20 2.55.0 From nobody Sat Sep 26 04:31:01 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8240B37DE9F; Fri, 4 Sep 2026 19:50:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551412; cv=none; b=qae8y4KH5Y7zTUp+U+9kqFLAYG3h5H5N6g2DVemeWEzeWVmeHjqWyu92DEkRS0a85TGRY38YDzmhf0aSw7Yr4en+Zr/3OQUThvEjGDxGHP6xYmuLo9ORDH29l+MUAeH48WFLPLmh/B6RmBq7DVPtOef96vE4psrQlmLtMGlb2Zc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788551412; c=relaxed/simple; bh=TUgrPk7LQlk6fJ6MiGWRKtJluvW2+jvjrJ24KS2adCQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dinGN3qD0R80CAdMcdMpE9pc9J37k5/bZbNSOnd3VFBLollOF/yVscGOIRmKcqwy184vd8l3zPx4hyw0oTRjGWNfkkd/NWJ97nJkcwQ+YArf/e2K2BZSM3g8yqWtaW+ODR6D6AoSvhwBXQRNNtMvb27U+EBsoKyVS7sH5em1w6M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=x9bSw8lm; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="x9bSw8lm" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1788551399; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wBwuTdxte3hCBRhbW+JPwJ8NkC6n0iOPKgCj3HD8aEA=; b=x9bSw8lmjHHHlHNi/voq1IUaxLaUFxwgcPYyAU/sAnVpPYI2eSh9Lpn6U2S+jZdyhn/3Pp we3/+rrXC7M0RBrbP+uqJMn5oJgACgHeO6MjZLxWq1PVlt+usYHMnBXLZ6BCN2wRcKIQ9a or3191oVDjPb4mTqer5NMAP+RypDyeQ= Date: Fri, 04 Sep 2026 21:49:39 +0200 Subject: [PATCH 6/6] arm64: dts: apple: Add minimal MacBook Neo device tree Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260904-apple-a18-pro-initial-devicetrees-v1-6-0c25401d165d@cyberchaos.dev> References: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> In-Reply-To: <20260904-apple-a18-pro-initial-devicetrees-v1-0-0c25401d165d@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian Added a device tree for the MacBook Neo, which uses the t8140 SoC (A18 Pro) also found in the iPhone 16 Pro. The device tree has a minimal set of devices limited to CPU cores, interrupt controller, watchdog, serial and framebuffer. Using the macOS 26.6.2 iBoot/firmware, the machine reliably boots on a single core using the stock kernel. Booting with smp requires avoiding the wfi and wfit instructions in the idle loop and `delay()` respectively, since those instructions cause a loss of architectural state on the secondary cores. Signed-off-by: Yureka Lilian --- arch/arm64/boot/dts/apple/Makefile | 1 + arch/arm64/boot/dts/apple/t8140-j700.dts | 52 ++ arch/arm64/boot/dts/apple/t8140-pmgr.dtsi | 771 ++++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t8140.dtsi | 202 ++++++++ 4 files changed, 1026 insertions(+) diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index 62999574a36b..4f31beeb11ac 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -109,3 +109,4 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j624.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j713.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j715.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j773g.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8140-j700.dtb diff --git a/arch/arm64/boot/dts/apple/t8140-j700.dts b/arch/arm64/boot/dts= /apple/t8140-j700.dts new file mode 100644 index 000000000000..029d6fdda3ad --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8140-j700.dts @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Neo + * + * target-type: J700 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8140.dtsi" + +/ { + compatible =3D "apple,j700", "apple,t8140", "apple,arm-platform"; + model =3D "Apple MacBook Neo"; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + /* To be filled by loader */ + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x100 0 0x2 0>; /* To be filled by loader */ + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8140-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t8140-pmgr.dtsi new file mode 100644 index 000000000000..91bdb84510fd --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8140-pmgr.dtsi @@ -0,0 +1,771 @@ +&pmgr { + ps_sep_aon: power-controller@60 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sep_aon"; + apple,always-on; + }; + + ps_msg: power-controller@108 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msg"; + }; + + ps_aic: power-controller@110 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aic"; + apple,always-on; + }; + + ps_dwi: power-controller@118 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dwi"; + }; + + ps_gpio: power-controller@120 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gpio"; + }; + + ps_pmc: power-controller@138 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmc"; + }; + + ps_pms_fpwm0: power-controller@140 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm0"; + }; + + ps_pms_fpwm1: power-controller@148 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm1"; + }; + + ps_pms_fpwm2: power-controller@150 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm2"; + }; + + ps_pms_fpwm3: power-controller@158 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm3"; + }; + + ps_pms_fpwm4: power-controller@160 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x160 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm4"; + }; + + ps_pms_c1ppt: power-controller@168 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_c1ppt"; + apple,always-on; + }; + + ps_soc_rc: power-controller@170 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x170 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_rc"; + }; + + ps_soc_dpe: power-controller@178 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x178 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_dpe"; + apple,always-on; + }; + + ps_pmgr_soc_ocla: power-controller@180 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmgr_soc_ocla"; + }; + + ps_ispsens0: power-controller@188 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x188 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ispsens0"; + }; + + ps_ispsens1: power-controller@190 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x190 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ispsens1"; + }; + + ps_ap_tmm: power-controller@1a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ap_tmm"; + }; + + ps_afggfxni0: power-controller@1b8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "afggfxni0"; + apple,always-on; + }; + + ps_gfx: power-controller@1f0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gfx"; + }; + + ps_jpg: power-controller@230 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "jpg"; + }; + + ps_msr: power-controller@238 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x238 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr"; + }; + + ps_venc0_sys: power-controller@240 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc0_sys"; + }; + + ps_prores: power-controller@250 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "prores"; + }; + + ps_apcie_gp: power-controller@258 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x258 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_gp"; + }; + + ps_isp_sys: power-controller@268 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "isp_sys"; + }; + + ps_ans: power-controller@278 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x278 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ans"; + apple,always-on; + }; + + ps_disp_sys: power-controller@280 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x280 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_sys"; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_dispext0_sys: power-controller@288 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x288 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_sys"; + }; + + ps_ane_sys: power-controller@290 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x290 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_sys"; + }; + + ps_msr_ase_core: power-controller@298 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x298 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr_ase_core"; + power-domains =3D <&ps_msr>; + }; + + ps_apcie_sys_gp: power-controller@2a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_sys_gp"; + power-domains =3D <&ps_apcie_gp>; + }; + + ps_sio_cpu: power-controller@2a8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio_cpu"; + }; + + ps_fpwm0: power-controller@2b0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm0"; + }; + + ps_fpwm1: power-controller@2b8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm1"; + }; + + ps_fpwm2: power-controller@2c0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm2"; + }; + + ps_i2c0: power-controller@2c8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c0"; + }; + + ps_i2c1: power-controller@2d0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c1"; + }; + + ps_i2c2: power-controller@2d8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c2"; + }; + + ps_i2c3: power-controller@2e0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c3"; + }; + + ps_i2c4: power-controller@2e8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c4"; + }; + + ps_spi_p: power-controller@2f0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi_p"; + }; + + ps_uart_p: power-controller@2f8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_p"; + }; + + ps_dpa_p: power-controller@300 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa_p"; + apple,always-on; + }; + + ps_aes: power-controller@308 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x308 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aes"; + }; + + ps_apcie_st: power-controller@310 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x310 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_st"; + power-domains =3D <&ps_ans>; + }; + + ps_disp_fe: power-controller@318 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x318 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_fe"; + power-domains =3D <&ps_disp_sys>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_dispext0_fe: power-controller@320 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x320 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_fe"; + power-domains =3D <&ps_dispext0_sys>; + }; + + ps_dispext0_cpu: power-controller@328 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x328 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_cpu"; + power-domains =3D <&ps_dispext0_fe>; + + status =3D "disabled"; /* Locked, don't touch it */ + }; + + ps_spi0: power-controller@330 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x330 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi0"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi1: power-controller@338 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x338 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi1"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi2: power-controller@340 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x340 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi2"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi3: power-controller@348 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x348 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi3"; + power-domains =3D <&ps_spi_p>; + }; + + ps_qspi: power-controller@350 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x350 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "qspi"; + power-domains =3D <&ps_spi_p>; + }; + + ps_uart_n: power-controller@358 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x358 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_n"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart0: power-controller@360 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x360 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart0"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart1: power-controller@368 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x368 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart1"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart2: power-controller@370 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x370 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart2"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart3: power-controller@378 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x378 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart3"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart4: power-controller@380 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x380 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart4"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart5: power-controller@388 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x388 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart5"; + power-domains =3D <&ps_uart_p>; + }; + + ps_dpa0: power-controller@390 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x390 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa0"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_dpa1: power-controller@398 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x398 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa1"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_apcie_sys_st: power-controller@3a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_sys_st"; + power-domains =3D <&ps_ans>, <&ps_apcie_st>; + }; + + ps_apcie_phy_sw: power-controller@3c0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_phy_sw"; + power-domains =3D <&ps_apcie_sys_st>, <&ps_apcie_sys_gp>; + }; + + ps_pmp: power-controller@3d0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmp"; + apple,always-on; + }; + + ps_pms_sram: power-controller@3d8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_sram"; + apple,always-on; + }; + + ps_atc0_usb_aon: power-controller@3e0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb_aon"; + }; + + ps_atc0_common: power-controller@3e8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_common"; + power-domains =3D <&ps_atc0_usb_aon>; + }; + + ps_atc0_usb: power-controller@3f0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb"; + power-domains =3D <&ps_atc0_common>; + }; + + ps_sep: power-controller@c00 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc00 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sep"; + apple,always-on; + }; + + ps_venc0_dma: power-controller@8000 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc0_dma"; + power-domains =3D <&ps_venc0_sys>; + }; + + ps_venc0_pipe4: power-controller@8008 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc0_pipe4"; + power-domains =3D <&ps_venc0_dma>; + }; + + ps_venc0_pipe5: power-controller@8010 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc0_pipe5"; + power-domains =3D <&ps_venc0_dma>; + }; + + ps_venc0_me0: power-controller@8018 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc0_me0"; + power-domains =3D <&ps_venc0_dma>; + }; + + ps_venc0_me1: power-controller@8020 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc0_me1"; + power-domains =3D <&ps_venc0_me0>; + }; +}; + +&pmgr_mini { + ps_debug_gated: power-controller@0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_gated"; + apple,always-on; + }; + + ps_nub_spmi0: power-controller@58 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x58 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi0"; + apple,always-on; + }; + + ps_nub_spmi1: power-controller@60 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi1"; + apple,always-on; + }; + + ps_nub_spmi_a0: power-controller@68 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x68 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi_a0"; + apple,always-on; + }; + + ps_nub_aon_nogate: power-controller@78 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x78 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_aon_nogate"; + apple,always-on; + }; + + ps_nub_ocla: power-controller@80 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x80 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_ocla"; + apple,always-on; + }; + + ps_nub_gpio: power-controller@88 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x88 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_gpio"; + apple,always-on; + }; + + ps_nub_fabric: power-controller@a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_fabric"; + apple,always-on; + }; + + ps_nub_sram: power-controller@a8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_sram"; + apple,always-on; + }; + + ps_debug_switch: power-controller@b0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_switch"; + apple,always-on; + }; + + ps_smc_i2cm0: power-controller@8028 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8028 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "smc_i2cm0"; + apple,always-on; + }; + + ps_smc_i2cm1: power-controller@8030 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8030 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "smc_i2cm1"; + apple,always-on; + }; + + ps_smc_i2cm2: power-controller@8038 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8038 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "smc_i2cm2"; + apple,always-on; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8140.dtsi b/arch/arm64/boot/dts/app= le/t8140.dtsi new file mode 100644 index 000000000000..a1c6976abd50 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8140.dtsi @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T8140 "A18 Pro" SoC + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include + +/ { + compatible =3D "apple,t8140", "apple,arm-platform"; + + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu_e0>; + }; + core1 { + cpu =3D <&cpu_e1>; + }; + core2 { + cpu =3D <&cpu_e2>; + }; + core3 { + cpu =3D <&cpu_e3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu_p0>; + }; + core1 { + cpu =3D <&cpu_p1>; + }; + }; + }; + + cpu_e0: cpu@0 { + compatible =3D "apple,tahiti-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x0>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e1: cpu@1 { + compatible =3D "apple,tahiti-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x1>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + + cpu_e2: cpu@2 { + compatible =3D "apple,tahiti-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x2>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e3: cpu@3 { + compatible =3D "apple,tahiti-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x3>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_p0: cpu@10100 { + compatible =3D "apple,tahiti-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10100>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p1: cpu@10101 { + compatible =3D "apple,tahiti-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10101>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + l2_cache_0: l2-cache-0 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x400000>; + }; + + l2_cache_1: l2-cache-1 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x1000000>; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + soc: soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + nonposted-mmio; + ranges; + + pmgr: power-management@300700000 { + compatible =3D "apple,t8140-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x3 0x700000 0 0x14000>; + /* child nodes are added in t8140-pmgr.dtsi */ + }; + + aic: interrupt-controller@301000000 { + compatible =3D "apple,t8140-aic3", "apple,t8122-aic3"; + #interrupt-cells =3D <3>; + interrupt-controller; + reg =3D <0x00000003 0x01000000 0x00000000 0x1cc000>, + <0x00000003 0x01040000 0x00000000 0x4000>; + reg-names =3D "core", "event"; + power-domains =3D <&ps_aic>; + }; + + pmgr_mini: power-management@308280000 { + compatible =3D "apple,t8140-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x3 0x8280000 0 0xc000>; + /* child nodes are added in t8140-pmgr.dtsi */ + }; + + wdt: watchdog@3082b0000 { + compatible =3D "apple,t8140-wdt", "apple,t8103-wdt"; + reg =3D <0x3 0x082b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + serial0: serial@385200000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x3 0x85200000 0x0 0x1000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + power-domains =3D <&ps_uart0>; + status =3D "disabled"; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts =3D , + , + , + ; + }; +}; + +#include "t8140-pmgr.dtsi" --=20 2.55.0