From nobody Sat Sep 26 07:17:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4A954A840D; Thu, 3 Sep 2026 14:26:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445575; cv=none; b=drJCpXk6xWYji8aH9dngTeBM1vWG0DotXqaAsLotOHGPPjzsgJ2VddBSISoiPAdkRXkpTZhF2l63YQ81E/DzTDIC5+wGiJixYEZKY8D9KfA1mInPYwil1lptsWsE/+lJvodjzzATGS3GrxxD2qOhV/qa8FYhzkC4ooDp1Jo8fEM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445575; c=relaxed/simple; bh=Q1DOl60bHS9UnmnIzH926XALNW+28wLZxRACSD8hgzY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SbrsjnEPK6rN4lyQ6lp6vnlqjU26An88m/N++pMoN8iekyuse6o8yNOJh3O0M2217CMcrH0R369MsiBj63tRZQyFsy5LU0EeZuTmewM2XCUKxOtPFyPoHbX+BGN/AvY1Jac+FjxmLPvM5rpvcruYghWVay6uby4H2KsMZmLLDMo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cl70xdrE; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cl70xdrE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5E9E61F00AC4; Thu, 3 Sep 2026 14:25:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788445558; bh=U1VpKqvp7w9GiUTdyv1Yq5Vmr0sLvhe9R984T66YXe4=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=cl70xdrEpL5VuKLph2LJ+QvV+X95eBKCLlPt+OzeaMwAGfG+KtgZ1ERcEKy+3GqQ8 dZbbd94hR7Qo1USuzaxTHlIyho8iinrf5qIFg1dc1favbryHQ7MxFJAxHp2cgi2hcC 5VObi/FSWHhe9tPziD5IJQJzI5uD58jl6CfC4C90lHK0OyrA0Igo9kND1paN0bNgh/ x/pXfnWywuP1WTZhnHi03dZSqzPGxrPtNl+RSDF84gVlSEwz1bfbJvDItIRwK4o1r1 0S42vByNKk3I/Nltm7Fqejik5rsJ4ios/WfLlIwD2cNfelbwQmjDZdTsquJI53SuYF 1fthe9VyNRxcw== From: Konrad Dybcio Date: Thu, 03 Sep 2026 16:25:28 +0200 Subject: [PATCH v2 1/5] dt-bindings: phy: qcom,qusb2: Straighten out SM6125 and MSM8996 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260903-topic-8996_61x5_qusb2phy-v2-1-4c3f980a4560@oss.qualcomm.com> References: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> In-Reply-To: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Iskren Chernev , Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Krzysztof Kozlowski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788445548; l=3008; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=NVT6i3vnZNQ01gYcWSJoxC0tlXCG33lDuqYHjOCEbe8=; b=egkLQxU7TjgcozG9W+GicTgJwQ412eZ2pGoXx24RkzTve/JJ3G7JRkMzzHH+W+/YKiJK0yyXT wIcYA2QppljBK3UBxWHQ86CQai6bLYQnvA3KCvs6tPkbXt4OfuyUNgy X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio SM6125 DT currently uses just the MSM8996 compatible (without a primary SM6125-specific one). This is not only wrong for the reasons of violating guidelines, but also happens to not be valid. The MSM8996 PHY is quite similar, although it requies a different init sequence (for arch reasons). MSM8996 also needs different power plumbing, as the VDD supply is fed through VDD_MX (which we define as a power domain rather than a regulator), unlike on SM6125. The init sequence seems to have been "good enough", but now that the bindings clearly diverge, add a new compatible for SM6125 with a SM6115 fallback (as they seem to be an exact match from the SW interface POV). Reviewed-by: Krzysztof Kozlowski Signed-off-by: Konrad Dybcio --- .../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 31 ++++++++++++++++++= ++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Do= cumentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml index 001fd0ccc985..cfc5a1d16b7f 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml @@ -31,6 +31,9 @@ properties: - qcom,shikra-qusb2-phy - qcom,sm4250-qusb2-phy - qcom,sm6115-qusb2-phy + - items: + - const: qcom,sm6125-qusb2-phy + - const: qcom,sm6115-qusb2-phy - items: - enum: - qcom,ipq5210-qusb2-phy @@ -62,6 +65,12 @@ properties: - const: ref - const: iface =20 + power-domains: + maxItems: 1 + + required-opps: + maxItems: 1 + vdd-supply: description: Phandle to 0.9V regulator supply to PHY digital circuit. @@ -165,7 +174,6 @@ required: - "#phy-cells" - clocks - clock-names - - vdd-supply - vdda-pll-supply - vdda-phy-dpdm-supply - resets @@ -187,6 +195,22 @@ allOf: qcom,preemphasis-width: false qcom,hsdisc-trim-value: false =20 + # On MSM8996, VDD is supplied via the MX power domain + - if: + properties: + compatible: + const: qcom,msm8996-qusb2-phy + then: + required: + - power-domains + - required-opps + else: + properties: + power-domains: false + required-opps: false + required: + - vdd-supply + additionalProperties: false =20 examples: @@ -201,10 +225,13 @@ examples: <&gcc GCC_RX1_USB2_CLKREF_CLK>; clock-names =3D "cfg_ahb", "ref"; =20 - vdd-supply =3D <&pm8994_l28>; vdda-pll-supply =3D <&pm8994_l12>; vdda-phy-dpdm-supply =3D <&pm8994_l24>; =20 resets =3D <&gcc GCC_QUSB2PHY_PRIM_BCR>; + + power-domains =3D <&rpmpd_mx>; + required-opps =3D <&rpmpd_opp4>; + nvmem-cells =3D <&qusb2p_hstx_trim>; }; --=20 2.55.0 From nobody Sat Sep 26 07:17:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4FB34B270D; Thu, 3 Sep 2026 14:26:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445579; cv=none; b=eoSPm3BT7Lhoim5ovLEoYJBYPZk599W8jqDiCmGrCWKt8zkjYDIR063L/7VyQKiKrhKuaCL/wqyNI+MHrc5qS4aVkxS5nbz2EaQW8MookLxbDyjEyfMEF7BZRk5Y5+BBAuMedpz7MxBSoFbt53oX/qPCxwuAO3gGUI5pLH4f7Xg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445579; c=relaxed/simple; bh=3yZpO0T8cOfYv2xOGD/vlS/y9Cv6KbnA9HwbljP7vFM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=B1ClygXCYHNB28m1J7dG7nRKZraiNtBZ4sMssTx6HxaOjzHYAEnCAiiWbCakyK7Eg9fW7jowI8q6A/FNsRDs/47qB0JZjVeLj0yRyZFhwlEV7qXVlynBkY4GILNdpCobZvwQD7vVs/oksYBxSCb/Uoql7pG2Y7NXDdxProC3sik= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KuJtjeEE; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KuJtjeEE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 51FE31F00A3E; Thu, 3 Sep 2026 14:25:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788445563; bh=szTE7oxjGO1q0rDmbrRjqpRbvKMsDFT7DQcrAnd6QNQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=KuJtjeEEOlzYTgPSKVUD9cITXoLC/kHOzgDmFXLtvgFC9kqXJTgUnRozc/P6q3GrC cMVosR6V4RiqibwbpJKw1Xyogh24VDSFb8UlWPb6G1L6tkKCF/JaBEuxSwD69WKxsV L0W369drdGWfsd82xBlJXvDYgRLTZy72bR8nE/YQ22ulCDNLky5z1KMSjRX6ZFFGcy xvkw7u3JZU1bJOUKRnQz89JTC0eR5eBt6pxH7JMDQQ5rANoo4/rvgBiGQerHE0524N pVT1Fm8Lcv5sU2lM5CV1M8ulrbsIB15XdgLXVnDEP/sMQy0BPK4MX6fHmcK/VtkVMb wOlv71hY5r1ow== From: Konrad Dybcio Date: Thu, 03 Sep 2026 16:25:29 +0200 Subject: [PATCH v2 2/5] phy: qcom-qusb2: Fix SM6115 init sequence Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260903-topic-8996_61x5_qusb2phy-v2-2-4c3f980a4560@oss.qualcomm.com> References: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> In-Reply-To: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Iskren Chernev , Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov , Abel Vesa X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788445548; l=1555; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=oMc/6LTLND3zy+WxNttgbZvp9ei0vRh1b3QcNq5NL/c=; b=4ZFXEsoiNSU0xzEQW8oLZXSeyApctJcdq0Crakry0Yte6twMCFztCYYtIGfyD497Aj8lJylrb VBQGvqJBhKXAkSD0WjT05dJCIcJ00kGpF1gwGJMuGpeGq2U3HOQ8yKd X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio I don't know where the existing one came from, but it's apparently wrong, according to both docs and a downstream DT [1]. Fix it up. The updated values also happen to match SM6125, which will allow us to fix that platform too. [1] https://android.googlesource.com/kernel/msm-extra/devicetree/+/refs/hea= ds/android-msm-bramble-4.19-android11-qpr1/qcom/bengal-usb.dtsi#145 Fixes: 7756f1d6369e ("phy: qcom-qusb2: Add configuration for SM4250 and SM6= 115") Reviewed-by: Dmitry Baryshkov Reviewed-by: Abel Vesa Signed-off-by: Konrad Dybcio --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/p= hy-qcom-qusb2.c index 2e5fdb620cb2..aac36ed994b1 100644 --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c @@ -233,9 +233,9 @@ static const struct qusb2_phy_init_tbl msm8998_init_tbl= [] =3D { =20 static const struct qusb2_phy_init_tbl sm6115_init_tbl[] =3D { QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xf8), - QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0x53), + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0xb3), QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE3, 0x81), - QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0x17), + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0xc0), =20 QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TUNE, 0x30), QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL1, 0x79), --=20 2.55.0 From nobody Sat Sep 26 07:17:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF9B84B5CDD; Thu, 3 Sep 2026 14:26:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445592; cv=none; b=QRJ0h9wBhdr3nb1LaKjaHiUTzU3Q4c5GrJu/EQeZRkMVzKfnl0lUpzLPv7Gm0d/7z91oKYYGUg/6F6MOwy0QuQQgkhRDH1WYyORDOwFTi03e/vS3/P7pygvEGMalv5//3GHB0qKTmqUS3+VmgeIRXVPejN9uH7+Fp7r/3GXKiCg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445592; c=relaxed/simple; bh=lYU+JaKTrxz/zR7uUr+TS+iFPeWmv8zTUgaDNZhq4Ww=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=E3PBCYMqfgMnxb0yBE7+TJi8DDZnE6p/B250yOaqa1M2nzurQoSm9WkJ6ApXNoM0xQHWf0/eKSToTxh2aMq8M++ursECbFY7jnHdcz5qPsBjidJBsDqijMJqqj23qoUojj5K+qX8SRb/lpRWli5xouxJDae7KpyK+VNpa2KQ0uI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VLfuWzI6; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VLfuWzI6" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5678F1F00ADB; Thu, 3 Sep 2026 14:26:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788445568; bh=SKbhH/yJev4U5qDLNZLWqB0aqWQtOQabQFXAP6Qz4ZM=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=VLfuWzI6M1UuqhSFzrwxPTwogZdJepASYShqF9suC2kJCMxqIMmaNd4qOy3QODtA0 N7Evhsuo5dteNxEOvh/1REpp4l6wGpiuswNIWM065A9Q/WkUlOzHs7ucS7jU36gJvp 40aq3AXt2BHM681EPP9j7bdwfb0W+nC0CfT3bvainCK8v0IjOqW0UKA3Xq04EZ37bZ zYW4ceYsUS+TtnqrnQ3kojcaXqm8bU/VzMXP5mB/Q7VBp2cJY+lr6bfwcoqhjilOs8 VAhGAfEOnKoj/lmb6cjzMuNudQ2ipTx9yXarJuebADtlPjftWirFDx7Q6og4HNf9x2 ckcLgl6d7arGQ== From: Konrad Dybcio Date: Thu, 03 Sep 2026 16:25:30 +0200 Subject: [PATCH v2 3/5] phy: qcom-qusb2: Remove _SHIFT defines Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260903-topic-8996_61x5_qusb2phy-v2-3-4c3f980a4560@oss.qualcomm.com> References: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> In-Reply-To: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Iskren Chernev , Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788445548; l=4069; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=4DL9fcjNJk7MXfdTRYqW0Ax5xXaUgoYEFk4XUmKw5UU=; b=g89we8bc/8i+YUYaw4/Sk3483pnzT5w6gOwN4vI6135tJvnm4rvE6ejUvo4/zfwraCo173kyS 736OzQNDRJnAO1J/Pl7HTu170TPorpJdcjnqmoFB2d8FJMDBKN2/7Rh X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio These are unnecessary as they may be inferred from the mask. Drop them. Signed-off-by: Konrad Dybcio Reviewed-by: Abel Vesa --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 33 +++++++++++++++----------------= -- 1 file changed, 15 insertions(+), 18 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/p= hy-qcom-qusb2.c index aac36ed994b1..50c60d56d447 100644 --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c @@ -3,6 +3,7 @@ * Copyright (c) 2017, 2019, The Linux Foundation. All rights reserved. */ =20 +#include #include #include #include @@ -64,26 +65,20 @@ =20 /* QUSB2PHY_IMP_CTRL1 register bits */ #define IMP_RES_OFFSET_MASK GENMASK(5, 0) -#define IMP_RES_OFFSET_SHIFT 0x0 =20 /* QUSB2PHY_PLL_BIAS_CONTROL_2 register bits */ #define BIAS_CTRL2_RES_OFFSET_MASK GENMASK(5, 0) -#define BIAS_CTRL2_RES_OFFSET_SHIFT 0x0 =20 /* QUSB2PHY_CHG_CONTROL_2 register bits */ #define CHG_CTRL2_OFFSET_MASK GENMASK(5, 4) -#define CHG_CTRL2_OFFSET_SHIFT 0x4 =20 /* QUSB2PHY_PORT_TUNE1 register bits */ #define HSTX_TRIM_MASK GENMASK(7, 4) -#define HSTX_TRIM_SHIFT 0x4 #define PREEMPH_WIDTH_HALF_BIT BIT(2) #define PREEMPHASIS_EN_MASK GENMASK(1, 0) -#define PREEMPHASIS_EN_SHIFT 0x0 =20 /* QUSB2PHY_PORT_TUNE2 register bits */ #define HSDISC_TRIM_MASK GENMASK(1, 0) -#define HSDISC_TRIM_SHIFT 0x0 =20 #define QUSB2PHY_PLL_ANALOG_CONTROLS_TWO 0x04 #define QUSB2PHY_PLL_CLOCK_INVERTERS 0x18c @@ -545,28 +540,28 @@ static void qusb2_phy_override_phy_params(struct qusb= 2_phy *qphy) =20 if (or->imp_res_offset.override) qusb2_write_mask(qphy->base, QUSB2PHY_IMP_CTRL1, - or->imp_res_offset.value << IMP_RES_OFFSET_SHIFT, - IMP_RES_OFFSET_MASK); + FIELD_PREP(IMP_RES_OFFSET_MASK, or->imp_res_offset.value), + IMP_RES_OFFSET_MASK); =20 if (or->bias_ctrl.override) qusb2_write_mask(qphy->base, QUSB2PHY_PLL_BIAS_CONTROL_2, - or->bias_ctrl.value << BIAS_CTRL2_RES_OFFSET_SHIFT, - BIAS_CTRL2_RES_OFFSET_MASK); + FIELD_PREP(BIAS_CTRL2_RES_OFFSET_MASK, or->bias_ctrl.value), + BIAS_CTRL2_RES_OFFSET_MASK); =20 if (or->charge_ctrl.override) qusb2_write_mask(qphy->base, QUSB2PHY_CHG_CTRL2, - or->charge_ctrl.value << CHG_CTRL2_OFFSET_SHIFT, - CHG_CTRL2_OFFSET_MASK); + FIELD_PREP(CHG_CTRL2_OFFSET_MASK, or->charge_ctrl.value), + CHG_CTRL2_OFFSET_MASK); =20 if (or->hstx_trim.override) qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1], - or->hstx_trim.value << HSTX_TRIM_SHIFT, + FIELD_PREP(HSTX_TRIM_MASK, or->hstx_trim.value), HSTX_TRIM_MASK); =20 if (or->preemphasis.override) qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1], - or->preemphasis.value << PREEMPHASIS_EN_SHIFT, - PREEMPHASIS_EN_MASK); + FIELD_PREP(PREEMPHASIS_EN_MASK, or->preemphasis.value), + PREEMPHASIS_EN_MASK); =20 if (or->preemphasis_width.override) { if (or->preemphasis_width.value =3D=3D @@ -582,7 +577,7 @@ static void qusb2_phy_override_phy_params(struct qusb2_= phy *qphy) =20 if (or->hsdisc_trim.override) qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE2], - or->hsdisc_trim.value << HSDISC_TRIM_SHIFT, + FIELD_PREP(HSDISC_TRIM_MASK, or->hsdisc_trim.value), HSDISC_TRIM_MASK); } =20 @@ -623,10 +618,12 @@ static void qusb2_phy_set_tune2_param(struct qusb2_ph= y *qphy) /* Fused TUNE1/2 value is the higher nibble only */ if (cfg->update_tune1_with_efuse) qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1], - hstx_trim << HSTX_TRIM_SHIFT, HSTX_TRIM_MASK); + FIELD_PREP(HSTX_TRIM_MASK, hstx_trim), + HSTX_TRIM_MASK); else qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE2], - hstx_trim << HSTX_TRIM_SHIFT, HSTX_TRIM_MASK); + FIELD_PREP(HSTX_TRIM_MASK, hstx_trim), + HSTX_TRIM_MASK); } =20 static int qusb2_phy_set_mode(struct phy *phy, --=20 2.55.0 From nobody Sat Sep 26 07:17:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15C8B47CC74; Thu, 3 Sep 2026 14:26:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445585; cv=none; b=SYFkrOVShCYHG68Q2y1YEtY/lJ4yOkO0rZMU6fzSS1KIgNhI14jx84MYSuo4XFL8fDI0ParRrzB8SmRGTaI42b+IC7hNJU53PyqFgly7/jzyOsKRNY78GYSt55IXGmft6q28wdZtPtmqld1m7IV78yRCKNkeek9zvLV/nkLydBA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445585; c=relaxed/simple; bh=JlSMYZ+4V4OpSGriq7gNtX0StDzqhXwIpNiq1DF+AyM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kim2kVBbpCjGuggnPClObOVfvtDXX4E3WT3kduk14NpwugigrqIkpmIeke+UkZBFLtTcI8zP6aX0Qatgy1bxtDI+70NemMjk2/+XjDoNEiEy0o4mriJHGdj8K+DG4YyrN0eRSmLe3rM8e37dc2aoPSMxRj5G/bmzUV2ZFAYPi7I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lsfmEqql; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lsfmEqql" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 72AA31F00A3D; Thu, 3 Sep 2026 14:26:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788445572; bh=neRbU9LB3Xemki7gzCW5yXCFDaWy8dIX25VeagDVLmA=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=lsfmEqqlxSeJ7faIAfwyZGPVcWq1w/O1ch81KPFoKeNfzAJJHV89W6wwQnv9+eKkJ WFPfkVP1tsHuvF/4Te2bORFgqAo/1sqHVLLENTPgT70eTNvvuwqaa/znuaeiNv0Nod 6tqNNCoUf0JWi5fLiy0+QIMwWEGbyjJsgqty5CFm/tRQ9zXlGzVCnVIPBFIhm/WeFG +8OswQhQlMqXWwLa8pEyS78S9QnsL/seCcpU/+CyJST9r/GBifI4gKM5JRy/TQXWij TodE5eQqh+sX1nGmjvEJ3RDbt12dPfYVnSDAVuKr3wot2nbUGTA5V5CvrnMThOujNo F0o69tWErlhxw== From: Konrad Dybcio Date: Thu, 03 Sep 2026 16:25:31 +0200 Subject: [PATCH v2 4/5] arm64: dts: qcom: msm8996: Add VDD_MX to QUSB2 PHYs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260903-topic-8996_61x5_qusb2phy-v2-4-4c3f980a4560@oss.qualcomm.com> References: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> In-Reply-To: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Iskren Chernev , Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788445548; l=1162; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=72aq6zdogIVPhFTOVVc3SSaAPJKqzNxzekc641wndko=; b=L/IVNJHtX8+XZYw855/myqRIYs1Y21XX5/1bTi7uFAbIdUpSTzBGtEBS0LPa1YpNW1JAEH92/ yR/R49TZSIzCRI79aIGtxp8EHs/nZ2SgjLPqL6qxsX6lUtF0wzAzhtK X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The QUSB2 PHYs are powered by (among others) the VDD_MX power rail. Describe that in the DT. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qc= om/msm8996.dtsi index 818e5660df91..cf17dbbacad0 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -3216,7 +3216,12 @@ hsusb_phy1: phy@7411000 { clock-names =3D "cfg_ahb", "ref"; =20 resets =3D <&gcc GCC_QUSB2PHY_PRIM_BCR>; + + power-domains =3D <&rpmpd MSM8996_VDDMX>; + required-opps =3D <&rpmpd_opp4>; + nvmem-cells =3D <&qusb2p_hstx_trim>; + status =3D "disabled"; }; =20 @@ -3230,7 +3235,12 @@ hsusb_phy2: phy@7412000 { clock-names =3D "cfg_ahb", "ref"; =20 resets =3D <&gcc GCC_QUSB2PHY_SEC_BCR>; + + power-domains =3D <&rpmpd MSM8996_VDDMX>; + required-opps =3D <&rpmpd_opp4>; + nvmem-cells =3D <&qusb2s_hstx_trim>; + status =3D "disabled"; }; =20 --=20 2.55.0 From nobody Sat Sep 26 07:17:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5AADD4B5CCA; Thu, 3 Sep 2026 14:26:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445590; cv=none; b=nChaF2If6qmtQjTTthDrtKBdS112K0bqUdJ0cG4mgE7XcPlw0vE1WAWE+hxuyg+G/M6bMPgQ17mgQ3TjCXNPuLlBYO3bQNCrJVK2sO7dAUpdmQa+f1aB+KNkyDHpIfh7Mjl+0trXeXTSvHVbSnQgCzYQImTLfZIvBUV8/ZWXbzo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788445590; c=relaxed/simple; bh=1r+JWHC1J/gPYYwKcFPcywEldZ1Ud6j9XctpcZ8DSFU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PmxHDWzjnxCCTzWvizJzWQh2NpJbMhMM6DhvLb0UZ3dguLYf1tbL5tkS8bKD5T6vc+RiKmjXWm386GwuGRt5bHIczcwiHT9ibiv9JXoWEQX5dFrtW3GDMjZOtxWYfBwNStCrrj2GvCtoOgbCBBpuMCfjWBs6vPbq2/rRfr79GaE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Igrm45ig; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Igrm45ig" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3B4FA1F00ADF; Thu, 3 Sep 2026 14:26:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788445577; bh=WaygIGESxbkqBOc3vwWakkpss1b75a3X5N+49445PGo=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=Igrm45igkHdOGMPvO4+OaTjfVAV6sYEI3bFjeTP8n2nQB9s87DyYSsSB4iPBQmdQ/ jInV9d6gkrYappk6N9GrMasFY+W2E3cV2+0EsRlfgMfSL6BPnc9sKXpupLCTwgDCcQ FbLX0Xompj6MpkAyROMIPcA5p/7gAnmeYbwOXyLVRU7KyG6l94din6xMK+x0ryjQwM oq9tSXkedx7zGVzwO72n8pPvmgEt61wTqL4SnhTh7tDcTAmfiRDe7zs+InQjpGxA/o +4UKhBxkIIFaxR56sEF2AmTukHnp7OzlCdAElvuBMb6z+LGVaS2Dr2WKBzjwlhWnfs V7Hjsu6pFTUgw== From: Konrad Dybcio Date: Thu, 03 Sep 2026 16:25:32 +0200 Subject: [PATCH v2 5/5] arm64: dts: qcom: sm6125: Fix QUSB2 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260903-topic-8996_61x5_qusb2phy-v2-5-4c3f980a4560@oss.qualcomm.com> References: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> In-Reply-To: <20260903-topic-8996_61x5_qusb2phy-v2-0-4c3f980a4560@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Iskren Chernev , Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788445548; l=1140; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=ZCbvOOQuRVtifrOost8g3n2ZptQcKycIEt21/KqkJts=; b=SXKmiPw4PJvvw8KxbJ+LgXfaAa0M8GpfuiFjEkcKHd4p4UqYtfFQsPyOK0bNVXdsgqocLGU/y mkLkinr1pbFAOyL8N0BzltRUCZzsn22f+23InN4/e7wQJlHKOU/rcYg X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio There are a couple issues with the current description: 1) The msm8996 compatible is wholly reused, without a SM6125-specific primary compatible 2) MSM8996 has a different power setup (VDD powered through a RPMPD power-domain vs a regulator) 3) MSM8996 uses a different init sequence As part of fixing all of them, use a SM6125-specific compatible with a SM6115 fallback. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qco= m/sm6125.dtsi index 86de1560bdef..1b2de5a01a6e 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -682,7 +682,8 @@ gcc: clock-controller@1400000 { }; =20 hsusb_phy1: phy@1613000 { - compatible =3D "qcom,msm8996-qusb2-phy"; + compatible =3D "qcom,sm6125-qusb2-phy", + "qcom,sm6115-qusb2-phy"; reg =3D <0x0 0x01613000 0x0 0x180>; #phy-cells =3D <0>; =20 --=20 2.55.0