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charset="utf-8" The proxy power domain enable path discards the return value of dev_pm_genpd_set_performance_state(), masking failures silently. When the call fails the performance state is not applied, yet firmware load proceeds without any indication of the problem. Capture the return value and emit a warning on failure. Firmware load continues regardless a performance state failure is non-fatal but the warning provides a visible signal for debugging. Signed-off-by: Mukesh Ojha Reviewed-by: Abel Vesa --- drivers/remoteproc/qcom_q6v5_pas.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q= 6v5_pas.c index a005546c265d..01dc0194e130 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -167,7 +167,11 @@ static int qcom_pas_pds_enable(struct qcom_pas *pas, s= truct device **pds, int i; =20 for (i =3D 0; i < pd_count; i++) { - dev_pm_genpd_set_performance_state(pds[i], INT_MAX); + ret =3D dev_pm_genpd_set_performance_state(pds[i], INT_MAX); + if (ret) + dev_warn(pas->dev, + "failed to set proxy PD %d state %u: %d\n", + i, INT_MAX, ret); ret =3D pm_runtime_get_sync(pds[i]); if (ret < 0) { pm_runtime_put_noidle(pds[i]); --=20 2.55.0 From nobody Sat Sep 26 09:23:33 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B19E84AC175 for ; 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charset="utf-8" qcom,hawi-cdsp-pas was initially grouped as a fallback to qcom,sm8550-cdsp-pas on the assumption of hardware-level compatibility. Bringup revealed that the NSP proxy power domain on Hawi requires a specific RPMH performance level that the sm8550 driver data does not provide, breaking the compatibility contract the fallback string implies. Remove qcom,hawi-cdsp-pas from the sm8550-cdsp-pas fallback items block, add it to the standalone compatible enum, and extend the existing cx/mxc/nsp power-domain constraint to cover it explicitly. Signed-off-by: Mukesh Ojha Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.y= aml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml index c58e8a6c7fe1..cf57095cd49d 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml @@ -18,6 +18,7 @@ properties: oneOf: - enum: - qcom,eliza-cdsp-pas + - qcom,hawi-cdsp-pas - qcom,sdx75-mpss-pas - qcom,sm8550-adsp-pas - qcom,sm8550-cdsp-pas @@ -40,7 +41,6 @@ properties: - items: - enum: - qcom,glymur-cdsp-pas - - qcom,hawi-cdsp-pas - qcom,kaanapali-cdsp-pas - qcom,maili-cdsp-pas - const: qcom,sm8550-cdsp-pas @@ -273,6 +273,7 @@ allOf: compatible: contains: enum: + - qcom,hawi-cdsp-pas - qcom,sm8550-cdsp-pas - qcom,sm8650-cdsp-pas - qcom,x1e80100-cdsp-pas --=20 2.55.0 From nobody Sat Sep 26 09:23:33 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2E034AC156 for ; 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charset="utf-8" The proxy power domain enable path requests INT_MAX performance state for every proxy PD. On Hawi, the NSP proxy power domain's RPMH power domain has no OPP at INT_MAX, while CX and MXC accept INT_MAX, mapping to their maximum supported level. Introduce a proxy_pd_performance_states array in qcom_pas_data to allow per-PD RPMH levels to be declared explicitly. Platforms that omit this field retain the existing INT_MAX behaviour. Add Hawi CDSP remoteproc support with the following proxy PD performance states: CX: RPMH_REGULATOR_LEVEL_TURBO MXC: RPMH_REGULATOR_LEVEL_TURBO NSP: RPMH_REGULATOR_LEVEL_NOM Signed-off-by: Mukesh Ojha Reviewed-by: Abel Vesa --- drivers/remoteproc/qcom_q6v5_pas.c | 50 ++++++++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q= 6v5_pas.c index 01dc0194e130..c8bba2418d0d 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -28,6 +28,7 @@ #include #include #include +#include =20 #include "qcom_common.h" #include "qcom_pil_info.h" @@ -51,6 +52,8 @@ struct qcom_pas_data { bool decrypt_shutdown; =20 char **proxy_pd_names; + const unsigned int *proxy_pd_performance_states; + unsigned int num_proxy_pd_performance_states; =20 const char *load_state; const char *ssr_name; @@ -79,6 +82,7 @@ struct qcom_pas { struct regulator *px_supply; =20 struct device *proxy_pds[3]; + const unsigned int *proxy_pd_performance_states; =20 int proxy_pd_count; =20 @@ -167,11 +171,16 @@ static int qcom_pas_pds_enable(struct qcom_pas *pas, = struct device **pds, int i; =20 for (i =3D 0; i < pd_count; i++) { - ret =3D dev_pm_genpd_set_performance_state(pds[i], INT_MAX); + unsigned int state =3D INT_MAX; + + if (pas->proxy_pd_performance_states) + state =3D pas->proxy_pd_performance_states[i]; + + ret =3D dev_pm_genpd_set_performance_state(pds[i], state); if (ret) dev_warn(pas->dev, "failed to set proxy PD %d state %u: %d\n", - i, INT_MAX, ret); + i, state, ret); ret =3D pm_runtime_get_sync(pds[i]); if (ret < 0) { pm_runtime_put_noidle(pds[i]); @@ -877,6 +886,7 @@ static int qcom_pas_probe(struct platform_device *pdev) pas->info_name =3D desc->sysmon_name; pas->smem_host_id =3D desc->smem_host_id; pas->decrypt_shutdown =3D desc->decrypt_shutdown; + pas->proxy_pd_performance_states =3D desc->proxy_pd_performance_states; pas->region_assign_idx =3D desc->region_assign_idx; pas->region_assign_count =3D min_t(int, MAX_ASSIGN_COUNT, desc->region_as= sign_count); pas->region_assign_vmid =3D desc->region_assign_vmid; @@ -912,6 +922,14 @@ static int qcom_pas_probe(struct platform_device *pdev) goto unassign_mem; pas->proxy_pd_count =3D ret; =20 + if (WARN(desc->proxy_pd_performance_states && + desc->num_proxy_pd_performance_states !=3D pas->proxy_pd_count, + "proxy_pd_performance_states count %u !=3D pd count %d\n", + desc->num_proxy_pd_performance_states, pas->proxy_pd_count)) { + ret =3D -EINVAL; + goto detach_proxy_pds; + } + ret =3D qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state, qcom_pas_handover); if (ret) @@ -1802,6 +1820,33 @@ static const struct qcom_pas_data glymur_soccp_resou= rce =3D { .needs_tzmem =3D true, }; =20 +static const struct qcom_pas_data hawi_cdsp_resource =3D { + .crash_reason_smem =3D 601, + .firmware_name =3D "cdsp.mdt", + .dtb_firmware_name =3D "cdsp_dtb.mdt", + .pas_id =3D 18, + .dtb_pas_id =3D 0x25, + .minidump_id =3D 7, + .auto_boot =3D true, + .proxy_pd_names =3D (char*[]){ + "cx", + "mxc", + "nsp", + NULL + }, + .proxy_pd_performance_states =3D (const unsigned int[]){ + RPMH_REGULATOR_LEVEL_TURBO, + RPMH_REGULATOR_LEVEL_TURBO, + RPMH_REGULATOR_LEVEL_NOM, + }, + .num_proxy_pd_performance_states =3D 3, + .load_state =3D "cdsp", + .ssr_name =3D "cdsp", + .sysmon_name =3D "cdsp", + .ssctl_id =3D 0x17, + .smem_host_id =3D 5, +}; + static const struct qcom_pas_data eliza_cdsp_resource =3D { .crash_reason_smem =3D 601, .firmware_name =3D "cdsp.mbn", @@ -1831,6 +1876,7 @@ static const struct of_device_id qcom_pas_of_match[] = =3D { { .compatible =3D "qcom,eliza-adsp-pas", .data =3D &sm8550_adsp_resource = }, { .compatible =3D "qcom,eliza-cdsp-pas", .data =3D &eliza_cdsp_resource }, { .compatible =3D "qcom,glymur-soccp-pas", .data =3D &glymur_soccp_resour= ce }, + { .compatible =3D "qcom,hawi-cdsp-pas", .data =3D &hawi_cdsp_resource }, { .compatible =3D "qcom,kaanapali-soccp-pas", .data =3D &kaanapali_soccp_= resource }, { .compatible =3D "qcom,milos-adsp-pas", .data =3D &sm8550_adsp_resource = }, { .compatible =3D "qcom,milos-cdsp-pas", .data =3D &milos_cdsp_resource }, --=20 2.55.0