From nobody Sat Sep 26 10:04:06 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7D164A2059; Wed, 2 Sep 2026 14:15:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358557; cv=none; b=KtfirX+IrM9iJxSAKcqIb+pqlUha1HJn/hhyFqgTAmmlP5HY67oFjnjhn0j29gLTydktwobt2tCt/vcFGoPiTg0R0LLE/3fnAXnJep5AwOcRwsCH1fnA/AO9B5hFqCHZA69bE5QE3qhota6UhevWzathVZqg3oMAqjyOT5srcJg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358557; c=relaxed/simple; bh=8arOEbtJu5ORo5zQIIDaftBo1oaLkMB3HysazdGv5Y8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BvxJC/ypM6keNJ3EYHkYjw54CSs9hNus7AhCXE/dG6hVsJgE3VQ+CXo3gEk2BAP0rc05ZFpl/hMAuW3GBxql71tzFmAZzqGtAS4ACNXr9CsVVviKz99H8zF8BFTn7u6dgMpMwYSgs5Av9UNy+ZnwEmSlO072CipKGaS+NPbmBGc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 112811F000E9; Wed, 2 Sep 2026 14:15:51 +0000 (UTC) From: Claudiu Beznea To: mkl@pengutronix.de, mailhol@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, biju.das.jz@bp.renesas.com, fabrizio.castro.jz@renesas.com Cc: claudiu.beznea@tuxon.dev, linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea Subject: [PATCH v4 1/7] dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC Date: Wed, 2 Sep 2026 17:15:38 +0300 Message-ID: <20260902141544.565763-2-claudiu.beznea+renesas@tuxon.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> References: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The CAN FD controller found on the Renesas RZ/G3S SoC is largely compatible with the variant present on the RZ/G3E SoC. The main differences are: - the RZ/G3S provides only two CAN FD channels - the RZ/G3S supports only CAN FD operation; the Channel n CAN FD Configuration Register does not implement the bits used to select classical CAN-only mode (bit 30) or CAN FD-only mode (bit 28); consequently, bit 31 (CAN FD Frame Distinction Enable) of the same register is also not implemented - some bits in several registers (mainly reserved or status bits) are read-write on the RZ/G3S but read-only on the RZ/G3E; their behavior is otherwise identical: the bits read back as 0 on both SoCs and software is allowed to write only 0 to them on the RZ/G3S - the RZ/G3S provides 256 acceptance filters, compared to 768 on the RZ/G3E - the RZ/G3S can use PCLK clock as the CAN FD clock source through an internal clock divider, while also supporting an external CAN FD clock source Since: - the SoC clock generator provides to the CAN IP only the peripheral and the RAM clocks - when sourced from the peripheral clock, the CAN-FD clock is obtained inside the IP itself by dividing the peripheral clock - the assigned-clocks and assigned-clock-rates properties are specific to the CAN-FD clock the assigned-clocks and assigned-clock-rates properties were dropped from the required properties list of the Renesas RZ/G3S SoC. Add documentation for the Renesas RZ/G3S SoC. Reviewed-by: Rob Herring (Arm) Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v4: - collected tags Changes in v3: - updated the patch description to reflect RZ/G3S has 256 acceptance filters and RZ/G3E has 768 acceptance filters - kept compatibles alphanumerically sorted Changes in v2: - forbid renesas,no-can-fd and renesas,fd-only since the IP supports only CAN-FD; for this didn't collect Biju's tag .../bindings/net/can/renesas,rcar-canfd.yaml | 20 +++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.y= aml b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml index b9d9dd7a7967..bbaaef8f4282 100644 --- a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml +++ b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml @@ -13,6 +13,7 @@ properties: compatible: oneOf: - enum: + - renesas,r9a08g045-canfd # RZ/G3S - renesas,r9a09g047-canfd # RZ/G3E - renesas,r9a09g077-canfd # RZ/T2H =20 @@ -185,8 +186,6 @@ required: - clocks - clock-names - power-domains - - assigned-clocks - - assigned-clock-rates - channel0 - channel1 =20 @@ -198,6 +197,7 @@ allOf: compatible: contains: enum: + - renesas,r9a08g045-canfd - renesas,rzg2l-canfd then: properties: @@ -266,6 +266,7 @@ allOf: compatible: contains: enum: + - renesas,r9a08g045-canfd - renesas,r9a09g077-canfd - renesas,rcar-gen3-canfd - renesas,rzg2l-canfd @@ -330,6 +331,7 @@ allOf: compatible: contains: enum: + - renesas,r9a08g045-canfd - renesas,r9a09g047-canfd - renesas,rzg2l-canfd then: @@ -350,6 +352,20 @@ allOf: properties: reset-names: false =20 + - if: + properties: + compatible: + contains: + const: renesas,r9a08g045-canfd + then: + properties: + renesas,no-can-fd: false + renesas,fd-only: false + else: + required: + - assigned-clocks + - assigned-clock-rates + unevaluatedProperties: false =20 examples: --=20 2.43.0 From nobody Sat Sep 26 10:04:06 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF44935C1B0; Wed, 2 Sep 2026 14:15:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358561; cv=none; b=mxR9ZPXh9n1JSzxFWFSugTUFsWdM0GDnJ/7POD3jnJ4rsiICkhvpRZv2h8rGll/ORdeupLgQT+IBEPksJL8ROXJh+ixWhOMkXW4nym2QAJcX87pksOGL9ReOfyzWPFbj7JGV5VzBVx6yMVSuXGOSH5nfgXzrlwYGoR+PEwf+4Rc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358561; c=relaxed/simple; bh=5hoI59QEZUdi/Kf4amycYi0zdwFkh4Xwlu51Hgvy0vg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DrX0d5RydF262OjzUjU6VigkfDSANGoY8Nde7o+Brpp3Sf2p+zvtFkuI0EhAgEuo6pIxHaWj8qeZTj1gX56JBCYuJG4qHr9bom52mzWfEYLBuBnnJBf0fc50j75T0ab3IHaFU65lIEfgpj9xs67Cma36PV9/odcZrPWDBFagBSw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 165491F00A3A; Wed, 2 Sep 2026 14:15:55 +0000 (UTC) From: Claudiu Beznea To: mkl@pengutronix.de, mailhol@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, biju.das.jz@bp.renesas.com, fabrizio.castro.jz@renesas.com Cc: claudiu.beznea@tuxon.dev, linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea Subject: [PATCH v4 2/7] can: rcar_canfd: Fix typos in macro names Date: Wed, 2 Sep 2026 17:15:39 +0300 Message-ID: <20260902141544.565763-3-claudiu.beznea+renesas@tuxon.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> References: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The bits 1..0 of the Channel n Control Register are named CHMDC (Channel Mode select). Fix typos in macro names by replacing DMC with MDC. Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v4: - collected tags Changes in v3: - none Changes in v2: - collected tags drivers/net/can/rcar/rcar_canfd.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_= canfd.c index fcc37b73ed43..b7c4fe3477ac 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -132,9 +132,9 @@ #define RCANFD_CCTR_BEIE BIT(8) #define RCANFD_CCTR_CSLPR BIT(2) #define RCANFD_CCTR_CHMDC_MASK (0x3) -#define RCANFD_CCTR_CHDMC_COPM (0x0) -#define RCANFD_CCTR_CHDMC_CRESET (0x1) -#define RCANFD_CCTR_CHDMC_CHLT (0x2) +#define RCANFD_CCTR_CHMDC_COPM (0x0) +#define RCANFD_CCTR_CHMDC_CRESET (0x1) +#define RCANFD_CCTR_CHMDC_CHLT (0x2) =20 /* RSCFDnCFDCmSTS / RSCFDnCmSTS */ #define RCANFD_CSTS_COMSTS BIT(7) @@ -828,7 +828,7 @@ static int rcar_canfd_reset_controller(struct rcar_canf= d_global *gpriv) =20 rcar_canfd_update_bit(gpriv->base, RCANFD_CCTR(ch), RCANFD_CCTR_CHMDC_MASK, - RCANFD_CCTR_CHDMC_CRESET); + RCANFD_CCTR_CHMDC_CRESET); =20 /* Ensure Channel reset mode */ err =3D readl_poll_timeout((gpriv->base + RCANFD_CSTS(ch)), sts, @@ -1504,7 +1504,7 @@ static int rcar_canfd_start(struct net_device *ndev) =20 /* Set channel to Operational mode */ rcar_canfd_update_bit(priv->base, RCANFD_CCTR(ch), - RCANFD_CCTR_CHMDC_MASK, RCANFD_CCTR_CHDMC_COPM); + RCANFD_CCTR_CHMDC_MASK, RCANFD_CCTR_CHMDC_COPM); =20 /* Verify channel mode change */ err =3D readl_poll_timeout((priv->base + RCANFD_CSTS(ch)), sts, @@ -1578,7 +1578,7 @@ static void rcar_canfd_stop(struct net_device *ndev) =20 /* Transition to channel reset mode */ rcar_canfd_update_bit(priv->base, RCANFD_CCTR(ch), - RCANFD_CCTR_CHMDC_MASK, RCANFD_CCTR_CHDMC_CRESET); + RCANFD_CCTR_CHMDC_MASK, RCANFD_CCTR_CHMDC_CRESET); =20 /* Check Channel reset mode */ err =3D readl_poll_timeout((priv->base + RCANFD_CSTS(ch)), sts, --=20 2.43.0 From nobody Sat Sep 26 10:04:06 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8250B4A205F; Wed, 2 Sep 2026 14:16:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358564; cv=none; b=QV2F2/j/eFHRSIDazqZZnqCW3J4Xd0YAqGxdKcVHswI3YxRojBMYvbk55dh9r5dFeOHJuxE0TBbAB2SnB0FCzF4Rq/z85agKZQ3NZBegkIQljIcDsppE89kX8BrzJ8UioiCL0xcUZq9nyqgktouW5RG7aCtbRHk2f/poDY/wSeQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358564; c=relaxed/simple; bh=YmEirIlSxyezggrI82ol9BKsBzoq0Vd/TnQP/wVHtF8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=r0tH6uIxOh/KtREcoTXt8V9dnw+ZNVbts3KjfF0qLUzYoCr5TPTnwvCYkoaxTJ3yASMoc4Ap7/wJFkC//Sp/8kLsQPCslnrXzBYqnExOeGQSMO90ybmBKHL5snyHOteIhZ3emBOReVDhz/zgWtOT0OEAO6XlmzEZuj+0zs2HtNo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id D90351F000E9; Wed, 2 Sep 2026 14:15:59 +0000 (UTC) From: Claudiu Beznea To: mkl@pengutronix.de, mailhol@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, biju.das.jz@bp.renesas.com, fabrizio.castro.jz@renesas.com Cc: claudiu.beznea@tuxon.dev, linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea Subject: [PATCH v4 3/7] can: rcar_canfd: Allow the CAN FD clock to be sourced from fck Date: Wed, 2 Sep 2026 17:15:40 +0300 Message-ID: <20260902141544.565763-4-claudiu.beznea+renesas@tuxon.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> References: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea On the Renesas RZ/G3S, the CAN FD clock can be sourced either from fck (the peripheral clock) or from an external clock (can_clk). When fck is used, it is divided internally by the CAN FD controller. Adjust the existing canfd clock handling code to support the RZ/G3S CAN. The existing struct rcar_canfd_hw_info instances were updated to address the request in the Link discussion. Link: https://lore.kernel.org/all/1d9719e3-10ff-4cd8-b729-55fea93c37ce@wana= doo.fr Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v4: - collected tags Changes in v3: - set gpriv->can_clk =3D NULL if info->fcan_pclk Changes in v2: - changed the logic to request canfd only if info->fcan_pclk and contrary get the fcan clock from pclk; for this didn't collect the Rb tag drivers/net/can/rcar/rcar_canfd.c | 23 ++++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_= canfd.c index b7c4fe3477ac..f9173774387f 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -444,6 +444,7 @@ struct rcar_canfd_hw_info { unsigned ch_interface_mode:1; /* Has channel interface mode */ unsigned shared_can_regs:1; /* Has shared classical can registers */ unsigned external_clk:1; /* Has external clock */ + unsigned fcan_pclk:1; /* Has fcan sourced from pclk. */ }; =20 /* Channel priv data */ @@ -617,6 +618,7 @@ static const struct rcar_canfd_hw_info rcar_gen3_hw_inf= o =3D { .ch_interface_mode =3D 0, .shared_can_regs =3D 0, .external_clk =3D 1, + .fcan_pclk =3D 0, }; =20 static const struct rcar_canfd_hw_info rcar_gen4_hw_info =3D { @@ -634,6 +636,7 @@ static const struct rcar_canfd_hw_info rcar_gen4_hw_inf= o =3D { .ch_interface_mode =3D 1, .shared_can_regs =3D 1, .external_clk =3D 1, + .fcan_pclk =3D 0, }; =20 static const struct rcar_canfd_hw_info rzg2l_hw_info =3D { @@ -651,6 +654,7 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = =3D { .ch_interface_mode =3D 0, .shared_can_regs =3D 0, .external_clk =3D 1, + .fcan_pclk =3D 0, }; =20 static const struct rcar_canfd_hw_info r9a09g047_hw_info =3D { @@ -668,6 +672,7 @@ static const struct rcar_canfd_hw_info r9a09g047_hw_inf= o =3D { .ch_interface_mode =3D 1, .shared_can_regs =3D 1, .external_clk =3D 0, + .fcan_pclk =3D 0, }; =20 static const struct rcar_canfd_hw_info r9a09g077_hw_info =3D { @@ -685,6 +690,7 @@ static const struct rcar_canfd_hw_info r9a09g077_hw_inf= o =3D { .ch_interface_mode =3D 1, .shared_can_regs =3D 1, .external_clk =3D 1, + .fcan_pclk =3D 0, }; =20 /* Helper functions */ @@ -2190,13 +2196,20 @@ static int rcar_canfd_probe(struct platform_device = *pdev) */ gpriv->can_clk =3D devm_clk_get(dev, "can_clk"); if (IS_ERR(gpriv->can_clk) || (clk_get_rate(gpriv->can_clk) =3D=3D 0)) { - gpriv->can_clk =3D devm_clk_get(dev, "canfd"); - if (IS_ERR(gpriv->can_clk)) - return dev_err_probe(dev, PTR_ERR(gpriv->can_clk), - "cannot get canfd clock\n"); + if (info->fcan_pclk) { + fcan_freq =3D clk_get_rate(gpriv->clkp); + gpriv->can_clk =3D NULL; + } else { + gpriv->can_clk =3D devm_clk_get(dev, "canfd"); + if (IS_ERR(gpriv->can_clk)) + return dev_err_probe(dev, PTR_ERR(gpriv->can_clk), + "cannot get canfd clock\n"); + + fcan_freq =3D clk_get_rate(gpriv->can_clk); + } =20 /* CANFD clock may be further divided within the IP */ - fcan_freq =3D clk_get_rate(gpriv->can_clk) / info->postdiv; + fcan_freq /=3D info->postdiv; } else { fcan_freq =3D clk_get_rate(gpriv->can_clk); gpriv->extclk =3D gpriv->info->external_clk; --=20 2.43.0 From nobody Sat Sep 26 10:04:06 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F19994A205F; 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charset="utf-8" From: Claudiu Beznea The bits 30 (classical CAN-only mode) and 28 (FD-only enable) of the Channel n CAN-FD Configuration Register of the Renesas RZ/G3S SoC are not available. The IP supports only CAN-FD mode. RZ/G3S HW manual (revision 1.30) specify the bits are read as zero and the write value should always be zero. Add the mode_select_na flag in struct rcar_canfd_hw_info to cover RZ/G3S and avoid writing to unavailable bits. The existing struct rcar_canfd_hw_info instances were updated to address the request in the Link discussion. Commit prepares for the addition of the Renesas RZ/G3S SoC. Link: https://lore.kernel.org/all/1d9719e3-10ff-4cd8-b729-55fea93c37ce@wana= doo.fr Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v4: - collected tags=20 - s/mode_select_na/fixed_canfd/g Changes in v3: - none Changes in v2: - collected the tags - updated patch description to reflect this is a preparatory commit drivers/net/can/rcar/rcar_canfd.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_= canfd.c index f9173774387f..ac5d5959d8e4 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -445,6 +445,7 @@ struct rcar_canfd_hw_info { unsigned shared_can_regs:1; /* Has shared classical can registers */ unsigned external_clk:1; /* Has external clock */ unsigned fcan_pclk:1; /* Has fcan sourced from pclk. */ + unsigned fixed_canfd:1; /* Has mode fixed to canfd. */ }; =20 /* Channel priv data */ @@ -619,6 +620,7 @@ static const struct rcar_canfd_hw_info rcar_gen3_hw_inf= o =3D { .shared_can_regs =3D 0, .external_clk =3D 1, .fcan_pclk =3D 0, + .fixed_canfd =3D 0, }; =20 static const struct rcar_canfd_hw_info rcar_gen4_hw_info =3D { @@ -637,6 +639,7 @@ static const struct rcar_canfd_hw_info rcar_gen4_hw_inf= o =3D { .shared_can_regs =3D 1, .external_clk =3D 1, .fcan_pclk =3D 0, + .fixed_canfd =3D 0, }; =20 static const struct rcar_canfd_hw_info rzg2l_hw_info =3D { @@ -655,6 +658,7 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = =3D { .shared_can_regs =3D 0, .external_clk =3D 1, .fcan_pclk =3D 0, + .fixed_canfd =3D 0, }; =20 static const struct rcar_canfd_hw_info r9a09g047_hw_info =3D { @@ -673,6 +677,7 @@ static const struct rcar_canfd_hw_info r9a09g047_hw_inf= o =3D { .shared_can_regs =3D 1, .external_clk =3D 0, .fcan_pclk =3D 0, + .fixed_canfd =3D 0, }; =20 static const struct rcar_canfd_hw_info r9a09g077_hw_info =3D { @@ -691,6 +696,7 @@ static const struct rcar_canfd_hw_info r9a09g077_hw_inf= o =3D { .shared_can_regs =3D 1, .external_clk =3D 1, .fcan_pclk =3D 0, + .fixed_canfd =3D 0, }; =20 /* Helper functions */ @@ -846,6 +852,9 @@ static int rcar_canfd_reset_controller(struct rcar_canf= d_global *gpriv) } =20 /* Set the controller into appropriate mode */ + if (gpriv->info->fixed_canfd) + continue; + if (gpriv->info->ch_interface_mode) { /* Do not set CLOE and FDOE simultaneously */ if (!gpriv->fdmode) { --=20 2.43.0 From nobody Sat Sep 26 10:04:06 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B24A831B803; Wed, 2 Sep 2026 14:16:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358572; cv=none; b=lmk1/ODE6AqiQzpUvw1/oe7UO7ZEgXd2TOhJKTXzwIlaa9YedqsDq1xsim+hJfoRwSG+7Ja9fujaI250bMsxssNgYOJH5Kvdj0PcJLmMhFFtulafciuLUoVnhC5FL7meTdoEFFu16cDZQEbBtB0KV4VPy0LzGyLouLvbLgGCrIg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358572; c=relaxed/simple; bh=jvUK3X5eN9aiS+y365W+pld+EvuXtskAgV43hZb1hZw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=B2fMpEnbY/Rj6sSUVW6BZIFDrKLy6xFwedKqslYqeuvyPgQmZGZIyPCYGnH/BeGWmZH4elxNljZz7cUjtYwkesxRCzeNzodsnVp09vBENXmYTUxFEl4cWImv/ldpeQyhHOYyrW0avXCsdCjh/k5N5USfEY8qSWyIY21jUVP/Kog= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 35C5B1F000E9; Wed, 2 Sep 2026 14:16:06 +0000 (UTC) From: Claudiu Beznea To: mkl@pengutronix.de, mailhol@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, biju.das.jz@bp.renesas.com, fabrizio.castro.jz@renesas.com Cc: claudiu.beznea@tuxon.dev, linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea Subject: [PATCH v4 5/7] can: rcar_canfd: Add support for Renesas RZ/G3S Date: Wed, 2 Sep 2026 17:15:42 +0300 Message-ID: <20260902141544.565763-6-claudiu.beznea+renesas@tuxon.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> References: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Add support for Renesas RZ/G3S The Renesas RZ/G3S CAN-FD controller is largely compatible with the variant found on the Renesas RZ/G3E. The main differences are: - the RZ/G3S provides 16 AFL pages - the RZ/G3S supports only two channels - the RZ/G3S supports only CAN-FD operation and does not implement the bits used to select between classical CAN-only and CAN FD-only modes. - the RZ/G3S includes an internal divider that allows the peripheral clock to be used as the CAN FD clock source. Add support for the Renesas RZ/G3S. Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v4: - collected tags Changes in v3: - updated max_aflpn as it refers to the number of available pages that could be used to access the acceptance filters; updated the patch description for this change Changes in v2: - initialized shared_global_irqs =3D 0 for RZ/G3S, to follow the request from https://lore.kernel.org/all/1d9719e3-10ff-4cd8-b729-55fea93c37ce@wan= adoo.fr - collected tags drivers/net/can/rcar/rcar_canfd.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_= canfd.c index ac5d5959d8e4..74c3c3f20991 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -661,6 +661,26 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = =3D { .fixed_canfd =3D 0, }; =20 +static const struct rcar_canfd_hw_info r9a08g045_hw_info =3D { + .nom_bittiming =3D &rcar_canfd_gen4_nom_bittiming_const, + .data_bittiming =3D &rcar_canfd_gen4_data_bittiming_const, + .tdc_const =3D &rcar_canfd_gen4_tdc_const, + .regs =3D &rcar_gen4_regs, + .sh =3D &rcar_gen4_shift_data, + .rnc_field_width =3D 16, + .max_aflpn =3D 15, + .max_cftml =3D 31, + .max_channels =3D 2, + .postdiv =3D 2, + .shared_global_irqs =3D 0, + .multi_channel_irqs =3D 1, + .ch_interface_mode =3D 1, + .shared_can_regs =3D 1, + .external_clk =3D 1, + .fcan_pclk =3D 1, + .fixed_canfd =3D 1, +}; + static const struct rcar_canfd_hw_info r9a09g047_hw_info =3D { .nom_bittiming =3D &rcar_canfd_gen4_nom_bittiming_const, .data_bittiming =3D &rcar_canfd_gen4_data_bittiming_const, @@ -2383,6 +2403,7 @@ static DEFINE_SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rc= ar_canfd_suspend, =20 static const __maybe_unused struct of_device_id rcar_canfd_of_table[] =3D { { .compatible =3D "renesas,r8a779a0-canfd", .data =3D &rcar_gen4_hw_info = }, + { .compatible =3D "renesas,r9a08g045-canfd", .data =3D &r9a08g045_hw_info= }, { .compatible =3D "renesas,r9a09g047-canfd", .data =3D &r9a09g047_hw_info= }, { .compatible =3D "renesas,r9a09g077-canfd", .data =3D &r9a09g077_hw_info= }, { .compatible =3D "renesas,rcar-gen3-canfd", .data =3D &rcar_gen3_hw_info= }, --=20 2.43.0 From nobody Sat Sep 26 10:04:06 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 128D531B803; Wed, 2 Sep 2026 14:16:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358575; cv=none; b=Gg3BbkvcNz9LWU0w2MtiC6VvWfRel5Npmtwg1LK9GECSyAWh0yeBcCdk6MjTcGmUeTJILL3cpD5P5i3ke/gzH0k+uDNQC+dXn15sczfIv43gzYMLRJNhCPpWdfod5LTlAZ/w10BHgSYX3EakuaIXEzz3nj9K+JqJj8Svo42wpB8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358575; c=relaxed/simple; bh=r1usIacqlOoD7VBo0z0N6U/yrOpq2PY8MuVrMdejaWM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PGPnenUTsPZa3xydkeeeD3uhTFqg76moedHdopUEtSbaAquNpKiWjkp/3V2ZbJ4u7fpSvjUrVWp9PyfhKvIewYCWXzEUdZjy90CQ+bE8wSo67rvhc1VMVEiGz1/S5rv1UQqsSx69plf6tzwf12B9+O+r6LHlu56gGwF56+fbq1Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id DD49E1F00A3A; Wed, 2 Sep 2026 14:16:10 +0000 (UTC) From: Claudiu Beznea To: mkl@pengutronix.de, mailhol@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, biju.das.jz@bp.renesas.com, fabrizio.castro.jz@renesas.com Cc: claudiu.beznea@tuxon.dev, linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea Subject: [PATCH v4 6/7] arm64: dts: renesas: r9a08g045: Add CAN-FD node Date: Wed, 2 Sep 2026 17:15:43 +0300 Message-ID: <20260902141544.565763-7-claudiu.beznea+renesas@tuxon.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> References: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The Renesas RZ/G3S SoC includes a CAN-FD controller with two channels. Add the corresponding device tree node. Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v4: - collected tags Changes in v3: - none Changes in v2: - collected tags arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/d= ts/renesas/r9a08g045.dtsi index b98ad375a3e9..eaebf5b40fee 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -29,6 +29,13 @@ audio_clk2: audio2-clk { clock-frequency =3D <0>; }; =20 + can_clk: can-clk { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + /* This value must be overridden by boards that provide it. */ + clock-frequency =3D <0>; + }; + cluster0_opp: opp-table-0 { compatible =3D "operating-points-v2"; opp-shared; @@ -498,6 +505,38 @@ ssi3: ssi@100a8c00 { status =3D "disabled"; }; =20 + canfd: can@100c0000 { + compatible =3D "renesas,r9a08g045-canfd"; + reg =3D <0 0x100c0000 0 0x20000>; + interrupts =3D , + , + , + , + , + , + , + ; + interrupt-names =3D "g_err", "g_recc", + "ch0_err", "ch0_rec", "ch0_trx", + "ch1_err", "ch1_rec", "ch1_trx"; + clocks =3D <&cpg CPG_MOD R9A08G045_CANFD_PCLK>, + <&cpg CPG_MOD R9A08G045_CANFD_CLK_RAM>, + <&can_clk>; + clock-names =3D "fck", "ram_clk", "can_clk"; + resets =3D <&cpg R9A08G045_CANFD_RSTP_N>, + <&cpg R9A08G045_CANFD_RSTC_N>; + reset-names =3D "rstp_n", "rstc_n"; + power-domains =3D <&cpg>; + status =3D "disabled"; + + channel0 { + status =3D "disabled"; + }; + channel1 { + status =3D "disabled"; + }; + }; + cpg: clock-controller@11010000 { compatible =3D "renesas,r9a08g045-cpg"; reg =3D <0 0x11010000 0 0x10000>; --=20 2.43.0 From nobody Sat Sep 26 10:04:06 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0392E4A2635; Wed, 2 Sep 2026 14:16:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358579; cv=none; b=F2lBj5Ob4B4+NNgTJvoL7Pg/ydINia3vaFTl9WBY4Nya61dWtw44k0ks8POs5tSRodqQMQpPKZmoDs0Pv5PHu2rallfORPheFHUZ0jaiiiM7kP3XabfPFtTyF2t7+b1TznvRIWyz8/EhHrptboHVhDxtFge+g6iUqPH9t/QF4J0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788358579; c=relaxed/simple; bh=tC7VaQNN9hlI33al52NTfppaebOFNfYClbwSPR+Khas=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=S/fvdmCrlmQM/CKrcuxhzZJoZhzDAWhQNqmYYmihKmu0ZN8IuoDninKSV/XwKYluNSwiOT67W5xxf1Hy2Y1nrHSMUsjPdWzW1oExOreyH75Fg1pRIgsmPQdvQkddGitdVucnati4SECF2SVbdvaFMMNSkzOrIm2eBpViERkoKPw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 69B0B1F000E9; Wed, 2 Sep 2026 14:16:14 +0000 (UTC) From: Claudiu Beznea To: mkl@pengutronix.de, mailhol@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, biju.das.jz@bp.renesas.com, fabrizio.castro.jz@renesas.com Cc: claudiu.beznea@tuxon.dev, linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea Subject: [PATCH v4 7/7] arm64: dts: renesas: rzg3s-smarc: Enable CAN-FD Date: Wed, 2 Sep 2026 17:15:44 +0300 Message-ID: <20260902141544.565763-8-claudiu.beznea+renesas@tuxon.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> References: <20260902141544.565763-1-claudiu.beznea+renesas@tuxon.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The two CAN FD channels available on the Renesas RZ/G3S SoC are routed through the Renesas SMARC Carrier II board when used with the Renesas RZ/G3S SMARC Module. The CAN transceiver on the Carrier II board has its standby pins connected to GPIOs that are selected through the SW_GPIO_CAN_PMOD switches. By default, these switches route the GPIOs to the PMOD interfaces. Enable the CAN FD controller and its two available channels. Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v4: - collected tags - used ti,tcan1046 compatible - adjusted the standby-gpio property along with CAN PHY node name and label - adjusted the CAN channels phy phandles Changes in v3: - none Changes in v2: - collected tags .../boot/dts/renesas/rzg3s-smarc-switches.h | 12 +++++ arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 45 +++++++++++++++++++ 2 files changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h b/arch/arm6= 4/boot/dts/renesas/rzg3s-smarc-switches.h index 9cccc87da057..d3fd18626773 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h @@ -41,4 +41,16 @@ */ #define SW_OPT_MUX4 SW_ON =20 +/* + * SW_GPIO_CAN_PMOD[x] switches' states: + * @SW_GPIO_CAN_PMOD1: + * SW_OFF - GPIO8 connected to CAN0_STB (position 1-2) + * SW_ON - GPIO8 connected to PMOD1 (position 2-3) + * @SW_GPIO_CAN_PMOD2: + * SW_OFF - GPIO9 connected to CAN1_STB (position 4-5) + * SW_ON - GPIO9 connected to PMOD1 (position 5-6) + */ +#define SW_GPIO_CAN_PMOD1 SW_ON +#define SW_GPIO_CAN_PMOD2 SW_ON + #endif /* __RZG3S_SMARC_SWITCHES_H__ */ diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot= /dts/renesas/rzg3s-smarc.dtsi index e3821d8c01e3..ef24b6cbd690 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -68,6 +68,23 @@ codec_dai: simple-audio-card,codec { }; }; =20 + can_transceiver: can-phy { + compatible =3D "ti,tcan1046", "nxp,tja1048"; + #phy-cells =3D <1>; + max-bitrate =3D <8000000>; + standby-gpios =3D +#if SW_GPIO_CAN_PMOD1 =3D=3D SW_OFF + <&pinctrl RZG2L_GPIO(13, 0) GPIO_ACTIVE_HIGH>, +#else + <0>, +#endif +#if SW_GPIO_CAN_PMOD2 =3D=3D SW_OFF + <&pinctrl RZG2L_GPIO(13, 1) GPIO_ACTIVE_HIGH>; +#else + <0>; +#endif + }; + vcc_sdhi1: regulator-vcc-sdhi1 { compatible =3D "regulator-fixed"; regulator-name =3D "SDHI1 Vcc"; @@ -92,6 +109,22 @@ &audio_clk2 { clock-frequency =3D <12288000>; }; =20 +&canfd { + pinctrl-0 =3D <&canfd_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; + + channel0 { + phys =3D <&can_transceiver 0>; + status =3D "okay"; + }; + + channel1 { + phys =3D <&can_transceiver 1>; + status =3D "okay"; + }; +}; + &ehci0 { dr_mode =3D "otg"; status =3D "okay"; @@ -171,6 +204,18 @@ audio_clock_pins: audio-clock { input-enable; }; =20 + canfd_pins: canfd { + can0_pins: can0 { + pinmux =3D , /* CAN0_TX */ + ; /* CAN0_RX */ + }; + + can1_pins: can1 { + pinmux =3D , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + key-1-gpio-hog { gpio-hog; gpios =3D ; --=20 2.43.0