From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout08.his.huawei.com (canpmsgout08.his.huawei.com [113.46.200.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BDCA242FCD6 for ; Wed, 2 Sep 2026 09:55:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342906; cv=none; b=ZgffRF0y6SOH/xs2zxDb/IqOlUmNbfD1puhaRRPXw6uKxDMmeN5ob0RBPtNx5fH9V1I5//7/VVOtUR1w8FCDIv5VV05lUoLq0BXTU+kImeMvfGdmzmHeuvNGOiA9+/7qmadTGDjk6kbKQSnE4o4G4p6sjg59OoYp+KV0x6/0mTc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342906; c=relaxed/simple; bh=uT4XYQHoHzi/lu/+zICWgAU0vM+SNBi7J74IpgAjKfw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BkXBSsNLROcCXYfkTI9qECAJVEBmkjKz4DkgRWmZQ+KvK4IGN9MUKuToOaZkxmG/b6TQS1h8vb2s3+sJwzdcQtLdNtZgGuYlTSl5tIhMvUvX5Yb9FgyQcBLa13uwqGFrcNUGV3Yc0zTxXHl2HfnMHt811YoWWeXZkEyb5qZ+gOA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=ZIjnuske; arc=none smtp.client-ip=113.46.200.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="ZIjnuske" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=o5xw+YhmmG8c70Lw7ybuOW5FCpeaQgtQkW7/7eu2afU=; b=ZIjnuskee+CXN3biF48vPMwNU3fNdLgWh0Uo2C8+yXQ03ctNF9GskYOwoZ20aowe6Z8fGPC6A YgHV533PGC9i79FTZSRQqM5eXtX5CQxgEV8cfCYPe92q2u/ONDyih7QDl+wsriMW9vytTkmdmEQ bOjzZR+VYSsAnTBKcMi2sDc= Received: from mail.maildlp.com (unknown [172.19.163.163]) by canpmsgout08.his.huawei.com (SkyGuard) with ESMTPS id 4hZd925TyBzmVXM; Wed, 2 Sep 2026 17:44:06 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id ED6CF4057A; Wed, 2 Sep 2026 17:54:56 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 2 Sep 2026 17:54:55 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v18 01/14] arm64: ptrace: Fix redundant syscall exit stop for PTRACE_SYSEMU_SINGLESTEP Date: Wed, 2 Sep 2026 17:55:24 +0800 Message-ID: <20260902095537.602517-2-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902095537.602517-1-ruanjinjie@huawei.com> References: <20260902095537.602517-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" PTRACE_SYSEMU_SINGLESTEP sets both _TIF_SYSCALL_EMU and _TIF_SINGLESTEP. arm64 currently reports a syscall exit stop whenever _TIF_SINGLESTEP is set, regardless of emulation state. This violates the ptrace man page (Syscall-stops section): "If the tracee was restarted by PTRACE_SYSCALL or PTRACE_SYSEMU, the tracee enters syscall-enter-stop just prior to entering any system call (which will not be executed if the restart was using PTRACE_SYSEMU, regardless of any change made to registers at this point or how the tracee is restarted after this stop). ... If the tracee is continued using any other method (including PTRACE_SYSEMU), no syscall-exit-stop occurs. Note that all mentions PTRACE_SYSEMU apply equally to PTRACE_SYSEMU_SINGLESTEP." Fix by introducing report_single_step(), which returns false when _TIF_SYSCALL_EMU is set, skipping the redundant exit stop. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Fixes: ac2081cdc4d9 ("arm64: ptrace: Consistently use pseudo-singlestep exc= eptions") Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/ptrace.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index f743cbec1c3a..96462de75d4b 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2482,16 +2482,26 @@ int syscall_trace_enter(struct pt_regs *regs) return regs->syscallno; } =20 +static inline bool report_single_step(unsigned long flags) +{ + if (flags & _TIF_SYSCALL_EMU) + return false; + + return flags & _TIF_SINGLESTEP; +} + void syscall_trace_exit(struct pt_regs *regs) { unsigned long flags =3D read_thread_flags(); + bool step; =20 audit_syscall_exit(regs); =20 if (flags & _TIF_SYSCALL_TRACEPOINT) trace_sys_exit(regs, syscall_get_return_value(current, regs)); =20 - if (flags & (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP)) + step =3D report_single_step(flags); + if (step || flags & _TIF_SYSCALL_TRACE) report_syscall_exit(regs); =20 rseq_syscall(regs); --=20 2.34.1 From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout01.his.huawei.com (canpmsgout01.his.huawei.com [113.46.200.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ABAAB415F2E for ; Wed, 2 Sep 2026 09:55:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342910; cv=none; b=UGZRH3ny3k3LHUEujlqCz/Zz980/67OJfXDJCA1ReK8ifvGMYlx3GI+oCLZS2lyDpZCAG4cbrF8lvodnyY7BlZh05vPhu2mNNXpTHEdPpBjiYLArWTBHp885E4KxlzYenygehpYTz95biQ1Rwi4K5BFU8VCJ5qg36erc9kL9y/0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342910; c=relaxed/simple; bh=lwvCQkIp/yfl+NRCEGXg75MolCN7sDNZfOS0Hn2yg/0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XGQ1eUVmpAmD0TtiZp+ACIf5g4RERvVsc+Ad9ZtDWEIyg+6bXvaqlJoz7xWYI4Sm7ODVmxYaP3N5c/M6MuX5Xk6PKPV6OfUj73eDkWjfdWhv5paNW19iIm4nvuD8WvTKwZneO8B+JK9T+UUdMB0JDqu4FrbYV6ejCPYCEwZDioU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=xcHNuANS; arc=none smtp.client-ip=113.46.200.216 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="xcHNuANS" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=uaX39/CE0Q5UxvlotHbRwxFXgD9FMOYuW98v5zboCb0=; b=xcHNuANSzX9n+igcAqjiUBDz1CrooEDLf+EJ7mbDAmiiGQ72Hlu+8cgu2yV5hPOWJczpEr6Yg coYmblX4RpoQS8AQQhSLPuiwf+g3lEgKZTIB4kNXSvsLepWCqmuOYmP2hw0b1kf6WuGJT0Tkcof AW0LX0rr1BrhLwm/vJEU60s= Received: from mail.maildlp.com (unknown [172.19.163.104]) by canpmsgout01.his.huawei.com (SkyGuard) with ESMTPS id 4hZd8S4L0dz1T4gl; Wed, 2 Sep 2026 17:43:36 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 357154058E; Wed, 2 Sep 2026 17:54:58 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 2 Sep 2026 17:54:56 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v18 02/14] arm64: ptrace: Rework audit_syscall_entry() Date: Wed, 2 Sep 2026 17:55:25 +0800 Message-ID: <20260902095537.602517-3-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902095537.602517-1-ruanjinjie@huawei.com> References: <20260902095537.602517-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Extract syscall_enter_audit() helper and switch to generic helpers to get syscall number and syscall arguments, matching the generic entry implementation. The new code: - Checks audit_context() first to avoid unnecessary work when audit is not active. - Use syscall_get_arguments() helper instead of directly accessing regs fields. - Use syscall_get_nr() helper to get syscall number instead of directly accessing regs->syscallno. - Now exactly equivalent to generic entry's syscall_enter_audit(). This is a preparation step for converting arm64 to the generic entry infrastructure. No functional changes intended. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/ptrace.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 96462de75d4b..ede6f3bf29e0 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2458,6 +2458,17 @@ static void report_syscall_exit(struct pt_regs *regs) } } =20 +#ifdef CONFIG_AUDITSYSCALL +static inline void syscall_enter_audit(struct pt_regs *regs) +{ + long syscall =3D syscall_get_nr(current, regs); + unsigned long args[6]; + + syscall_get_arguments(current, regs, args); + __audit_syscall_entry(syscall, args[0], args[1], args[2], args[3]); +} +#endif + int syscall_trace_enter(struct pt_regs *regs) { unsigned long flags =3D read_thread_flags(); @@ -2476,8 +2487,8 @@ int syscall_trace_enter(struct pt_regs *regs) if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) trace_sys_enter(regs, regs->syscallno); =20 - audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1], - regs->regs[2], regs->regs[3]); + if (unlikely(audit_context())) + syscall_enter_audit(regs); =20 return regs->syscallno; } --=20 2.34.1 From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout06.his.huawei.com (canpmsgout06.his.huawei.com [113.46.200.221]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7FBEC42B301 for ; Wed, 2 Sep 2026 09:55:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.221 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342914; cv=none; b=pLQVu6LpO/A6M3c8u9xgVXX4p0FXQBalRpTO8xnr00o8ir101x5rXOX1ZFQGQAYaKaP5OZyuNN9bB9dfQunclyF+MSmR7GPH/f/glzXPCOqa8g9MfMRj48VwjnFZqI4vzlXkwMfG3czN5ch+EPU8Yc9D0WbDkhA8o6vix4sRjUo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342914; c=relaxed/simple; bh=Jdr3ln7KXGrq36YCKA0/b6vG+5RrjK+NoGbcIpAzUG8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jtlmckX+XYvcjtTK6x/RyD6PnzAz70kiD9yuYmIunZgj0ZWlu+SptVnZQj1DnvGD8EioD6Xp/dvMa1POKRdwadUMSOPh5WobX7laXzpB95lhJEbf8+GVziLibEvwvsgwtSKnJ9S0K6sDMsS4XvLWg7fqsMaK+uMLbEZnbJRNfe4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=rpT9N5Tu; arc=none smtp.client-ip=113.46.200.221 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="rpT9N5Tu" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=/ZCmpI5ilpbz/FIQqVGzltAknX2qQEJHrIQ0Yhx+vwM=; b=rpT9N5TuflYk1bmaV/pSQWSRat7xhSvNXh41qo/pC6UswEPuaQFCDFSZCR8Le5hQb8Nl6qN11 toraYJvVhhgg7tHrAq12btnKjxh9shwSqm8DzSYfjZP5GsO0MDPjxhTlRfeLZ5hgbzXS91dzfp8 rMLi9oY+LchY2CiEbEVKTHk= Received: from mail.maildlp.com (unknown [172.19.163.104]) by canpmsgout06.his.huawei.com (SkyGuard) with ESMTPS id 4hZd973jZZzRhVJ; Wed, 2 Sep 2026 17:44:11 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 6FECA4058E; Wed, 2 Sep 2026 17:54:59 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 2 Sep 2026 17:54:58 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v18 03/14] arm64: ptrace: Open-code seccomp check in syscall_trace_enter() Date: Wed, 2 Sep 2026 17:55:26 +0800 Message-ID: <20260902095537.602517-4-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902095537.602517-1-ruanjinjie@huawei.com> References: <20260902095537.602517-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Refactor syscall_trace_enter() by open-coding the seccomp check to align with the generic entry framework. The generic entry implementation expands the seccomp check in-place by testing SYSCALL_WORK_SECCOMP and directly calling the underlying __seccomp_permit_syscall() function. Moreover, generic entry explicitly re-reads work flags after ptrace handling to ensure any updates to seccomp work flags during the ptrace stop are observed. Bring arm64 in line with this behavior: - Re-read thread flags after ptrace handling. - Test the updated flags for _TIF_SECCOMP and call __seccomp_permit_syscall(). No functional changes are intended; this change simplifies future migration to the generic entry framework. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Link: https://lore.kernel.org/all/20260713025712.416366-1-ruanjinjie@huawei= .com/ Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/ptrace.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index ede6f3bf29e0..bb1b3261b767 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2478,11 +2478,16 @@ int syscall_trace_enter(struct pt_regs *regs) ret =3D report_syscall_entry(regs); if (ret || (flags & _TIF_SYSCALL_EMU)) return NO_SYSCALL; + + /* ptrace might have changed thread flags */ + flags =3D read_thread_flags(); } =20 /* Do the secure computing after ptrace; failures should be fast. */ - if (!seccomp_permit_syscall()) - return NO_SYSCALL; + if (unlikely(flags & _TIF_SECCOMP)) { + if (!__seccomp_permit_syscall()) + return NO_SYSCALL; + } =20 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) trace_sys_enter(regs, regs->syscallno); --=20 2.34.1 From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout12.his.huawei.com (canpmsgout12.his.huawei.com [113.46.200.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E32742E418 for ; Wed, 2 Sep 2026 09:55:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.227 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342919; cv=none; b=bd//tzDx+aXzLHTdNW9efO+pFwNK3t273KTUqlzyCX1ZGovy40rSDa9v2OZl6rrB/kQ8LpP3gKMzeyTKG46aVvUMtnuypzWTtr0ODCWofs1vgxGVWDHMRExOL47/kLPeCEzsaeaU8s6bZGu0Qxp2pyYglFgt2htf8mUXmr43aAc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342919; c=relaxed/simple; bh=pxSP+065acCDZJbeXQ1fjk94yhHDasHZpa8UPXGEGiQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Q0Gt6yG4q+EbFfdSWkmhcSqowwVZ4exdok2uOBSirYFt679Qz5iHTUdRweDJtIIrWROXaRpuObfF7wRZoxMcWaVReTXyKJLga5TQXR4DTZKG2VDyDFGPRxA0m30DS3ueuLqUNPS/cV2i8VUWibLHKulVkBpX9ThbjQZKqIgKdyI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=Kj/m/9z+; arc=none smtp.client-ip=113.46.200.227 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="Kj/m/9z+" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=wryyYAcpCkzLLWcXrlf2EzZ3f63nYwUbElfnMSxfW3I=; b=Kj/m/9z+0dvQhdyh67U/bsZDVVVhYipgR+iyjVKJhct6HEh9GyEEkRVCgA8xK8aHgZonBwTkC dfo3heE+I7pACRSN/eZL5+pU4sb6uIwvZDlmKQx5EDaEWkAl4Hk7lstjZWudPZB6OWGuBppI38S vXYs8s+/yHqcNE/TOnWgjoc= Received: from mail.maildlp.com (unknown [172.19.163.15]) by canpmsgout12.his.huawei.com (SkyGuard) with ESMTPS id 4hZd8g3Z3RznV04; Wed, 2 Sep 2026 17:43:47 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id AB36740586; Wed, 2 Sep 2026 17:55:00 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 2 Sep 2026 17:54:59 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v18 04/14] arm64: ptrace: Rename and clean up syscall_trace_enter() Date: Wed, 2 Sep 2026 17:55:27 +0800 Message-ID: <20260902095537.602517-5-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902095537.602517-1-ruanjinjie@huawei.com> References: <20260902095537.602517-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Rename syscall_trace_enter() to arm64_syscall_trace_enter() to avoid name collisions and clarify the boundary when arm64 eventually switches to the generic entry infrastructure. In addition, replace direct accesses to regs->syscallno with the standard syscall_get_nr() helper for both trace_sys_enter() and the return value. This decouples the tracing logic from architecture-specific struct pt_regs layouts, aligning the implementation with the generic entry pattern. No functional changes intended; this is a preparation step for converting arm64 to the generic entry infrastructure. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Reviewed-by: Linus Walleij Signed-off-by: Jinjie Ruan --- arch/arm64/include/asm/syscall.h | 2 +- arch/arm64/kernel/ptrace.c | 6 +++--- arch/arm64/kernel/syscall.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index 5e4c7fc44f73..d1dabdcde41c 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -120,7 +120,7 @@ static inline int syscall_get_arch(struct task_struct *= task) return AUDIT_ARCH_AARCH64; } =20 -int syscall_trace_enter(struct pt_regs *regs); +int arm64_syscall_trace_enter(struct pt_regs *regs); void syscall_trace_exit(struct pt_regs *regs); =20 #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index bb1b3261b767..e831b2520052 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2469,7 +2469,7 @@ static inline void syscall_enter_audit(struct pt_regs= *regs) } #endif =20 -int syscall_trace_enter(struct pt_regs *regs) +int arm64_syscall_trace_enter(struct pt_regs *regs) { unsigned long flags =3D read_thread_flags(); int ret; @@ -2490,12 +2490,12 @@ int syscall_trace_enter(struct pt_regs *regs) } =20 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) - trace_sys_enter(regs, regs->syscallno); + trace_sys_enter(regs, syscall_get_nr(current, regs)); =20 if (unlikely(audit_context())) syscall_enter_audit(regs); =20 - return regs->syscallno; + return syscall_get_nr(current, regs); } =20 static inline bool report_single_step(unsigned long flags) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 358ddfbf1401..3e78e159b2a1 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -113,7 +113,7 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, */ if (scno =3D=3D NO_SYSCALL) syscall_set_return_value(current, regs, -ENOSYS, 0); - scno =3D syscall_trace_enter(regs); + scno =3D arm64_syscall_trace_enter(regs); if (scno =3D=3D NO_SYSCALL) goto trace_exit; } --=20 2.34.1 From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout08.his.huawei.com (canpmsgout08.his.huawei.com [113.46.200.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB69339A4A7 for ; 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Wed, 2 Sep 2026 17:55:00 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v18 05/14] arm64: ptrace: Protect rseq_syscall() from tracer PC modifications Date: Wed, 2 Sep 2026 17:55:28 +0800 Message-ID: <20260902095537.602517-6-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902095537.602517-1-ruanjinjie@huawei.com> References: <20260902095537.602517-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Move the rseq_syscall() check earlier in the syscall exit path to ensure it operates on the original instruction pointer (regs->pc) before any potential modification by a tracer. [Background] When CONFIG_DEBUG_RSEQ is enabled, rseq_syscall() verifies that a system call was not executed within an rseq critical section by examining regs->pc. If a violation is detected, it triggers a SIGSEGV. [Problem] Currently, arm64 invokes rseq_syscall() after report_syscall_exit(). However, during report_syscall_exit(), a ptrace tracer can modify the task's instruction pointer via PTRACE_SETREGSET (with NT_PRSTATUS). This leads to an inconsistency where rseq may analyze a post-trace PC instead of the actual PC at the time of syscall exit. [Why this matters] The rseq check is intended to validate the execution context of the syscall itself. Analyzing a tracer-modified PC can lead to incorrect detection or missed violations. Moving the check earlier ensures rseq sees the authentic state of the task. [Alignment] This change aligns arm64 with: - Generic entry, which calls rseq_syscall() first. - arm32 implementation, which also performs the check before audit. [Impact] There is no functional change to signal delivery; SIGSEGV will still be processed in arm64_exit_to_user_mode() at the end of the exit path. Cc: Mark Rutland Cc: Thomas Gleixner Cc: Will Deacon Cc: Catalin Marinas Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/ptrace.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index e831b2520052..05800664695c 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2511,6 +2511,8 @@ void syscall_trace_exit(struct pt_regs *regs) unsigned long flags =3D read_thread_flags(); bool step; =20 + rseq_syscall(regs); + audit_syscall_exit(regs); =20 if (flags & _TIF_SYSCALL_TRACEPOINT) @@ -2519,8 +2521,6 @@ void syscall_trace_exit(struct pt_regs *regs) step =3D report_single_step(flags); if (step || flags & _TIF_SYSCALL_TRACE) report_syscall_exit(regs); - - rseq_syscall(regs); } =20 /* --=20 2.34.1 From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout04.his.huawei.com (canpmsgout04.his.huawei.com [113.46.200.219]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C12442DA5A for ; Wed, 2 Sep 2026 09:55:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.219 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342911; cv=none; b=IOXnYrYzZUOmem0bh6XYFuy/Jgg94PzeRe2xNwC+BMe9sCh/2KMKv4anSGtJlcCshxhNQir0DvyyhL2Hd+KGu92RkrEb5Dgc3EQRTJj60/B62nMcHbaAl6tCNeSi4ptUJF9HXFy10+6+Vx1VOWRF6crGZ7EUEy3h1nLB8Pmi9ZA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342911; c=relaxed/simple; bh=FCedoID+A/z/v2WpnS+RwAbzI4wJHXx3lh3fLnfq0lw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=onKYQbnjykqsMsU+qr0CXGNLN/j238XbucCRH30pcfjR9KNNRUk7L7lb745+DVJiYhJzoNONLKch4Rdr28gYjJ+nyv2kFYpifGd69CRN99MFITzFjY5ZDhFYtLh3ZfBq5xal2LlQS8fQPmaFJ3YPRzDjGrDuSbYlr6UJXN0DpZc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=gQ5LofUW; arc=none smtp.client-ip=113.46.200.219 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="gQ5LofUW" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=ovxHcPr2c6qanD+Vv3eKyELWdpdHqRNDhl0m5BC+0cE=; b=gQ5LofUWtwwzCJDR9K4hm1xONWWwK4FEs2aisKnph0rkzaUkvrrZzfS9+qXv3WTbEkH0zd/aJ kKlB5R+nWOabsSrRuJCOYxkPUnAV0JSZ7Ep4M/EimPS9bDvcl25PZZiuQjo1YO23nhc6e0lQuW0 GbOwrljIhC9Anqr7mQZIUQQ= Received: from mail.maildlp.com (unknown [172.19.162.197]) by canpmsgout04.his.huawei.com (SkyGuard) with ESMTPS id 4hZd9731vkz1prm2; Wed, 2 Sep 2026 17:44:11 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 2D3644057D; Wed, 2 Sep 2026 17:55:03 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 2 Sep 2026 17:55:01 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v18 06/14] arm64: syscall: Rework the syscall exit path in el0_svc_common() Date: Wed, 2 Sep 2026 17:55:29 +0800 Message-ID: <20260902095537.602517-7-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902095537.602517-1-ruanjinjie@huawei.com> References: <20260902095537.602517-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" In preparation for moving arm64 over to the generic entry, invert the nested conditional flags check within el0_svc_common(). No functional changes. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Reviewed-by: Linus Walleij Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/syscall.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 3e78e159b2a1..b8d7d29a431b 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -127,8 +127,9 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, */ if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { flags =3D read_thread_flags(); - if (!has_syscall_work(flags) && !(flags & _TIF_SINGLESTEP)) - return; + if (has_syscall_work(flags) || flags & _TIF_SINGLESTEP) + syscall_trace_exit(regs); + return; } =20 trace_exit: --=20 2.34.1 From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout09.his.huawei.com (canpmsgout09.his.huawei.com [113.46.200.224]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78F5F42EEDA for ; Wed, 2 Sep 2026 09:55:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.224 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342913; cv=none; b=YYTTjvluLm7uLNjTZ4NXpx7U3DPuHQfIctn1+1UDrkNHFx1DDijLcP3UdlZW+5Fu0B0MAiNldkmksiTltXbiDWTHIHE2hLvpRmDQ3i4mXkHAVPAi8RkC8uHiRLLGzJuozP067CqwzVWprpZC01TEZjxOI54wtVClUiPqrE0B6bU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342913; c=relaxed/simple; bh=I5Md7Lbufy/N98rSj2HN6I/iv7kg6i4YH3IzpXuTcEM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ATHAkr5/+KgIaPWThOupKrYPEKTVdNMhKakEIuOFVnwjXzEScgbetRpSyWkwJLABi4sUhV3Mz5va5dJ23ABr5xBHKrWYhqlILikP15Bm+kKzNh9cvGgJ/9QtE2b2jWWqy2dsMvNkoqUzE1nM/RXTg41jcqP+iZooFspsOSkSoNQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=FJmiMl67; arc=none smtp.client-ip=113.46.200.224 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="FJmiMl67" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=kAf/nNR8HHqMYLpYQ0QlqlNtM4B7wPnvDV7tS7QLCUI=; b=FJmiMl67ze5ynmXSiSZqC7Od13NzNSTui1ckmmkkQoOoGuNNB6Vo5gGdSwXHjllgTexNMnAjd l6KzDsPoyVyvncGWdojYByeIyXbESsQVQpffTLQRPDwkjcL25ce2PR2SeBRs6CCg/zIoYZerjlh GBfquV7mquE+DnSsOwVjjY4= Received: from mail.maildlp.com (unknown [172.19.163.163]) by canpmsgout09.his.huawei.com (SkyGuard) with ESMTPS id 4hZd9C0Trkz1cyVL; Wed, 2 Sep 2026 17:44:15 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 6975A4057A; Wed, 2 Sep 2026 17:55:04 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 2 Sep 2026 17:55:03 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v18 07/14] arm64: ptrace: Pass thread flags to trace enter/exit Date: Wed, 2 Sep 2026 17:55:30 +0800 Message-ID: <20260902095537.602517-8-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902095537.602517-1-ruanjinjie@huawei.com> References: <20260902095537.602517-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Move the reading of thread flags from inside arm64_syscall_trace_enter() and syscall_trace_exit() to their callers. This aligns the function signatures with the generic entry framework, where the caller is responsible for supplying the flags. In el0_svc_common(), the flags are now passed directly to the tracing functions, and re-read before the enter/exit path to reflect any updates. No functional change intended; this is a preparatory step for converting arm64 to the generic entry infrastructure. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/include/asm/syscall.h | 4 ++-- arch/arm64/kernel/ptrace.c | 6 ++---- arch/arm64/kernel/syscall.c | 11 +++++++---- 3 files changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index d1dabdcde41c..696739f5a250 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -120,7 +120,7 @@ static inline int syscall_get_arch(struct task_struct *= task) return AUDIT_ARCH_AARCH64; } =20 -int arm64_syscall_trace_enter(struct pt_regs *regs); -void syscall_trace_exit(struct pt_regs *regs); +int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); +void syscall_trace_exit(struct pt_regs *regs, unsigned long flags); =20 #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 05800664695c..ed970576d9a7 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2469,9 +2469,8 @@ static inline void syscall_enter_audit(struct pt_regs= *regs) } #endif =20 -int arm64_syscall_trace_enter(struct pt_regs *regs) +int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags) { - unsigned long flags =3D read_thread_flags(); int ret; =20 if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) { @@ -2506,9 +2505,8 @@ static inline bool report_single_step(unsigned long f= lags) return flags & _TIF_SINGLESTEP; } =20 -void syscall_trace_exit(struct pt_regs *regs) +void syscall_trace_exit(struct pt_regs *regs, unsigned long flags) { - unsigned long flags =3D read_thread_flags(); bool step; =20 rseq_syscall(regs); diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index b8d7d29a431b..e778aac6fab9 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -113,7 +113,7 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, */ if (scno =3D=3D NO_SYSCALL) syscall_set_return_value(current, regs, -ENOSYS, 0); - scno =3D arm64_syscall_trace_enter(regs); + scno =3D arm64_syscall_trace_enter(regs, read_thread_flags()); if (scno =3D=3D NO_SYSCALL) goto trace_exit; } @@ -127,13 +127,16 @@ static void el0_svc_common(struct pt_regs *regs, int = scno, int sc_nr, */ if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { flags =3D read_thread_flags(); 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charset="utf-8" Introduce a helper arm64_syscall_exit_to_user_mode_work() that encapsulates the re-reading of thread flags and the call to syscall_trace_exit(). Use it in el0_svc_common() to replace the open-coded instances, removing the duplicated flags read and making the control flow simpler. This aligns the arm64 exit path with the pattern expected by the generic entry infrastructure, which uses a similar syscall_exit_to_user_mode_work() callback. No functional changes intended; this is a preparation step for converting arm64 to the generic entry infrastructure. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Reviewed-by: Linus Walleij Signed-off-by: Jinjie Ruan --- arch/arm64/include/asm/syscall.h | 7 +++++++ arch/arm64/kernel/syscall.c | 9 +++------ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index 696739f5a250..3e4672ab4a4f 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -123,4 +123,11 @@ static inline int syscall_get_arch(struct task_struct = *task) int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); void syscall_trace_exit(struct pt_regs *regs, unsigned long flags); =20 +static __always_inline void arm64_syscall_exit_to_user_mode_work(struct pt= _regs *regs) +{ + unsigned long flags =3D read_thread_flags(); + + syscall_trace_exit(regs, flags); +} + #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index e778aac6fab9..0061fc63e7ba 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -127,16 +127,13 @@ static void el0_svc_common(struct pt_regs *regs, int = scno, int sc_nr, */ if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { flags =3D read_thread_flags(); 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charset="utf-8" Refactor the syscall exit path to better match the generic entry framework. Specifically: - Introduce `_TIF_SYSCALL_EXIT_WORK` to aggregate exit-time thread flags (trace, audit, tracepoint). - Rename `syscall_trace_exit()` to `arm64_syscall_exit_work()` to better reflect its role. - Move `rseq_syscall()` out of `arm64_syscall_exit_work()` and into `arm64_syscall_exit_to_user_mode_work()` so that it runs unconditionally on all exits, consistent with generic entry. - Gate `arm64_syscall_exit_work()` behind the new flag check, mirroring the generic entry exit's pattern. Gating audit on `_TIF_SYSCALL_AUDIT` is equivalent to the previous `audit_context()` check: the audit context and flag are statically allocated at fork and freed at exit, remaining stable throughout syscall execution. No functional changes intended. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Reviewed-by: Linus Walleij Signed-off-by: Jinjie Ruan --- arch/arm64/include/asm/syscall.h | 8 ++++++-- arch/arm64/include/asm/thread_info.h | 3 +++ arch/arm64/kernel/ptrace.c | 5 +---- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index 3e4672ab4a4f..7cc872fde019 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -8,6 +8,7 @@ #include #include #include +#include =20 typedef long (*syscall_fn_t)(const struct pt_regs *regs); =20 @@ -121,13 +122,16 @@ static inline int syscall_get_arch(struct task_struct= *task) } =20 int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); -void syscall_trace_exit(struct pt_regs *regs, unsigned long flags); +void arm64_syscall_exit_work(struct pt_regs *regs, unsigned long flags); =20 static __always_inline void arm64_syscall_exit_to_user_mode_work(struct pt= _regs *regs) { unsigned long flags =3D read_thread_flags(); =20 - syscall_trace_exit(regs, flags); + rseq_syscall(regs); + + if (unlikely(flags & _TIF_SYSCALL_EXIT_WORK) || flags & _TIF_SINGLESTEP) + arm64_syscall_exit_work(regs, flags); } =20 #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/= thread_info.h index 5d7fe3e153c8..56a2c9426a32 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -112,6 +112,9 @@ void arch_setup_new_exec(void); _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \ _TIF_SYSCALL_EMU) =20 +#define _TIF_SYSCALL_EXIT_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ + _TIF_SYSCALL_TRACEPOINT) + #ifdef CONFIG_SHADOW_CALL_STACK #define INIT_SCS \ .scs_base =3D init_shadow_call_stack, \ diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index ed970576d9a7..08d2c39ae2ba 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -28,7 +28,6 @@ #include #include #include -#include =20 #include #include @@ -2505,12 +2504,10 @@ static inline bool report_single_step(unsigned long= flags) return flags & _TIF_SINGLESTEP; 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charset="utf-8" The syscall exit path in el0_svc_common() re-evaluates all _TIF_SYSCALL_WORK flags, but this mask contains flags that only matter on entry: - _TIF_SECCOMP: seccomp filtering is entry-only - _TIF_SYSCALL_EMU: PTRACE_SYSEMU skips the syscall on entry Re-checking them on exit is unnecessary and may trigger redundant work. Switch to _TIF_SYSCALL_EXIT_WORK for the exit-path re-check to evaluate only exit-relevant flags (_TIF_SYSCALL_TRACE, _TIF_SYSCALL_AUDIT, and _TIF_SYSCALL_TRACEPOINT). No functional change intended. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/syscall.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 0061fc63e7ba..a8e0bf8d362e 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -54,11 +54,6 @@ static void invoke_syscall(struct pt_regs *regs, unsigne= d int scno, syscall_set_return_value(current, regs, 0, ret); } =20 -static inline bool has_syscall_work(unsigned long flags) -{ - return unlikely(flags & _TIF_SYSCALL_WORK); -} - static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr, const syscall_fn_t syscall_table[]) { @@ -95,7 +90,7 @@ static void el0_svc_common(struct pt_regs *regs, int scno= , int sc_nr, return; } =20 - if (has_syscall_work(flags)) { + if (unlikely(flags & _TIF_SYSCALL_WORK)) { /* * The de-facto standard way to skip a system call using ptrace * is to set the system call to -1 (NO_SYSCALL) and set x0 to a @@ -125,9 +120,9 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, * check again. However, if we were tracing entry, then we always trace * exit regardless, as the old entry assembly did. */ - if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { + if (!(unlikely(flags & _TIF_SYSCALL_WORK)) && !IS_ENABLED(CONFIG_DEBUG_RS= EQ)) { flags =3D read_thread_flags(); - if (has_syscall_work(flags) || flags & _TIF_SINGLESTEP) + if (unlikely(flags & _TIF_SYSCALL_EXIT_WORK) || flags & _TIF_SINGLESTEP) arm64_syscall_exit_to_user_mode_work(regs); return; } --=20 2.34.1 From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout05.his.huawei.com (canpmsgout05.his.huawei.com [113.46.200.220]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6380F42C50D for ; Wed, 2 Sep 2026 09:55:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.220 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342917; cv=none; b=fl6bPoGGyVEr6hiHeGy8VVwVATNlkOx3GfeQXI7YeTJVIukVSiV/FpZsCgpfv7/AIhIAK6uC79WqJjlYdN8JnJ6x2Z4upeThlQffs5JiJj0bLULZ1S9ZvgArE7RhxRzsaXkjmJ6zExzvW/W7mf2TTq76w+7ECR3aabGaX5T39to= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342917; c=relaxed/simple; bh=IddDeEfV/fjrGC1MDv5pJavHPpqpxUhLWVu6y4EtSsQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=s/+hYS+gA5AxsVcKKlQeskUiJbSXeWE00RuhPPXOBQsBxm34WQpG9cPoSKUIOJxBQofcTcOrK8Y5UIVI6V9D/xBF2cjFpBoPrHp2R1IMYJZrGNsw9QYlBbcGZLqPPjX+lrkD95Eh0rEmClw8doKm3KJPabqwrixWxQXig/GJ7os= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=WDEPn39y; arc=none smtp.client-ip=113.46.200.220 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="WDEPn39y" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=VFUiQ56PPSYmoAUultY8YLBWsGtf+JS3lLeKNy5QVgQ=; b=WDEPn39yXQS13YE4m0aaU5DCLNIgAsKWej2Jh/qDYm32U2x5Y55Pr8y6Kj3+qt+AhopF/fSf+ svFMkDf5dwPFB7qwPWLQo/FlBdx/gFlwYCezF3MwVuHdUm1EVpkgYhae9815Ri7gxlP5LLjFA21 1siPJcBk9YLecKCYnSxtTjY= Received: from mail.maildlp.com (unknown [172.19.163.104]) by canpmsgout05.his.huawei.com (SkyGuard) with ESMTPS id 4hZd8n0cLnz12LG0; Wed, 2 Sep 2026 17:43:53 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 63CAE4058E; Wed, 2 Sep 2026 17:55:09 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 2 Sep 2026 17:55:08 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v18 11/14] arm64: syscall: Simplify el0_svc_common() syscall exit path Date: Wed, 2 Sep 2026 17:55:34 +0800 Message-ID: <20260902095537.602517-12-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902095537.602517-1-ruanjinjie@huawei.com> References: <20260902095537.602517-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Remove the redundant nested conditional check within the system call exit path of el0_svc_common() to streamline the exit sequence. The fast-path block is guarded by `!IS_ENABLED(CONFIG_DEBUG_RSEQ)`, so CONFIG_DEBUG_RSEQ is guaranteed to be disabled and the call of rseq_syscall() is a no-op. Under this constraint, the code logic inside the block becomes completely identical to what the arm64_syscall_exit_to_user_mode_work() helper already does. Replace that nested logic with a direct invocation of the helper, eliminating redundant code. Before: | if (... && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { | flags =3D read_thread_flags(); | if (unlikely(flags & _TIF_SYSCALL_EXIT_WORK) || flags & _TIF_SINGLESTEP) | arm64_syscall_exit_to_user_mode_work(regs); | return; | } | trace_exit: | arm64_syscall_exit_to_user_mode_work(regs); After simplify: | if (... && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { | arm64_syscall_exit_to_user_mode_work(regs); | return; | } | trace_exit: | arm64_syscall_exit_to_user_mode_work(regs); Furthermore, Since both the conditional fast-path and the fallback slow-path now uniformly invoke arm64_syscall_exit_to_user_mode_work(), this explicit conditional branch is entirely redundant regardless of whether the evaluation is true or false. Removing it collapses the duplicated logic into a single, unconditional path. No functional changes. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Reviewed-by: Linus Walleij Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/syscall.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index a8e0bf8d362e..3488afd45d20 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -114,19 +114,6 @@ static void el0_svc_common(struct pt_regs *regs, int s= cno, int sc_nr, } =20 invoke_syscall(regs, scno, sc_nr, syscall_table); - - /* - * The tracing status may have changed under our feet, so we have to - * check again. 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The ptrace and seccomp now returns a boolean flag rather than overloading NO_SYSCALL (-1). Changes: - arm64_syscall_trace_enter() returns bool: - false: abort syscall execution - true: proceed, with syscall number reread from regs - If we decide to execute the syscall, reread the syscall number and check if it is NO_SYSCALL again. Because when a tracer sets the syscall number to -1 and provides a custom return value in x0, this avoids calling invoke_syscall() which would overwrite the custom value with -ENOSYS by sys_ni_syscall(). Behavioral impact (unchanged): - User-issued syscall(-1): unchanged, returns -ENOSYS. - Tracer skip with custom x0: unchanged, returns custom x0 - Tracer skip without setting x0: unchanged, returns original argument (garbage) - Normal syscalls and seccomp rejects: unaffected No functional changes. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Reviewed-by: Linus Walleij Signed-off-by: Jinjie Ruan --- arch/arm64/include/asm/syscall.h | 2 +- arch/arm64/kernel/ptrace.c | 8 ++++---- arch/arm64/kernel/syscall.c | 6 +++++- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index 7cc872fde019..f19d4a8824ba 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -121,7 +121,7 @@ static inline int syscall_get_arch(struct task_struct *= task) return AUDIT_ARCH_AARCH64; } =20 -int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); +bool arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); void arm64_syscall_exit_work(struct pt_regs *regs, unsigned long flags); =20 static __always_inline void arm64_syscall_exit_to_user_mode_work(struct pt= _regs *regs) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 08d2c39ae2ba..9825f4aff187 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2468,14 +2468,14 @@ static inline void syscall_enter_audit(struct pt_re= gs *regs) } #endif =20 -int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags) +bool arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags) { int ret; =20 if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) { ret =3D report_syscall_entry(regs); if (ret || (flags & _TIF_SYSCALL_EMU)) - return NO_SYSCALL; + return false; =20 /* ptrace might have changed thread flags */ flags =3D read_thread_flags(); @@ -2484,7 +2484,7 @@ int arm64_syscall_trace_enter(struct pt_regs *regs, u= nsigned long flags) /* Do the secure computing after ptrace; failures should be fast. */ if (unlikely(flags & _TIF_SECCOMP)) { if (!__seccomp_permit_syscall()) - return NO_SYSCALL; + return false; } =20 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) @@ -2493,7 +2493,7 @@ int arm64_syscall_trace_enter(struct pt_regs *regs, u= nsigned long flags) if (unlikely(audit_context())) syscall_enter_audit(regs); =20 - return syscall_get_nr(current, regs); + return true; } =20 static inline bool report_single_step(unsigned long flags) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 3488afd45d20..72c6e8b7ab21 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -108,7 +108,11 @@ static void el0_svc_common(struct pt_regs *regs, int s= cno, int sc_nr, */ if (scno =3D=3D NO_SYSCALL) syscall_set_return_value(current, regs, -ENOSYS, 0); - scno =3D arm64_syscall_trace_enter(regs, read_thread_flags()); + if (!arm64_syscall_trace_enter(regs, read_thread_flags())) + goto trace_exit; + + /* Reread the syscall number as it might have been modified */ + scno =3D syscall_get_nr(current, regs); if (scno =3D=3D NO_SYSCALL) goto trace_exit; } --=20 2.34.1 From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout06.his.huawei.com (canpmsgout06.his.huawei.com [113.46.200.221]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 691D942FCA3 for ; Wed, 2 Sep 2026 09:55:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.221 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342924; cv=none; b=YGreiOe2efevNl8vjVX89rTfn2UOmiQBbWL8g0lLUnFF3wxZ4sPiA3a5HWF0xO44LTHdW78gLpFDZssVy8s/0K1UjNglFikWeS2zx2B12lHYN0G+DdDZEFKedPpjA78Caztn/4c1t53ecrYxlW3ThGNXXxFo1+0q20RShdj6C4o= ARC-Message-Signature: i=1; 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charset="utf-8" Implement the generic entry framework for arm64 to handle system call entry and exit. This follows the migration of x86, RISC-V, and LoongArch, consolidating architecture-specific syscall tracing and auditing into the common kernel entry infrastructure, making it easier to enable advanced features on arm64, such as "Syscall User Dispatch" and "rseq time slice extension" optimization. [Background] Arm64 has already adopted generic IRQ entry. Completing the conversion to the generic syscall entry framework reduces architectural divergence, simplifies maintenance, and allows arm64 to automatically benefit from improvements in the common entry code. [Changes] 1. Kconfig and Infrastructure: - Select GENERIC_ENTRY and remove GENERIC_IRQ_ENTRY (now implied). - Migrate struct thread_info to use the syscall_work field instead of TIF flags for syscall-related tasks. 2. Thread Info and Flags: - Remove definitions for TIF_SYSCALL_TRACE, TIF_SYSCALL_AUDIT, TIF_SYSCALL_TRACEPOINT, TIF_SECCOMP, and TIF_SYSCALL_EMU. - Replace _TIF_SYSCALL_WORK and _TIF_SYSCALL_EXIT_WORK with the generic SYSCALL_WORK bitmask. - Map single-step state to SYSCALL_EXIT_TRAP in debug-monitors.c. 3. Architecture-Specific Hooks (asm/entry-common.h): Implement following arch function by porting the existing arm64 logic to the generic interface: - arch_ptrace_report_syscall_permit_entry() - arch_ptrace_report_syscall_exit() 4. Cleanup and Refactoring: Remove redundant arm64-specific syscall tracing functions from ptrace.c, including following key functions and related audit/step helpers: - arm64_syscall_exit_to_user_mode_work() - arm64_syscall_trace_enter() - arm64_syscall_exit_work(). - Update el0_svc_common() in syscall.c to use the generic syscall_work checks and entry/exit call sites. [Why this matters] - Unified Interface: Aligns arm64 with the modern kernel entry standard. - Improved Maintainability: Bug fixes in kernel/entry/common.c now apply to arm64 automatically. - Feature Readiness: Simplifies the implementation of future cross-architecture syscall features. [Compatibility] This conversion maintains full ABI compatibility with existing userspace. The ptrace register-saving behavior, seccomp filtering, and syscall tracing semantics remain identical to the previous implementation. Additionally, since arm64 now does not select HAVE_GENERIC_TIF_BITS, there is no functional change regarding rseq management, as those generic entry pathways remain a no-op for this architecture." Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Thomas Gleixner Cc: Peter Zijlstra Tested-by: Ada Couprie Diaz Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Acked-by: Peter Zijlstra (Intel) Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Suggested-by: Kevin Brodsky Suggested-by: Mark Rutland Signed-off-by: Jinjie Ruan --- arch/arm64/Kconfig | 2 +- arch/arm64/include/asm/entry-common.h | 77 +++++++++++++++ arch/arm64/include/asm/syscall.h | 14 --- arch/arm64/include/asm/thread_info.h | 19 +--- arch/arm64/kernel/debug-monitors.c | 8 ++ arch/arm64/kernel/entry-common.c | 2 +- arch/arm64/kernel/ptrace.c | 136 -------------------------- arch/arm64/kernel/signal.c | 2 +- arch/arm64/kernel/syscall.c | 9 +- 9 files changed, 95 insertions(+), 174 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index b5a51b0ef944..3de3f728f4d8 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -129,9 +129,9 @@ config ARM64 select GENERIC_CPU_DEVICES select GENERIC_CPU_VULNERABILITIES select GENERIC_EARLY_IOREMAP + select GENERIC_ENTRY select GENERIC_IDLE_POLL_SETUP select GENERIC_IOREMAP - select GENERIC_IRQ_ENTRY select GENERIC_IRQ_IPI select GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD select GENERIC_IRQ_PROBE diff --git a/arch/arm64/include/asm/entry-common.h b/arch/arm64/include/asm= /entry-common.h index 1905765159aa..5fffa4347f5b 100644 --- a/arch/arm64/include/asm/entry-common.h +++ b/arch/arm64/include/asm/entry-common.h @@ -3,14 +3,21 @@ #ifndef _ASM_ARM64_ENTRY_COMMON_H #define _ASM_ARM64_ENTRY_COMMON_H =20 +#include #include =20 +#include #include #include #include #include #include =20 +enum ptrace_syscall_dir { + PTRACE_SYSCALL_ENTER =3D 0, + PTRACE_SYSCALL_EXIT, +}; + #define ARCH_EXIT_TO_USER_MODE_WORK (_TIF_MTE_ASYNC_FAULT | _TIF_FOREIGN_F= PSTATE) =20 static __always_inline void arch_exit_to_user_mode_work(struct pt_regs *re= gs, @@ -54,4 +61,74 @@ static inline bool arch_irqentry_exit_need_resched(void) =20 #define arch_irqentry_exit_need_resched arch_irqentry_exit_need_resched =20 +static __always_inline unsigned long ptrace_save_reg(struct pt_regs *regs, + enum ptrace_syscall_dir dir, + int *regno) +{ + unsigned long saved_reg; + + /* + * We have some ABI weirdness here in the way that we handle syscall + * exit stops because we indicate whether or not the stop has been + * signalled from syscall entry or syscall exit by clobbering a general + * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee + * and restoring its old value after the stop. This means that: + * + * - Any writes by the tracer to this register during the stop are + * ignored/discarded. + * + * - The actual value of the register is not available during the stop, + * so the tracer cannot save it and restore it later. + * + * - Syscall stops behave differently to seccomp and pseudo-step traps + * (the latter do not nobble any registers). + */ + *regno =3D (is_compat_task() ? 12 : 7); + saved_reg =3D regs->regs[*regno]; + regs->regs[*regno] =3D dir; + + return saved_reg; +} + +static __always_inline bool arch_ptrace_report_syscall_permit_entry(struct= pt_regs *regs) +{ + unsigned long saved_reg; + bool permit; + int regno; + + saved_reg =3D ptrace_save_reg(regs, PTRACE_SYSCALL_ENTER, ®no); + permit =3D ptrace_report_syscall_permit_entry(regs); + if (!permit) + forget_syscall(regs); + regs->regs[regno] =3D saved_reg; + + return permit; +} + +#define arch_ptrace_report_syscall_permit_entry arch_ptrace_report_syscall= _permit_entry + +static __always_inline void arch_ptrace_report_syscall_exit(struct pt_regs= *regs, + int step) +{ + unsigned long saved_reg; + int regno; + + saved_reg =3D ptrace_save_reg(regs, PTRACE_SYSCALL_EXIT, ®no); + if (!step) { + ptrace_report_syscall_exit(regs, 0); + regs->regs[regno] =3D saved_reg; + } else { + regs->regs[regno] =3D saved_reg; + + /* + * Signal a pseudo-step exception since we are stepping but + * tracer modifications to the registers may have rewound the + * state machine. + */ + ptrace_report_syscall_exit(regs, 1); + } +} + +#define arch_ptrace_report_syscall_exit arch_ptrace_report_syscall_exit + #endif /* _ASM_ARM64_ENTRY_COMMON_H */ diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index f19d4a8824ba..e3e716575846 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -120,18 +120,4 @@ static inline int syscall_get_arch(struct task_struct = *task) =20 return AUDIT_ARCH_AARCH64; } - -bool arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); -void arm64_syscall_exit_work(struct pt_regs *regs, unsigned long flags); - -static __always_inline void arm64_syscall_exit_to_user_mode_work(struct pt= _regs *regs) -{ - unsigned long flags =3D read_thread_flags(); - - rseq_syscall(regs); - - if (unlikely(flags & _TIF_SYSCALL_EXIT_WORK) || flags & _TIF_SINGLESTEP) - arm64_syscall_exit_work(regs, flags); -} - #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/= thread_info.h index 56a2c9426a32..3f621ba0f961 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -46,6 +46,7 @@ struct thread_info { u64 mpam_partid_pmg; #endif u32 cpu; + unsigned long syscall_work; /* SYSCALL_WORK_ flags */ }; =20 #define thread_saved_pc(tsk) \ @@ -68,11 +69,6 @@ void arch_setup_new_exec(void); #define TIF_UPROBE 5 /* uprobe breakpoint or singlestep */ #define TIF_MTE_ASYNC_FAULT 6 /* MTE Asynchronous Tag Check Fault */ #define TIF_NOTIFY_SIGNAL 7 /* signal notifications exist */ -#define TIF_SYSCALL_TRACE 8 /* syscall trace active */ -#define TIF_SYSCALL_AUDIT 9 /* syscall auditing */ -#define TIF_SYSCALL_TRACEPOINT 10 /* syscall tracepoint for ftrace */ -#define TIF_SECCOMP 11 /* syscall secure computing */ -#define TIF_SYSCALL_EMU 12 /* syscall emulation active */ #define TIF_PATCH_PENDING 13 /* pending live patching update */ #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ #define TIF_FREEZE 19 @@ -94,27 +90,14 @@ void arch_setup_new_exec(void); #define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) #define _TIF_FOREIGN_FPSTATE (1 << TIF_FOREIGN_FPSTATE) -#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) -#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) -#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) -#define _TIF_SECCOMP (1 << TIF_SECCOMP) -#define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU) #define _TIF_PATCH_PENDING (1 << TIF_PATCH_PENDING) #define _TIF_UPROBE (1 << TIF_UPROBE) -#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) #define _TIF_32BIT (1 << TIF_32BIT) #define _TIF_SVE (1 << TIF_SVE) #define _TIF_MTE_ASYNC_FAULT (1 << TIF_MTE_ASYNC_FAULT) #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) #define _TIF_TSC_SIGSEGV (1 << TIF_TSC_SIGSEGV) =20 -#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ - _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \ - _TIF_SYSCALL_EMU) - -#define _TIF_SYSCALL_EXIT_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ - _TIF_SYSCALL_TRACEPOINT) - #ifdef CONFIG_SHADOW_CALL_STACK #define INIT_SCS \ .scs_base =3D init_shadow_call_stack, \ diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-m= onitors.c index e271fbac5f82..5da530034e2e 100644 --- a/arch/arm64/kernel/debug-monitors.c +++ b/arch/arm64/kernel/debug-monitors.c @@ -382,11 +382,19 @@ void user_enable_single_step(struct task_struct *task) =20 if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP)) set_regs_spsr_ss(task_pt_regs(task)); + + /* + * Ensure that the generic entry code triggers a trap once stepping + * out of a system call prior to executing any user instruction, + * as the generic entry code does not natively check for TIF_SINGLESTEP. + */ + set_task_syscall_work(task, SYSCALL_EXIT_TRAP); } NOKPROBE_SYMBOL(user_enable_single_step); =20 void user_disable_single_step(struct task_struct *task) { clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP); + clear_task_syscall_work(task, SYSCALL_EXIT_TRAP); } NOKPROBE_SYMBOL(user_disable_single_step); diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-com= mon.c index 72c03ccea59f..e8b750a962e8 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -6,7 +6,7 @@ */ =20 #include -#include +#include #include #include #include diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 9825f4aff187..df3b0d343d7d 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -8,7 +8,6 @@ * Copyright (C) 2012 ARM Ltd. */ =20 -#include #include #include #include @@ -18,7 +17,6 @@ #include #include #include -#include #include #include #include @@ -37,13 +35,9 @@ #include #include #include -#include #include #include =20 -#define CREATE_TRACE_POINTS -#include - struct pt_regs_offset { const char *name; int offset; @@ -2388,136 +2382,6 @@ long arch_ptrace(struct task_struct *child, long re= quest, return ptrace_request(child, request, addr, data); } =20 -enum ptrace_syscall_dir { - PTRACE_SYSCALL_ENTER =3D 0, - PTRACE_SYSCALL_EXIT, -}; - -static __always_inline unsigned long ptrace_save_reg(struct pt_regs *regs, - enum ptrace_syscall_dir dir, - int *regno) -{ - unsigned long saved_reg; - - /* - * We have some ABI weirdness here in the way that we handle syscall - * exit stops because we indicate whether or not the stop has been - * signalled from syscall entry or syscall exit by clobbering a general - * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee - * and restoring its old value after the stop. This means that: - * - * - Any writes by the tracer to this register during the stop are - * ignored/discarded. - * - * - The actual value of the register is not available during the stop, - * so the tracer cannot save it and restore it later. - * - * - Syscall stops behave differently to seccomp and pseudo-step traps - * (the latter do not nobble any registers). - */ - *regno =3D (is_compat_task() ? 12 : 7); - saved_reg =3D regs->regs[*regno]; - regs->regs[*regno] =3D dir; - - return saved_reg; -} - -static int report_syscall_entry(struct pt_regs *regs) -{ - unsigned long saved_reg; - int regno, ret; - - saved_reg =3D ptrace_save_reg(regs, PTRACE_SYSCALL_ENTER, ®no); - ret =3D !ptrace_report_syscall_permit_entry(regs); - if (ret) - forget_syscall(regs); - regs->regs[regno] =3D saved_reg; - - return ret; -} - -static void report_syscall_exit(struct pt_regs *regs) -{ - unsigned long saved_reg; - int regno; - - saved_reg =3D ptrace_save_reg(regs, PTRACE_SYSCALL_EXIT, ®no); - if (!test_thread_flag(TIF_SINGLESTEP)) { - ptrace_report_syscall_exit(regs, 0); - regs->regs[regno] =3D saved_reg; - } else { - regs->regs[regno] =3D saved_reg; - - /* - * Signal a pseudo-step exception since we are stepping but - * tracer modifications to the registers may have rewound the - * state machine. - */ - ptrace_report_syscall_exit(regs, 1); - } -} - -#ifdef CONFIG_AUDITSYSCALL -static inline void syscall_enter_audit(struct pt_regs *regs) -{ - long syscall =3D syscall_get_nr(current, regs); - unsigned long args[6]; - - syscall_get_arguments(current, regs, args); - __audit_syscall_entry(syscall, args[0], args[1], args[2], args[3]); -} -#endif - -bool arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags) -{ - int ret; - - if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) { - ret =3D report_syscall_entry(regs); - if (ret || (flags & _TIF_SYSCALL_EMU)) - return false; - - /* ptrace might have changed thread flags */ - flags =3D read_thread_flags(); - } - - /* Do the secure computing after ptrace; failures should be fast. */ - if (unlikely(flags & _TIF_SECCOMP)) { - if (!__seccomp_permit_syscall()) - return false; - } - - if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) - trace_sys_enter(regs, syscall_get_nr(current, regs)); - - if (unlikely(audit_context())) - syscall_enter_audit(regs); - - return true; -} - -static inline bool report_single_step(unsigned long flags) -{ - if (flags & _TIF_SYSCALL_EMU) - return false; - - return flags & _TIF_SINGLESTEP; -} - -void arm64_syscall_exit_work(struct pt_regs *regs, unsigned long flags) -{ - bool step; - - audit_syscall_exit(regs); - - if (flags & _TIF_SYSCALL_TRACEPOINT) - trace_sys_exit(regs, syscall_get_return_value(current, regs)); - - step =3D report_single_step(flags); - if (step || flags & _TIF_SYSCALL_TRACE) - report_syscall_exit(regs); -} - /* * SPSR_ELx bits which are always architecturally RES0 per ARM DDI 0487D.a. * We permit userspace to set SSBS (AArch64 bit 12, AArch32 bit 23) which = is diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 38e6fa204c17..093eebb9d764 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -8,8 +8,8 @@ =20 #include #include +#include #include -#include #include #include #include diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 72c6e8b7ab21..4a13108defb0 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -2,6 +2,7 @@ =20 #include #include +#include #include #include #include @@ -58,6 +59,7 @@ static void el0_svc_common(struct pt_regs *regs, int scno= , int sc_nr, const syscall_fn_t syscall_table[]) { unsigned long flags =3D read_thread_flags(); + unsigned long work; =20 regs->orig_x0 =3D regs->regs[0]; regs->syscallno =3D scno; @@ -90,7 +92,8 @@ static void el0_svc_common(struct pt_regs *regs, int scno= , int sc_nr, return; } =20 - if (unlikely(flags & _TIF_SYSCALL_WORK)) { + work =3D READ_ONCE(current_thread_info()->syscall_work); + if (unlikely(work & SYSCALL_WORK_ENTER)) { /* * The de-facto standard way to skip a system call using ptrace * is to set the system call to -1 (NO_SYSCALL) and set x0 to a @@ -108,7 +111,7 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, */ if (scno =3D=3D NO_SYSCALL) syscall_set_return_value(current, regs, -ENOSYS, 0); - if (!arm64_syscall_trace_enter(regs, read_thread_flags())) + if (!syscall_trace_enter(regs, work, scno)) goto trace_exit; =20 /* Reread the syscall number as it might have been modified */ @@ -119,7 +122,7 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, =20 invoke_syscall(regs, scno, sc_nr, syscall_table); trace_exit: - arm64_syscall_exit_to_user_mode_work(regs); + syscall_exit_to_user_mode_work(regs); } =20 void do_el0_svc(struct pt_regs *regs) --=20 2.34.1 From nobody Sat Sep 26 11:01:55 2026 Received: from canpmsgout10.his.huawei.com (canpmsgout10.his.huawei.com [113.46.200.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83F6A433BD9 for ; Wed, 2 Sep 2026 09:55:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.225 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342920; cv=none; b=DrZd6QDyZ07FMIwAFxzOY0Kv+qTseJdBrXh5FVM4yLfku6FZUfnWs8DCeUSeBrfjHkx2PR7fsGDaqbxc2kncm9DZBqgQzi6E4NBkih+lnQ+WWJsFMrz+9Nh2R/GxMtECrmZL/Lj9sT4JGyKDGoH8C71xlymVD9K6Rhc3QpgglTw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788342920; c=relaxed/simple; bh=gQCqwMyijXQUPHUAAVu5D+LWgRlhb2dH81hwEWQXdms=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; 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Wed, 2 Sep 2026 17:44:22 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 2437640586; Wed, 2 Sep 2026 17:55:13 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 2 Sep 2026 17:55:11 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v18 14/14] arm64: Inline el0_svc_common() Date: Wed, 2 Sep 2026 17:55:37 +0800 Message-ID: <20260902095537.602517-15-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902095537.602517-1-ruanjinjie@huawei.com> References: <20260902095537.602517-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) After converting arm64 to Generic Entry framework, the compiler no longer inlines el0_svc_common() into its caller do_el0_svc(). This introduces a small but measurable overhead in the critical system call path. Manually forcing el0_svc_common() to be inlined restores the performance. Benchmarking with perf bench syscall basic on a Kunpeng 920 platform (based on v6.19-rc1) shows a ~1% performance uplift. Inlining this function reduces function prologue/epilogue overhead and allows for better compiler optimization in the hot system call dispatch path. | Metric | W/O this patch | With this patch | Change | | ---------- | -------------- | --------------- | --------- | | Total time | 2.195 [sec] | 2.171 [sec] | =E2=86=931.1% | | usecs/op | 0.219575 | 0.217192 | =E2=86=931.1% | | ops/sec | 4,554,260 | 4,604,225 | =E2=86=911.1% | Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/syscall.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 4a13108defb0..2535cae9413d 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -55,8 +55,8 @@ static void invoke_syscall(struct pt_regs *regs, unsigned= int scno, syscall_set_return_value(current, regs, 0, ret); } =20 -static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr, - const syscall_fn_t syscall_table[]) +static __always_inline void el0_svc_common(struct pt_regs *regs, int scno,= int sc_nr, + const syscall_fn_t syscall_table[]) { unsigned long flags =3D read_thread_flags(); unsigned long work; --=20 2.34.1