From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B22324AD7C3 for ; Wed, 2 Sep 2026 16:59:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368379; cv=none; b=jCRVbIA6JnfeV1uG6G0PKjV0k09Jz89qLhf7F/xNc6jwrA/x8Lt/LHNYLK4TeYBx+Q1tvnu7LP0qUq49Myhogi+qug4n5q1LKG8W3W18Ud28olqKc1HoAZdHFt1t2+HrqqaGNI7HKkWSuQZeE6BWsATvuvBlz3BysWZoWl6tYYE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368379; c=relaxed/simple; bh=eRWRwVmyjlE5o5mW18bi5RNy9Td3qiAsSoUwIEVHT2M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Iga/lsj/IN2xihBp95CW2giFWJf+Sk9zjm1AiSKzsynf57tpUbNxAJh2iLA02QixWfHO1nl3V3zklMnUdAhUzzmedsylAuHZsX3GUH/c9rLhwzniHTLK2Uo8ha/NaP5l4RuZItYRyiVxWr94MM4ioUnVjbjExI//owOSI4/MM74= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=jfeEVJl8; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="jfeEVJl8" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 231504E414EA; Wed, 2 Sep 2026 16:59:36 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id E5E8C6053C; Wed, 2 Sep 2026 16:59:35 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 8348C11C795A7; Wed, 2 Sep 2026 18:59:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368370; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=/A7lToJd5H8Wa6Ev0FF+7lmPELGplRLMRXbUL1yGhPg=; b=jfeEVJl8zbpV5MsO/cXg1WmxAegCB9mp8lsu9WFJ/rLG/EaAJokH6ni1OZ1Nu1o5nxr6Fh PHH3hksj8ZVpc4Iztfe2xO3x3Ty+Ngw4VinS6UtE1FYQoWGvgl6G2HwW/zZjNMdZNFMxNm MNdInbX4XlMWceVvcRszfvrJRvQ4lgrBMNG/h+GFtrimg5oLtwKqYQPh+AlhOlwg6vnvhD ef6T1U0uixtnvVpAGs7nnanrFm9RuRUPO9i6YRUbKXJgThZhpZ2bt2s4rDW9cdaO56b69V ohXKZSk+PaRuQ+m5zcPEtdLxBiOYtd3xA31MpfvfQlRBKvWFeGX1YHRGUkmkQQ== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:15 +0200 Subject: [PATCH v4 01/25] mtd: spi-nor: Rename BFPT_DWORD15_QER_SR2_BIT1_BUGGY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-1-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The _BUGGY suffix is not super accurate. There is a behavior that indeed seems strange, but it is somewhat documented. The fact is, with this QER field the status register is considered 16-bit wide and if one writes the first 8 bits (SR1) without the next 8 bits (SR2) then the content of SR2 will be assumed to be 0x00 and will be cleared. Rename it BFPT_DWORD15_QER_SR2_BIT1_NO_1B_WR to align with the other namings (_NO_RD) and clarify the meaning of this field. No functional change. Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/sfdp.c | 2 +- drivers/mtd/spi-nor/sfdp.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index cf0e2dc7c120..526763c79f55 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -567,7 +567,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, params->quad_enable =3D NULL; break; =20 - case BFPT_DWORD15_QER_SR2_BIT1_BUGGY: + case BFPT_DWORD15_QER_SR2_BIT1_NO_1B_WR: /* * Writing only one byte to the Status Register has the * side-effect of clearing Status Register 2. diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h index f74a0eb339ea..d976c6c9a4ad 100644 --- a/drivers/mtd/spi-nor/sfdp.h +++ b/drivers/mtd/spi-nor/sfdp.h @@ -84,7 +84,7 @@ struct sfdp_bfpt { */ #define BFPT_DWORD15_QER_MASK GENMASK(22, 20) #define BFPT_DWORD15_QER_NONE (0x0UL << 20) /* Micron */ -#define BFPT_DWORD15_QER_SR2_BIT1_BUGGY (0x1UL << 20) +#define BFPT_DWORD15_QER_SR2_BIT1_NO_1B_WR (0x1UL << 20) #define BFPT_DWORD15_QER_SR1_BIT6 (0x2UL << 20) /* Macronix */ #define BFPT_DWORD15_QER_SR2_BIT7 (0x3UL << 20) #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD (0x4UL << 20) --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB8ED4AD7CD for ; Wed, 2 Sep 2026 16:59:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368385; cv=none; b=YoeMJu2IqbdBGUNJYpZHinGq5pIxWCRo3YXfJZLy2vWnZp0UWO+tq6IawQigYAuK2G29tUwe5c3Mkk75Ele2WIbXpki4FqLIvmOInHIsazWumq1xsY1SXmVAM1HO7z2uGJHOW6Nr1I8ad2xgubv7qtfeO2dK0BYxVsb3WUEkURk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368385; c=relaxed/simple; bh=6FzBw6jS3KLfjifaiSvCC/iS97apWPiqZtKl8CS0Txg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EyCqANQu00/Q1pWxUMVyNpAEHzOEbK/NGlmULwfPjvxoby7COwujlD5ItRmXI2iHP7TGKZAmRSDoIk02DkVv1DGBy2VoQ9CbR+yUja1LyRz5HxdMvKbY4YtJzRYvLj3sBKEQIrDCROXbRc2xGjbYdnZUYkjvsIKpN6mW0XMf4VY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Xd17MQZA; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Xd17MQZA" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 1CBAE1A1968; Wed, 2 Sep 2026 16:59:42 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id E3D2C6053C; Wed, 2 Sep 2026 16:59:41 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0940D11C798E5; Wed, 2 Sep 2026 18:59:34 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368376; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=aI8zX4gCXAqLNE3WArET0YJfq+liXSSkiVbLeqHam0E=; b=Xd17MQZAPvIVbZE1/Loy/a1KlRpV8LMjWd1cMxPLOjrxHazZVK5piFBN8BSIk5bTG0pAqG NyMlILm924rpZjA7NtuRD492HYv/4PWJ70nZRLfuiQgWym2jLt1CUKXzx6uzkeJkuYlL5E fwHC76x65PKBK2w9PmYJ7CrDxO7m8JrrNBDrmctRQx3joqaHq4JoPBkf2F4tkMODOlyyO3 EKQRD0aL4VDyeSvMsU+r9u7WVoDUDNzSu19GLptF9bU0XuKTj8unZ6WixV/LFhqZMlJP3n kBBWAUoP7mRkmcvL9xVnGLTChU0y3u5IRa468GHe9Me2vhi0y3hn3oswZSXf8w== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:16 +0200 Subject: [PATCH v4 02/25] mtd: spi-nor: Create a structure containing the flash opcodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-2-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Create a structure named opcodes in the flash parameters structures to store all the flash specific opcodes. They are typically discovered dynamically through SFDP parsing. Move the die_erase opcode inside. Later on we will add new fields there, like the supported opcodes for accessing the status registers, which are almost vendor specific. No fonctional change. Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/core.c | 6 +++--- drivers/mtd/spi-nor/core.h | 14 +++++++++++--- drivers/mtd/spi-nor/debugfs.c | 2 +- drivers/mtd/spi-nor/micron-st.c | 4 ++-- drivers/mtd/spi-nor/spansion.c | 4 ++-- 5 files changed, 19 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index fef7f426a3a2..29b8fe3d1c65 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1140,7 +1140,7 @@ static int spi_nor_erase_die(struct spi_nor *nor, lof= f_t addr, size_t die_size) =20 if (nor->spimem) { struct spi_mem_op op =3D - SPI_NOR_DIE_ERASE_OP(nor->params->die_erase_opcode, + SPI_NOR_DIE_ERASE_OP(nor->params->opcodes.die_erase, nor->addr_nbytes, addr, multi_die); =20 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); @@ -3030,8 +3030,8 @@ static int spi_nor_late_init_params(struct spi_nor *n= or) return ret; } =20 - if (!nor->params->die_erase_opcode) - nor->params->die_erase_opcode =3D SPINOR_OP_CHIP_ERASE; + if (!nor->params->opcodes.die_erase) + nor->params->opcodes.die_erase =3D SPINOR_OP_CHIP_ERASE; =20 /* Default method kept for backward compatibility. */ if (!params->set_4byte_addr_mode) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index ba2d1a862c9d..2cc0c80da3fa 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -340,6 +340,16 @@ struct spi_nor_otp { const struct spi_nor_otp_ops *ops; }; =20 +/** + * struct spi_nor_opcodes - SPI NOR flash specific opcodes. + * List of variable opcodes used by the chip. + * + * @die_erase: opcode for erasing a die, defaults to SPINOR_OP_CHIP_ERASE + */ +struct spi_nor_opcodes { + u8 die_erase; +}; + /** * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings. * Includes legacy flash parameters and settings that can be overwritten @@ -362,7 +372,6 @@ struct spi_nor_otp { * command in octal DTR mode. * @n_banks: number of banks. * @n_dice: number of dice in the flash memory. - * @die_erase_opcode: die erase opcode. Defaults to SPINOR_OP_CHIP_ERASE. * @vreg_offset: volatile register offset for each die. * @hwcaps: describes the read and page program hardware * capabilities. @@ -393,13 +402,12 @@ struct spi_nor_flash_parameter { u8 rdsr_addr_nbytes; u8 n_banks; u8 n_dice; - u8 die_erase_opcode; u32 *vreg_offset; =20 struct spi_nor_hwcaps hwcaps; struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX]; - + struct spi_nor_opcodes opcodes; struct spi_nor_erase_map erase_map; struct spi_nor_otp otp; =20 diff --git a/drivers/mtd/spi-nor/debugfs.c b/drivers/mtd/spi-nor/debugfs.c index 288e2866daed..ef6f0ffcd6bb 100644 --- a/drivers/mtd/spi-nor/debugfs.c +++ b/drivers/mtd/spi-nor/debugfs.c @@ -146,7 +146,7 @@ static int spi_nor_params_show(struct seq_file *s, void= *data) =20 if (!(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { string_get_size(params->size, 1, STRING_UNITS_2, buf, sizeof(buf)); - seq_printf(s, " %02x (%s)\n", params->die_erase_opcode, buf); + seq_printf(s, " %02x (%s)\n", params->opcodes.die_erase, buf); } =20 seq_puts(s, "\nsector map\n"); diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index c75b0a1cd567..031cf887318c 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -131,7 +131,7 @@ static int micron_st_nor_four_die_late_init(struct spi_= nor *nor) { struct spi_nor_flash_parameter *params =3D nor->params; =20 - params->die_erase_opcode =3D SPINOR_OP_MT_DIE_ERASE; + params->opcodes.die_erase =3D SPINOR_OP_MT_DIE_ERASE; params->n_dice =3D 4; =20 /* @@ -147,7 +147,7 @@ static int micron_st_nor_two_die_late_init(struct spi_n= or *nor) { struct spi_nor_flash_parameter *params =3D nor->params; =20 - params->die_erase_opcode =3D SPINOR_OP_MT_DIE_ERASE; + params->opcodes.die_erase =3D SPINOR_OP_MT_DIE_ERASE; params->n_dice =3D 2; =20 /* diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 15dcec09332a..2a8238c707e1 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -675,7 +675,7 @@ static int s25hx_t_late_init(struct spi_nor *nor) cypress_nor_ecc_init(nor); =20 if (params->n_dice > 1) - params->die_erase_opcode =3D SPINOR_OP_CYPRESS_DIE_ERASE; + params->opcodes.die_erase =3D SPINOR_OP_CYPRESS_DIE_ERASE; =20 return 0; } @@ -763,7 +763,7 @@ static int s28hx_t_late_init(struct spi_nor *nor) cypress_nor_ecc_init(nor); =20 if (params->n_dice > 1) - params->die_erase_opcode =3D SPINOR_OP_CYPRESS_DIE_ERASE; + params->opcodes.die_erase =3D SPINOR_OP_CYPRESS_DIE_ERASE; =20 return 0; } --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD6DB4AA3E0; Wed, 2 Sep 2026 16:59:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368394; cv=none; b=SC7sRr6uDtun51/BMYhG1YC2pWFih2F451m8dq0qY5LKgA/xARWUl0t9F8q8D4FWLP1a6fmP++yQ8SqFKKJDxmnQDa6+gk/ozy5kv9iHV+NkvRpDZRgF8Fep51kMZZVPuzrOT88NTPfh6sT0+fBC87yBw3bckvV7CCkPe3a1HNE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368394; c=relaxed/simple; bh=Fbx0mTF6xPabK2C1yjSeNUnXM0IPISzdozGgOYFWpHs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cZK2trDFJ1L3yFowjvUHm1ihW3PcWr45bju0bxlJAPHooAUK+QIBzUgX1BeE+al+F2A/Dcj1LC/sKDn0yBKquaVPe1bd23WsM2/Fiwy+jYU3eDCC8lewwoSh73S+U5mtY7wYH6vfC7YaWibqwP3zjCJxbhRC0FLu9mEOowT2824= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=ohiXSpbq; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ohiXSpbq" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 4B14D1A1968; Wed, 2 Sep 2026 16:59:48 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 1DB576053C; Wed, 2 Sep 2026 16:59:48 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 3E9DF11C79A58; Wed, 2 Sep 2026 18:59:41 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368382; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=KtarpVS7SUNCOETBM6jxRFA19d7c4Ngqmy3UZEbrPCU=; b=ohiXSpbqfD4bABsu2uRmNbvV/aQpUzrTZ/TJZwvsgehYd00zxuBbXVyr5bZ/Qg92FF9Ya2 FQ38DAz+09qgCTjSloSJba0oVuIJSAgQ+AoeXO2lkn3mKZcMCDS1slCSwOBBOXirfkzBBv pWjlmVpPSWJE4gJQ4JPSLSfXhOHYhKv28n6pnE8k/s3LEJORTa1kYRIgyfBpDI86eaRTxs wcsCNJluOeM79V4mBR0D8Q1XIPW4mtX/U17qIPsgv+5jVSbBaM1yGl+WAVj0gu5PEoPTzf +IHNJyzl2wuZ5QWHlToO4QOX1YKIkQyj+Qf5wx77+cg4f0/XnrRoIhPtYoH2mw== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:17 +0200 Subject: [PATCH v4 03/25] mtd: spi-nor: Refactor Read Status/Write Status support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-3-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 SPI NOR has a lot of history. Additions over additions, the subtleties of the JESD216 specification, their implementations by the manufacturers and the hardware mistakes have generated a gigantic maze, let's try to understand what is really needed. The specification explains the QE (Quad Enable) bitfield as describing where the bit to enable the Quad capability is, but also how to set it. Unfortunately, the specification is not precise about what opcodes are supported exactly in all the cases. There is an introduction that basically states: - Opcode 0x05 reads SR1 - Opcode 0x35 reads SR2 - Opcode 0x01 writes SR1, and then SR2 if another byte is written Then the bitfield, among indicating the location of the QE bit, may indicate: - Reading SR1 and SR2 in one operation is not possible (loops over the content of SR1) - Reading SR2 directly is possible - Only writing SR1 zeroes SR2. One problem with the current implementation, is that it only focuses on the QE bit. A quad_enable function was created for each case, even though in practice, the logic was always the same: read, modify, write, read back and verify. One problem comes when other features need to play with the status registers, like software block protection or OTP: you never know how to properly handle the QE bit, nor where it is, nor how to read/write the Status registers. This lead to approximations/guessing (in swp.c, otp.c and obviously in legacy controller drivers like atmel.c) but also to the implementation of a gazillon of helpers for reading/writing/checking the status registers. In addition, I believe some design decisions had a negative impact over the years. - All possible situations had to be flagged by the core. This is likely wrong, because we no longer know why we need specific quirks. It was ineherent to the state of the SPI NOR core before the great cleanup that had happened the past few years. I believe this creates confusion in the core today, and we should push this to vendor fixups instead. As an example, in 2023 Hsin-Yi was facing an issue because his chip was setting the wrong QER value, leading to RDCR being prevented, thus falling into a condition blindly setting a random QE bit (I strongy believe it is done like that for wrong reasons). His chip actually had RDCR support! The correct fix should have been to mark the capability in a device fixup instead of handling this in the core. Link: https://lore.kernel.org/lkml/CAJMQK-hR0eaO0b4Vd0U8_KAndLyZapqdHjVLA= oe42rWi9rdLkA@mail.gmail.com/ - SFDP parsing is over cautious. I believe BFPT_DWORD15_QER_SR2_BIT1_NO_RD is abusive (nothing states that RDCR is not supported), and BFPT_DWORD15_QER_SR2_BIT1 is also out of specification when forcing 16-bit Status writes. - SNOR_F_HAS_16BIT_SR is only imposing 16bit Status writes, whereas reads can still be 8-bit wide. - The usage of helpers verifying the writes was also spread for IMHO no really good reason. Why shouldn't we trust spi operations when it comes to Status Registers? We do not read back our page reads, so why status registers should be treated with so much care, if it's not because we are unsure of what is being done? My proposal includes a check when it comes to the QE bit (done once) but we don't need these checks otherwise. If the QE bit was written properly, there are high chances that the other register accesses will just be fine, no? Asde from my main quest, I also observed no good reason to ask the read/write status register callers to use nor->bouncebuf while the low-level helpers could do it themselves (we are talking about one or two bytes being copied). So after these observations, my proposal is the following: - Create private low level helpers that just read or write a status register. They are flexible, we can give the opcode (which varies based on the SFDP QER field) and the length (1 or 2). - Create public generic accessors which will be used to read/write sr1 and/or sr2. This is where all the cleverness shall be. The helpers use the available opcodes for a given chip in order to fullfill the request. - Provide a single generic ->quad_enable() hook which generically does all the steps mentioned above (read, modify, write, read back and verify). - Create a list of opcodes for all 6 possible situations: {read, write} {sr1, sr2, sr1 and sr2}. These opcodes are filled/cleared based on the QER field. An opcode set to 0 indicates the absence of support (there is no 0x00 opcode in SPI NOR). I tried my best to analyze the current behavior and to mimic it as much as possible, but this is a risky cleanup. However, if we go for this, it will be *much* easier in the future to handle all kind of chip variations. We won't be limited to a couple of flags anymore, but rather we'll be able to just disable a read or write capability using a single line. Known deviations: - The Atmel manufacturer driver drives non SFDP chips which by default were receiving the HAS_16B_WR flag, forcing SR2 writes all the times, but it was deliberately making single bytes writes to SR1 for its locking operations. The flag is likely wrong for them, so I removed it. - I am proposing on purpose a single quad_enable helper. It should match all the cases, with 1 identified difference which I believe is harmless: in the SR2_BIT7 case, the helper would make an extra SR1 read/write which was not done before. This entry explicitly supports reading and writing the two registers. Note: no manufacturer has been identified to actually use that entry yet. Signed-off-by: Miquel Raynal --- This is a really hard to review patch, it is big, full of changes everywhere, but I cannot really split it further. The commit log is really important, it tries to explain the steps I went through when trying to refactor the whole QE/SR handling for which I received feedback from Michael, Tudor and Sashiko. Ideally we could expect test coverage of each case: - BFPT_DWORD15_QER_NONE: Probably not needed - BFPT_DWORD15_QER_SR2_BIT1_BUGGY: Expected from Hsin-Yi (flag is being renamed _NO_1B_WR) - BFPT_DWORD15_QER_SR2_BIT1_NO_RD: Tested with a chip re-enabling RDCR in a fixup - BFPT_DWORD15_QER_SR1_BIT6: TBD - BFPT_DWORD15_QER_SR2_BIT7: TBD - BFPT_DWORD15_QER_SR2_BIT1: TBD - BFPT_DWORD15_QER_SR2_BIT1_1B: Done. There will probably be breakages on older chips. These cannot be guessed because they are not properly listed in manufacturer fixups (yet). If we want a cleanup/simplification, we will have to cope with this risk. I hope the diff stats will motivate people to have a look and report their testing. I will also eagerly monitor Sashiko's output which will probably be very useful to catch niche weird cases where these changes might break. --- Documentation/driver-api/mtd/spi-nor.rst | 2 +- drivers/mtd/spi-nor/atmel.c | 52 ++- drivers/mtd/spi-nor/core.c | 774 +++++++++++----------------= ---- drivers/mtd/spi-nor/core.h | 59 +-- drivers/mtd/spi-nor/debugfs.c | 2 - drivers/mtd/spi-nor/gigadevice.c | 6 +- drivers/mtd/spi-nor/issi.c | 3 +- drivers/mtd/spi-nor/macronix.c | 12 +- drivers/mtd/spi-nor/micron-st.c | 4 +- drivers/mtd/spi-nor/otp.c | 16 +- drivers/mtd/spi-nor/sfdp.c | 41 +- drivers/mtd/spi-nor/spansion.c | 16 +- drivers/mtd/spi-nor/sst.c | 5 +- drivers/mtd/spi-nor/swp.c | 97 ++-- drivers/mtd/spi-nor/winbond.c | 4 +- include/linux/mtd/spi-nor.h | 4 - 16 files changed, 447 insertions(+), 650 deletions(-) diff --git a/Documentation/driver-api/mtd/spi-nor.rst b/Documentation/drive= r-api/mtd/spi-nor.rst index 747a326fb6c0..5441fa7d4f04 100644 --- a/Documentation/driver-api/mtd/spi-nor.rst +++ b/Documentation/driver-api/mtd/spi-nor.rst @@ -118,7 +118,7 @@ section, after the ``---`` marker. write size 1 page size 256 address nbytes 3 - flags HAS_LOCK | HAS_16BIT_SR | SOFT_RESET | SWP_IS_VOLATILE + flags HAS_LOCK | SOFT_RESET | SWP_IS_VOLATILE =20 opcodes read 0xeb diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index 82c592f0a1e1..8741c0bda497 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -23,18 +23,28 @@ static int at25fs_nor_lock(struct spi_nor *nor, loff_t = ofs, u64 len) =20 static int at25fs_nor_unlock(struct spi_nor *nor, loff_t ofs, u64 len) { + /* Write 0x00 to the status register to disable write protection */ + u8 sr =3D 0; int ret; =20 /* We only support unlocking the whole flash array */ if (ofs || len !=3D nor->params->size) return -EINVAL; =20 - /* Write 0x00 to the status register to disable write protection */ - ret =3D spi_nor_write_sr_and_check(nor, 0); + ret =3D spi_nor_write_sr1(nor, &sr); if (ret) - dev_dbg(nor->dev, "unable to clear BP bits, WP# asserted?\n"); + return ret; =20 - return ret; + ret =3D spi_nor_read_sr1(nor, &sr); + if (ret) + return ret; + + if (sr) { + dev_dbg(nor->dev, "unable to clear BP bits, WP# asserted?\n"); + return -EIO; + } + + return 0; } =20 static int at25fs_nor_is_locked(struct spi_nor *nor, loff_t ofs, u64 len) @@ -50,6 +60,7 @@ static const struct spi_nor_locking_ops at25fs_nor_lockin= g_ops =3D { =20 static int at25fs_nor_late_init(struct spi_nor *nor) { + nor->params->opcodes.write_sr1 =3D SPINOR_OP_WRSR; nor->params->locking_ops =3D &at25fs_nor_locking_ops; =20 return 0; @@ -69,6 +80,7 @@ static const struct spi_nor_fixups at25fs_nor_fixups =3D { * Return: 0 on success, -error otherwise. */ static int atmel_nor_set_global_protection(struct spi_nor *nor, loff_t ofs, + u64 len, bool is_protect) { int ret; @@ -78,19 +90,24 @@ static int atmel_nor_set_global_protection(struct spi_n= or *nor, loff_t ofs, if (ofs || len !=3D nor->params->size) return -EINVAL; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 - sr =3D nor->bouncebuf[0]; - /* SRWD bit needs to be cleared, otherwise the protection doesn't change = */ if (sr & SR_SRWD) { sr &=3D ~SR_SRWD; - ret =3D spi_nor_write_sr_and_check(nor, sr); - if (ret) { - dev_dbg(nor->dev, "unable to clear SRWD bit, WP# asserted?\n"); + ret =3D spi_nor_write_sr1(nor, &sr); + if (ret) return ret; + + ret =3D spi_nor_read_sr1(nor, &sr); + if (ret) + return ret; + + if (sr & SR_SRWD) { + dev_dbg(nor->dev, "unable to clear SRWD bit, WP# asserted?\n"); + return -EIO; } } =20 @@ -108,14 +125,7 @@ static int atmel_nor_set_global_protection(struct spi_= nor *nor, loff_t ofs, sr &=3D ~ATMEL_SR_GLOBAL_PROTECT_MASK; } =20 - nor->bouncebuf[0] =3D sr; - - /* - * We cannot use the spi_nor_write_sr_and_check() because this command - * isn't really setting any bits, instead it is an pseudo command for - * "Global Unprotect" or "Global Protect" - */ - return spi_nor_write_sr(nor, nor->bouncebuf, 1); + return spi_nor_write_sr1(nor, &sr); } =20 static int atmel_nor_global_protect(struct spi_nor *nor, loff_t ofs, u64 l= en) @@ -131,16 +141,17 @@ static int atmel_nor_global_unprotect(struct spi_nor = *nor, loff_t ofs, u64 len) static int atmel_nor_is_global_protected(struct spi_nor *nor, loff_t ofs, u64 len) { + u8 sr; int ret; =20 if (ofs >=3D nor->params->size || (ofs + len) > nor->params->size) return -EINVAL; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 - return ((nor->bouncebuf[0] & ATMEL_SR_GLOBAL_PROTECT_MASK) =3D=3D ATMEL_S= R_GLOBAL_PROTECT_MASK); + return ((sr & ATMEL_SR_GLOBAL_PROTECT_MASK) =3D=3D ATMEL_SR_GLOBAL_PROTEC= T_MASK); } =20 static const struct spi_nor_locking_ops atmel_nor_global_protection_ops = =3D { @@ -151,6 +162,7 @@ static const struct spi_nor_locking_ops atmel_nor_globa= l_protection_ops =3D { =20 static int atmel_nor_global_protection_late_init(struct spi_nor *nor) { + nor->params->opcodes.write_sr1 =3D SPINOR_OP_WRSR; nor->params->locking_ops =3D &atmel_nor_global_protection_ops; =20 return 0; diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 29b8fe3d1c65..020045c14c68 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -443,75 +443,6 @@ int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 = ndummy, u8 *id, return ret; } =20 -/** - * spi_nor_read_sr() - Read the Status Register. - * @nor: pointer to 'struct spi_nor'. - * @sr: pointer to a DMA-able buffer where the value of the - * Status Register will be written. Should be at least 2 byte= s. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_read_sr(struct spi_nor *nor, u8 *sr) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_RDSR_OP(sr); - - if (nor->reg_proto =3D=3D SNOR_PROTO_8_8_8_DTR) { - op.addr.nbytes =3D nor->params->rdsr_addr_nbytes; - op.dummy.nbytes =3D nor->params->rdsr_dummy; - /* - * We don't want to read only one byte in DTR mode. So, - * read 2 and then discard the second byte. - */ - op.data.nbytes =3D 2; - } - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDSR, sr, - 1); - } - - if (ret) - dev_dbg(nor->dev, "error %d reading SR\n", ret); - - return ret; -} - -/** - * spi_nor_read_cr() - Read the Configuration Register using the - * SPINOR_OP_RDCR (35h) command. - * @nor: pointer to 'struct spi_nor' - * @cr: pointer to a DMA-able buffer where the value of the - * Configuration Register will be written. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_read_cr(struct spi_nor *nor, u8 *cr) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_RDCR_OP(cr); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDCR, cr, - 1); - } - - if (ret) - dev_dbg(nor->dev, "error %d reading CR\n", ret); - - return ret; -} - /** * spi_nor_set_4byte_addr_mode_en4b_ex4b() - Enter/Exit 4-byte address mode * using SPINOR_OP_EN4B/SPINOR_OP_EX4B. Typically used by @@ -617,12 +548,13 @@ int spi_nor_set_4byte_addr_mode_brwr(struct spi_nor *= nor, bool enable) int spi_nor_sr_ready(struct spi_nor *nor) { int ret; + u8 sr; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 - return !(nor->bouncebuf[0] & SR_WIP); + return !(sr & SR_WIP); } =20 /** @@ -784,345 +716,287 @@ int spi_nor_global_block_unlock(struct spi_nor *nor) } =20 /** - * spi_nor_write_sr() - Write the Status Register. + * spi_nor_read_sr_ll() - Low-level Status Registers read. * @nor: pointer to 'struct spi_nor'. - * @sr: pointer to DMA-able buffer to write to the Status Register. - * @len: number of bytes to write to the Status Register. + * @opcode: opcode for the status register read operation. + * @sr: pointer to buffer for storing the content of the status registers. + * @len: number of status registers to read (1 or 2). * * Return: 0 on success, -errno otherwise. */ -int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len) +int spi_nor_read_sr_ll(struct spi_nor *nor, u8 opcode, u8 *sr, + unsigned int len) { - int ret; + int ret, i; =20 - ret =3D spi_nor_write_enable(nor); - if (ret) - return ret; + if (len > 2) + return -EINVAL; + + for (i =3D 0; i < len; i++) + nor->bouncebuf[i] =3D 0; =20 if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_WRSR_OP(sr, len); + struct spi_mem_op op =3D SPI_NOR_RDSR_OP(opcode, nor->bouncebuf, len); + + if (nor->reg_proto =3D=3D SNOR_PROTO_8_8_8_DTR) { + op.addr.nbytes =3D nor->params->rdsr_addr_nbytes; + op.dummy.nbytes =3D nor->params->rdsr_dummy; + /* + * We don't want to read only one byte in DTR mode. So, + * read 2 and then discard the second byte. + */ + op.data.nbytes =3D 2; + } =20 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); =20 ret =3D spi_mem_exec_op(nor->spimem, &op); } else { - ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRSR, sr, - len); + ret =3D spi_nor_controller_ops_read_reg(nor, opcode, nor->bouncebuf, len= ); } =20 - if (ret) { - dev_dbg(nor->dev, "error %d writing SR\n", ret); - return ret; - } - - return spi_nor_wait_till_ready(nor); -} - -/** - * spi_nor_write_sr1_and_check() - Write one byte to the Status Register 1= and - * ensure that the byte written match the received value. - * @nor: pointer to a 'struct spi_nor'. - * @sr1: byte value to be written to the Status Register. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_write_sr1_and_check(struct spi_nor *nor, u8 sr1) -{ - int ret; - - nor->bouncebuf[0] =3D sr1; - - ret =3D spi_nor_write_sr(nor, nor->bouncebuf, 1); - if (ret) - return ret; - - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); - if (ret) - return ret; - - if (nor->bouncebuf[0] !=3D sr1) { - dev_dbg(nor->dev, "SR1: read back test failed\n"); - return -EIO; - } - - return 0; -} - -/** - * spi_nor_write_16bit_sr_and_check() - Write the Status Register 1 and the - * Status Register 2 in one shot. Ensure that the byte written in the Stat= us - * Register 1 match the received value, and that the 16-bit Write did not - * affect what was already in the Status Register 2. - * @nor: pointer to a 'struct spi_nor'. - * @sr1: byte value to be written to the Status Register 1. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1) -{ - int ret; - u8 *sr_cr =3D nor->bouncebuf; - u8 cr_written; - - /* Make sure we don't overwrite the contents of Status Register 2. */ - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - ret =3D spi_nor_read_cr(nor, &sr_cr[1]); - if (ret) - return ret; - } else if ((spi_nor_get_protocol_width(nor->read_proto) =3D=3D 4 || - spi_nor_get_protocol_width(nor->write_proto) =3D=3D 4) && - nor->params->quad_enable) { - /* - * If the Status Register 2 Read command (35h) is not - * supported, we should at least be sure we don't - * change the value of the SR2 Quad Enable bit. - * - * When the Quad Enable method is set and the buswidth is 4, we - * can safely assume that the value of the QE bit is one, as a - * consequence of the nor->params->quad_enable() call. - * - * According to the JESD216 revB standard, BFPT DWORDS[15], - * bits 22:20, the 16-bit Write Status (01h) command is - * available just for the cases in which the QE bit is - * described in SR2 at BIT(1). - */ - sr_cr[1] =3D SR2_QUAD_EN_BIT1; - } else { - sr_cr[1] =3D 0; - } - - sr_cr[0] =3D sr1; - - ret =3D spi_nor_write_sr(nor, sr_cr, 2); - if (ret) - return ret; - - ret =3D spi_nor_read_sr(nor, sr_cr); - if (ret) - return ret; - - if (sr1 !=3D sr_cr[0]) { - dev_dbg(nor->dev, "SR: Read back test failed\n"); - return -EIO; - } - - if (nor->flags & SNOR_F_NO_READ_CR) - return 0; - - cr_written =3D sr_cr[1]; - - ret =3D spi_nor_read_cr(nor, &sr_cr[1]); - if (ret) - return ret; - - if (cr_written !=3D sr_cr[1]) { - dev_dbg(nor->dev, "CR: read back test failed\n"); - return -EIO; - } - - return 0; -} - -/** - * spi_nor_write_16bit_cr_and_check() - Write the Status Register 1 and the - * Configuration Register in one shot. Ensure that the byte written in the - * Configuration Register match the received value, and that the 16-bit Wr= ite - * did not affect what was already in the Status Register 1. - * @nor: pointer to a 'struct spi_nor'. - * @cr: byte value to be written to the Configuration Register. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr) -{ - int ret; - u8 *sr_cr =3D nor->bouncebuf; - u8 sr_written; - - /* Keep the current value of the Status Register 1. */ - ret =3D spi_nor_read_sr(nor, sr_cr); - if (ret) - return ret; - - sr_cr[1] =3D cr; - - ret =3D spi_nor_write_sr(nor, sr_cr, 2); - if (ret) - return ret; - - sr_written =3D sr_cr[0]; - - ret =3D spi_nor_read_sr(nor, sr_cr); - if (ret) - return ret; - - if (sr_written !=3D sr_cr[0]) { - dev_dbg(nor->dev, "SR: Read back test failed\n"); - return -EIO; - } - - if (nor->flags & SNOR_F_NO_READ_CR) - return 0; - - ret =3D spi_nor_read_cr(nor, &sr_cr[1]); - if (ret) - return ret; - - if (cr !=3D sr_cr[1]) { - dev_dbg(nor->dev, "CR: read back test failed\n"); - return -EIO; - } - - return 0; -} - -/** - * spi_nor_write_16bit_sr_cr_and_check() - Write the Status Register 1 and= the - * Configuration Register in one shot. Ensure that the bytes written in bo= th - * registers match the received value. - * @nor: pointer to a 'struct spi_nor'. - * @regs: two-byte array with values to be written to the status and - * configuration registers. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_write_16bit_sr_cr_and_check(struct spi_nor *nor, const = u8 *regs) -{ - u8 written_regs[2]; - int ret; - - written_regs[0] =3D regs[0]; - written_regs[1] =3D regs[1]; - nor->bouncebuf[0] =3D regs[0]; - nor->bouncebuf[1] =3D regs[1]; - - ret =3D spi_nor_write_sr(nor, nor->bouncebuf, 2); - if (ret) - return ret; - - ret =3D spi_nor_read_sr(nor, &nor->bouncebuf[0]); - if (ret) - return ret; - - if (written_regs[0] !=3D nor->bouncebuf[0]) { - dev_dbg(nor->dev, "SR: Read back test failed\n"); - return -EIO; - } - - if (nor->flags & SNOR_F_NO_READ_CR) - return 0; - - ret =3D spi_nor_read_cr(nor, &nor->bouncebuf[1]); - if (ret) - return ret; - - if (written_regs[1] !=3D nor->bouncebuf[1]) { - dev_dbg(nor->dev, "CR: read back test failed\n"); - return -EIO; - } - - return 0; -} - -/** - * spi_nor_write_sr_and_check() - Write the Status Register 1 and ensure t= hat - * the byte written match the received value without affecting other bits = in the - * Status Register 1 and 2. - * @nor: pointer to a 'struct spi_nor'. - * @sr1: byte value to be written to the Status Register. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1) -{ - if (nor->flags & SNOR_F_HAS_16BIT_SR) - return spi_nor_write_16bit_sr_and_check(nor, sr1); - - return spi_nor_write_sr1_and_check(nor, sr1); -} - -/** - * spi_nor_write_sr_cr_and_check() - Write the Status Register 1 and ensur= e that - * the byte written match the received value. Same for the Control Registe= r if - * available. - * @nor: pointer to a 'struct spi_nor'. - * @regs: byte array to be written to the registers. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_write_sr_cr_and_check(struct spi_nor *nor, const u8 *regs) -{ - if (nor->flags & SNOR_F_HAS_16BIT_SR) - return spi_nor_write_16bit_sr_cr_and_check(nor, regs); - - return spi_nor_write_sr1_and_check(nor, regs[0]); -} - -/** - * spi_nor_write_sr2() - Write the Status Register 2 using the - * SPINOR_OP_WRSR2 (3eh) command. - * @nor: pointer to 'struct spi_nor'. - * @sr2: pointer to DMA-able buffer to write to the Status Register 2. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2) -{ - int ret; - - ret =3D spi_nor_write_enable(nor); - if (ret) - return ret; - - if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_WRSR2_OP(sr2); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRSR2, - sr2, 1); - } - - if (ret) { - dev_dbg(nor->dev, "error %d writing SR2\n", ret); - return ret; - } - - return spi_nor_wait_till_ready(nor); -} - -/** - * spi_nor_read_sr2() - Read the Status Register 2 using the - * SPINOR_OP_RDSR2 (3fh) command. - * @nor: pointer to 'struct spi_nor'. - * @sr2: pointer to DMA-able buffer where the value of the - * Status Register 2 will be written. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_RDSR2_OP(sr2); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDSR2, sr2, - 1); - } + memcpy(sr, nor->bouncebuf, len); =20 if (ret) - dev_dbg(nor->dev, "error %d reading SR2\n", ret); + dev_dbg(nor->dev, "Error %d reading Status Registers\n", ret); =20 return ret; } =20 +/** + * spi_nor_write_sr_ll() - Low-level Status Registers write. + * @nor: pointer to 'struct spi_nor'. + * @opcode: opcode for the status register write operation. + * @sr: pointer to status registers buffer to write. + * @len: number of status registers to write. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_write_sr_ll(struct spi_nor *nor, u8 opcode, const u8 *s= r, + unsigned int len) +{ + int ret, i; + + if (len > 2) + return -EINVAL; + + ret =3D spi_nor_write_enable(nor); + if (ret) + return ret; + + for (i =3D 0; i < len; i++) + nor->bouncebuf[i] =3D sr[i]; + + if (nor->spimem) { + struct spi_mem_op op =3D SPI_NOR_WRSR_OP(opcode, + nor->bouncebuf, len); + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_write_reg(nor, opcode, + nor->bouncebuf, len); + } + + if (ret) { + dev_dbg(nor->dev, "Error %d writing Status Registers\n", ret); + return ret; + } + + return spi_nor_wait_till_ready(nor); +} + +/** + * spi_nor_read_sr1() - Read SR1 only + * Useful for: + * - The core to offer a generic "read SR1 and SR2" capability + * - Manufacturer drivers (since they know the chip SR layout) + * - Polling the BUSY bit in the core + * + * @nor: the spi_nor structure + * @sr1: pointer to a valid SR1 buffer + * + * Return 0 or errno. + */ +int spi_nor_read_sr1(struct spi_nor *nor, u8 *sr1) +{ + return spi_nor_read_sr_ll(nor, nor->params->opcodes.read_sr1, sr1, 1); +} + +/** + * spi_nor_read_sr2() - Read SR2 only + * Useful for: + * - The core to offer a generic "read SR1 and SR2" capability + * - Manufacturer drivers (since they know the chip SR layout) + * - SR2 based OTP configuration + * + * @nor: the spi_nor structure + * @sr2: pointer to a valid SR2 buffer + * + * Return 0 or errno. + */ +int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2) +{ + struct spi_nor_flash_parameter *params =3D nor->params; + + if (!params->opcodes.read_sr2) + return -EINVAL; + + return spi_nor_read_sr_ll(nor, params->opcodes.read_sr2, sr2, 1); +} + +/** + * spi_nor_read_sr1_and_sr2() - Read SR1 then SR2 + * General purpose helper. + * + * @nor: the spi_nor structure + * @sr: pointer to a valid 2-byte array + * + * Return 0 or errno. + */ +int spi_nor_read_sr1_and_sr2(struct spi_nor *nor, u8 *sr) +{ + int ret; + + ret =3D spi_nor_read_sr1(nor, &sr[0]); + if (ret) + return ret; + + return spi_nor_read_sr2(nor, &sr[1]); +} + +/** + * spi_nor_write_sr1() - Write SR1 only + * Useful for: + * - Manufacturer drivers (since they know the chip SR layout) + * + * @nor: the spi_nor structure + * @sr1: pointer to a valid SR1 buffer + * + * Return 0 or errno. + */ +int spi_nor_write_sr1(struct spi_nor *nor, const u8 *sr1) +{ + if (WARN_ONCE(!nor->params->opcodes.write_sr1, + "Restricted helper use, write SR1 not supported")) + return -EIO; + + return spi_nor_write_sr_ll(nor, nor->params->opcodes.write_sr1, sr1, 1); +} + +/** + * spi_nor_write_sr2() - Write SR2 only + * Useful for: + * - Manufacturer drivers (since they know the chip SR layout) + * - SR2 based OTP configuration + * + * @nor: the spi_nor structure + * @sr2: pointer to a valid SR2 buffer + * + * Return 0 or errno. + */ +int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2) +{ + if (WARN_ONCE(!nor->params->opcodes.write_sr2, + "Restricted helper use, write SR2 not supported")) + return -EIO; + + return spi_nor_write_sr_ll(nor, nor->params->opcodes.write_sr2, sr2, 1); +} + +/** + * spi_nor_write_sr1_and_sr2() - Write SR1 then SR2 + * General purpose helper, always safe to call. Will expectedly ignore + * SR2 on certain chips. + * + * @nor: the spi_nor structure + * @sr: pointer to a valid 2-byte array + * + * Return 0 or errno. + */ +static int spi_nor_write_sr1_and_sr2(struct spi_nor *nor, const u8 *sr) +{ + struct spi_nor_flash_parameter *params =3D nor->params; + int ret; + + if (params->opcodes.write_sr1_and_sr2) + return spi_nor_write_sr_ll(nor, + params->opcodes.write_sr1_and_sr2, + sr, 2); + + ret =3D spi_nor_write_sr1(nor, &sr[0]); + if (ret) + return ret; + + if (params->opcodes.write_sr2) + return spi_nor_write_sr2(nor, &sr[1]); + + return 0; +} + +/** + * spi_nor_write_sr1_and_sr2_and_check() - Write SR1 then SR2, then read + * them back and verifies + * General purpose helper, always safe to call. Will expectedly ignore + * SR2 on certain chips. + * + * @nor: the spi_nor structure + * @sr: pointer to a valid 2-byte array + * + * Return 0 or errno. + */ +int spi_nor_write_sr1_and_sr2_and_check(struct spi_nor *nor, const u8 *sr) +{ + u8 tmp[2]; + int ret; + + ret =3D spi_nor_write_sr1_and_sr2(nor, sr); + if (ret) + return ret; + + ret =3D spi_nor_read_sr1_and_sr2(nor, tmp); + if (ret) + return ret; + + if (sr[0] !=3D tmp[0] || sr[1] !=3D tmp[1]) + return -EIO; + + return 0; +} + +/** + * spi_nor_generic_quad_enable() - Read the status registers, + * apply the QE bit mask, + * write the status registers, + * read them back and check the content. + * + * @nor: pointer to 'struct spi_nor' + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_generic_quad_enable(struct spi_nor *nor) +{ + u8 *qe_mask =3D nor->params->qe_mask; + u8 sr[2] =3D {}; + int ret; + + if (!qe_mask[0] && !qe_mask[1]) + return 0; + + ret =3D spi_nor_read_sr1_and_sr2(nor, sr); + if (ret) + return ret; + + if (sr[0] & qe_mask[0] || sr[1] & qe_mask[1]) + return 0; + + sr[0] |=3D qe_mask[0]; + sr[1] |=3D qe_mask[1]; + + return spi_nor_write_sr1_and_sr2_and_check(nor, sr); +} + /** * spi_nor_erase_die() - Erase the entire die. * @nor: pointer to 'struct spi_nor'. @@ -1904,106 +1778,6 @@ static int spi_nor_erase(struct mtd_info *mtd, stru= ct erase_info *instr) return ret; } =20 -/** - * spi_nor_sr1_bit6_quad_enable() - Set the Quad Enable BIT(6) in the Stat= us - * Register 1. - * @nor: pointer to a 'struct spi_nor' - * - * Bit 6 of the Status Register 1 is the QE bit for Macronix like QSPI mem= ories. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor) -{ - int ret; - - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); - if (ret) - return ret; - - if (nor->bouncebuf[0] & SR1_QUAD_EN_BIT6) - return 0; - - nor->bouncebuf[0] |=3D SR1_QUAD_EN_BIT6; - - return spi_nor_write_sr1_and_check(nor, nor->bouncebuf[0]); -} - -/** - * spi_nor_sr2_bit1_quad_enable() - set the Quad Enable BIT(1) in the Stat= us - * Register 2. - * @nor: pointer to a 'struct spi_nor'. - * - * Bit 1 of the Status Register 2 is the QE bit for Spansion like QSPI mem= ories. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor) -{ - int ret; - - if (nor->flags & SNOR_F_NO_READ_CR) - return spi_nor_write_16bit_cr_and_check(nor, SR2_QUAD_EN_BIT1); - - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); - if (ret) - return ret; - - if (nor->bouncebuf[0] & SR2_QUAD_EN_BIT1) - return 0; - - nor->bouncebuf[0] |=3D SR2_QUAD_EN_BIT1; - - return spi_nor_write_16bit_cr_and_check(nor, nor->bouncebuf[0]); -} - -/** - * spi_nor_sr2_bit7_quad_enable() - set QE bit in Status Register 2. - * @nor: pointer to a 'struct spi_nor' - * - * Set the Quad Enable (QE) bit in the Status Register 2. - * - * This is one of the procedures to set the QE bit described in the SFDP - * (JESD216 rev B) specification but no manufacturer using this procedure = has - * been identified yet, hence the name of the function. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor) -{ - u8 *sr2 =3D nor->bouncebuf; - int ret; - u8 sr2_written; - - /* Check current Quad Enable bit value. */ - ret =3D spi_nor_read_sr2(nor, sr2); - if (ret) - return ret; - if (*sr2 & SR2_QUAD_EN_BIT7) - return 0; - - /* Update the Quad Enable bit. */ - *sr2 |=3D SR2_QUAD_EN_BIT7; - - ret =3D spi_nor_write_sr2(nor, sr2); - if (ret) - return ret; - - sr2_written =3D *sr2; - - /* Read back and check it. */ - ret =3D spi_nor_read_sr2(nor, sr2); - if (ret) - return ret; - - if (*sr2 !=3D sr2_written) { - dev_dbg(nor->dev, "SR2: Read back test failed\n"); - return -EIO; - } - - return 0; -} - static const struct spi_nor_manufacturer *manufacturers[] =3D { &spi_nor_atmel, &spi_nor_eon, @@ -2494,6 +2268,7 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32= *hwcaps) { struct spi_nor_flash_parameter *params =3D nor->params; unsigned int cap; + u8 opcode; =20 /* X-X-X modes are not supported yet, mask them all. */ *hwcaps &=3D ~SNOR_HWCAPS_X_X_X; @@ -2525,14 +2300,14 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u= 32 *hwcaps) *hwcaps &=3D ~BIT(cap); } =20 - /* Some SPI controllers might not support CR read opcode. */ - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - struct spi_mem_op op =3D SPI_NOR_RDCR_OP(nor->bouncebuf); - + /* Some SPI controllers might not support reading SR2 */ + opcode =3D nor->params->opcodes.read_sr2; + if (opcode) { + struct spi_mem_op op =3D SPI_NOR_RDSR_OP(opcode, nor->bouncebuf, 1); spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); =20 if (!spi_mem_supports_op(nor->spimem, &op)) - nor->flags |=3D SNOR_F_NO_READ_CR; + nor->params->opcodes.read_sr2 =3D 0; } } =20 @@ -3107,11 +2882,14 @@ static void spi_nor_init_default_params(struct spi_= nor *nor) const struct flash_info *info =3D nor->info; struct device_node *np =3D spi_nor_get_flash_node(nor); =20 - params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; - params->otp.org =3D info->otp; + /* Default to 16-bit Read/Write Status commands */ + params->opcodes.read_sr1 =3D SPINOR_OP_RDSR; + params->opcodes.read_sr2 =3D SPINOR_OP_RDCR; + params->opcodes.write_sr1_and_sr2 =3D SPINOR_OP_WRSR; + params->quad_enable =3D spi_nor_generic_quad_enable; + params->qe_mask[1] =3D BIT(1); =20 - /* Default to 16-bit Write Status (01h) Command */ - nor->flags |=3D SNOR_F_HAS_16BIT_SR; + params->otp.org =3D info->otp; =20 /* Set SPI NOR sizes. */ params->writesize =3D 1; diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 2cc0c80da3fa..8b05371655f4 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -37,36 +37,18 @@ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_NO_DATA) =20 -#define SPI_NOR_RDSR_OP(buf) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \ +#define SPI_NOR_RDSR_OP(opcode, buf, len) \ + SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ SPI_MEM_OP_NO_ADDR, \ SPI_MEM_OP_NO_DUMMY, \ - SPI_MEM_OP_DATA_IN(1, buf, 0)) + SPI_MEM_OP_DATA_IN(len, buf, 0)) =20 -#define SPI_NOR_WRSR_OP(buf, len) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \ +#define SPI_NOR_WRSR_OP(opcode, buf, len) \ + SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ SPI_MEM_OP_NO_ADDR, \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_OUT(len, buf, 0)) =20 -#define SPI_NOR_RDSR2_OP(buf) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \ - SPI_MEM_OP_NO_ADDR, \ - SPI_MEM_OP_NO_DUMMY, \ - SPI_MEM_OP_DATA_OUT(1, buf, 0)) - -#define SPI_NOR_WRSR2_OP(buf) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \ - SPI_MEM_OP_NO_ADDR, \ - SPI_MEM_OP_NO_DUMMY, \ - SPI_MEM_OP_DATA_OUT(1, buf, 0)) - -#define SPI_NOR_RDCR_OP(buf) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \ - SPI_MEM_OP_NO_ADDR, \ - SPI_MEM_OP_NO_DUMMY, \ - SPI_MEM_OP_DATA_IN(1, buf, 0)) - #define SPI_NOR_EN4B_EX4B_OP(enable) \ SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \ SPI_MEM_OP_NO_ADDR, \ @@ -129,8 +111,6 @@ enum spi_nor_option_flags { SNOR_F_4B_OPCODES =3D BIT(3), SNOR_F_HAS_4BAIT =3D BIT(4), SNOR_F_HAS_LOCK =3D BIT(5), - SNOR_F_HAS_16BIT_SR =3D BIT(6), - SNOR_F_NO_READ_CR =3D BIT(7), SNOR_F_HAS_SR_TB_BIT6 =3D BIT(8), SNOR_F_HAS_4BIT_BP =3D BIT(9), SNOR_F_HAS_SR_BP3_BIT6 =3D BIT(10), @@ -345,9 +325,19 @@ struct spi_nor_otp { * List of variable opcodes used by the chip. * * @die_erase: opcode for erasing a die, defaults to SPINOR_OP_CHIP_ERASE + * @read_sr1: opcode for reading SR1 alone + * @read_sr2: opcode for reading SR2 alone + * @write_sr1: opcode for writing SR1 alone + * @write_sr2: opcode for writing SR2 alone + * @write_sr1_and_sr2: opcode for writing SR1 then SR2 in one operation */ struct spi_nor_opcodes { u8 die_erase; + u8 read_sr1; + u8 read_sr2; + u8 write_sr1; + u8 write_sr2; + u8 write_sr1_and_sr2; }; =20 /** @@ -384,6 +374,7 @@ struct spi_nor_opcodes { * @otp: SPI NOR OTP info. * @set_octal_dtr: enables or disables SPI NOR octal DTR mode. * @quad_enable: enables SPI NOR quad mode. + * @qe_mask: two bytes mask used to set/clear the QE bit * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. * @ready: (optional) flashes might use a different mechanism * than reading the status register to indicate they @@ -413,6 +404,7 @@ struct spi_nor_flash_parameter { =20 int (*set_octal_dtr)(struct spi_nor *nor, bool enable); int (*quad_enable)(struct spi_nor *nor); + u8 qe_mask[2]; int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); int (*ready)(struct spi_nor *nor); =20 @@ -641,18 +633,17 @@ int spi_nor_wait_till_ready(struct spi_nor *nor); int spi_nor_global_block_unlock(struct spi_nor *nor); int spi_nor_prep_and_lock(struct spi_nor *nor); void spi_nor_unlock_and_unprep(struct spi_nor *nor); -int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor); -int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor); -int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor); int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id, enum spi_nor_protocol reg_proto); -int spi_nor_read_sr(struct spi_nor *nor, u8 *sr); int spi_nor_sr_ready(struct spi_nor *nor); -int spi_nor_read_cr(struct spi_nor *nor, u8 *cr); -int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len); -int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); -int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr); -int spi_nor_write_sr_cr_and_check(struct spi_nor *nor, const u8 *regs); +int spi_nor_read_sr_ll(struct spi_nor *nor, u8 opcode, u8 *sr, + unsigned int len); +int spi_nor_read_sr1(struct spi_nor *nor, u8 *sr1); +int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2); +int spi_nor_read_sr1_and_sr2(struct spi_nor *nor, u8 *sr); +int spi_nor_write_sr1(struct spi_nor *nor, const u8 *sr1); +int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2); +int spi_nor_write_sr1_and_sr2_and_check(struct spi_nor *nor, const u8 *sr); =20 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, u8 *buf); diff --git a/drivers/mtd/spi-nor/debugfs.c b/drivers/mtd/spi-nor/debugfs.c index ef6f0ffcd6bb..512825c3fc85 100644 --- a/drivers/mtd/spi-nor/debugfs.c +++ b/drivers/mtd/spi-nor/debugfs.c @@ -19,8 +19,6 @@ static const char *const snor_f_names[] =3D { SNOR_F_NAME(4B_OPCODES), SNOR_F_NAME(HAS_4BAIT), SNOR_F_NAME(HAS_LOCK), - SNOR_F_NAME(HAS_16BIT_SR), - SNOR_F_NAME(NO_READ_CR), SNOR_F_NAME(HAS_SR_TB_BIT6), SNOR_F_NAME(HAS_4BIT_BP), SNOR_F_NAME(HAS_SR_BP3_BIT6), diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index ef1edd0add70..4070a692e968 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -23,8 +23,10 @@ gd25q256_post_bfpt(struct spi_nor *nor, * GD25Q256E | SFDP_JESD216_MAJOR | SFDP_JESD216B_MINOR */ if (bfpt_header->major =3D=3D SFDP_JESD216_MAJOR && - bfpt_header->minor =3D=3D SFDP_JESD216_MINOR) - nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + bfpt_header->minor =3D=3D SFDP_JESD216_MINOR) { + nor->params->qe_mask[0] =3D BIT(6); + nor->params->qe_mask[1] =3D 0; + } =20 return 0; } diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 18d9a00aa22e..04db42b5141e 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -131,7 +131,8 @@ static const struct flash_info issi_nor_parts[] =3D { =20 static void issi_nor_default_init(struct spi_nor *nor) { - nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + nor->params->qe_mask[0] =3D BIT(6); + nor->params->qe_mask[1] =3D 0; } =20 static const struct spi_nor_fixups issi_fixups =3D { diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index e97f5cbd9aad..55612237c1ef 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -65,11 +65,12 @@ mx25l3255e_late_init_fixups(struct spi_nor *nor) =20 /* * SFDP of MX25L3255E is JESD216, which does not include the Quad - * Enable bit Requirement in BFPT. As a result, during BFPT parsing, - * the quad_enable method is not set to spi_nor_sr1_bit6_quad_enable. - * Therefore, it is necessary to correct this setting by late_init. + * Enable bit Requirement in BFPT. As a result, during BFPT parsing + * the quad_enable mask is reset. Therefore, it is necessary to + * correct this setting by late_init. */ - params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + params->qe_mask[0] =3D BIT(6); + params->qe_mask[1] =3D 0; =20 /* * In addition, MX25L3255E also supports 1-4-4 page program in 3-byte @@ -314,7 +315,8 @@ static int macronix_nor_set_octal_dtr(struct spi_nor *n= or, bool enable) =20 static void macronix_nor_default_init(struct spi_nor *nor) { - nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + nor->params->qe_mask[0] =3D BIT(6); + nor->params->qe_mask[1] =3D 0; } =20 static int macronix_nor_late_init(struct spi_nor *nor) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 031cf887318c..344539d2a36a 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -229,7 +229,7 @@ static int mt25qu512a_post_bfpt_fixup(struct spi_nor *n= or, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt) { - nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; + nor->params->opcodes.write_sr1 =3D 0; return 0; } =20 @@ -633,7 +633,7 @@ static int micron_st_nor_ready(struct spi_nor *nor) static void micron_st_nor_default_init(struct spi_nor *nor) { nor->flags |=3D SNOR_F_HAS_LOCK; - nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; + nor->params->opcodes.write_sr1 =3D 0; nor->params->quad_enable =3D NULL; } =20 diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c index 7d0b145d78d8..1eeb33a20091 100644 --- a/drivers/mtd/spi-nor/otp.c +++ b/drivers/mtd/spi-nor/otp.c @@ -175,24 +175,24 @@ static int spi_nor_otp_lock_bit_cr(unsigned int regio= n) */ int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region) { - u8 *cr =3D nor->bouncebuf; int ret, lock_bit; + u8 sr[2]; =20 lock_bit =3D spi_nor_otp_lock_bit_cr(region); if (lock_bit < 0) return lock_bit; =20 - ret =3D spi_nor_read_cr(nor, cr); + ret =3D spi_nor_read_sr1_and_sr2(nor, sr); if (ret) return ret; =20 /* no need to write the register if region is already locked */ - if (cr[0] & lock_bit) + if (sr[1] & lock_bit) return 0; =20 - cr[0] |=3D lock_bit; + sr[1] |=3D lock_bit; =20 - return spi_nor_write_16bit_cr_and_check(nor, cr[0]); + return spi_nor_write_sr1_and_sr2_and_check(nor, sr); } =20 /** @@ -207,18 +207,18 @@ int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigne= d int region) */ int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region) { - u8 *cr =3D nor->bouncebuf; int ret, lock_bit; + u8 sr2; =20 lock_bit =3D spi_nor_otp_lock_bit_cr(region); if (lock_bit < 0) return lock_bit; =20 - ret =3D spi_nor_read_cr(nor, cr); + ret =3D spi_nor_read_sr2(nor, &sr2); if (ret) return ret; =20 - return cr[0] & lock_bit; + return sr2 & lock_bit; } =20 static loff_t spi_nor_otp_region_start(const struct spi_nor *nor, unsigned= int region) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 526763c79f55..1d799f02b8e5 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -561,10 +561,21 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, val >>=3D BFPT_DWORD11_PAGE_SIZE_SHIFT; params->page_size =3D 1U << val; =20 + /* + * The standard declares various read and write status methods, some of + * them will be overloaded based on the QER field. + */ + params->opcodes.read_sr1 =3D SPINOR_OP_RDSR; + params->opcodes.read_sr2 =3D SPINOR_OP_RDCR; + params->opcodes.write_sr1 =3D SPINOR_OP_WRSR; + params->opcodes.write_sr1_and_sr2 =3D SPINOR_OP_WRSR; + + params->qe_mask[0] =3D 0; + params->qe_mask[1] =3D 0; + /* Quad Enable Requirements. */ switch (bfpt.dwords[SFDP_DWORD(15)] & BFPT_DWORD15_QER_MASK) { case BFPT_DWORD15_QER_NONE: - params->quad_enable =3D NULL; break; =20 case BFPT_DWORD15_QER_SR2_BIT1_NO_1B_WR: @@ -572,23 +583,28 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, * Writing only one byte to the Status Register has the * side-effect of clearing Status Register 2. */ + fallthrough; case BFPT_DWORD15_QER_SR2_BIT1_NO_RD: /* * Read Configuration Register (35h) instruction is not - * supported. + * supported. 16-bit writes expected. */ - nor->flags |=3D SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR; - params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; + params->opcodes.read_sr2 =3D 0; + params->opcodes.write_sr1 =3D 0; + params->qe_mask[1] =3D BIT(1); break; =20 case BFPT_DWORD15_QER_SR1_BIT6: - nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; - params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + params->opcodes.read_sr2 =3D 0; + params->opcodes.write_sr1_and_sr2 =3D 0; + params->qe_mask[0] =3D BIT(6); break; =20 case BFPT_DWORD15_QER_SR2_BIT7: - nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; - params->quad_enable =3D spi_nor_sr2_bit7_quad_enable; + params->opcodes.read_sr2 =3D SPINOR_OP_RDSR2; + params->opcodes.write_sr1_and_sr2 =3D 0; + params->opcodes.write_sr2 =3D SPINOR_OP_WRSR2; + params->qe_mask[1] =3D BIT(7); break; =20 case BFPT_DWORD15_QER_SR2_BIT1: @@ -598,9 +614,8 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, * Register 2, so let's be cautious and keep the default * assumption of a 16-bit Write Status (01h) command. */ - nor->flags |=3D SNOR_F_HAS_16BIT_SR; - - params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; + params->opcodes.write_sr1 =3D 0; + params->qe_mask[1] =3D BIT(1); break; =20 default: @@ -608,6 +623,10 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, break; } =20 + /* opcodes sanity check */ + WARN_ON(!params->opcodes.read_sr1 || + (!params->opcodes.write_sr1 && !params->opcodes.write_sr1_and_sr2)); + dword =3D bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_4B_ADDR_MODE_MASK; if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_BRWR)) params->set_4byte_addr_mode =3D spi_nor_set_4byte_addr_mode_brwr; diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 2a8238c707e1..ca2703a5a338 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -399,8 +399,9 @@ static int cypress_nor_determine_addr_mode_by_sr1(struc= t spi_nor *nor, nor->bouncebuf); bool is3byte, is4byte; int ret; + u8 sr; =20 - ret =3D spi_nor_read_sr(nor, &nor->bouncebuf[1]); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 @@ -408,7 +409,7 @@ static int cypress_nor_determine_addr_mode_by_sr1(struc= t spi_nor *nor, if (ret) return ret; =20 - is3byte =3D (nor->bouncebuf[0] =3D=3D nor->bouncebuf[1]); + is3byte =3D (nor->bouncebuf[0] =3D=3D sr); =20 op =3D (struct spi_mem_op) CYPRESS_NOR_RD_ANY_REG_OP(4, SPINOR_REG_CYPRESS_STR1V, 0, @@ -417,7 +418,7 @@ static int cypress_nor_determine_addr_mode_by_sr1(struc= t spi_nor *nor, if (ret) return ret; =20 - is4byte =3D (nor->bouncebuf[0] =3D=3D nor->bouncebuf[1]); + is4byte =3D (nor->bouncebuf[0] =3D=3D sr); =20 if (is3byte =3D=3D is4byte) return -EIO; @@ -1103,13 +1104,14 @@ static const struct flash_info spansion_nor_parts[]= =3D { static int spansion_nor_sr_ready_and_clear(struct spi_nor *nor) { int ret; + u8 sr; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 - if (nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) { - if (nor->bouncebuf[0] & SR_E_ERR) + if (sr & (SR_E_ERR | SR_P_ERR)) { + if (sr & SR_E_ERR) dev_err(nor->dev, "Erase Error occurred\n"); else dev_err(nor->dev, "Programming Error occurred\n"); @@ -1129,7 +1131,7 @@ static int spansion_nor_sr_ready_and_clear(struct spi= _nor *nor) return -EIO; } =20 - return !(nor->bouncebuf[0] & SR_WIP); + return !(sr & SR_WIP); } =20 static int spansion_nor_late_init(struct spi_nor *nor) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index db02c14ba16f..77a0bc41d4e5 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -21,16 +21,17 @@ static int sst26vf_nor_lock(struct spi_nor *nor, loff_t= ofs, u64 len) static int sst26vf_nor_unlock(struct spi_nor *nor, loff_t ofs, u64 len) { int ret; + u8 cr; =20 /* We only support unlocking the entire flash array. */ if (ofs !=3D 0 || len !=3D nor->params->size) return -EINVAL; =20 - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr2(nor, &cr); if (ret) return ret; =20 - if (!(nor->bouncebuf[0] & SST26VF_CR_BPNV)) { + if (!(cr & SST26VF_CR_BPNV)) { dev_dbg(nor->dev, "Any block has been permanently locked\n"); return -EINVAL; } diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 235070b215d1..f0032785dd21 100644 --- a/drivers/mtd/spi-nor/swp.c +++ b/drivers/mtd/spi-nor/swp.c @@ -36,7 +36,7 @@ static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor) =20 static u8 spi_nor_get_sr_cmp_mask(struct spi_nor *nor) { - if (!(nor->flags & SNOR_F_NO_READ_CR) && + if (nor->params->opcodes.read_sr2 && nor->flags & SNOR_F_HAS_SR2_CMP_BIT6) return SR2_CMP_BIT6; else @@ -194,6 +194,45 @@ static int spi_nor_build_sr(struct spi_nor *nor, const= u8 *old_sr, u8 *new_sr, return 0; } =20 +/* + * Make sure we do our best to guess SR2. This has historically only be ne= eded + * for swp.c, so let's keep this extra carefulness in this file. + */ +static int spi_nor_read_sr2_careful(struct spi_nor *nor, u8 *sr2) +{ + struct spi_nor_flash_parameter *params =3D nor->params; + int ret; + + if (params->opcodes.read_sr2) { + ret =3D spi_nor_read_sr_ll(nor, params->opcodes.read_sr2, sr2, 1); + if (ret) + return ret; + } else if ((spi_nor_get_protocol_width(nor->read_proto) =3D=3D 4 || + spi_nor_get_protocol_width(nor->write_proto) =3D=3D 4) && + nor->params->quad_enable) { + /* + * Make sure the QE bit is persistently kept. qe_mask[1] will be + * 0 if the QE bit is in SR1. + */ + *sr2 =3D params->qe_mask[1]; + } else { + return 0; + } + + return 0; +} + +static int spi_nor_read_sr1_and_sr2_careful(struct spi_nor *nor, u8 *sr) +{ + int ret; + + ret =3D spi_nor_read_sr1(nor, &sr[0]); + if (ret) + return ret; + + return spi_nor_read_sr2_careful(nor, &sr[1]); +} + /* * Keep a local cache containing all lock-related bits for debugfs use onl= y. * This way, debugfs never needs to access the flash directly. @@ -207,17 +246,9 @@ void spi_nor_cache_sr_lock_bits(struct spi_nor *nor, u= 8 *sr) =20 =20 if (!sr) { - if (spi_nor_read_sr(nor, nor->bouncebuf)) + if (spi_nor_read_sr1_and_sr2_careful(nor, sr_cr)) return; =20 - sr_cr[0] =3D nor->bouncebuf[0]; - - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - if (spi_nor_read_cr(nor, nor->bouncebuf)) - return; - } - - sr_cr[1] =3D nor->bouncebuf[0]; sr =3D sr_cr; } =20 @@ -273,20 +304,10 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_= t ofs, u64 len) int ret; u8 pow; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1_and_sr2_careful(nor, status_old); if (ret) return ret; =20 - status_old[0] =3D nor->bouncebuf[0]; - - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); - if (ret) - return ret; - - status_old[1] =3D nor->bouncebuf[0]; - } - /* If nothing in our range is unlocked, we don't need to do anything */ if (spi_nor_is_locked_sr(nor, ofs, len, status_old)) return 0; @@ -378,10 +399,7 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_t= ofs, u64 len) (ofs_old < ofs_new || (ofs_new + len_new) < (ofs_old + len_old))) return -EINVAL; =20 - if (nor->flags & SNOR_F_NO_READ_CR) - ret =3D spi_nor_write_sr_and_check(nor, best_status_new[0]); - else - ret =3D spi_nor_write_sr_cr_and_check(nor, best_status_new); + ret =3D spi_nor_write_sr1_and_sr2_and_check(nor, best_status_new); if (ret) return ret; =20 @@ -409,20 +427,10 @@ static int spi_nor_sr_unlock(struct spi_nor *nor, lof= f_t ofs, u64 len) int ret; u8 pow; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1_and_sr2_careful(nor, status_old); if (ret) return ret; =20 - status_old[0] =3D nor->bouncebuf[0]; - - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); - if (ret) - return ret; - - status_old[1] =3D nor->bouncebuf[0]; - } - /* If nothing in our range is locked, we don't need to do anything */ if (spi_nor_is_unlocked_sr(nor, ofs, len, status_old)) return 0; @@ -512,10 +520,7 @@ static int spi_nor_sr_unlock(struct spi_nor *nor, loff= _t ofs, u64 len) (ofs_new < ofs_old || (ofs_old + len_old) < (ofs_new + len_new))) return -EINVAL; =20 - if (nor->flags & SNOR_F_NO_READ_CR) - ret =3D spi_nor_write_sr_and_check(nor, best_status_new[0]); - else - ret =3D spi_nor_write_sr_cr_and_check(nor, best_status_new); + ret =3D spi_nor_write_sr1_and_sr2_and_check(nor, best_status_new); if (ret) return ret; =20 @@ -536,20 +541,10 @@ static int spi_nor_sr_is_locked(struct spi_nor *nor, = loff_t ofs, u64 len) u8 sr_cr[2] =3D {}; int ret; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1_and_sr2_careful(nor, sr_cr); if (ret) return ret; =20 - sr_cr[0] =3D nor->bouncebuf[0]; - - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); - if (ret) - return ret; - - sr_cr[1] =3D nor->bouncebuf[0]; - } - return spi_nor_is_locked_sr(nor, ofs, len, sr_cr); } =20 diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 593429bd6cdf..01a693033448 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -520,12 +520,12 @@ static int winbond_nor_late_init(struct spi_nor *nor) * been to declare CR reads as unsupported, whereas the Jedec * specification doesn't clearly state that. In practice, all these * chips do support reading back the CR, which is needed for SWP support, - * so make sure that capability remains enabled (needed for SWP). + * so make sure that capability remains enabled. * In practice, only exclude the old W25X family (JEDEC ID: EF 30 xx) * which actually does not support this feature. */ if (nor->id[1] > 0x30) - nor->flags &=3D ~SNOR_F_NO_READ_CR; + params->opcodes.read_sr2 =3D SPINOR_OP_RDCR; =20 /* * Winbond has reused many IDs, up to four times at this diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 4b92494827b1..f0b5a1989881 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -113,20 +113,16 @@ #define SR_E_ERR BIT(5) #define SR_P_ERR BIT(6) =20 -#define SR1_QUAD_EN_BIT6 BIT(6) - #define SR_BP_SHIFT 2 =20 /* Enhanced Volatile Configuration Register bits */ #define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */ =20 /* Status Register 2 bits. */ -#define SR2_QUAD_EN_BIT1 BIT(1) #define SR2_LB1 BIT(3) /* Security Register Lock Bit 1 */ #define SR2_LB2 BIT(4) /* Security Register Lock Bit 2 */ #define SR2_LB3 BIT(5) /* Security Register Lock Bit 3 */ #define SR2_CMP_BIT6 BIT(6) -#define SR2_QUAD_EN_BIT7 BIT(7) =20 /* Supported SPI protocols */ #define SNOR_PROTO_INST_MASK GENMASK(23, 16) --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAEDA4AE108 for ; Wed, 2 Sep 2026 16:59:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368397; cv=none; b=P7X8Xs08Z6jC54EQbpwMvo1SJzHpM2fPu0e40R7vYUur9Ry0x0xFH/V6oNbXQ1G/urcPC47lnzXjLStevKt/SQvRGYda2lLn8BSoKSvl7bN9iHUDsg4RCFukgUHfXCfW7fG+7okFTbs/JGe2nvMeSmP5QQWP6MIKo9RmFpjUR9w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368397; c=relaxed/simple; bh=W1S9/hT1zGUS1zo9daSE2Bsn/9v9eP9/RmkgnRVj8EY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=q//EgHg1Bd6LIvfOawmLqxP+o9IwjgD0sQEZ+vprhX6dFD9hU4R2GukgXJ4it4sWiX6tqo+Ejg8OlTV0mF6TmgnXdv5qFoIwCcxKm0Wp80AuJbm1WOzVf9LdSZUwD5MDC7JuohwL2SnL7Q2HMAYhOcLYGTBWUDhCeIaJRQM5Wvo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=1hm5qy2h; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="1hm5qy2h" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 23B104E414EA; Wed, 2 Sep 2026 16:59:54 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id E6CD36053C; Wed, 2 Sep 2026 16:59:53 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 493A411C79B6F; Wed, 2 Sep 2026 18:59:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368388; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=PmjfDcV9O1lYxa99SNyUi2V7hvGHYcd8gRD3JAlLYbs=; b=1hm5qy2haXjcd4HJ5xAz3ALLinTY4Zqf0suU2dC2tKF9iZiY5MnVgphYYBr746xMIr7Gio QF6rI63NkZlLRY7r+t5tG+W3ZSXoSUaf/PootbjVQSyKmJqGkGfN61opgtyGqnPki5mwVK oAvP5VG4gRTVptEIGbKW0ueth1RuUelRQuNTfxzWLLhh8J8bsyicE8SvRpbCQwMVP8SrJr PN5nwHG5DDMMddOBO+gvwIWupyidbPeiL6ym3kZgsRJS0XdQCeTdHhPHrrRDQNK6YPrj/1 74nU4PuO92rLTWH+KSA8OYvCjCX8edCB3l/ILi39utAEpPx81mvjqz4FZI2saA== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:18 +0200 Subject: [PATCH v4 04/25] mtd: spi-nor: Add support for the new JESD216 rev F QER field Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-4-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Revision F of the JEDEC JESD216 standard includes yet another supported setting in the QER 3-bit bitfield: 110b. This setting implies that the QE bit is bit 1 of SR2 (which is an already supported case) but this time it makes it very clear that both reading and writing to SR2 is supported, but not with the usual opcodes. The write operation uses an alternate WRSR2 opcode: 0x31 (instead of 0x3E) and both the reads and writes manipulate a single register at a time. Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/sfdp.c | 6 ++++++ drivers/mtd/spi-nor/sfdp.h | 8 ++++++++ include/linux/mtd/spi-nor.h | 1 + 3 files changed, 15 insertions(+) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 1d799f02b8e5..285ac781fba8 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -618,6 +618,12 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, params->qe_mask[1] =3D BIT(1); break; =20 + case BFPT_DWORD15_QER_SR2_BIT1_1B: + params->qe_mask[1] =3D BIT(1); + params->opcodes.write_sr1_and_sr2 =3D 0; + params->opcodes.write_sr2 =3D SPINOR_OP_WRSR2_ALT; + break; + default: dev_dbg(nor->dev, "BFPT QER reserved value used\n"); break; diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h index d976c6c9a4ad..e8ed814c6530 100644 --- a/drivers/mtd/spi-nor/sfdp.h +++ b/drivers/mtd/spi-nor/sfdp.h @@ -12,6 +12,7 @@ #define SFDP_JESD216_MINOR 0 #define SFDP_JESD216A_MINOR 5 #define SFDP_JESD216B_MINOR 6 +#define SFDP_JESD216F_MINOR 10 =20 /* SFDP DWORDS are indexed from 1 but C arrays are indexed from 0. */ #define SFDP_DWORD(i) ((i) - 1) @@ -81,6 +82,12 @@ struct sfdp_bfpt { * instruction 35h. QE is set via Write Status instruction 01h with * two data bytes where bit 1 of the second byte is one. * [...] + * (from JESD216 rev F) + * - 110b: QE is bit 1 of status register 2. Status register 1 is read usi= ng + * Read Status instruction 05h. Status register2 is read using + * instruction 35h, and status register 3 is read using instructio= n 15h. + * QE is set via Write Status Register instruction 31h with one da= ta + * byte. */ #define BFPT_DWORD15_QER_MASK GENMASK(22, 20) #define BFPT_DWORD15_QER_NONE (0x0UL << 20) /* Micron */ @@ -89,6 +96,7 @@ struct sfdp_bfpt { #define BFPT_DWORD15_QER_SR2_BIT7 (0x3UL << 20) #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD (0x4UL << 20) #define BFPT_DWORD15_QER_SR2_BIT1 (0x5UL << 20) /* Spansion */ +#define BFPT_DWORD15_QER_SR2_BIT1_1B (0x6UL << 20) /* Winbond */ =20 #define BFPT_DWORD16_EN4B_MASK GENMASK(31, 24) #define BFPT_DWORD16_EN4B_ALWAYS_4B BIT(30) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index f0b5a1989881..3a55d76ea77d 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -25,6 +25,7 @@ #define SPINOR_OP_WRSR 0x01 /* Write status register 1 */ #define SPINOR_OP_RDSR2 0x3f /* Read status register 2 */ #define SPINOR_OP_WRSR2 0x3e /* Write status register 2 */ +#define SPINOR_OP_WRSR2_ALT 0x31 /* Write status register 2 (alternative) = */ #define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */ #define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */ #define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */ --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DD774ADD86 for ; Wed, 2 Sep 2026 17:00:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368404; cv=none; b=A8IbCk0cOULhZfW5Xo0QWi5zpqR+W8/DjlYjWdFdEac33gQDimtn/brz+r75fsBIoLetDY38OJrB+EA8ciDnva5ojZfaT3NOt+RWb2n9ptKZ/quIlN2DvrrcL9sIGgY9jHYyRjRK8x/TNuPMIQJTdYaEfWR+8qviOocY2xKqZwU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368404; c=relaxed/simple; bh=1p9iCnnp3n5EYzH+1pulb/TYwddq0xdLbPONiSB8cxg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EPBUp9S1A2q39YjRVk/rtovh5u6OgoqhTi07RBNXSR1L0jYDZ3MmQ8mJDyr5jIfIgtugWfvIekdPWOtq+ZGcfW064fITVZYHJez6cUQehpDS9VQWY/u47d+6Ty2PB4C/KbyZms7Q6SRrnRVWGDp/Nmg0q1CDkUpN26TfD1//Pls= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=WHq7ksvP; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="WHq7ksvP" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 0CF501A1968; Wed, 2 Sep 2026 17:00:00 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id CD6506053C; Wed, 2 Sep 2026 16:59:59 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 457BB11C79C04; Wed, 2 Sep 2026 18:59:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368394; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=DkSx7kQamRFfhTYZ/X2nGLiXG6hhazR6uS6y7d3Fb2o=; b=WHq7ksvP/sCF4A0XzA2mkz7e6VaXNCm6VRD2sdrsIMD+Dq9S/9bg9on6LJKS8wlKXileHo JaEVqr67mesbX6mY3niqi9z14bBAPxvIyhhMQaf2A9Bc+f1cy9iPpa41hohHs6Ga7zpwaO L7t+QrOcU51+Rok3CKiR10rjV7UvGoK8TpbxG8udK04CKz9vJINPTKqf8bn6ZKctaFUZBu cBJvc2DFlYWoJ6gLTeecNJ10zdyT1aHuqo75/0tGc8+DEuFm/+K3JMA1/SZlEdKGU3N9ar sf4qR2R/ZqyGE/fCbbEwe7TyvxSq7qh5WrtDoaYqAw1p2Kf9wN/pXVhn1MQEqg== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:19 +0200 Subject: [PATCH v4 05/25] mtd: spi-nor: Create the concept of fixup table with match function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-5-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Manufacturer ID tables increase and fixup() hooks proliferate. Having one possible structure per chip was fine until the fixups started being more and more common and needed, to some extend due to ID reuses. Mixing fixups and chips becomes hard and requires extra helpers to sort which ones are needed for a given chip, which every time this happens requires a lot of rework. Replace the two-level fixup association (a manufacturer wide hook and a per flash_info hook) with a per-manufacturer list of fixups that can be looked up by flash ID and/or match function. The match logic works as follows: - If there is an ID, it must match - If there is a match function, it must match (cumulative) - If there is no identifier (no ID nor any match function), it's a catch-all entry typically used for flagging manufacturer fixups. Suggested-by: Michael Walle Tested-by: Takahiro Kuwano Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/atmel.c | 23 ++++++----- drivers/mtd/spi-nor/core.c | 82 ++++++++++++++++++++++++++++--------= ---- drivers/mtd/spi-nor/core.h | 23 +++++++++-- drivers/mtd/spi-nor/everspin.c | 7 +++- drivers/mtd/spi-nor/gigadevice.c | 7 +++- drivers/mtd/spi-nor/issi.c | 22 ++++++++--- drivers/mtd/spi-nor/macronix.c | 23 ++++++----- drivers/mtd/spi-nor/micron-st.c | 43 +++++++++++++++------ drivers/mtd/spi-nor/sfdp.c | 56 ++++++++++++++++++--------- drivers/mtd/spi-nor/spansion.c | 41 +++++++++++--------- drivers/mtd/spi-nor/sst.c | 11 ++++-- drivers/mtd/spi-nor/winbond.c | 17 ++++++--- 12 files changed, 247 insertions(+), 108 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index 8741c0bda497..bccc702a2c4a 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -194,47 +194,40 @@ static const struct flash_info atmel_nor_parts[] =3D { .size =3D SZ_512K, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &atmel_nor_global_protection_fixups, }, { .id =3D SNOR_ID(0x1f, 0x45, 0x01), .name =3D "at26df081a", .size =3D SZ_1M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &atmel_nor_global_protection_fixups }, { .id =3D SNOR_ID(0x1f, 0x46, 0x01), .name =3D "at26df161a", .size =3D SZ_2M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &atmel_nor_global_protection_fixups }, { .id =3D SNOR_ID(0x1f, 0x47, 0x00), .name =3D "at25df321", .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &atmel_nor_global_protection_fixups }, { .id =3D SNOR_ID(0x1f, 0x47, 0x01), .name =3D "at25df321a", .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &atmel_nor_global_protection_fixups }, { .id =3D SNOR_ID(0x1f, 0x47, 0x08), .name =3D "at25ff321a", .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .fixups =3D &atmel_nor_global_protection_fixups }, { .id =3D SNOR_ID(0x1f, 0x48, 0x00), .name =3D "at25df641", .size =3D SZ_8M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &atmel_nor_global_protection_fixups }, { .id =3D SNOR_ID(0x1f, 0x66, 0x01), .name =3D "at25fs010", @@ -242,14 +235,12 @@ static const struct flash_info atmel_nor_parts[] =3D { .size =3D SZ_128K, .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &at25fs_nor_fixups }, { .id =3D SNOR_ID(0x1f, 0x66, 0x04), .name =3D "at25fs040", .size =3D SZ_512K, .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &at25fs_nor_fixups }, { .id =3D SNOR_ID(0x1f, 0x87, 0x01), .size =3D SZ_4M, @@ -257,8 +248,22 @@ static const struct flash_info atmel_nor_parts[] =3D { }, }; =20 +static const struct spi_nor_fixup atmel_fixups[] =3D { + { .id =3D SNOR_ID(0x1f, 0x44, 0x01), .fixups =3D &atmel_nor_global_protec= tion_fixups }, + { .id =3D SNOR_ID(0x1f, 0x45, 0x01), .fixups =3D &atmel_nor_global_protec= tion_fixups }, + { .id =3D SNOR_ID(0x1f, 0x46, 0x01), .fixups =3D &atmel_nor_global_protec= tion_fixups }, + { .id =3D SNOR_ID(0x1f, 0x47, 0x00), .fixups =3D &atmel_nor_global_protec= tion_fixups }, + { .id =3D SNOR_ID(0x1f, 0x47, 0x01), .fixups =3D &atmel_nor_global_protec= tion_fixups }, + { .id =3D SNOR_ID(0x1f, 0x47, 0x08), .fixups =3D &atmel_nor_global_protec= tion_fixups }, + { .id =3D SNOR_ID(0x1f, 0x48, 0x00), .fixups =3D &atmel_nor_global_protec= tion_fixups }, + { .id =3D SNOR_ID(0x1f, 0x66, 0x01), .fixups =3D &at25fs_nor_fixups }, + { .id =3D SNOR_ID(0x1f, 0x66, 0x04), .fixups =3D &at25fs_nor_fixups }, +}; + const struct spi_nor_manufacturer spi_nor_atmel =3D { .name =3D "atmel", .parts =3D atmel_nor_parts, .nparts =3D ARRAY_SIZE(atmel_nor_parts), + .fixups =3D atmel_fixups, + .nfixups =3D ARRAY_SIZE(atmel_fixups), }; diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 020045c14c68..a9360998d34b 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2357,19 +2357,24 @@ int spi_nor_post_bfpt_fixups(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt) { + const struct spi_nor_fixup *fixups; int ret; + unsigned int i; =20 - if (nor->manufacturer && nor->manufacturer->fixups && - nor->manufacturer->fixups->post_bfpt) { - ret =3D nor->manufacturer->fixups->post_bfpt(nor, bfpt_header, - bfpt); - if (ret) - return ret; + if (!nor->manufacturer || !nor->manufacturer->fixups) + return 0; + + fixups =3D nor->manufacturer->fixups; + + for (i =3D 0; i < nor->manufacturer->nfixups; i++) { + if (fixups[i].fixups->post_bfpt && + spi_nor_fixup_match(nor, &fixups[i])) { + ret =3D fixups[i].fixups->post_bfpt(nor, bfpt_header, bfpt); + if (ret) + return ret; + } } =20 - if (nor->info->fixups && nor->info->fixups->post_bfpt) - return nor->info->fixups->post_bfpt(nor, bfpt_header, bfpt); - return 0; } =20 @@ -2626,6 +2631,26 @@ static int spi_nor_setup(struct spi_nor *nor, return spi_nor_set_addr_nbytes(nor); } =20 +bool spi_nor_fixup_match(const struct spi_nor *nor, + const struct spi_nor_fixup *fixup) +{ + const struct spi_nor_id *id =3D nor->info ? nor->info->id : NULL; + + /* Filter by ID first, if available */ + if (fixup->id) { + if (!id || fixup->id->len > id->len || + memcmp(id->bytes, fixup->id->bytes, fixup->id->len)) + return false; + } + + /* Further filter with the match callback, if provided */ + if (fixup->match) + return fixup->match(nor); + + /* Either there was an ID and it matched, or it is a catch-all entry */ + return true; +} + /** * spi_nor_manufacturer_init_params() - Initialize the flash's parameters = and * settings based on MFR register and ->default_init() hook. @@ -2633,12 +2658,19 @@ static int spi_nor_setup(struct spi_nor *nor, */ static void spi_nor_manufacturer_init_params(struct spi_nor *nor) { - if (nor->manufacturer && nor->manufacturer->fixups && - nor->manufacturer->fixups->default_init) - nor->manufacturer->fixups->default_init(nor); + const struct spi_nor_fixup *fixups; + unsigned int i; =20 - if (nor->info->fixups && nor->info->fixups->default_init) - nor->info->fixups->default_init(nor); + if (!nor->manufacturer || !nor->manufacturer->fixups) + return; + + fixups =3D nor->manufacturer->fixups; + + for (i =3D 0; i < nor->manufacturer->nfixups; i++) { + if (fixups[i].fixups->default_init && + spi_nor_fixup_match(nor, &fixups[i])) + fixups[i].fixups->default_init(nor); + } } =20 /** @@ -2787,22 +2819,24 @@ static void spi_nor_init_fixup_flags(struct spi_nor= *nor) static int spi_nor_late_init_params(struct spi_nor *nor) { struct spi_nor_flash_parameter *params =3D nor->params; + const struct spi_nor_fixup *fixups; + unsigned int i; int ret; =20 /* Needed by some late_init hooks */ spi_nor_init_flags(nor); =20 - if (nor->manufacturer && nor->manufacturer->fixups && - nor->manufacturer->fixups->late_init) { - ret =3D nor->manufacturer->fixups->late_init(nor); - if (ret) - return ret; - } + if (nor->manufacturer && nor->manufacturer->fixups) { + fixups =3D nor->manufacturer->fixups; =20 - if (nor->info->fixups && nor->info->fixups->late_init) { - ret =3D nor->info->fixups->late_init(nor); - if (ret) - return ret; + for (i =3D 0; i < nor->manufacturer->nfixups; i++) { + if (fixups[i].fixups->late_init && + spi_nor_fixup_match(nor, &fixups[i])) { + ret =3D fixups[i].fixups->late_init(nor); + if (ret) + return ret; + } + } } =20 if (!nor->params->opcodes.die_erase) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 8b05371655f4..32a2d485d31d 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -445,6 +445,19 @@ struct spi_nor_fixups { int (*late_init)(struct spi_nor *nor); }; =20 +/** + * struct spi_nor_fixup - SPI NOR fixup registration. + * @id: (optional) flash ID this fixup applies to, may only match the + * ID prefix, eg. just the first few bytes to match a whole family + * @match: (optional) custom match function (can be used together with @id) + * @fixups: the fixup hooks to apply when this entry matches + */ +struct spi_nor_fixup { + const struct spi_nor_id *id; + bool (*match)(const struct spi_nor *nor); + const struct spi_nor_fixups *fixups; +}; + /** * struct spi_nor_id - SPI NOR flash ID. * @@ -560,7 +573,6 @@ struct flash_info { u8 mfr_flags; =20 const struct spi_nor_otp_organization *otp; - const struct spi_nor_fixups *fixups; }; =20 #define SNOR_ID(...) \ @@ -582,13 +594,16 @@ struct flash_info { * @name: manufacturer name * @parts: array of parts supported by this manufacturer * @nparts: number of entries in the parts array - * @fixups: hooks called at various points in time during spi_nor_scan() + * @fixups: list of fixups, each matched by ID (or a custom match function= ), + * applied to any part of this manufacturer. + * @nfixups: number of entries in the fixups array */ struct spi_nor_manufacturer { const char *name; const struct flash_info *parts; unsigned int nparts; - const struct spi_nor_fixups *fixups; + const struct spi_nor_fixup *fixups; + unsigned int nfixups; }; =20 /** @@ -619,6 +634,8 @@ extern const struct spi_nor_manufacturer spi_nor_xmc; =20 extern const struct attribute_group *spi_nor_sysfs_groups[]; =20 +bool spi_nor_fixup_match(const struct spi_nor *nor, + const struct spi_nor_fixup *fixup); void spi_nor_spimem_setup_op(const struct spi_nor *nor, struct spi_mem_op *op, const enum spi_nor_protocol proto); diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c index add37104d673..864dffba0e9c 100644 --- a/drivers/mtd/spi-nor/everspin.c +++ b/drivers/mtd/spi-nor/everspin.c @@ -44,9 +44,14 @@ static const struct spi_nor_fixups everspin_nor_fixups = =3D { .default_init =3D everspin_nor_default_init, }; =20 +static const struct spi_nor_fixup everspin_fixups[] =3D { + { .fixups =3D &everspin_nor_fixups }, +}; + const struct spi_nor_manufacturer spi_nor_everspin =3D { .name =3D "everspin", .parts =3D everspin_nor_parts, .nparts =3D ARRAY_SIZE(everspin_nor_parts), - .fixups =3D &everspin_nor_fixups, + .fixups =3D everspin_fixups, + .nfixups =3D ARRAY_SIZE(everspin_fixups), }; diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index 4070a692e968..f76fd0dedd0a 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -64,7 +64,6 @@ static const struct flash_info gigadevice_nor_parts[] =3D= { .id =3D SNOR_ID(0xc8, 0x40, 0x19), .name =3D "gd25q256", .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6, - .fixups =3D &gd25q256_fixups, .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0xc8, 0x60, 0x16), @@ -87,8 +86,14 @@ static const struct flash_info gigadevice_nor_parts[] = =3D { }, }; =20 +static const struct spi_nor_fixup gigadevice_fixups[] =3D { + { .id =3D SNOR_ID(0xc8, 0x40, 0x19), .fixups =3D &gd25q256_fixups }, +}; + const struct spi_nor_manufacturer spi_nor_gigadevice =3D { .name =3D "gigadevice", .parts =3D gigadevice_nor_parts, .nparts =3D ARRAY_SIZE(gigadevice_nor_parts), + .fixups =3D gigadevice_fixups, + .nfixups =3D ARRAY_SIZE(gigadevice_fixups), }; diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 04db42b5141e..7af850eea9ff 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -52,13 +52,11 @@ static const struct flash_info issi_nor_parts[] =3D { .sector_size =3D SZ_32K, .size =3D SZ_64K, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &pm25lv_nor_fixups }, { .name =3D "pm25lv010", .sector_size =3D SZ_32K, .size =3D SZ_128K, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &pm25lv_nor_fixups }, { .id =3D SNOR_ID(0x7f, 0x9d, 0x20), .name =3D "is25cd512", @@ -103,7 +101,6 @@ static const struct flash_info issi_nor_parts[] =3D { }, { .id =3D SNOR_ID(0x9d, 0x60, 0x19), .name =3D "is25lp256", - .fixups =3D &is25lp256_fixups, .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0x9d, 0x70, 0x16), @@ -124,7 +121,6 @@ static const struct flash_info issi_nor_parts[] =3D { .id =3D SNOR_ID(0x9d, 0x70, 0x19), .name =3D "is25wp256", .flags =3D SPI_NOR_QUAD_PP, - .fixups =3D &is25lp256_fixups, .fixup_flags =3D SPI_NOR_4B_OPCODES, } }; @@ -139,9 +135,25 @@ static const struct spi_nor_fixups issi_fixups =3D { .default_init =3D issi_nor_default_init, }; =20 +/* PM25LV parts have no JEDEC ID and are likely matched by name */ +static bool issi_pm25lv_match(const struct spi_nor *nor) +{ + const char *name =3D nor->info ? nor->info->name : NULL; + + return name && strstarts(name, "pm25lv"); +} + +static const struct spi_nor_fixup issi_fixup_list[] =3D { + { .fixups =3D &issi_fixups }, + { .match =3D issi_pm25lv_match, .fixups =3D &pm25lv_nor_fixups }, + { .id =3D SNOR_ID(0x9d, 0x60, 0x19), .fixups =3D &is25lp256_fixups }, + { .id =3D SNOR_ID(0x9d, 0x70, 0x19), .fixups =3D &is25lp256_fixups }, +}; + const struct spi_nor_manufacturer spi_nor_issi =3D { .name =3D "issi", .parts =3D issi_nor_parts, .nparts =3D ARRAY_SIZE(issi_nor_parts), - .fixups =3D &issi_fixups, + .fixups =3D issi_fixup_list, + .nfixups =3D ARRAY_SIZE(issi_fixup_list), }; diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 55612237c1ef..04b431bf5f13 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -137,20 +137,16 @@ static const struct flash_info macronix_nor_parts[] = =3D { }, { /* MX25L25635E, MX25L25645G */ .id =3D SNOR_ID(0xc2, 0x20, 0x19), - .fixups =3D &mx25l25635_fixups }, { /* MX66L51235F */ .id =3D SNOR_ID(0xc2, 0x20, 0x1a), .fixup_flags =3D SPI_NOR_4B_OPCODES, - .fixups =3D ¯onix_qpp4b_fixups, }, { /* MX66L1G45G */ .id =3D SNOR_ID(0xc2, 0x20, 0x1b), - .fixups =3D ¯onix_qpp4b_fixups, }, { /* MX66L2G45G */ .id =3D SNOR_ID(0xc2, 0x20, 0x1c), - .fixups =3D ¯onix_qpp4b_fixups, }, { .id =3D SNOR_ID(0xc2, 0x23, 0x14), .name =3D "mx25v8035f", @@ -189,15 +185,12 @@ static const struct flash_info macronix_nor_parts[] = =3D { }, { /* MX25U51245G */ .id =3D SNOR_ID(0xc2, 0x25, 0x3a), - .fixups =3D ¯onix_qpp4b_fixups, }, { /* MX66U1G45G */ .id =3D SNOR_ID(0xc2, 0x25, 0x3b), - .fixups =3D ¯onix_qpp4b_fixups, }, { /* MX66U2G45G */ .id =3D SNOR_ID(0xc2, 0x25, 0x3c), - .fixups =3D ¯onix_qpp4b_fixups, }, { .id =3D SNOR_ID(0xc2, 0x26, 0x18), .name =3D "mx25l12855e", @@ -229,7 +222,6 @@ static const struct flash_info macronix_nor_parts[] =3D= { }, { /* MX25L3255E */ .id =3D SNOR_ID(0xc2, 0x9e, 0x16), - .fixups =3D &mx25l3255e_fixups, }, /* * This spares us of adding new flash entries for flashes that can be @@ -333,9 +325,22 @@ static const struct spi_nor_fixups macronix_nor_fixups= =3D { .late_init =3D macronix_nor_late_init, }; =20 +static const struct spi_nor_fixup macronix_fixups[] =3D { + { .fixups =3D ¯onix_nor_fixups }, + { .id =3D SNOR_ID(0xc2, 0x20, 0x19), .fixups =3D &mx25l25635_fixups }, + { .id =3D SNOR_ID(0xc2, 0x20, 0x1a), .fixups =3D ¯onix_qpp4b_fixups }, + { .id =3D SNOR_ID(0xc2, 0x20, 0x1b), .fixups =3D ¯onix_qpp4b_fixups }, + { .id =3D SNOR_ID(0xc2, 0x20, 0x1c), .fixups =3D ¯onix_qpp4b_fixups }, + { .id =3D SNOR_ID(0xc2, 0x25, 0x3a), .fixups =3D ¯onix_qpp4b_fixups }, + { .id =3D SNOR_ID(0xc2, 0x25, 0x3b), .fixups =3D ¯onix_qpp4b_fixups }, + { .id =3D SNOR_ID(0xc2, 0x25, 0x3c), .fixups =3D ¯onix_qpp4b_fixups }, + { .id =3D SNOR_ID(0xc2, 0x9e, 0x16), .fixups =3D &mx25l3255e_fixups }, +}; + const struct spi_nor_manufacturer spi_nor_macronix =3D { .name =3D "macronix", .parts =3D macronix_nor_parts, .nparts =3D ARRAY_SIZE(macronix_nor_parts), - .fixups =3D ¯onix_nor_fixups, + .fixups =3D macronix_fixups, + .nfixups =3D ARRAY_SIZE(macronix_fixups), }; diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 344539d2a36a..2aabd6d487ba 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -206,13 +206,11 @@ static const struct flash_info micron_nor_parts[] =3D= { .id =3D SNOR_ID(0x2c, 0x5b, 0x1a), .mfr_flags =3D USE_FSR, .fixup_flags =3D SPI_NOR_IO_MODE_EN_VOLATILE, - .fixups =3D &mt35xu512aba_fixups, }, { /* MT35XU01GBBA */ .id =3D SNOR_ID(0x2c, 0x5b, 0x1b), .mfr_flags =3D USE_FSR, .fixup_flags =3D SPI_NOR_IO_MODE_EN_VOLATILE, - .fixups =3D &mt35_two_die_fixups, }, { .id =3D SNOR_ID(0x2c, 0x5b, 0x1c), .name =3D "mt35xu02g", @@ -221,7 +219,6 @@ static const struct flash_info micron_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_OCTAL_READ, .mfr_flags =3D USE_FSR, .fixup_flags =3D SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE, - .fixups =3D &mt35_two_die_fixups, }, }; =20 @@ -233,6 +230,17 @@ static int mt25qu512a_post_bfpt_fixup(struct spi_nor *= nor, return 0; } =20 +/* + * n25q00a parts share the first same 3 ID bytes with mt25qu01g. + * In order to not mix the fixups, further filter out using the part name. + */ +static bool n25q00a_match(const struct spi_nor *nor) +{ + const char *name =3D nor->info ? nor->info->name : NULL; + + return name && !strncmp(name, "n25q00a", 7); +} + static const struct spi_nor_fixups mt25qu512a_fixups =3D { .post_bfpt =3D mt25qu512a_post_bfpt_fixup, }; @@ -426,14 +434,12 @@ static const struct flash_info st_nor_parts[] =3D { SPI_NOR_BP3_SR_BIT6, .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_FSR, - .fixups =3D &n25q00_fixups, }, { .id =3D SNOR_ID(0x20, 0xba, 0x22), .name =3D "mt25ql02g", .size =3D SZ_256M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_FSR, - .fixups =3D &mt25q02_fixups, }, { .id =3D SNOR_ID(0x20, 0xbb, 0x15), .name =3D "n25q016a", @@ -480,7 +486,6 @@ static const struct flash_info st_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6, .mfr_flags =3D USE_FSR, - .fixups =3D &mt25qu512a_fixups, }, { .id =3D SNOR_ID(0x20, 0xbb, 0x20), .name =3D "n25q512a", @@ -493,21 +498,18 @@ static const struct flash_info st_nor_parts[] =3D { .id =3D SNOR_ID(0x20, 0xbb, 0x21, 0x10, 0x44, 0x00), .name =3D "mt25qu01g", .mfr_flags =3D USE_FSR, - .fixups =3D &mt25q01_fixups, }, { .id =3D SNOR_ID(0x20, 0xbb, 0x21), .name =3D "n25q00a", .size =3D SZ_128M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_FSR, - .fixups =3D &n25q00_fixups, }, { .id =3D SNOR_ID(0x20, 0xbb, 0x22), .name =3D "mt25qu02g", .size =3D SZ_256M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_FSR, - .fixups =3D &mt25q02_fixups, } }; =20 @@ -657,16 +659,35 @@ static const struct spi_nor_fixups micron_st_nor_fixu= ps =3D { .late_init =3D micron_st_nor_late_init, }; =20 +static const struct spi_nor_fixup micron_fixups[] =3D { + { .fixups =3D µn_st_nor_fixups }, + { .id =3D SNOR_ID(0x2c, 0x5b, 0x1a), .fixups =3D &mt35xu512aba_fixups }, + { .id =3D SNOR_ID(0x2c, 0x5b, 0x1b), .fixups =3D &mt35_two_die_fixups }, + { .id =3D SNOR_ID(0x2c, 0x5b, 0x1c), .fixups =3D &mt35_two_die_fixups }, +}; + +static const struct spi_nor_fixup st_fixups[] =3D { + { .fixups =3D µn_st_nor_fixups }, + { .id =3D SNOR_ID(0x20, 0xba, 0x21), .fixups =3D &n25q00_fixups }, + { .id =3D SNOR_ID(0x20, 0xba, 0x22), .fixups =3D &mt25q02_fixups }, + { .id =3D SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00), .fixups =3D &mt25q= u512a_fixups }, + { .id =3D SNOR_ID(0x20, 0xbb, 0x21, 0x10, 0x44, 0x00), .fixups =3D &mt25q= 01_fixups }, + { .id =3D SNOR_ID(0x20, 0xbb, 0x21), .match =3D n25q00a_match, .fixups = =3D &n25q00_fixups }, + { .id =3D SNOR_ID(0x20, 0xbb, 0x22), .fixups =3D &mt25q02_fixups }, +}; + const struct spi_nor_manufacturer spi_nor_micron =3D { .name =3D "micron", .parts =3D micron_nor_parts, .nparts =3D ARRAY_SIZE(micron_nor_parts), - .fixups =3D µn_st_nor_fixups, + .fixups =3D micron_fixups, + .nfixups =3D ARRAY_SIZE(micron_fixups), }; =20 const struct spi_nor_manufacturer spi_nor_st =3D { .name =3D "st", .parts =3D st_nor_parts, .nparts =3D ARRAY_SIZE(st_nor_parts), - .fixups =3D µn_st_nor_fixups, + .fixups =3D st_fixups, + .nfixups =3D ARRAY_SIZE(st_fixups), }; diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 285ac781fba8..39cb8ac3a037 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -727,12 +727,19 @@ static u8 spi_nor_smpt_addr_nbytes(const struct spi_n= or *nor, const u32 settings static void spi_nor_smpt_read_dummy_fixups(const struct spi_nor *nor, u8 *read_dummy) { - if (nor->manufacturer && nor->manufacturer->fixups && - nor->manufacturer->fixups->smpt_read_dummy) - nor->manufacturer->fixups->smpt_read_dummy(nor, read_dummy); + const struct spi_nor_fixup *fixups; + unsigned int i; =20 - if (nor->info->fixups && nor->info->fixups->smpt_read_dummy) - nor->info->fixups->smpt_read_dummy(nor, read_dummy); + if (!nor->manufacturer || !nor->manufacturer->fixups) + return; + + fixups =3D nor->manufacturer->fixups; + + for (i =3D 0; i < nor->manufacturer->nfixups; i++) { + if (fixups[i].fixups->smpt_read_dummy && + spi_nor_fixup_match(nor, &fixups[i])) + fixups[i].fixups->smpt_read_dummy(nor, read_dummy); + } } =20 /** @@ -757,12 +764,19 @@ static u8 spi_nor_smpt_read_dummy(const struct spi_no= r *nor, const u32 settings) =20 static void spi_nor_smpt_map_id_fixups(const struct spi_nor *nor, u8 *map_= id) { - if (nor->manufacturer && nor->manufacturer->fixups && - nor->manufacturer->fixups->smpt_map_id) - nor->manufacturer->fixups->smpt_map_id(nor, map_id); + const struct spi_nor_fixup *fixups; + unsigned int i; =20 - if (nor->info->fixups && nor->info->fixups->smpt_map_id) - nor->info->fixups->smpt_map_id(nor, map_id); + if (!nor->manufacturer || !nor->manufacturer->fixups) + return; + + fixups =3D nor->manufacturer->fixups; + + for (i =3D 0; i < nor->manufacturer->nfixups; i++) { + if (fixups[i].fixups->smpt_map_id && + spi_nor_fixup_match(nor, &fixups[i])) + fixups[i].fixups->smpt_map_id(nor, map_id); + } } =20 /** @@ -1406,17 +1420,23 @@ static int spi_nor_parse_sccr_mc(struct spi_nor *no= r, */ static int spi_nor_post_sfdp_fixups(struct spi_nor *nor) { + const struct spi_nor_fixup *fixups; + unsigned int i; int ret; =20 - if (nor->manufacturer && nor->manufacturer->fixups && - nor->manufacturer->fixups->post_sfdp) { - ret =3D nor->manufacturer->fixups->post_sfdp(nor); - if (ret) - return ret; - } + if (!nor->manufacturer || !nor->manufacturer->fixups) + return 0; =20 - if (nor->info->fixups && nor->info->fixups->post_sfdp) - return nor->info->fixups->post_sfdp(nor); + fixups =3D nor->manufacturer->fixups; + + for (i =3D 0; i < nor->manufacturer->nfixups; i++) { + if (fixups[i].fixups->post_sfdp && + spi_nor_fixup_match(nor, &fixups[i])) { + ret =3D fixups[i].fixups->post_sfdp(nor); + if (ret) + return ret; + } + } =20 return 0; } diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index ca2703a5a338..f3862eb1a23a 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -905,7 +905,6 @@ static const struct flash_info spansion_nor_parts[] =3D= { .sector_size =3D SZ_256K, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, - .fixups =3D &s25fs_s_nor_fixups, }, { .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x00), .name =3D "s25sl12800", @@ -941,7 +940,6 @@ static const struct flash_info spansion_nor_parts[] =3D= { .size =3D SZ_16M, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, - .fixups =3D &s25fs_s_nor_fixups, }, { .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01), .name =3D "s25fl129p1", @@ -1001,76 +999,61 @@ static const struct flash_info spansion_nor_parts[] = =3D { .id =3D SNOR_ID(0x34, 0x2a, 0x1a, 0x0f, 0x03, 0x90), .name =3D "s25hl512t", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s25hx_t_fixups }, { .id =3D SNOR_ID(0x34, 0x2a, 0x1b, 0x0f, 0x03, 0x90), .name =3D "s25hl01gt", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s25hx_t_fixups }, { .id =3D SNOR_ID(0x34, 0x2a, 0x1c, 0x0f, 0x00, 0x90), .name =3D "s25hl02gt", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s25hx_t_fixups }, { .id =3D SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90), .name =3D "s25fs256t", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s25fs256t_fixups }, { .id =3D SNOR_ID(0x34, 0x2b, 0x1a, 0x0f, 0x03, 0x90), .name =3D "s25hs512t", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s25hx_t_fixups }, { .id =3D SNOR_ID(0x34, 0x2b, 0x1b, 0x0f, 0x03, 0x90), .name =3D "s25hs01gt", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s25hx_t_fixups }, { .id =3D SNOR_ID(0x34, 0x2b, 0x1c, 0x0f, 0x00, 0x90), .name =3D "s25hs02gt", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s25hx_t_fixups }, { /* S28HL256T */ .id =3D SNOR_ID(0x34, 0x5a, 0x19), .mfr_flags =3D USE_CLPEF, - .fixups =3D &s28hx_t_fixups, }, { .id =3D SNOR_ID(0x34, 0x5a, 0x1a), .name =3D "s28hl512t", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s28hx_t_fixups, }, { .id =3D SNOR_ID(0x34, 0x5a, 0x1b), .name =3D "s28hl01gt", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s28hx_t_fixups, }, { /* S28HL02GT */ .id =3D SNOR_ID(0x34, 0x5a, 0x1c), .mfr_flags =3D USE_CLPEF, - .fixups =3D &s28hx_t_fixups, }, { .id =3D SNOR_ID(0x34, 0x5b, 0x19), .mfr_flags =3D USE_CLPEF, - .fixups =3D &s28hx_t_fixups, }, { .id =3D SNOR_ID(0x34, 0x5b, 0x1a), .name =3D "s28hs512t", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s28hx_t_fixups, }, { .id =3D SNOR_ID(0x34, 0x5b, 0x1b), .name =3D "s28hs01gt", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s28hx_t_fixups, }, { .id =3D SNOR_ID(0x34, 0x5b, 0x1c), .name =3D "s28hs02gt", .mfr_flags =3D USE_CLPEF, - .fixups =3D &s28hx_t_fixups, }, { .id =3D SNOR_ID(0xef, 0x40, 0x13), .name =3D "s25fl004k", @@ -1170,9 +1153,31 @@ static const struct spi_nor_fixups spansion_nor_fixu= ps =3D { .late_init =3D spansion_nor_late_init, }; =20 +static const struct spi_nor_fixup spansion_fixups[] =3D { + { .fixups =3D &spansion_nor_fixups }, + { .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x81), .fixups =3D &s25fs= _s_nor_fixups }, + { .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81), .fixups =3D &s25fs= _s_nor_fixups }, + { .id =3D SNOR_ID(0x34, 0x2a, 0x1a, 0x0f, 0x03, 0x90), .fixups =3D &s25hx= _t_fixups }, + { .id =3D SNOR_ID(0x34, 0x2a, 0x1b, 0x0f, 0x03, 0x90), .fixups =3D &s25hx= _t_fixups }, + { .id =3D SNOR_ID(0x34, 0x2a, 0x1c, 0x0f, 0x00, 0x90), .fixups =3D &s25hx= _t_fixups }, + { .id =3D SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90), .fixups =3D &s25fs= 256t_fixups }, + { .id =3D SNOR_ID(0x34, 0x2b, 0x1a, 0x0f, 0x03, 0x90), .fixups =3D &s25hx= _t_fixups }, + { .id =3D SNOR_ID(0x34, 0x2b, 0x1b, 0x0f, 0x03, 0x90), .fixups =3D &s25hx= _t_fixups }, + { .id =3D SNOR_ID(0x34, 0x2b, 0x1c, 0x0f, 0x00, 0x90), .fixups =3D &s25hx= _t_fixups }, + { .id =3D SNOR_ID(0x34, 0x5a, 0x19), .fixups =3D &s28hx_t_fixups }, + { .id =3D SNOR_ID(0x34, 0x5a, 0x1a), .fixups =3D &s28hx_t_fixups }, + { .id =3D SNOR_ID(0x34, 0x5a, 0x1b), .fixups =3D &s28hx_t_fixups }, + { .id =3D SNOR_ID(0x34, 0x5a, 0x1c), .fixups =3D &s28hx_t_fixups }, + { .id =3D SNOR_ID(0x34, 0x5b, 0x19), .fixups =3D &s28hx_t_fixups }, + { .id =3D SNOR_ID(0x34, 0x5b, 0x1a), .fixups =3D &s28hx_t_fixups }, + { .id =3D SNOR_ID(0x34, 0x5b, 0x1b), .fixups =3D &s28hx_t_fixups }, + { .id =3D SNOR_ID(0x34, 0x5b, 0x1c), .fixups =3D &s28hx_t_fixups }, +}; + const struct spi_nor_manufacturer spi_nor_spansion =3D { .name =3D "spansion", .parts =3D spansion_nor_parts, .nparts =3D ARRAY_SIZE(spansion_nor_parts), - .fixups =3D &spansion_nor_fixups, + .fixups =3D spansion_fixups, + .nfixups =3D ARRAY_SIZE(spansion_fixups), }; diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 77a0bc41d4e5..c460803b278b 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -152,14 +152,12 @@ static const struct flash_info sst_nor_parts[] =3D { .id =3D SNOR_ID(0xbf, 0x26, 0x42), .name =3D "sst26vf032b", .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .fixups =3D &sst26vf_nor_fixups, }, { .id =3D SNOR_ID(0xbf, 0x26, 0x43), .name =3D "sst26vf064b", .size =3D SZ_8M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixups =3D &sst26vf_nor_fixups, }, { .id =3D SNOR_ID(0xbf, 0x26, 0x51), .name =3D "sst26wf016b", @@ -278,9 +276,16 @@ static const struct spi_nor_fixups sst_nor_fixups =3D { .late_init =3D sst_nor_late_init, }; =20 +static const struct spi_nor_fixup sst_fixups[] =3D { + { .fixups =3D &sst_nor_fixups }, + { .id =3D SNOR_ID(0xbf, 0x26, 0x42), .fixups =3D &sst26vf_nor_fixups }, + { .id =3D SNOR_ID(0xbf, 0x26, 0x43), .fixups =3D &sst26vf_nor_fixups }, +}; + const struct spi_nor_manufacturer spi_nor_sst =3D { .name =3D "sst", .parts =3D sst_nor_parts, .nparts =3D ARRAY_SIZE(sst_nor_parts), - .fixups =3D &sst_nor_fixups, + .fixups =3D sst_fixups, + .nfixups =3D ARRAY_SIZE(sst_fixups), }; diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 01a693033448..583b1669270f 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -219,7 +219,6 @@ static const struct flash_info winbond_nor_parts[] =3D { .size =3D SZ_16M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, - .fixups =3D &w25q128_fixups, }, { /* W25Q256JV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x19), @@ -228,7 +227,6 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, - .fixups =3D &w25q256_fixups, }, { /* W25Q512JV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x20), @@ -242,7 +240,6 @@ static const struct flash_info winbond_nor_parts[] =3D { .id =3D SNOR_ID(0xef, 0x40, 0x21), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, - .fixups =3D &winbond_nor_multi_die_fixups, }, { .id =3D SNOR_ID(0xef, 0x50, 0x12), .name =3D "w25q20bw", @@ -345,13 +342,11 @@ static const struct flash_info winbond_nor_parts[] = =3D { .id =3D SNOR_ID(0xef, 0x70, 0x21), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, - .fixups =3D &winbond_nor_multi_die_fixups, }, { /* W25Q02JV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x22), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, - .fixups =3D &winbond_nor_multi_die_fixups, }, { .id =3D SNOR_ID(0xef, 0x71, 0x19), .name =3D "w25m512jv", @@ -553,9 +548,19 @@ static const struct spi_nor_fixups winbond_nor_fixups = =3D { .late_init =3D winbond_nor_late_init, }; =20 +static const struct spi_nor_fixup winbond_fixups[] =3D { + { .fixups =3D &winbond_nor_fixups }, + { .id =3D SNOR_ID(0xef, 0x40, 0x18), .fixups =3D &w25q128_fixups }, + { .id =3D SNOR_ID(0xef, 0x40, 0x19), .fixups =3D &w25q256_fixups }, + { .id =3D SNOR_ID(0xef, 0x40, 0x21), .fixups =3D &winbond_nor_multi_die_f= ixups }, + { .id =3D SNOR_ID(0xef, 0x70, 0x21), .fixups =3D &winbond_nor_multi_die_f= ixups }, + { .id =3D SNOR_ID(0xef, 0x70, 0x22), .fixups =3D &winbond_nor_multi_die_f= ixups }, +}; + const struct spi_nor_manufacturer spi_nor_winbond =3D { .name =3D "winbond", .parts =3D winbond_nor_parts, .nparts =3D ARRAY_SIZE(winbond_nor_parts), - .fixups =3D &winbond_nor_fixups, + .fixups =3D winbond_fixups, + .nfixups =3D ARRAY_SIZE(winbond_fixups), }; --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E07C94AE8A8 for ; Wed, 2 Sep 2026 17:00:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368410; cv=none; b=JiNJzLN48y0Sva1cLLfHeNyVX6PFlaQcW+Vgf/su1V2a1Wpm8Shq0U0A0d0dNjvr6uFrbODVxRLDG7ywsdC2TcZBwZyrBYgauU4qrWSf/2HFjpza429n/ZNs0n/JwmmWIvDHKItq3cBNouKw5/uLbHwSUQ4PzH72DryJ6G+I9EM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368410; c=relaxed/simple; bh=LHhQoojavmoqBBfAc4zRKl/665I7Yt/jyIHHSKZUAvA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Unpx/U2uRdjGTViv5T52a/9yTVMvhJUqXCIsaJbClTKq4o3dVRve54KkKMTLIievQXjv2+xxUlZlW6coOAtK2gUL1NcEC479vwT9q373dsmvVm8vVWA8NRZcYNP9qslUq9qz7amgsfsUq8aPP1kgHr4g/YTNhqL0j3F+XzQuCEw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=zoXiIQQZ; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="zoXiIQQZ" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 75A094E414EA; Wed, 2 Sep 2026 17:00:06 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 43A016053C; Wed, 2 Sep 2026 17:00:06 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 3C97211C798E5; Wed, 2 Sep 2026 18:59:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368401; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=9Tecc3lQIKN0K3LRzH2AlzBhyqwFHt3ICutJHGbXQZ0=; b=zoXiIQQZJfVaEmZz+d1TvymlW4piF4Vox1rtYWnBZ36d+jsyCUBc3J1Tl/J4/cMHHxaG6w eErXxyqh3X7ueCbqHnKFkF+xLi2jd5MNpCR3jrsG1ZWHI6sUsKw8tT1UEMxfnToKHp+54/ ZE7xIstnI5+0yRPXmVWyIsDHyyuKHDnDya53RTv7L1ZmdTHXm9aCnJQH+Pg4lE13MGp9zi fu+0X/IyQy1uuMKbK0+OBhqC4k8wFqYfxeYQKCiB2ekaKfdC9CH68cMCZBs91h/lt+xOj5 Lc9WKCFb8bVN+fOclRmnm4BBvzNNKAXyvaJ1qfM1X0qJP2UO+9PAWm8EOxym3w== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:20 +0200 Subject: [PATCH v4 06/25] mtd: spi-nor: Move the fixup flags into the fixup list Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-6-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The idea of the fixup flags is to enable fixups without having to repeat the same fixup function over and over again. It overall reduces the boilerplate with a similar intent: fixing our knowledge of the flash. Move the fixup_flags field as well as the associated flag definitions to the spi_nor_fixup structure and enable them based on the IDs. No functional change. Suggested-by: Michael Walle Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/core.c | 27 +++++++++++++++++++-------- drivers/mtd/spi-nor/core.h | 30 ++++++++++++++---------------- drivers/mtd/spi-nor/gigadevice.c | 4 ++-- drivers/mtd/spi-nor/issi.c | 8 ++++---- drivers/mtd/spi-nor/macronix.c | 4 ++-- drivers/mtd/spi-nor/micron-st.c | 21 ++++++++++++--------- drivers/mtd/spi-nor/sfdp.c | 6 +++--- drivers/mtd/spi-nor/spansion.c | 6 +++--- 8 files changed, 59 insertions(+), 47 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index a9360998d34b..77d28c99c33b 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2367,7 +2367,7 @@ int spi_nor_post_bfpt_fixups(struct spi_nor *nor, fixups =3D nor->manufacturer->fixups; =20 for (i =3D 0; i < nor->manufacturer->nfixups; i++) { - if (fixups[i].fixups->post_bfpt && + if (fixups[i].fixups && fixups[i].fixups->post_bfpt && spi_nor_fixup_match(nor, &fixups[i])) { ret =3D fixups[i].fixups->post_bfpt(nor, bfpt_header, bfpt); if (ret) @@ -2667,7 +2667,7 @@ static void spi_nor_manufacturer_init_params(struct s= pi_nor *nor) fixups =3D nor->manufacturer->fixups; =20 for (i =3D 0; i < nor->manufacturer->nfixups; i++) { - if (fixups[i].fixups->default_init && + if (fixups[i].fixups && fixups[i].fixups->default_init && spi_nor_fixup_match(nor, &fixups[i])) fixups[i].fixups->default_init(nor); } @@ -2799,13 +2799,24 @@ static void spi_nor_init_flags(struct spi_nor *nor) */ static void spi_nor_init_fixup_flags(struct spi_nor *nor) { - const u8 fixup_flags =3D nor->info->fixup_flags; + const struct spi_nor_fixup *fixups; + unsigned int i; =20 - if (fixup_flags & SPI_NOR_4B_OPCODES) - nor->flags |=3D SNOR_F_4B_OPCODES; + if (!nor->manufacturer || !nor->manufacturer->fixups) + return; =20 - if (fixup_flags & SPI_NOR_IO_MODE_EN_VOLATILE) - nor->flags |=3D SNOR_F_IO_MODE_EN_VOLATILE; + fixups =3D nor->manufacturer->fixups; + + for (i =3D 0; i < nor->manufacturer->nfixups; i++) { + if (!fixups[i].fixup_flags || + !spi_nor_fixup_match(nor, &fixups[i])) + continue; + + if (fixups[i].fixup_flags & SPI_NOR_4B_OPCODES) + nor->flags |=3D SNOR_F_4B_OPCODES; + if (fixups[i].fixup_flags & SPI_NOR_IO_MODE_EN_VOLATILE) + nor->flags |=3D SNOR_F_IO_MODE_EN_VOLATILE; + } } =20 /** @@ -2830,7 +2841,7 @@ static int spi_nor_late_init_params(struct spi_nor *n= or) fixups =3D nor->manufacturer->fixups; =20 for (i =3D 0; i < nor->manufacturer->nfixups; i++) { - if (fixups[i].fixups->late_init && + if (fixups[i].fixups && fixups[i].fixups->late_init && spi_nor_fixup_match(nor, &fixups[i])) { ret =3D fixups[i].fixups->late_init(nor); if (ret) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 32a2d485d31d..1533f79b9039 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -450,11 +450,25 @@ struct spi_nor_fixups { * @id: (optional) flash ID this fixup applies to, may only match the * ID prefix, eg. just the first few bytes to match a whole family * @match: (optional) custom match function (can be used together with @id) + * @fixup_flags: flags that indicate support that can be discovered via SF= DP + * ideally, but can not be discovered for this particular flash + * because the SFDP table that indicates this support is not + * defined by the flash. In case the table for this support is + * defined but has wrong values, one should instead use a + * post_sfdp() hook to set the SNOR_F equivalent flag. + * + * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support + * memory size above 128Mib. + * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode + * via a volatile bit. * @fixups: the fixup hooks to apply when this entry matches */ struct spi_nor_fixup { const struct spi_nor_id *id; bool (*match)(const struct spi_nor *nor); + u8 fixup_flags; +#define SPI_NOR_4B_OPCODES BIT(0) +#define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1) const struct spi_nor_fixups *fixups; }; =20 @@ -519,22 +533,10 @@ struct spi_nor_id { * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read. * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program. * - * @fixup_flags: flags that indicate support that can be discovered via= SFDP - * ideally, but can not be discovered for this particular= flash - * because the SFDP table that indicates this support is = not - * defined by the flash. In case the table for this suppo= rt is - * defined but has wrong values, one should instead use a - * post_sfdp() hook to set the SNOR_F equivalent flag. - * - * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to supp= ort - * memory size above 128Mib. - * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode - * via a volatile bit. * @mfr_flags: manufacturer private flags. Used in the manufacturer f= ixup * hooks to differentiate support between flashes of the = same * manufacturer. * @otp_org: flash's OTP organization. - * @fixups: part specific fixup hooks. */ struct flash_info { char *name; @@ -566,10 +568,6 @@ struct flash_info { #define SPI_NOR_OCTAL_DTR_READ BIT(6) #define SPI_NOR_OCTAL_DTR_PP BIT(7) =20 - u8 fixup_flags; -#define SPI_NOR_4B_OPCODES BIT(0) -#define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1) - u8 mfr_flags; =20 const struct spi_nor_otp_organization *otp; diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index f76fd0dedd0a..6a2e6ebda148 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -64,7 +64,6 @@ static const struct flash_info gigadevice_nor_parts[] =3D= { .id =3D SNOR_ID(0xc8, 0x40, 0x19), .name =3D "gd25q256", .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6, - .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0xc8, 0x60, 0x16), .name =3D "gd25lq32", @@ -87,7 +86,8 @@ static const struct flash_info gigadevice_nor_parts[] =3D= { }; =20 static const struct spi_nor_fixup gigadevice_fixups[] =3D { - { .id =3D SNOR_ID(0xc8, 0x40, 0x19), .fixups =3D &gd25q256_fixups }, + { .id =3D SNOR_ID(0xc8, 0x40, 0x19), .fixups =3D &gd25q256_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES }, }; =20 const struct spi_nor_manufacturer spi_nor_gigadevice =3D { diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 7af850eea9ff..2f057d731df2 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -101,7 +101,6 @@ static const struct flash_info issi_nor_parts[] =3D { }, { .id =3D SNOR_ID(0x9d, 0x60, 0x19), .name =3D "is25lp256", - .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0x9d, 0x70, 0x16), .name =3D "is25wp032", @@ -121,7 +120,6 @@ static const struct flash_info issi_nor_parts[] =3D { .id =3D SNOR_ID(0x9d, 0x70, 0x19), .name =3D "is25wp256", .flags =3D SPI_NOR_QUAD_PP, - .fixup_flags =3D SPI_NOR_4B_OPCODES, } }; =20 @@ -146,8 +144,10 @@ static bool issi_pm25lv_match(const struct spi_nor *no= r) static const struct spi_nor_fixup issi_fixup_list[] =3D { { .fixups =3D &issi_fixups }, { .match =3D issi_pm25lv_match, .fixups =3D &pm25lv_nor_fixups }, - { .id =3D SNOR_ID(0x9d, 0x60, 0x19), .fixups =3D &is25lp256_fixups }, - { .id =3D SNOR_ID(0x9d, 0x70, 0x19), .fixups =3D &is25lp256_fixups }, + { .id =3D SNOR_ID(0x9d, 0x60, 0x19), .fixups =3D &is25lp256_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES }, + { .id =3D SNOR_ID(0x9d, 0x70, 0x19), .fixups =3D &is25lp256_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES }, }; =20 const struct spi_nor_manufacturer spi_nor_issi =3D { diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 04b431bf5f13..94e553724fc9 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -140,7 +140,6 @@ static const struct flash_info macronix_nor_parts[] =3D= { }, { /* MX66L51235F */ .id =3D SNOR_ID(0xc2, 0x20, 0x1a), - .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { /* MX66L1G45G */ .id =3D SNOR_ID(0xc2, 0x20, 0x1b), @@ -328,7 +327,8 @@ static const struct spi_nor_fixups macronix_nor_fixups = =3D { static const struct spi_nor_fixup macronix_fixups[] =3D { { .fixups =3D ¯onix_nor_fixups }, { .id =3D SNOR_ID(0xc2, 0x20, 0x19), .fixups =3D &mx25l25635_fixups }, - { .id =3D SNOR_ID(0xc2, 0x20, 0x1a), .fixups =3D ¯onix_qpp4b_fixups }, + { .id =3D SNOR_ID(0xc2, 0x20, 0x1a), .fixups =3D ¯onix_qpp4b_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES }, { .id =3D SNOR_ID(0xc2, 0x20, 0x1b), .fixups =3D ¯onix_qpp4b_fixups }, { .id =3D SNOR_ID(0xc2, 0x20, 0x1c), .fixups =3D ¯onix_qpp4b_fixups }, { .id =3D SNOR_ID(0xc2, 0x25, 0x3a), .fixups =3D ¯onix_qpp4b_fixups }, diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 2aabd6d487ba..53ae9533f50f 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -205,12 +205,10 @@ static const struct flash_info micron_nor_parts[] =3D= { /* MT35XU512ABA */ .id =3D SNOR_ID(0x2c, 0x5b, 0x1a), .mfr_flags =3D USE_FSR, - .fixup_flags =3D SPI_NOR_IO_MODE_EN_VOLATILE, }, { /* MT35XU01GBBA */ .id =3D SNOR_ID(0x2c, 0x5b, 0x1b), .mfr_flags =3D USE_FSR, - .fixup_flags =3D SPI_NOR_IO_MODE_EN_VOLATILE, }, { .id =3D SNOR_ID(0x2c, 0x5b, 0x1c), .name =3D "mt35xu02g", @@ -218,7 +216,6 @@ static const struct flash_info micron_nor_parts[] =3D { .size =3D SZ_256M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_OCTAL_READ, .mfr_flags =3D USE_FSR, - .fixup_flags =3D SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE, }, }; =20 @@ -403,7 +400,6 @@ static const struct flash_info st_nor_parts[] =3D { .name =3D "mt25ql256a", .size =3D SZ_32M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, .mfr_flags =3D USE_FSR, }, { .id =3D SNOR_ID(0x20, 0xba, 0x19), @@ -416,7 +412,6 @@ static const struct flash_info st_nor_parts[] =3D { .name =3D "mt25ql512a", .size =3D SZ_64M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, .mfr_flags =3D USE_FSR, }, { .id =3D SNOR_ID(0x20, 0xba, 0x20), @@ -472,7 +467,6 @@ static const struct flash_info st_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, .mfr_flags =3D USE_FSR, }, { .id =3D SNOR_ID(0x20, 0xbb, 0x19), @@ -661,13 +655,22 @@ static const struct spi_nor_fixups micron_st_nor_fixu= ps =3D { =20 static const struct spi_nor_fixup micron_fixups[] =3D { { .fixups =3D µn_st_nor_fixups }, - { .id =3D SNOR_ID(0x2c, 0x5b, 0x1a), .fixups =3D &mt35xu512aba_fixups }, - { .id =3D SNOR_ID(0x2c, 0x5b, 0x1b), .fixups =3D &mt35_two_die_fixups }, - { .id =3D SNOR_ID(0x2c, 0x5b, 0x1c), .fixups =3D &mt35_two_die_fixups }, + { .id =3D SNOR_ID(0x2c, 0x5b, 0x1a), .fixups =3D &mt35xu512aba_fixups, + .fixup_flags =3D SPI_NOR_IO_MODE_EN_VOLATILE }, + { .id =3D SNOR_ID(0x2c, 0x5b, 0x1b), .fixups =3D &mt35_two_die_fixups, + .fixup_flags =3D SPI_NOR_IO_MODE_EN_VOLATILE }, + { .id =3D SNOR_ID(0x2c, 0x5b, 0x1c), .fixups =3D &mt35_two_die_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE }, }; =20 static const struct spi_nor_fixup st_fixups[] =3D { { .fixups =3D µn_st_nor_fixups }, + { .id =3D SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00), + .fixup_flags =3D SPI_NOR_4B_OPCODES }, + { .id =3D SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00), + .fixup_flags =3D SPI_NOR_4B_OPCODES }, + { .id =3D SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00), + .fixup_flags =3D SPI_NOR_4B_OPCODES }, { .id =3D SNOR_ID(0x20, 0xba, 0x21), .fixups =3D &n25q00_fixups }, { .id =3D SNOR_ID(0x20, 0xba, 0x22), .fixups =3D &mt25q02_fixups }, { .id =3D SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00), .fixups =3D &mt25q= u512a_fixups }, diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 39cb8ac3a037..87b2d0a0e9f4 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -736,7 +736,7 @@ static void spi_nor_smpt_read_dummy_fixups(const struct= spi_nor *nor, fixups =3D nor->manufacturer->fixups; =20 for (i =3D 0; i < nor->manufacturer->nfixups; i++) { - if (fixups[i].fixups->smpt_read_dummy && + if (fixups[i].fixups && fixups[i].fixups->smpt_read_dummy && spi_nor_fixup_match(nor, &fixups[i])) fixups[i].fixups->smpt_read_dummy(nor, read_dummy); } @@ -773,7 +773,7 @@ static void spi_nor_smpt_map_id_fixups(const struct spi= _nor *nor, u8 *map_id) fixups =3D nor->manufacturer->fixups; =20 for (i =3D 0; i < nor->manufacturer->nfixups; i++) { - if (fixups[i].fixups->smpt_map_id && + if (fixups[i].fixups && fixups[i].fixups->smpt_map_id && spi_nor_fixup_match(nor, &fixups[i])) fixups[i].fixups->smpt_map_id(nor, map_id); } @@ -1430,7 +1430,7 @@ static int spi_nor_post_sfdp_fixups(struct spi_nor *n= or) fixups =3D nor->manufacturer->fixups; =20 for (i =3D 0; i < nor->manufacturer->nfixups; i++) { - if (fixups[i].fixups->post_sfdp && + if (fixups[i].fixups && fixups[i].fixups->post_sfdp && spi_nor_fixup_match(nor, &fixups[i])) { ret =3D fixups[i].fixups->post_sfdp(nor); if (ret) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index f3862eb1a23a..5f4ce042ef2c 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -976,19 +976,16 @@ static const struct flash_info spansion_nor_parts[] = =3D { .name =3D "s25fl064l", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0x01, 0x60, 0x18), .name =3D "s25fl128l", .size =3D SZ_16M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0x01, 0x60, 0x19), .name =3D "s25fl256l", .size =3D SZ_32M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f), .name =3D "cy15x104q", @@ -1157,6 +1154,9 @@ static const struct spi_nor_fixup spansion_fixups[] = =3D { { .fixups =3D &spansion_nor_fixups }, { .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x81), .fixups =3D &s25fs= _s_nor_fixups }, { .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81), .fixups =3D &s25fs= _s_nor_fixups }, + { .id =3D SNOR_ID(0x01, 0x60, 0x17), .fixup_flags =3D SPI_NOR_4B_OPCODES = }, + { .id =3D SNOR_ID(0x01, 0x60, 0x18), .fixup_flags =3D SPI_NOR_4B_OPCODES = }, + { .id =3D SNOR_ID(0x01, 0x60, 0x19), .fixup_flags =3D SPI_NOR_4B_OPCODES = }, { .id =3D SNOR_ID(0x34, 0x2a, 0x1a, 0x0f, 0x03, 0x90), .fixups =3D &s25hx= _t_fixups }, { .id =3D SNOR_ID(0x34, 0x2a, 0x1b, 0x0f, 0x03, 0x90), .fixups =3D &s25hx= _t_fixups }, { .id =3D SNOR_ID(0x34, 0x2a, 0x1c, 0x0f, 0x00, 0x90), .fixups =3D &s25hx= _t_fixups }, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC4794AE8A5; Wed, 2 Sep 2026 17:00:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368412; cv=none; b=NsyhYdYqMm58hfrcKq+4p+4d+yh7QAmmUptIO2MALwiL1uJ1JbpoWt6OkaYQXJ5Xtknv/r/iAdi6yPQCQNAztdA7+ObWXQQT+Rx+jNCvkeRd2EiVQgbqZeoY24YcZ1rTTzqHb9d+/aVQ7Je5W4tLa3vs/XU1gsfu8Z0bDbEbkGQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368412; c=relaxed/simple; bh=ECrmUygfYfLZncVnyBNsfKyJO2oKaSDvUiiPYEKr6cY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WVUmE7lFdaq2PaMEPSp03HOA/5Od2w9UgLKIXLeDu+NzxeKhl3j5p676yGFFOZHwgw42NkxsXvgKFYOoCbINdhvqCeJ8dBUy/u6kqM9vvCl+KIi+iU1I5tWG59Eb0tsXvaAreFY/oFUdN2AqJlkXzwjBjzHp71A4odyZreo1aSk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=JwDbN15j; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="JwDbN15j" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 730984E414EB; Wed, 2 Sep 2026 17:00:08 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 47B4C6053C; Wed, 2 Sep 2026 17:00:08 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 552B511C79D62; Wed, 2 Sep 2026 19:00:05 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368407; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=LGZwYBojvf6z6A3kSsqqOxznQcvg2kta/W2R0+OqU+I=; b=JwDbN15jc6X++alUeVNGWxECEV7xs0qC3M1t+K0CP0N7sLzhJHcDjQsJH97WPOMhqnbme2 riiDEidWszJ7WfaQLHb0qkmEHOCujv9Uhz6qyAuYqZSdiUHYoRPF78tEnMSBS5BTZWN6tG IW2KL7NuwCPgGieLTUcaEq+UdK7ngBHWSK+2moD+dGg5u9V8Ew0xnZdxjcTvsJSCOIKlhG 4KgRY1pfnxt8PuaSqcAIYE0DqqcrK3k68i3ctWhbdPlDuPiIcosn5nftYKgL/1/psWhVaj SsCIHWblxytCh01m9ZRAAiWRF3WEDRtHsYVjgzPcdQB8TG4OgImjdPNqLoWDGg== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:21 +0200 Subject: [PATCH v4 07/25] mtd: spi-nor: Create an indirection on the part name Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-7-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 We currently print through sysfs and debugfs the name of the part if the .name field, which is legacy, has been filled in the ID table (otherwise "(null)" is printed). These IDs had an interest until manufacturers started re-using more and more extensively the so called unique JEDEC IDs. At this stage, a name that was tailored for a chip sold in 2016 may no longer be relevant for a chip sold in 2026. Still showing this name through the various filesystems may confuse people, removing these names cannot be done since they are now part of the user ABI (because of sysfs). In order to allow overwriting the .name field (which is part of a read-only structure), let's create a spi-nor pointer which will by default point to that .name, but which can be cleared in fixup hooks to make sure the name is hidden on newer parts. Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/core.c | 1 + drivers/mtd/spi-nor/debugfs.c | 3 +-- drivers/mtd/spi-nor/sysfs.c | 4 ++-- include/linux/mtd/spi-nor.h | 1 + 4 files changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 77d28c99c33b..1e8628da675b 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -3493,6 +3493,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *nam= e, return PTR_ERR(info); =20 nor->info =3D info; + nor->partname =3D info->name; =20 mutex_init(&nor->lock); =20 diff --git a/drivers/mtd/spi-nor/debugfs.c b/drivers/mtd/spi-nor/debugfs.c index 512825c3fc85..275671222588 100644 --- a/drivers/mtd/spi-nor/debugfs.c +++ b/drivers/mtd/spi-nor/debugfs.c @@ -82,13 +82,12 @@ static int spi_nor_params_show(struct seq_file *s, void= *data) struct spi_nor_flash_parameter *params =3D nor->params; struct spi_nor_erase_map *erase_map =3D ¶ms->erase_map; struct spi_nor_erase_region *region =3D erase_map->regions; - const struct flash_info *info =3D nor->info; char buf[16], *str; loff_t lock_start; u64 lock_length; unsigned int i; =20 - seq_printf(s, "name\t\t%s\n", info->name); + seq_printf(s, "name\t\t%s\n", nor->partname); seq_printf(s, "id\t\t%*ph\n", SPI_NOR_MAX_ID_LEN, nor->id); string_get_size(params->size, 1, STRING_UNITS_2, buf, sizeof(buf)); seq_printf(s, "size\t\t%s\n", buf); diff --git a/drivers/mtd/spi-nor/sysfs.c b/drivers/mtd/spi-nor/sysfs.c index 643513ee891b..a2dabe4c6422 100644 --- a/drivers/mtd/spi-nor/sysfs.c +++ b/drivers/mtd/spi-nor/sysfs.c @@ -25,7 +25,7 @@ static ssize_t partname_show(struct device *dev, struct spi_mem *spimem =3D spi_get_drvdata(spi); struct spi_nor *nor =3D spi_mem_get_drvdata(spimem); =20 - return sysfs_emit(buf, "%s\n", nor->info->name); + return sysfs_emit(buf, "%s\n", nor->partname); } static DEVICE_ATTR_RO(partname); =20 @@ -78,7 +78,7 @@ static umode_t spi_nor_sysfs_is_visible(struct kobject *k= obj, =20 if (attr =3D=3D &dev_attr_manufacturer.attr && !nor->manufacturer) return 0; - if (attr =3D=3D &dev_attr_partname.attr && !nor->info->name) + if (attr =3D=3D &dev_attr_partname.attr && !nor->partname) return 0; if (attr =3D=3D &dev_attr_jedec_id.attr && !nor->info->id && !nor->id) return 0; diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 3a55d76ea77d..b1e573367604 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -395,6 +395,7 @@ struct spi_nor { u8 *id; const struct flash_info *info; const struct spi_nor_manufacturer *manufacturer; + const char *partname; u8 addr_nbytes; u8 erase_opcode; u8 read_opcode; --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0150D4AE8BB; Wed, 2 Sep 2026 17:00:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368413; cv=none; b=Hb5wkJp2sTNYD2M+W8nyv5LTu3gN1L3wxmOYDRgZZUiIIj9fGXRsPYJ0JNlJG+eL8f2RZhQyxifEt9WypElZgORPhw62pgkNiuOYu4UwSRvb2Fx7Ea7we6uB8Teu9kxyCwERUKcP13KXV0hhr8SWezMbFQguU9wDPHP9hciVH+M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368413; c=relaxed/simple; bh=pzdL3M2B+L9ON2O2MF+TetYK56h44dRGRpeFtW1pamE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LIBhl2T1yl1Dz1p3kF4M9rNSt2nKgZaB0B1/TjoSo5vOJapBuUJ0xDCSjqo7KwbQQUbkpPW/kA8Sadtcvh3LBgCaBJZd83gBp5MVAJAGsHnQqPCyazEwVnEgx76CuF2dUbc8y9fstZtzLl8IfeVPcxlmGzpwgfJ4gQJQjfLSw88= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=GCvglVqf; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="GCvglVqf" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 6BD891A1977; Wed, 2 Sep 2026 17:00:10 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 3FE826053C; Wed, 2 Sep 2026 17:00:10 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 98AD511C795A7; Wed, 2 Sep 2026 19:00:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368409; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=IWMiLXP2vfrqRyQznAWNKhIoOiuG2w/T2zoaxLRzsUw=; b=GCvglVqfIAwaR67asJsY+OmbUnBoAqpWJc81t/t4E/VrtNfCCsAV1TV+LUflrKZG5GWcWa 951tYos2WtXf79FVQxap7kD9M5PMSn0yV5zQ0MkT7RVLwiXoiGE6bWR4MxEZf1IyYof6he P8zJvV3n5vlewV9sfh9DQ+mhfAwVef4nldUJNYcOrNZcWJlNCin3tWrNFyyJn6dk19vury eJzf7ROmjd4MJQS9nH2ZcLXcoz8rjYK1hUeYeHu1n/kXlqJhYA6cVdPs+HG9urxQjEhmce 7GCk6snYu4up7o5iqJSvTqp5W/AqnYIaMkKrG26vy6vLeOYmbot7bUpMyGXz9Q== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:22 +0200 Subject: [PATCH v4 08/25] mtd: spi-nor: Move the SFDP header structure to a C header Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-8-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The sfdp_header structure is currently defined in sfdp.c, whereas the sfdp_parameter_header structure is defined in sfdp.h. In order to ease the reuse of this structure outside of the sfdp.c file, move this structure to the sfdp C header (.h). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/sfdp.c | 11 ----------- drivers/mtd/spi-nor/sfdp.h | 11 +++++++++++ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 87b2d0a0e9f4..c40099a27cb5 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -34,17 +34,6 @@ =20 #define SFDP_SIGNATURE 0x50444653U =20 -struct sfdp_header { - u32 signature; /* Ox50444653U <=3D> "SFDP" */ - u8 minor; - u8 major; - u8 nph; /* 0-base number of parameter headers */ - u8 unused; - - /* Basic Flash Parameter Table. */ - struct sfdp_parameter_header bfpt_header; -}; - /* Fast Read settings. */ struct sfdp_bfpt_read { /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */ diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h index e8ed814c6530..2cbe22246c5e 100644 --- a/drivers/mtd/spi-nor/sfdp.h +++ b/drivers/mtd/spi-nor/sfdp.h @@ -149,4 +149,15 @@ struct sfdp_parameter_header { u8 id_msb; }; =20 +struct sfdp_header { + u32 signature; /* Ox50444653U <=3D> "SFDP" */ + u8 minor; + u8 major; + u8 nph; /* 0-base number of parameter headers */ + u8 unused; + + /* Basic Flash Parameter Table. */ + struct sfdp_parameter_header bfpt_header; +}; + #endif /* __LINUX_MTD_SFDP_H */ --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 07B2B4AEBCB; Wed, 2 Sep 2026 17:00:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368415; cv=none; b=MAvgeJ6SMV85FYQCPnYW9jbz/LZQM2eVeHoMRp5Oct31ws47WvfX/FxQVS4RhWdxCbd3zAL7L5nR4+li8bweoaMt7Gc+EzueknKbVfocNTHjrH/vOI1q9wQzA7IJlRwqYBKFs37Dfc60taas3ZiuO51MG+exxv1/nsbC0FPr28Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368415; c=relaxed/simple; bh=UUqbzV0pXGPohgUyiMXNQBD6pM/GmemE64GwWtedr58=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SofaAluTYigCiv85WbOEZa391q6ZYENMhn0yIEWHZONeqVgXAEHAcP1huynOuci93SJVMDSYB1ABaBYibbBr0ecJMjlgEkHs9KdIhFrTNHkfsbmVND0crsXJyuXlnK/oagKcjexiLV9/fZwBc23D9C+iT30Bqil6CK+v7MBYdOI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=uOBJZuTf; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="uOBJZuTf" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 6E1C84E414ED; Wed, 2 Sep 2026 17:00:12 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 43A716053C; Wed, 2 Sep 2026 17:00:12 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 9586711C79A58; Wed, 2 Sep 2026 19:00:09 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368411; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=IbRYJ7OoUJMltvU8SHPLG3Gg59aVr3C3z+OFF9sIH9A=; b=uOBJZuTfiG8w2V12NBEikft0pi5MjvwR7tiqHMXaKf32podCN2TNoFSrKKG0zFANJ9EFYo 4m9o+3DI5uaDm/pWPaypioZXu4Ga1jYYpli9sZmRhcwjrMJAxAwC99+m45TxkyUe2A7NuN YmFpbi/FLkTdLH381g6fV8gZ+nXTTn86qDX+EzFhj/pqxEsFqL5dUTEwhta1+UOCnbHnK0 UYPj1SE0js6cM+x0HzCGpdFANKPSSHJM4x/mERwNUvA4FxqG0Ab4cHL8ZwlcxCsSmBCtjJ cM1tv4UpsUOjxzc4SBKVSPVLA4oZzK6h7u4ih6KcXtRCgzzRUZ4eJDAMXBpKJg== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:23 +0200 Subject: [PATCH v4 09/25] mtd: spi-nor: winbond: Prepare introduction of W25QxxRV-Q/N parts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-9-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision between the JV and RV families. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). They also do not require the multi-die fixups which must remain assigned to the JV chips. Finally, since they share the IDs but not the names, we must hide the names using a fixup. Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/sfdp.c | 11 ++++++++ drivers/mtd/spi-nor/sfdp.h | 2 ++ drivers/mtd/spi-nor/winbond.c | 60 +++++++++++++++++++++++++++++++++++++++= +--- 3 files changed, 70 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index c40099a27cb5..e35b19b6a5fa 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -1656,3 +1656,14 @@ int spi_nor_parse_sfdp(struct spi_nor *nor) kfree(param_headers); return err; } + +/** + * spi_nor_sfdp_get_header() - retrieves the SFDP header + * @nor: pointer to a 'struct spi_nor' with a valid SFDP field + * + * Return: the cached SFDP header. + */ +struct sfdp_header *spi_nor_sfdp_get_header(const struct spi_nor *nor) +{ + return (struct sfdp_header *)nor->sfdp->dwords; +} diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h index 2cbe22246c5e..1e49ed548a7e 100644 --- a/drivers/mtd/spi-nor/sfdp.h +++ b/drivers/mtd/spi-nor/sfdp.h @@ -160,4 +160,6 @@ struct sfdp_header { struct sfdp_parameter_header bfpt_header; }; =20 +struct sfdp_header *spi_nor_sfdp_get_header(const struct spi_nor *nor); + #endif /* __LINUX_MTD_SFDP_H */ diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 583b1669270f..9f164c5a1de5 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -24,6 +24,39 @@ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_OUT(1, buf, 0)) =20 +static bool is_w25qxxrv(const struct spi_nor *nor) +{ + struct sfdp_header *sfdp_h =3D spi_nor_sfdp_get_header(nor); + + /* + * W25QxxRV chips re-use the same ID as the W25QxxJV family. + * + * Chips are very similar, W25QxxRV brings mostly performance and power + * consumption improvements. The RV family does not require the multi + * die fixup. + * + * They can be distinguished based on their SFDP minor revision: + * W25QxxJV: JESD216A, minor revision =3D=3D 05h + * W25Q512/01/02JV: JESD216B, minor revision =3D=3D 06h + * W25QxxRV: JESD216F, minor revision >=3D 0Ah + */ + return sfdp_h->minor >=3D SFDP_JESD216F_MINOR; +} + +/* + * Since SFDP is populated after ->default_init(), the match functions usi= ng + * nor->sfdp as discriminant cannot be used for this specific early fixup. + */ +static bool winbond_jv_match(const struct spi_nor *nor) +{ + return !nor->sfdp || !is_w25qxxrv(nor); +} + +static bool winbond_rv_match(const struct spi_nor *nor) +{ + return nor->sfdp && is_w25qxxrv(nor); +} + static int w25q128_post_bfpt_fixups(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, @@ -146,6 +179,22 @@ static const struct spi_nor_fixups winbond_nor_multi_d= ie_fixups =3D { .post_sfdp =3D winbond_nor_multi_die_post_sfdp_fixups, }; =20 +static int winbond_nor_partname_post_sfdp_fixups(struct spi_nor *nor) +{ + /* + * W25QxxRV parts re-use the JEDEC IDs of the JV family. Their name + * being a legacy field, it is kept for the already established JV parts + * but must not be exposed by the newer RV ones. + */ + nor->partname =3D NULL; + + return 0; +} + +static const struct spi_nor_fixups winbond_nor_partname_fixups =3D { + .post_sfdp =3D winbond_nor_partname_post_sfdp_fixups, +}; + static const struct flash_info winbond_nor_parts[] =3D { { .id =3D SNOR_ID(0xef, 0x30, 0x10), @@ -552,9 +601,14 @@ static const struct spi_nor_fixup winbond_fixups[] =3D= { { .fixups =3D &winbond_nor_fixups }, { .id =3D SNOR_ID(0xef, 0x40, 0x18), .fixups =3D &w25q128_fixups }, { .id =3D SNOR_ID(0xef, 0x40, 0x19), .fixups =3D &w25q256_fixups }, - { .id =3D SNOR_ID(0xef, 0x40, 0x21), .fixups =3D &winbond_nor_multi_die_f= ixups }, - { .id =3D SNOR_ID(0xef, 0x70, 0x21), .fixups =3D &winbond_nor_multi_die_f= ixups }, - { .id =3D SNOR_ID(0xef, 0x70, 0x22), .fixups =3D &winbond_nor_multi_die_f= ixups }, + { .id =3D SNOR_ID(0xef, 0x40), .match =3D winbond_rv_match, + .fixups =3D &winbond_nor_partname_fixups }, + { .id =3D SNOR_ID(0xef, 0x40, 0x21), .match =3D winbond_jv_match, + .fixups =3D &winbond_nor_multi_die_fixups }, + { .id =3D SNOR_ID(0xef, 0x70, 0x21), .match =3D winbond_jv_match, + .fixups =3D &winbond_nor_multi_die_fixups }, + { .id =3D SNOR_ID(0xef, 0x70, 0x22), .match =3D winbond_jv_match, + .fixups =3D &winbond_nor_multi_die_fixups }, }; =20 const struct spi_nor_manufacturer spi_nor_winbond =3D { --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B05BE4AF151; Wed, 2 Sep 2026 17:00:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368422; cv=none; b=kDi3MTZ992hsKmR7cvKSISddxR7KZ+L1pW4y/qmSs5Lojgcud2aVzNpPKinuoRWf+P7gN59BCJkoxLDCFcrT2xQ/xHN1BwKSNbcXVtDRzS+D64FokgHHyrzq54nX2RVyylYq+VoT9zxmftaUK6atoJcNBdEKBwUjUzUd2YGUBI0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368422; c=relaxed/simple; bh=8/Nh7VK0nch+PgELixDm14anKvdcSlxo14wi7K4CSDY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KOvGIqUoZZNFKROO6WfshSkCcAMZaYVb5PQEfTKtfUQW6cUJkGhzUiXUUItxStgUAZsy2T0V1mHyegxJ3kYn7sOx5HTktrT3G/D82FnuPOEW8AqM0sD6A9t4FvxYmZhiki3gHXYnlEoDvXUOliH9L0QWNKH1BQzPjHnL8ns3zso= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=RdQXD0y3; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="RdQXD0y3" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 1B91E4E414EA; Wed, 2 Sep 2026 17:00:19 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id DD05B6053C; Wed, 2 Sep 2026 17:00:18 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id AD86C11C79B6F; Wed, 2 Sep 2026 19:00:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368413; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=f1TwlZZm0bg/r98GYSZeUDqynWGXWkIM82yW8yDu4rs=; b=RdQXD0y3prniLUr8hEUFA36U8FRXK8LcxKm2cZbBvuoKBteOjhO74vviwduywbUKOdQ6S6 BNJRwEhNFj+gYVYNoKGdW5itZk2qsQgDitA5bb7Jy18KQkyAPJ4G6AtiJLjC4CLvjiAjqZ AG14qfF0gEKGYtA8ae9rOjuY/+AgS3fWIlAomxrljjcvBTA80B198aaHsNp/eQ7oIVeJi9 H8D2PBVyv7D/Dfq6RD4sdgIqGFj5R4tMask7X2CsfKOM9KwfNjA9xWglTJFLZgGZ8bCYxY g2asYsGzfydUxwJmf29idgxUX2ZKDajIRhWYlA8e+QOrV3+kiUoW8Q0xfpJXZw== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:24 +0200 Subject: [PATCH v4 10/25] mtd: spi-nor: winbond: Add support for W25Q32RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-10-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4016 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0100ff00080117800000ffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f9ffffffff0144eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001432010183e314c2e96376337a757a75 f7a2d55c39f66dffe930f8800000000000002c0000000000f6f4ffff0f00 0000060d44bd27ed080d + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 2c0c54d6e360dae30b72615eac5f0faff59463aeb2237d46d08d6cfd77d6c9f6 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x02 1S-1S-4S opcode 0x32 + cat /sys/kernel/debug/spi-nor/spi0.0/p[ 84.112272] random: crng init do= ne arams name (null) id ef 40 16 00 00 00 size 4.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_SR_TB | HAS_LOCK | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xeb dummy cycles 6 erase 0xd8 program 0x32 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (4.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-003fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 4194304 (4M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x400000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x400000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read2 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test 831e9e5cc6efa7d3afe7b0584100549d93b9953d64ad237fd1df15f790f23ae6 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D4194304 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 4063232 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003dffff | unlocked | 62 003e0000-003fffff | locked | 2 + flash_lock -u /dev/mtd0 4063232 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003effff | unlocked | 63 003f0000-003fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-003fffff | unlocked | 62 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-003fffff | unlocked | 63 + all_but_one=3D63 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 63 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-003fffff | locked | 63 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-003fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 63 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003effff | locked | 63 003f0000-003fffff | unlocked | 1 + flash_lock -u /dev/mtd0 4063232 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003dffff | locked | 62 003e0000-003fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 9f164c5a1de5..14ab26abe0eb 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -247,7 +247,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K, }, { - /* W25Q32JV-Q/N */ + /* W25Q32JV-Q/N, W25Q32RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x16), .name =3D "w25q32", .size =3D SZ_4M, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF6FD4AF152; Wed, 2 Sep 2026 17:00:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368430; cv=none; b=N4hmnu27eJucW/e91jwLy4PBHncu8q3Bcp6afWfvLzeKfbL5NUSNtz4Dp/NHXGxFkeTLzPWj5iiGc1wOL2VqJv63LQM/Osd1DHGW3gJDVDQb+eSHn4mv8ZIcPvcF4T75ZDQQA1Og2nRiJkJ0/fSIQBijOGytRHsRoK04QFuKOsU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368430; c=relaxed/simple; bh=Kh7+m0GbVgGPhutRF+/A4CkpVIw8bnGvHttTLvrjSQE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Okc+7hWcgR6dQ62TntDkmFLRipLKES4Aop41kWI9DJYX7M50NEPIVjUHJzdpgP8ETMTfSuLrOwwf2NFiUVO39usdndBIQYxVI6KE7FhZj+sT05krsHBlp2hu46wofcQZNTikOaj4UxSioSQsWUvEsS1D09IO5mQIS214s9XoqGg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Kw54Csqa; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Kw54Csqa" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 3696A4E414EB; Wed, 2 Sep 2026 17:00:26 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 0342A6053C; Wed, 2 Sep 2026 17:00:26 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 24A4A11C79FCB; Wed, 2 Sep 2026 19:00:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368420; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=ME+JoqIPzpQnc5fuMzerFlTVEsF/6L8eeADCljTJz44=; b=Kw54CsqaXD4VRIP+574cVJ6MR0Mr30KQoC7Kbk8TM+iEmSDo/exICGliNrv2n0p0tF5D27 H2KBlWX3U524s0vu376iwlFoAU/D4wN735sXneBwc5qmP2O8TPRlxmCQgyGi1FGKae3qaF XX/VZw1YpWOVenYTzyE1/BpxD1E13JaBiWrqnDYoewv4dquWFn5JBzF//spU5yYpCRDLCv CUXVg3mjuRxMe99uWRB5vl9akCEMcVyuWeyRwk0ysx0DgK2uEcI9mpHOKFADWOZbRRQtFe UWyq7WPyn/GyjeyrgQZuPUge73oMKpgzutqwh1FvuVart39v20nqae7BbSIxDA== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:25 +0200 Subject: [PATCH v4 11/25] mtd: spi-nor: winbond: Add support for W25Q64RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-11-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4017 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f3ffffffff0344eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000d639a50081d614c3e96376337a757a75 f7a4d55c39de6dffe970f9a50000000000002c000000000066ffffff0000 00000000000000000000ffffffffff0a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp c7fa99bdcdef9a930e609215704dd349dbed161487dee0ece8ea1b25d2d4dd25 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 17 00 00 00 size 8.00 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | SOFT_RESET | NO_WP |= HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (8.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-007fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 7.803395] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 8388608 (8M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read2 eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test 64f4a5c5a05eae4a6dffb9e76171d97328257a96110214f52222870681b7b28c spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D8388608 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D131072 + bps=3D2 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 8126464 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | unlocked | 62 007c0000-007fffff | locked | 2 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | unlocked | 63 007e0000-007fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | locked | 2 00040000-007fffff | unlocked | 62 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 1 00020000-007fffff | unlocked | 63 + all_but_one=3D126 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 131072 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 1 00020000-007fffff | locked | 63 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | unlocked | 2 00040000-007fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | locked | 63 007e0000-007fffff | unlocked | 1 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | locked | 62 007c0000-007fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 14ab26abe0eb..1864ad27e5e3 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -254,7 +254,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q64JV-Q/N */ + /* W25Q64JV-Q/N, W25Q64RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x17), .name =3D "w25q64", .size =3D SZ_8M, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1552E4AFE26; Wed, 2 Sep 2026 17:00:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368433; cv=none; b=rHnJMr6olWyujCPsTwLXBWecBP4LIiKAkFP/NDHouRZkEU+YVHS2JdVoLKG0IdjZOgHn02NpVviHn3NvcUnFxqk1xwI4Dm3rRdOSxgd9pHLadC4ViMi9GAHUIUCeMqBC7Z9ExHSNE5WMU0q1lDzKoIv3Pdslc0HhM+v0hxRQDdU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368433; c=relaxed/simple; bh=S/0WSfkdcU6ezGk2/5S8ezXhq7SM4nfHbJvanxdVTxk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nb4yE742Ed5QU7jPG5J+SufXghwkYrdMG2rsBtZupTVwPQCqch5aguyGPd4NS+LmPZZI7cCwWOs6mc+FUtW/KVqWf+fIU4H3eGw/+eXpWozuQT3NQa7uePT5rDQGIog5wVe2S2X8+bqi55EcoVAIrcCJx9lfuvRMuzbzFZkHjvs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=TZ4zAU9x; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="TZ4zAU9x" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id A218E1A1976; Wed, 2 Sep 2026 17:00:29 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 6FB3F6053C; Wed, 2 Sep 2026 17:00:29 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 7F4D711C79FAF; Wed, 2 Sep 2026 19:00:25 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368427; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=pzX6nFA2wcrYKsG+4CqUFw+zxIGXPqyB6hIubZ3XSqA=; b=TZ4zAU9xK6fOjIAGPMYf6UQOgLA4Th/o0Qhr89khnKLmjvu6ayYV4wVKeNwpZ2tO76qwDx 7VF4DPAUWsWDOA8G9FvUbbRHzGI1/vcih46pLQp03g/4wDyy4b1l7Xg8PiND/ZHo4Lkvif xCONjSSl8EtAkzB97OEfkDufeidFgvEitc9pdJaFiRT6hnBfmiQ7ighfSyBwY2xjWUZpyv Ppia164IIcfahEIW/OrfqXyLB5p1OhGaHTccEvSoGHvQbTfy/8+QOO6au2Paw0KX6+Rpob ojGR7LmSSjxv9MOimu5n5dz57Yl2ftOASoL6PnBKVdUE33p8r2D6w9sZlsw/VQ== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:26 +0200 Subject: [PATCH v4 12/25] mtd: spi-nor: winbond: Add support for W25Q12RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-12-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). This density wronly advertizes its size and requires a fixup for that. Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4018 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0100ff00080117800000ffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f9ffffffff0344eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000142a010186e114c1e96376337a757a75 f7a2d55c39f66dffe930f880000000000000ac0000000000f7f5ffff0f00 0000060d44bd27ed080d + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 94b52d6e903a2046e144eab0760384b6932c6fdbfec17eb7336f1778c3898daf /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x02 1S-1S-4S opcode 0x32 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 18 00 00 00 size 16.0 MiB write size 1 page size 256 address nbytes 3 flags HAS_SR_TB | HAS_LOCK | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xeb dummy cycles 6 erase 0xd8 program 0x32 SR1 read 0x05 SR2 read 0x35 SR1 write 0x01 SR2 write 0x31 QE SR2 bit 1 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (16.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-007fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 15.791564] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 8388608 (8M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read2 b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test 884cedd0494868db17c609edc62e2471ef344025e30cd511fa28b41b9b50e50d spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D8388608 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D131072 + bps=3D2 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 8126464 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | unlocked | 62 007c0000-007fffff | locked | 2 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | unlocked | 63 007e0000-007fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | locked | 2 00040000-007fffff | unlocked | 62 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 1 00020000-007fffff | unlocked | 63 + all_but_one=3D126 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 131072 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 1 00020000-007fffff | locked | 63 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | unlocked | 2 00040000-007fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | locked | 63 007e0000-007fffff | unlocked | 1 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | locked | 62 007c0000-007fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 1864ad27e5e3..1ddc2ea1ad9c 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -43,6 +43,20 @@ static bool is_w25qxxrv(const struct spi_nor *nor) return sfdp_h->minor >=3D SFDP_JESD216F_MINOR; } =20 +static bool is_zd25q128c(const struct spi_nor *nor, + const struct sfdp_parameter_header *bfpt_header) +{ + /* + * Zetta ZD25Q128C is a clone of the Winbond device. But the encoded + * size is really wrong. It seems that they confused Mbit with MiB. + * Thus the flash is discovered as a 2MiB device. + */ + return bfpt_header->major =3D=3D SFDP_JESD216_MAJOR && + bfpt_header->minor =3D=3D SFDP_JESD216_MINOR && + nor->params->size =3D=3D SZ_2M && + nor->params->erase_map.regions[0].size =3D=3D SZ_2M; +} + /* * Since SFDP is populated after ->default_init(), the match functions usi= ng * nor->sfdp as discriminant cannot be used for this specific early fixup. @@ -62,15 +76,7 @@ w25q128_post_bfpt_fixups(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt) { - /* - * Zetta ZD25Q128C is a clone of the Winbond device. But the encoded - * size is really wrong. It seems that they confused Mbit with MiB. - * Thus the flash is discovered as a 2MiB device. - */ - if (bfpt_header->major =3D=3D SFDP_JESD216_MAJOR && - bfpt_header->minor =3D=3D SFDP_JESD216_MINOR && - nor->params->size =3D=3D SZ_2M && - nor->params->erase_map.regions[0].size =3D=3D SZ_2M) { + if (is_zd25q128c(nor, bfpt_header) || winbond_rv_match(nor)) { nor->params->size =3D SZ_16M; nor->params->erase_map.regions[0].size =3D SZ_16M; } @@ -261,7 +267,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q128JV-Q/N */ + /* W25Q128JV-Q/N, W25Q12RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x18), /* Flavors w/ and w/o SFDP. */ .name =3D "w25q128", --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 862714AFE30 for ; Wed, 2 Sep 2026 17:00:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368435; cv=none; b=NBI4Q6Gy6VBhFAV3ErppZBAbgD+J1zaldM8FckAqtZiHHASCwxBlKJfySeAbCn+mtWo72Wso4VuOiMmYMwNIcaed90mftBU5xjyGRiIRqNN+cNRoZbe22KOHVYB5ttaFaX7vY//wqLfH3Z+tjg3RojCbdzL63zu5ARhQw51/3eY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368435; c=relaxed/simple; bh=p68fFInjUy9O0cxHUEhfu9Wnj8pigleMHUZCo9AchFY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AdYIfxqgWJFT9Qz01Vhs4N8lzx/V+/iBvPIOaD36VNpqMDF/Ki1kN4WtKNdv/BAUMMOXdkVRHML+LibSdtobhvZAZb51FXAmxt6o//SEximQnd6jTWUCLZ6TSnDtEsu/Z50ijreLP2SOL5cLu9ZFD/9UBk4FGjS3LsjlGV14iFo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Wt/QsPAH; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Wt/QsPAH" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 14D3E4E414EB; Wed, 2 Sep 2026 17:00:32 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id DDF3F6053C; Wed, 2 Sep 2026 17:00:31 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 78F2F11C79B6F; Wed, 2 Sep 2026 19:00:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368430; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=k0oNEv6a+vQgq+nBNFX0wb7aQu0rQMa5axwLFQaIQJ0=; b=Wt/QsPAHC4Xbs9Ajwboz7RXyxZDxUkf2r0qyHzWu8+45fO4zgpfoJXTJRqD3cD26TyGwdy mDi/YD28PhiFFA/4MxU/WoUgPTgtEhDeNcgUnVdGYoJTbmRHFLNtrG9euox8TTVcU6Sg27 iSe9djgd25QHGXRFzc0ag1AycUyarxsIqngvjrmOJhWwGcW1Ga/K368jSz7fGpMC8xZubt g22DA7fbB1Mp6VpwgGem12QjQKU/iU2YMxQwAQ+ymFKZuzZeUMIZy84iw95idjdCidNDHw kh8b4paHH48x75X0zW4loL89KoQyjnRydZ1cEr8/dtmjX6CFz3axTkBHN9cJSA== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:27 +0200 Subject: [PATCH v4 13/25] mtd: spi-nor: winbond: Add support for W25Q25RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-13-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4019 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f3ffffffff0f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000d639a50081d614cee96376337a757a75 f7a4d55c39f66dffe970f9a50000000000002c0000000000f6ffffff0000 00000000000000000000ffffffffff0a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 05a7889e03e6de2ca02479e195acc717339481f2aa459df411fb9180d0e3998c /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 19 00 00 00 size 32.0 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 SR1 read 0x05 SR2 read 0x35 SR1 write 0x01 SR2 write 0x31 QE SR2 bit 1 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (32.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-01ffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01ffffff | unlocked | 512 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 24.169256] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_read ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 33554432 (32M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x2000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_read ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01ffffff | unlocked | 512 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x2000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_read ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_read ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_read2 ad25f48ad5b35e95d6055cd54fef93c6ad33c389907a8e494a9807e4787f8db9 spi_test 04a89ca2d9ae1bda059af80fb9d84b44e49a2a5ef1f8764254d1d80e533917ec spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01ffffff | locked | 512 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D33554432 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D512 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 33423360 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01fdffff | unlocked | 510 01fe0000-01ffffff | locked | 2 + flash_lock -u /dev/mtd0 33423360 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01feffff | unlocked | 511 01ff0000-01ffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 25165824 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-017fffff | unlocked | 384 01800000-01ffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-01ffffff | unlocked | 510 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-01ffffff | unlocked | 511 + all_but_one=3D511 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 511 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-01ffffff | locked | 511 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-01ffffff | locked | 510 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 511 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01feffff | locked | 511 01ff0000-01ffffff | unlocked | 1 + flash_lock -u /dev/mtd0 33423360 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01fdffff | locked | 510 01fe0000-01ffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 1ddc2ea1ad9c..5ab24aed311f 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -275,7 +275,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q256JV-Q/N */ + /* W25Q256JV-Q/N, W25Q25RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x19), .name =3D "w25q256", .size =3D SZ_32M, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F2324B0480; Wed, 2 Sep 2026 17:00:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368437; cv=none; b=sie+UGNyb+CKjjKf2THEI8CiQ+LxNJy4YRtEpn7GJFJoXzUjfHBFGYAKQi7pMZb5CsdEFE6ythZu3eAVq4lo6Vfs2RTCDCmWTjwsAFGU2g5jPZ4z6wzNXPMSA9srz8d3f/sUQfTWJk0oBdaxf8CxzFtBlVReanMutdgib3pRWGA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368437; c=relaxed/simple; bh=L5KGqtZPbHmDIK2WPqI4UzwHg8VAhf/pOOu3Mu5qkWY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SXdVR2ZYYbYGeLoTPbgrkpspag2qPMyE90R+tNYgrrmSGcBQJ/DSsrsEHCcYksKSeqZyEhnSrtFmr77YYTQeMrSBBxXmlZBdz8F+0lHpjS+lDMIsReWohSqDJE8y10q3doWlCR93xNcHSS1qNQc88DECpqluprXjjbRe1xXUNME= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=ZT8YK0lu; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ZT8YK0lu" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 221224E414EA; Wed, 2 Sep 2026 17:00:34 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id E8C3C6053C; Wed, 2 Sep 2026 17:00:33 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0162111C798E5; Wed, 2 Sep 2026 19:00:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368432; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=LzBgMy2Lujm1DyvAyiZJFMZWOX/V0U4kjhR1lshlQNQ=; b=ZT8YK0lul1jF5yaR6SZq9wH3LuYs4VqwcT4aqZmKiYZgn37Aw4S4cuz94UAViejKuUPqcB MbkEKdQgDdkpP8lxj+Pgc9IHUg+YzUrJHcsS7aCkmCe7zfA8zqGoKHucWoAdhM3ROot785 ObCFGuB8dPD7/NG11Ki4XfYDt9TNJ/1SWWRcGVXFoyYvAGy20heYSqXY/hL84ungh32bJH bgCj/zEyTc6YZdqQDItoYG9OQuwc85eor/ZoD03Q+tRp0EU2ADKLs8sCuqbv6r93Nsd3eA zCvtXA2qvd4otkNQSNLyXoB8+ZJfRTYlWx+zPqcfHp5ieAjUeBLgrH5MW8I8hw== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:28 +0200 Subject: [PATCH v4 14/25] mtd: spi-nor: winbond: Add support for W25Q51RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-14-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4020 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f3ffffffff1f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde96376337a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c0000000066ffffff0000 00000000000000000000ffffffffff0a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 74d21fecc7faa297b3f77f1136b1dc53f78b2a432629e226675b6384153fd9f9 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 20 00 00 00 size 64.0 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (64.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-03ffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | unlocked | 1024 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 25.427347] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 67108864 (64M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x4000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | unlocked | 1024 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x4000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read2 cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test f506020804f91fb750e8250e091fb2f732319221a645ed575e1b6ed3553d584c spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | locked | 1024 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D67108864 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D1024 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 66977792 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03fdffff | unlocked | 1022 03fe0000-03ffffff | locked | 2 + flash_lock -u /dev/mtd0 66977792 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03feffff | unlocked | 1023 03ff0000-03ffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 58720256 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-037fffff | unlocked | 896 03800000-03ffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-03ffffff | unlocked | 1022 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-03ffffff | unlocked | 1023 + all_but_one=3D1023 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 1023 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-03ffffff | locked | 1023 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-03ffffff | locked | 1022 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 1023 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03feffff | locked | 1023 03ff0000-03ffffff | unlocked | 1 + flash_lock -u /dev/mtd0 66977792 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03fdffff | locked | 1022 03fe0000-03ffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 5ab24aed311f..d6329fb7b8d6 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -283,7 +283,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { - /* W25Q512JV-Q/N */ + /* W25Q512JV-Q/N, W25Q51RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x20), .name =3D "w25q512jvq", .size =3D SZ_64M, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5A4F4B04B4 for ; Wed, 2 Sep 2026 17:00:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368439; cv=none; b=ow9dbtIvfNAUIjBdE80gq3zJWCV7QTZsSAgLLTKY1BKTxjpYfDFx9igBGKOkpkuqwinPicyBvZsf+i4qg8DKYg1DONST41W1aVqd6XXR6PovxwGK7/GhHEBjjMRqN6u2RnT1ObKquulV4fUdGrsT+v622UlF1AYqOHWB7QDr20Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368439; c=relaxed/simple; bh=A610YlTBCz4yjFLA0j70wTU0sm/TntqG0BZvbjbHdew=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EsFhdtXqE0+ULEJUz3jLD/FuWXBco4KJkWIov6ZE6RMDXRFJJJASG5gsWEKmkHj1C4o3l+OP1YZ596s/mFF19Cy6V7S8Io48c3cgXN8DXQkjnt89y1zzHUzCpoQ6w52XkoQ/FPQUsOelZOGBjOwdL2rTkqv2cWC+8YiOBzSMZiA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=jqOrYxEF; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="jqOrYxEF" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 745FD1A1968; Wed, 2 Sep 2026 17:00:36 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 470566053C; Wed, 2 Sep 2026 17:00:36 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 3D90711C795A7; Wed, 2 Sep 2026 19:00:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368435; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=SLMmPS/0BH5XsHf6mQQB1nDogYZYfbLlsYNUSXzPK4A=; b=jqOrYxEFJ5F0dm1TCvUrBJnWpn9Jp4c4wsjeu1MbOVTALCtwrCOCx8+P7mJ2gT3CK84v6/ UqEL64Mo0W1l9xneNPdwjIlztBsv646tny4HXntbe8VADmg7FGau6AvLqdvNvvOUSl7QWs op6aFMucasrlSm3pGPntTG/CoSqkHDSj3pUT18VcHladsVMppiAnffK6eKCF5oc7cmQcoJ BXDi6brWcyXNgzObZPhNUepDp5Ijr2cTqF24ayuoaXKuDSbJ/QF0XyjKKMREDhHOXUuGlM G92EReIKi5Gllj7hGgMawa8REoIJKLeBnnvpCB9S7VVMVs4rv3s8yLbC40gGgQ== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:29 +0200 Subject: [PATCH v4 15/25] mtd: spi-nor: winbond: Add support for W25Q01RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-15-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4021 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f3ffffffff3f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde9e378477a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c0000000066ffffff0000 00000000000000000000ffffffffff0a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp f4ae2490acac0f9120cd05dc7778683df1cb61f2a05705549e80a427a8747a52 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 21 00 00 00 size 128 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 SR1 read 0x05 SR2 read 0x35 SR1 write 0x01 SR2 write 0x31 QE SR2 bit 1 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (128 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-07ffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07ffffff | unlocked | 2048 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 40.768042] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_read 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 134217728 (128M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x8000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_read 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07ffffff | unlocked | 2048 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x8000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_read 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_read 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_read2 197211dd852288d6e0dd6bc00b6c4c10a6981623b804a58b5c532246216ff1e9 spi_test 41e82fe34a7ce60c98a24651e27333abdcbe318d5efd95d0db01d35ed5c092ab spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07ffffff | locked | 2048 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D134217728 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D2048 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 134086656 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07fdffff | unlocked | 2046 07fe0000-07ffffff | locked | 2 + flash_lock -u /dev/mtd0 134086656 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07feffff | unlocked | 2047 07ff0000-07ffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 125829120 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-077fffff | unlocked | 1920 07800000-07ffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-07ffffff | unlocked | 2046 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-07ffffff | unlocked | 2047 + all_but_one=3D2047 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 2047 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-07ffffff | locked | 2047 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-07ffffff | locked | 2046 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2047 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07feffff | locked | 2047 07ff0000-07ffffff | unlocked | 1 + flash_lock -u /dev/mtd0 134086656 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07fdffff | locked | 2046 07fe0000-07ffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index d6329fb7b8d6..6d8a192835c4 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -291,7 +291,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { - /* W25Q01JV-Q/N */ + /* W25Q01JV-Q/N, W25Q01RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x21), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78EC74B0C8E; Wed, 2 Sep 2026 17:00:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368442; cv=none; b=Kap5X9TyK2+qAqnkMMHXPQEonOTtUoPtAsvTAm2nhUFPyGUnm2tty6qs4evxjy9QgTedp2mwxuKDfdqAxb/5B0mlGv29dmmxfoZlmo9+jA6DTuPV5jy1cn2kB8Uu1mA9/7TY8mzt/lWDvbSWnkAshnVA52J88xsqKvVZxHk8brY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368442; c=relaxed/simple; bh=8qyu6g1HMbkaGswo1Ulyf8JF4wyny/d0A6zrTZCGGYI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qEDbBzzomWQwC2djvt9Th0YqqIYzek1SsE/Q6LzeOzBZyBGNa9waxViHOuelh1hOs4z1HMJo7THKqsr5cQNdw7K2yhDtYRfp3em42xoOTEKqpT8D57JgTJwE2K783LjrQtFDzqvcrUHjAIAUJu5a1i3FOSHoc2j9WmumU4/6K8U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=bOVb4Hfs; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="bOVb4Hfs" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id F1E1C4E414EA; Wed, 2 Sep 2026 17:00:38 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id C599F6053C; Wed, 2 Sep 2026 17:00:38 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 8ED8911C79A58; Wed, 2 Sep 2026 19:00:35 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368437; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=zTB46Ej6s/KBvEtKfuzaY5s1apGUdW0ZRODlVbW29ps=; b=bOVb4Hfsg5i3oypjjpFLwb20zsB/L0qU3ZRQ5qslv438DDz1wqSx0GueBz1p9/eIs2NcLU 0oDIvg2lPINiYI+7f5D+vp3uoatSm6iGyrEkPRA/l9cWDpSBuLXTBoOmC1L2ewHzYYRyFU Jlq7AK0Blx0v7HCVvvKNbZ/XYeMJyjG3amdKH1Frk5GvWRtIvV+OIFQuoiqTeXRM8tKGs0 Ncnapp9+9ltFrrPbVLwIk0XhxZ5bBm8mMvmg/f2WcthSdnPgWgoBgpBsI/bDgmdKsJfqY6 qcmYdol6Wv0qzycnLlakNhJB/1hC0tdTzTe/f/GyXkOsx8CEVKSvxIcPACMe5A== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:30 +0200 Subject: [PATCH v4 16/25] mtd: spi-nor: winbond: Add support for W25Q02RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-16-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4022 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f3ffffffff7f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde9e378477a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c0000000066ffffff0000 00000000000000000000ffffffffff0a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 623c2663966d70cc6418f65db6c182a7d9146e15b190263f46ea81d9a934866c /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 22 00 00 00 size 256 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 SR1 read 0x05 SR2 read 0x35 SR1 write 0x01 SR2 write 0x31 QE SR2 bit 1 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (256 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-0fffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0fffffff | unlocked | 4096 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 14.840645] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_read c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 268435456 (256M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x10000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_read c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0fffffff | unlocked | 4096 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x10000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_read c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_read c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_read2 c1c18ff55582ccab09e88cd6e6c14fe46c601c6461cb0012ac79949615f6c682 spi_test 28e04c28384aafd356a3e545ba79bf02e995cfb1e765ec663e35924c3f92b88d spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0fffffff | locked | 4096 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D268435456 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D4096 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 268304384 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffdffff | unlocked | 4094 0ffe0000-0fffffff | locked | 2 + flash_lock -u /dev/mtd0 268304384 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffeffff | unlocked | 4095 0fff0000-0fffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 260046848 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0f7fffff | unlocked | 3968 0f800000-0fffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-0fffffff | unlocked | 4094 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-0fffffff | unlocked | 4095 + all_but_one=3D4095 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 4095 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-0fffffff | locked | 4095 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-0fffffff | locked | 4094 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4095 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffeffff | locked | 4095 0fff0000-0fffffff | unlocked | 1 + flash_lock -u /dev/mtd0 268304384 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffdffff | locked | 4094 0ffe0000-0fffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 6d8a192835c4..e51c050bacdf 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -295,6 +295,11 @@ static const struct flash_info winbond_nor_parts[] =3D= { .id =3D SNOR_ID(0xef, 0x40, 0x21), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, + }, { + /* W25Q02RV-Q/N */ + .id =3D SNOR_ID(0xef, 0x40, 0x22), + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { .id =3D SNOR_ID(0xef, 0x50, 0x12), .name =3D "w25q20bw", @@ -611,6 +616,8 @@ static const struct spi_nor_fixup winbond_fixups[] =3D { .fixups =3D &winbond_nor_partname_fixups }, { .id =3D SNOR_ID(0xef, 0x40, 0x21), .match =3D winbond_jv_match, .fixups =3D &winbond_nor_multi_die_fixups }, + { .id =3D SNOR_ID(0xef, 0x40, 0x22), .match =3D winbond_jv_match, + .fixups =3D &winbond_nor_multi_die_fixups }, { .id =3D SNOR_ID(0xef, 0x70, 0x21), .match =3D winbond_jv_match, .fixups =3D &winbond_nor_multi_die_fixups }, { .id =3D SNOR_ID(0xef, 0x70, 0x22), .match =3D winbond_jv_match, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA5804B0480; Wed, 2 Sep 2026 17:00:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368445; cv=none; b=S1UIJqdSnDixcaMnoG91tTpgxWUNqxseZbmU8k/wdxcHkWn2PaqZQUuNfPBHRcqRlCLHUCCcIMHnaio2pn3QVP2Mv+GXLbPphlc7JllYH+BCu8ByaFxlKRlJKL45AS1PRbhYwbCpeYalE5XG7VzzuIOUmigFOLtNaRrHH7/5LBE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368445; c=relaxed/simple; bh=j5xFgirGrRmI/ESQpKGlYvhZ6P0s2OUl0UW5R4iGJeI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PrUg6l7ZqzLUVJURkvNbUYwyUvA5wv0NcSlhlEQDSq8ka8sHslAKx93e2Z621v7BihLj/bGSt/5AR866cT3JqaaRLdPN2y9+FbrZCZlg2FNuSk+n2BX+0O2N61O2/YZveAlarE6zXR8itu113V1fbmeYCdf6TBWRNxCcbWeGOxI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=HOYjCHTu; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="HOYjCHTu" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 472C61A1976; Wed, 2 Sep 2026 17:00:42 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 1AB246053C; Wed, 2 Sep 2026 17:00:42 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 19D7911C798E5; Wed, 2 Sep 2026 19:00:37 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368440; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=RK3VZeAny8l+e7YMWKjNdyYoAhg+PxHxJxIcEjjuNEM=; b=HOYjCHTuHdZMagWc7UQ0MUUgBCt44+SNUH6+3rVVCSN2KH8ZRv2T+WscTqcB3ses2Yph7P XBDW0GlaeawhtpuIcY4lJcR36Mq5BmNSHKO0diSQ2JTsohp1h+KE+yAW2XEnIU16aU62ps EVkzs6SVODNYAO9w9TAYxvmUXXqIos2IvAqs0S2VXsmEAlgzMVkZsMnxEK75d8xcDp7cMg ubTds/hmNstSoMcECU2rA3i1JBNg+dqB8HsSr9485VLe9HK7nnDWL8pkjsXObzNaRCsGoB A2ME93eYu+ZYr1JAXhFpVSGkCeqhJPqNcIq3kCoX22PgpCe69Z/T+6cFap5JzA== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:31 +0200 Subject: [PATCH v4 17/25] mtd: spi-nor: winbond: Prepare introduction of W25QxxRV-M parts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-17-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision between the JV and RV families. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting The new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Since they share the IDs but not the names, we must hide the names using a fixup. Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/winbond.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index e51c050bacdf..90b106d53d02 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -618,6 +618,8 @@ static const struct spi_nor_fixup winbond_fixups[] =3D { .fixups =3D &winbond_nor_multi_die_fixups }, { .id =3D SNOR_ID(0xef, 0x40, 0x22), .match =3D winbond_jv_match, .fixups =3D &winbond_nor_multi_die_fixups }, + { .id =3D SNOR_ID(0xef, 0x70), .match =3D winbond_rv_match, + .fixups =3D &winbond_nor_partname_fixups }, { .id =3D SNOR_ID(0xef, 0x70, 0x21), .match =3D winbond_jv_match, .fixups =3D &winbond_nor_multi_die_fixups }, { .id =3D SNOR_ID(0xef, 0x70, 0x22), .match =3D winbond_jv_match, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BD6764B0CA9 for ; Wed, 2 Sep 2026 17:00:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368449; cv=none; b=SBzLBP/dW95LQb7i4nxDycWnvaoUbbu5rPZb4A9xopNvibEI4uWI88Cdi7K7IKaFU7uRC9112fBD0VLNom1bXMSESzNih8P6XJr14rmqtmdYQXSQJBgNQ+NWR8syBi9qeAuB/bEDkuUT4ZMico74JQ3rTTWg5CdArwSXxkef1x0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368449; c=relaxed/simple; bh=sc2LodZIbww+27iypJJMd6Nah+9ChveDZmJRY++FQl4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uOUCZkulACY7Uu3lMg7EjaQHEXhftL5uug7/XqV05mTXBGPDix4DWC71EMTO+Ic4Cr1L1e1i95qjpoiQsym5ptMM+Ccs+rl2dblpBeKl1l8FU64Rc8nvDYFpGAz3GJG4MPdc0YwKgCyEtDu5PrhGnJA20xYeKmpKM5e4IkJBsMM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=mHyUdrSj; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="mHyUdrSj" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 30F721A1977; Wed, 2 Sep 2026 17:00:45 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id F35EB6053C; Wed, 2 Sep 2026 17:00:44 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 4948511C79ED7; Wed, 2 Sep 2026 19:00:41 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368443; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=j/koQ8d1/YYAdTfAcLAHCrySTBftVhAOOc+bQ7HQ0Eo=; b=mHyUdrSj8CIQGk4Y9dedM1drmUTYnLFiGIsYYHRs+IbJ2wBJPXsbDu8p98AKn6szGeaowv nuU+wrcJm1W2uaTi0GZNyT8zVZLOq2VfBZj1lrEwQNcxH8ocsYpgWNOZRCygt4w8KP0DlY 02AmVNGYJ6OcQAvCBTb+0sdLLmu8gTScpB1FrXkBhiEcjF2gqaKtqYiwwPekFCl625/boe Ii3lnbExipB2peNGe/414lJBvLKzJ83d8XpUSdIBjms+UUfy8N2mXSFxkJadmJpExmtZ7l djQBGXqmrT9n0881fkHlxXv+ug9SIVgGS568/FVLBGeJfjpUdxpYBmn1oQReqQ== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:32 +0200 Subject: [PATCH v4 18/25] mtd: spi-nor: winbond: Add support for W25Q32RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-18-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7016 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0100ff00080117800000ffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f9ffffffff0144eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001432010183e314c2e96376337a757a75 f7a2d55c39f66dffe930f8800000000000002c0000000000f6f4ffff0f00 0000060d44bd27ed080d + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 2c0c54d6e360dae30b72615eac5f0faff59463aeb2237d46d08d6cfd77d6c9f6 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x02 1S-1S-4S opcode 0x32 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 16 00 00 00 size 4.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_SR_TB | HAS_LOCK | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xeb dummy cycles 6 erase 0xd8 program 0x32 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (4.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-003fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 15.820716] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 4194304 (4M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x400000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x400000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read2 c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test d26d11f7de825c1f2397e52307997c9befb07b93e6cd520d15a87d06abef2529 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D4194304 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 4063232 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003dffff | unlocked | 62 003e0000-003fffff | locked | 2 + flash_lock -u /dev/mtd0 4063232 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003effff | unlocked | 63 003f0000-003fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-003fffff | unlocked | 62 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-003fffff | unlocked | 63 + all_but_one=3D63 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 63 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-003fffff | locked | 63 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-003fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 63 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003effff | locked | 63 003f0000-003fffff | unlocked | 1 + flash_lock -u /dev/mtd0 4063232 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003dffff | locked | 62 003e0000-003fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 90b106d53d02..a72fb24c3261 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -366,7 +366,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q32JV-M */ + /* W25Q32JV-M, W25Q32RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x16), .name =3D "w25q32jv", .size =3D SZ_4M, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 589884AF67D; Wed, 2 Sep 2026 17:00:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368452; cv=none; b=OfUfxDXOT9Nzo3NpL/F55R1CmH30Qcw00g7uc7Si5rHPry1KD1yJaKRVEdyqhkqXra833wP/NRslgGPnB95LAFWNLcwoYcoosfvHfssvLevjO0vaORwy8Y0PBsBcWIztKL0hF3B91BNXpZ7yMkttUOQn8xYl7yyQwUS5ygPTyKI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368452; c=relaxed/simple; bh=7khgm2xqMgGpsT8AjOxN6y/rKint207NqEucjAQwi20=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nmOhTSBg2u9Gq1XLXp2nhpZ6ei+OKIZ5CVRkIWNA3sII4hY/z1xfMvmIpFQRlVaWgIV7Qqhgr5SMZqgPK86cSAkJWUzAuGTtdfHvb/t4oFLgrj9b7V6TJh5OZv4+Hukfed8yZh7edECosvlT5k84ROgs76SBJ2PqNK8r1pIaTUk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=eS8DAq5c; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="eS8DAq5c" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id D51E61A1968; Wed, 2 Sep 2026 17:00:48 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id A36226053C; Wed, 2 Sep 2026 17:00:48 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 7C2D911C798E5; Wed, 2 Sep 2026 19:00:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368446; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=RQnDj37EtJOosbQZN7StwQ9XC10Wrhsl4jTE/ev6OvE=; b=eS8DAq5coGZcgVJfth7iPgXHdZIf1eK7Bu6bLwLg0EdgDfe4YlnOQuAYXtwfca2fv7AAGv Ux5WEz7blnT372AgxI3Qb514niEHDq4OvydR78hhUV90XzfbsQGE6gtspD/r2UN9HiGVyR wtg8mJMvnW9+4EBso2n8J948LuxkLMlwLxZC354IGljGasZRR01hDrhBUDNQ4u48KlsgoV wB9AL6XxP6il0Oxl+tbvDxDbY6rB7KEonLqo36l9mqT6MBDXiqCfy384wThChbsZCEa/3S lT4lmiBKzQaPnqhT6wmQ+u9jsWZCSJDWkoSwx95neYRKcKCdz7bc3XiR+vzWsw== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:33 +0200 Subject: [PATCH v4 19/25] mtd: spi-nor: winbond: Add support for W25Q64RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-19-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7017 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520fbffffffff0344eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000d639a50081d614c3e96376337a757a75 f7a4d55c39de6dffe970f9a50000000000002c00000000006655ffff0f00 0000060d44bd27ed080dffffffffff8a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp ef6c5eb61fa86c6daac85436446b97ca078a46e4cfd4c0fed4c9f9400d79fa86 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 17 00 00 00 size 8.00 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | SOFT_RESET | NO_WP |= HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (8.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-007fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 15.931750] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 8388608 (8M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read2 d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test 154432cc7e89d18c1e4ddb1604dfd2a0038c75aa5521a74808944ce19a320a42 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D8388608 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D131072 + bps=3D2 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 8126464 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | unlocked | 62 007c0000-007fffff | locked | 2 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | unlocked | 63 007e0000-007fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | locked | 2 00040000-007fffff | unlocked | 62 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 1 00020000-007fffff | unlocked | 63 + all_but_one=3D126 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 131072 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 1 00020000-007fffff | locked | 63 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | unlocked | 2 00040000-007fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | locked | 63 007e0000-007fffff | unlocked | 1 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | locked | 62 007c0000-007fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index a72fb24c3261..baa066daf197 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -373,7 +373,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q64JV-M */ + /* W25Q64JV-M, W25Q64RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x17), .name =3D "w25q64jvm", .size =3D SZ_8M, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A46004AF68B; Wed, 2 Sep 2026 17:00:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368454; cv=none; b=PuqPDhM1aU4+URnt/V5TdQNhNdZnr2chswuIIAxaRXreuWNZIRivJ6WXcYCnq5K1H/cqreS0bFnM1S6bgd3aKZT0cq4zsMe2E6FbMee97gVpIT78ZebFrjeZKC85gphewx05UGydA6vZqOfnoEJCttsJvwHPvkyGcEcn7kE+Jmo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368454; c=relaxed/simple; bh=IfPesIjYaE+JtCktrFS0rZ2vNliBpulstsWoOJPBhB0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IE7YokIq7jRY5S+9BW0/EH4BE7rrI7Zusw4jZLJOxS65Zm5xTKOQjsCBPYinuQk1xN+7KeAaRUz+sTp6xzGDeBnH3m/UL6HgIlfPBm5dyc+gILgPlk/q5vavi+4MoFKleoFN8Sg1LOWxMkBNKnkgrW4aHRN/T+wIkwj/04mnDkU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=iD4pyT2q; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="iD4pyT2q" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 601114E414EA; Wed, 2 Sep 2026 17:00:51 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 360CF6053C; Wed, 2 Sep 2026 17:00:51 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 71A0011C795A7; Wed, 2 Sep 2026 19:00:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368449; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=VmB2orzBwqAJs1J0ArJf5tKOXguq31pLWwF83nNE0nI=; b=iD4pyT2qdlZnEHYtqO02XCUwtHmlVT15yVTHK7LNjw80GTLzdHvJ/WByWo0In0x2vhNdOx Zgabn4iVk+EB5SqazPZyrKgpREyXFQ8YLLpHcKVlS+eSBl0+amCd6IFrX43TGWYtRIAmbd IN+aoHsx8YHUasx6qH5s99Jxic9qr429uyqmShxJOlGDdvZcX3qD3F4ca0yCodNW6WEopN 7u5OGxfltoOlof5JfbviA9McQp6giR23U/d3hWBzW0piuw/FJmnWotNEZ7DF4vQTPzk0tP i6zhxRoUe9nuGH3L274mqYe0wix2TPoWbY3BsN4+4bwC0m2OXkjkyIoWDKaR/A== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:34 +0200 Subject: [PATCH v4 20/25] mtd: spi-nor: winbond: Add support for W25Q12RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-20-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). This density wronly advertizes its size and requires a fixup for that. Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7018 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0100ff00080117800000ffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f9ffffffff0344eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000142a010186e114c1e96376337a757a75 f7a2d55c39f66dffe930f880000000000000ac0000000000f7f5ffff0f00 0000060d44bd27ed080d + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 94b52d6e903a2046e144eab0760384b6932c6fdbfec17eb7336f1778c3898daf /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x02 1S-1S-4S opcode 0x32 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 18 00 00 00 size 16.0 MiB write size 1 page size 256 address nbytes 3 flags HAS_SR_TB | HAS_LOCK | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xeb dummy cycles 6 erase 0xd8 program 0x32 SR1 read 0x05 SR2 read 0x35 SR1 write 0x01 SR2 write 0x31 QE SR2 bit 1 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (16.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-007fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 28.249430] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 8388608 (8M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read2 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test df6c52ecc59473c5ed9bd10a0479b52ee248adbf7d032aa7cde35e86acd461ca spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D8388608 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D131072 + bps=3D2 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 8126464 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | unlocked | 62 007c0000-007fffff | locked | 2 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | unlocked | 63 007e0000-007fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | locked | 2 00040000-007fffff | unlocked | 62 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 1 00020000-007fffff | unlocked | 63 + all_but_one=3D126 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 131072 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 1 00020000-007fffff | locked | 63 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | unlocked | 2 00040000-007fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | locked | 63 007e0000-007fffff | unlocked | 1 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | locked | 62 007c0000-007fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index baa066daf197..5c7a4c7ec76e 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -380,7 +380,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q128JV-M */ + /* W25Q128JV-M, W25Q12RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x18), .name =3D "w25q128jv", .size =3D SZ_16M, @@ -620,6 +620,7 @@ static const struct spi_nor_fixup winbond_fixups[] =3D { .fixups =3D &winbond_nor_multi_die_fixups }, { .id =3D SNOR_ID(0xef, 0x70), .match =3D winbond_rv_match, .fixups =3D &winbond_nor_partname_fixups }, + { .id =3D SNOR_ID(0xef, 0x70, 0x18), .fixups =3D &w25q128_fixups }, { .id =3D SNOR_ID(0xef, 0x70, 0x21), .match =3D winbond_jv_match, .fixups =3D &winbond_nor_multi_die_fixups }, { .id =3D SNOR_ID(0xef, 0x70, 0x22), .match =3D winbond_jv_match, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 135EF4B1467; Wed, 2 Sep 2026 17:00:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368458; cv=none; b=N4tVIhu094ZA8+5D4TgskNtSTy266v0QOoikZK6Pv4RvkibtXDUMbBBjCzoaFe1LUb7G1wn+RFhBIKv+8qRbaP41ZwNV5h5FK7EzNl5b2ATGpdZTF1WyCwSOwfD0FkTGFkxHUqz6b3/QQKFYuLzwSEv+LbrR3ElIeJ3gA6kpG8E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368458; c=relaxed/simple; bh=plmokelqsYyTn4JwmhP66P8GrzlKpUr3S8R/lSWCbII=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Oz4BC9sWAYHxP9RomZqDqsEki3/Z7gRh4gAKUGj+PWk1Qw6xi9NdRmjyIG5NgcG/Z/Gc1lCqxirwXX2+cnVx209QMFwAiraHHRBxclqncPt/9XQ5HWRz6HKVC2BfCeiDPfDxRmlOH5MnVdOLBiMjCjg0YI3iK/U/InsibThICg8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=SNJ9uZPX; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="SNJ9uZPX" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 224924E414E1; Wed, 2 Sep 2026 17:00:54 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id E32166054B; Wed, 2 Sep 2026 17:00:53 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 60E4111C79C04; Wed, 2 Sep 2026 19:00:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368452; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=TnSrYaFi7FP0kY1XrMvuTopl+Gw9zeIFtTZRr+Ga/VI=; b=SNJ9uZPXcIVn7NcwxrQDupQDerECbK3YvB+nyvGy+KgBv7cGEHhrPJnfJCpeIc6wuKl9Gt cZaS0ew+QXWc3z5YF0mTc4Sh4vPC58TPWua7Os7TkBqLvFihg+LzaE7POAdVDKfbl1reWD HL+Q0A+gZ4gxpy2aDLcG0bG//93KbmfAaa++qQ7dzdpsC2H3ujTfG3uoZCPmaADU3aJimh AOlKcqD4XJUveq0xDBa7iHWCOffmn5VJw5N9jQErN45yjdBok8jOVG7iSBiEDBzNy45+ch ItZBC92Bsx7dRzd+ZgxDOD4Knhq3QJZCxYHtMv1LoQROuPnGG/7neYCnhit7IQ== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:35 +0200 Subject: [PATCH v4 21/25] mtd: spi-nor: winbond: Add support for W25Q25RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-21-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7019 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520fbffffffff0f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000d639a50081d614cee96376337a757a75 f7a4d55c39f66dffe970f9a50000000000002c0000000000f6f5ffff0f00 0000060d44bd27ed080dffffffffff8a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 56eaf575ae5e825fad7c531694021ca11976c2adc9a4c78144c87edbe6ad7dfd /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 19 00 00 00 size 32.0 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 SR1 read 0x05 SR2 read 0x35 SR1 write 0x01 SR2 write 0x31 QE SR2 bit 1 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (32.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-01ffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01ffffff | unlocked | 512 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 19.151938] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_read 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 33554432 (32M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x2000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_read 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01ffffff | unlocked | 512 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x2000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_read 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_read 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_read2 7990e6e28bde1e97ce3d83c353fbcf0ea1955591d111e63cebbac02c0b7f10d3 spi_test d9dd42514cb65612993217744485b4cd0201c1c28a66d5a03a7acf5e2c9bf419 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01ffffff | locked | 512 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D33554432 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D512 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 33423360 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01fdffff | unlocked | 510 01fe0000-01ffffff | locked | 2 + flash_lock -u /dev/mtd0 33423360 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01feffff | unlocked | 511 01ff0000-01ffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 25165824 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-017fffff | unlocked | 384 01800000-01ffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-01ffffff | unlocked | 510 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-01ffffff | unlocked | 511 + all_but_one=3D511 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 511 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-01ffffff | locked | 511 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-01ffffff | locked | 510 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 511 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01feffff | locked | 511 01ff0000-01ffffff | unlocked | 1 + flash_lock -u /dev/mtd0 33423360 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-01fdffff | locked | 510 01fe0000-01ffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 5c7a4c7ec76e..7c3592cd81a2 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -387,7 +387,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q256JV-M */ + /* W25Q256JV-M, W25Q25RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x19), .name =3D "w25q256jvm", .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D5734B1481; Wed, 2 Sep 2026 17:00:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368460; cv=none; b=gdQBaMnXh57aM1wxFeEHBWLM73zbl8AocahpXR75XwmXX3a+GFfZh1KMc4rGG3v4Fa9xgh+TXi2x9jV/koY0WXHsJKUhsh1SEq7PvNHAThYTYqhwyUV/CaSzqQMu/aAuwMews8FtpMQd/RyQo2u7VOlvHLviUsVGlWnR8Yg3yJ8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368460; c=relaxed/simple; bh=Xy+s/7T5cBldSYolAnujq0VZM31MnoVi5DOq2q7GgoM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KtHRWRSly4MZtyGyVe8sEtmZhc42Yd2vDEhObC2HdOgk3c9zPFWYC12p2P/WQf+08Ken3mfQ9/aLXKB2qndwgJUU3FyN9/rCdteh9mjXl4h1oGCrElyeHQBUX6sEr4UlWoVHLmD5qLt0dYlTeJB8vi5O0Q/aLka/u3HUvImd2uw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=TQ8fshBn; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="TQ8fshBn" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id A3E271A1976; Wed, 2 Sep 2026 17:00:56 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 786196053C; Wed, 2 Sep 2026 17:00:56 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 5831311C79B6F; Wed, 2 Sep 2026 19:00:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368455; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=5tdVTAK3KUARSAo9wunlNTsBPboMRQKFFjkyWAOcUYU=; b=TQ8fshBnFLt7uW2ELfvzQ089N67OyAgxetD4NAOYkF6GakAPVY0dWV47qOEvyoo/RMs4iX QR5Hro1C5r7DG2D48SOJHQxdDeXgFgfisNqefFPAhgpnni81Q51uFxVHRT4T5czFXeubuB BRDx972cG32D/sd3eRRb7HfardONMOabFRusBQjHej2ZTjr/LkIW2vJuVFwZo3Io24gfAN +PY2roVe1Iyst4hPqGnnMBwH2+EoWawy8ZXrUj6C3DTZ2eRcWxWARwrMJrApjHz13IHAGx nAZ5ZB9KXiF6meese05zsLybdUl+H9vC7WjB9uMYP7oXdh9yec+zqgUhm2QiIg== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:36 +0200 Subject: [PATCH v4 22/25] mtd: spi-nor: winbond: Add support for W25Q51RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-22-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7020 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520fbffffffff1f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde96376337a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c000000006655ffff0f00 0000060d44bd27ed080dffffffffff8a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp d74b1b27fa4e5b8fba7db8fcac198bfe5a28c5e17a565d5e694a6b8d21b62104 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 20 00 00 00 size 64.0 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 SR1 read 0x05 SR2 read 0x35 SR1 write 0x01 SR2 write 0x31 QE SR2 bit 1 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (64.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-03ffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | unlocked | 1024 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_read 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 67108864 (64M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x4000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_read 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | unlocked | 1024 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x4000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_read 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_read 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_read2 640094386802e8c1ddca74f4f4848140736a1b275dfc5a2cefbd7f6acd0e6727 spi_test 12582dd4eecd173d184b51b0281065e10062901d66d0f6b1709f4240227b81a9 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | locked | 1024 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D67108864 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D1024 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 66977792 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03fdffff | unlocked | 1022 03fe0000-03ffffff | locked | 2 + flash_lock -u /dev/mtd0 66977792 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03feffff | unlocked | 1023 03ff0000-03ffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 58720256 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-037fffff | unlocked | 896 03800000-03ffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-03ffffff | unlocked | 1022 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-03ffffff | unlocked | 1023 + all_but_one=3D1023 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 1023 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-03ffffff | locked | 1023 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-03ffffff | locked | 1022 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 1023 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03feffff | locked | 1023 03ff0000-03ffffff | unlocked | 1 + flash_lock -u /dev/mtd0 66977792 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03fdffff | locked | 1022 03fe0000-03ffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 7c3592cd81a2..505140485bf3 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -393,7 +393,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { - /* W25Q512JV-M */ + /* W25Q512JV-M, W25Q51RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x20), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F8F14B1483 for ; Wed, 2 Sep 2026 17:01:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368462; cv=none; b=OuOD+T7tD79qhLiVepbua+h02ZRDAY5Vbrz14EAerGmKV0KFwOS98uvckT+O+WBYpuLMuNmg1PRuvrFryIePIqHYwdLXCx2ofZ35HF5GamhjpfVUuvQhwZqdHquw0czw7M5W7K/1rII1kWA3JKmvaX63kxG+K0MfPM1x44Bx05A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368462; c=relaxed/simple; bh=LKvCemEPg1jjryzbZzTsDhHVJ3+gA9wGkt1a9k+jyuw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KO7d5iCHi44nRZzJkPiKcbkVan5axesAFPfqhw4sTTuXW15B/qbr2AsPt17yoTWdma0ZFtGxpR5BmA6M0OJTMjASgO/L/k37Xkhx1M25NBFVfK28NfNLYsfH49igZFcFwFUkdtG9fbTlWONWNqGCvpfXfNJHPccmRC2fV/gMCZ4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=YbaSzuh+; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="YbaSzuh+" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 2724B4E414E1; Wed, 2 Sep 2026 17:00:59 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id E6C816053C; Wed, 2 Sep 2026 17:00:58 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id BC21411C79A58; Wed, 2 Sep 2026 19:00:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368457; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=0nz2OKcWsx0xKj2ngwSDhLfSQ/jfd05HjurcqR8VlgI=; b=YbaSzuh+NprHwT1ArekK1vViq1ixMeFla3hJ4j8dFn7MYP15DDi3Q6X0j66U0zAbXo3yHa XmelbnycQ1Kk2Dh0JR63AO/fXqGrlnWSGhkQFjDs0BYc433qha1+n4Dn0Jg9AHMyb+e24W AQoTQzRymUbMH1NMIyT7oedkpbV7UQdMi449Zfh76weugX7rfnbmpBehkteUwL88vPqeNr gOohIKRQpYq/AsnyVrrAzDK8fpYnLccawfVhthDU+cTeB7/48hHVikTbGSh0D1INntAvs6 IvyKRZ1HqddflOz3nxJNRzso1opUWp6W4LoSfZ6BljHhCT8rPPKXypCen47wUw== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:37 +0200 Subject: [PATCH v4 23/25] mtd: spi-nor: winbond: Add support for W25Q01RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-23-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7021 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520fbffffffff3f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde9e378477a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c000000006655ffff0f00 0000060d44bd27ed080dffffffffff8a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp f0ba26954c84f126916616ac4311057151ea46cae2eda1752709c3a5adfe4b55 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 21 00 00 00 size 128 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (128 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-07ffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07ffffff | unlocked | 2048 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 19.799786] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 134217728 (128M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x8000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07ffffff | unlocked | 2048 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x8000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read2 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test 792b00a5bf62350ee8f4868980820577046401c3e6f79075ea636034cff7cef2 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07ffffff | locked | 2048 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D134217728 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D2048 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 134086656 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07fdffff | unlocked | 2046 07fe0000-07ffffff | locked | 2 + flash_lock -u /dev/mtd0 134086656 1 + grep -A4 'locked sectors' /sys/kernel/debbg//spi-nr/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07feffff | unlocked | 2047 07ff0000-07ffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 125829120 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-077fffff | unlocked | 1920 07800000-07ffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-07ffffff | unlocked | 2046 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-07ffffff | unlocked | 2047 + all_but_one=3D2047 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 2047 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-07ffffff | locked | 2047 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-07ffffff | locked | 2046 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2047 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07feffff | locked | 2047 07ff0000-07ffffff | unlocked | 1 + flash_lock -u /dev/mtd0 134086656 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07fdffff | locked | 2046 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 505140485bf3..0a59b024fa80 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -398,7 +398,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { - /* W25Q01JV-M */ + /* W25Q01JV-M, W25Q01RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x21), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3EB04B1B2B for ; Wed, 2 Sep 2026 17:01:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368466; cv=none; b=YuOzXo9HIMK6Zpp3jdhYzeQE6C+tthmC5ezXu/aEZLqolL6vFU8yoa4Ej7bUwJK584+Cb2swiFEEfTu+admEaGdYfRhuw3s2ZYV/Qnrrl1wjsdM4OTd/HnUpzncCt26bWiDCIrOII3zKeDLgGzerqH1xktKJ9EEK2aJk+AgyinE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368466; c=relaxed/simple; bh=kXZRLafWQsdfFepDLc+98T8GZkPE3+PVfzn4gqOxT18=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ox1Bz0TrM2lNWlU6Z9JwKOXLswR4sE+sQiR99icIUmzVhihYo3CPFcEddMywlfvBs1dkBlNo1Z2L/MRZUjHKZZqkK7cuNSLW6eWk+92m/Pdbzxllp73fcuHb+TskzVHaYmwMFBqZj4ck1b4cvxc/4uhPxccAwYMPihP38mMAIOY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=iF8E1Fqc; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="iF8E1Fqc" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 466F74E414EB; Wed, 2 Sep 2026 17:01:02 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 12E016053C; Wed, 2 Sep 2026 17:01:02 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 25E5C11C79C04; Wed, 2 Sep 2026 19:00:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368460; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=1pPR3ULrGihqqbjv9kpwtxMVjpTT338J36HNnh0Rz6I=; b=iF8E1Fqc2ILBygE6ufNutDagWkMZhZCQsqvtIAK5kZJvVK0wLfl/4/w8kY/MINSRa4ZadG HTZdKxcChPBue1SEyGtWR6RYQ52vZfnxvBlSz9YxFwlBVhPOJEYRPt+G0Zanow3xLhGsli Mkfmotuj6a9Cb+K/ZdwLTY3/9KyoTSv71ep/mR1jtOr5TYaSpUVMpNKxKxzV54es32kWfr wrEY1g7tJBUUjGaHuREQB9OoBIlKwRE9hrZQrux4wLmH5lBc6U68fj4Q0Wek23MUQuhyrt ZlHO/HdyNQPO+eOcwkPO1wb8uusl0mMVqIJiZKhh3SBrNzSuujckru/0ZUi5yA== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:38 +0200 Subject: [PATCH v4 24/25] mtd: spi-nor: winbond: Add support for W25Q02RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-24-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Reviewed-by: Takahiro Kuwano Reviewed-by: Michael Walle Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7022 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520fbffffffff7f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde9e378477a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c000000006655ffff0f00 0000060d44bd27ed080dffffffffff8a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp fe929abb1ba38dd6a8668200051298a8140bfeb56bd6d58f56b86b074a150f12 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 22 00 00 00 size 256 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (256 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-0fffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0fffffff | unlocked | 4096 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 11.527038] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 268435456 (256M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x10000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0fffffff | unlocked | 4096 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x10000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read2 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test 4b1329df073cd497567d8cb6878aa20af6af71df98cc7c445d31a69eaf0d69f1 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0fffffff | locked | 4096 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D268435456 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D4096 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 268304384 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffdffff | unlocked | 4094 0ffe0000-0fffffff | locked | 2 + flash_lock -u /dev/mtd0 268304384 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffeffff | unlocked | 4095 0fff0000-0fffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 260046848 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0f7fffff | unlocked | 3968 0f800000-0fffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-0fffffff | unlocked | 4094 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-0fffffff | unlocked | 4095 + all_but_one=3D4095 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 4095 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-0fffffff | locked | 4095 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-0fffffff | locked | 4094 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4095 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffeffff | locked | 4095 0fff0000-0fffffff | unlocked | 1 + flash_lock -u /dev/mtd0 268304384 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffdffff | locked | 4094 0ffe0000-0fffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 0a59b024fa80..f76fd27a8541 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -403,7 +403,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { - /* W25Q02JV-M */ + /* W25Q02JV-M, W25Q02RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x22), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, --=20 2.54.0 From nobody Sat Sep 26 09:26:31 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A283F4B1B46; Wed, 2 Sep 2026 17:01:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368468; cv=none; b=DQViQ64vN411z18kw74MGCCBl8CP7lLR5FnRLegA1H061wkhCWBNUBy0Y4jTYiPpXO6ZQZKFubV2y1y2MG+vxJyWUYEX7BLtOZn+I6dasiRukWtaELebRlmY6fhWEIwYXSLalp4qLFXmuoFNN+T2ZyAvQZDsL4UNKAP35xSYz78= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788368468; c=relaxed/simple; bh=F0UWxlZM0kzu8TNux+aZKXQxHD5dYF5hDVNS415kaWk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=q8wJ8JYkj/8mbX7mWVR1FyemDWHXCK3XMuaI17k+vDd90eI280Q2ki5NI632R+v5Vd8+yeZOqezgzmLAoN3KLY7rvnFx0DbxjipXfRkQSStj2obf+nuaRERdJKVuIw9gyv0pEARqclH4tsTNpiZWzRcyRXr8YOFht2NhFVw9YD4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=KedKad7z; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="KedKad7z" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 5FCAD4E414EC; Wed, 2 Sep 2026 17:01:05 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 3510F6053C; Wed, 2 Sep 2026 17:01:05 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 20BA011C798E5; Wed, 2 Sep 2026 19:01:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788368463; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=sbhpERUTiFePYxtaCzX4WA40ULNwL8M1xikenkS/kgg=; b=KedKad7ziJp7W4LNuweQgEZ/v37rv5/KvE8CmUZ2yllX1rRsCOu8C3/AZEXrw8+d7yGxEH WqrOEraZAQZYo/If1HRBuU6Md/FyWHlUu31wynRxOiYAiTcqKwN250w3bqlqIBIYq+kAOw tQlhO8FHPr+QsEN6ZpwdXXEFQjwRPtjUuGKLD5Rn0O178FvGegYHhaJb5/ZXLsDjHs2UFG 2DKH1zOaaMVz+11vr+XKzMSDg/Emf8Ce3Jz+NIM3WMJjYml7fdxSrhZdsXC4S4BuTb5ATJ 1sAKyizDL1Oc+TgIQH2ya/eFNTlMlSjRfAPg8+96JHy63jRN1+jzPW3dRGfd+Q== From: Miquel Raynal Date: Wed, 02 Sep 2026 18:59:39 +0200 Subject: [PATCH v4 25/25] mtd: spi-nor: debugfs: Expose SR opcodes and QE mask Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-25-779d35303dff@bootlin.com> References: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> In-Reply-To: <20260902-winbond-v7-1-spi-nor-rv-addition-v4-0-779d35303dff@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Expose Status Register opcodes based on the flash capabilities discovered while parsing the SFDP QER field. Value '0' indicates an absence of opcode (non supported), we do not print anything in that case. The QE bit is also displayed. Example on a W25Q02JV-M: $ grep opcodes -A10 /sys/kernel/debug/spi-nor/spi0.0/params opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 SR1 read 0x05 SR2 read 0x35 SR1+SR2 write 0x01 QE SR2 bit 1 8D extension none Tested-by: Takahiro Kuwano Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/debugfs.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/mtd/spi-nor/debugfs.c b/drivers/mtd/spi-nor/debugfs.c index 275671222588..a82858f0328a 100644 --- a/drivers/mtd/spi-nor/debugfs.c +++ b/drivers/mtd/spi-nor/debugfs.c @@ -105,6 +105,21 @@ static int spi_nor_params_show(struct seq_file *s, voi= d *data) seq_printf(s, " dummy cycles\t%u\n", nor->read_dummy); seq_printf(s, " erase\t\t0x%02x\n", nor->erase_opcode); seq_printf(s, " program\t0x%02x\n", nor->program_opcode); + seq_printf(s, " SR1 read\t0x%02x\n", params->opcodes.read_sr1); + if (params->opcodes.read_sr2) + seq_printf(s, " SR2 read\t0x%02x\n", params->opcodes.read_sr2); + if (params->opcodes.write_sr1) + seq_printf(s, " SR1 write\t0x%02x\n", params->opcodes.write_sr1); + if (params->opcodes.write_sr2) + seq_printf(s, " SR2 write\t0x%02x\n", params->opcodes.write_sr2); + if (params->opcodes.write_sr1_and_sr2) + seq_printf(s, " SR1+SR2 write\t0x%02x\n", + params->opcodes.write_sr1_and_sr2); + + if (params->qe_mask[0] || params->qe_mask[1]) + seq_printf(s, " QE\t\tSR%d bit %d\n", + params->qe_mask[0] ? 1 : 2, + ffs(params->qe_mask[0] | params->qe_mask[1]) - 1); =20 switch (nor->cmd_ext_type) { case SPI_NOR_EXT_NONE: --=20 2.54.0