From nobody Sat Sep 26 10:03:03 2026 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90F843EC81B for ; Wed, 2 Sep 2026 13:08:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788354492; cv=none; b=DgdQgSnKGAtCcRh7j3CHt3iiK2ZvFt9eafAe+9AW63omiJqmszzaBGOFBZOKjpy5jZFHKtrGruOW+bZPkIVlueLh91/XXQWYVSZTCGDnKqGr4GnDCpACqzeRCr2/7Z+dgHAlMCf74rWdoQm/9zVASkAU0dO4PTy9zbB4b6EMzTQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788354492; c=relaxed/simple; bh=qiqsPxlbHv2Ud+rite1LTKKz01hObwxA2+aJF+2hat8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YVcUJ5d3N7v211/S49DMCfOMlBdG7bjkXuW4h7k2f0JqoSEUM2AVmMGnFjdLRPraZMBULgmkLRPU1uFXyPVc7P3KFm3dtuBbCVUm0uwrBj21c09zSLXhYVh+FNhvOqAsFlIKjoz8bDTe0rvXjwq9JY0wlAarKKJSy8rRD3/oUIs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=flipper.net; spf=pass smtp.mailfrom=flipper.net; dkim=pass (2048-bit key) header.d=flipper.net header.i=@flipper.net header.b=RsEl1eKh; arc=none smtp.client-ip=209.85.221.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=flipper.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flipper.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=flipper.net header.i=@flipper.net header.b="RsEl1eKh" Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-47de0093c42so1138364f8f.3 for ; Wed, 02 Sep 2026 06:08:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flipper.net; s=google; t=1788354488; x=1788959288; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=aijYbYyh0GYERanA0MNAQuC04tkRJrLzY82fVV+zmsc=; b=RsEl1eKhQ+HhSOFTNY3ZgX9PNS6aiL/YuSS6mecYlrejhlj2jsOqIGd/2oAnQCAsfH wCA9gVnsrWmXcFmXjxYiGbk487MsJrDfSWxAjy+MwZFDucYifNBFLYtLZG9Us6FvC8h9 Rpd59d3A/lHc66IbtW+KDOSjboXfJsIY2vjtdJQP7pt3SyJ0SBoPdXL/QY5uIh5NHxd/ SEp0L4YjKArdoGczGOGjgtPgwg0rWUUX47ezTWIMElWuRItwpsgiohNqRrxyoR2XYCpF fMRExlXhpByzlGx6x2wG9pgz5qwdSU1b+M9BWvVv8uBSW2/H6pqsDn/tKBSPROwUlbCe BYnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788354488; x=1788959288; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=aijYbYyh0GYERanA0MNAQuC04tkRJrLzY82fVV+zmsc=; b=I+KbQ1YCjXc2SWC7tQ7h58EuCFRhEi0JGs7KRc6Bf0UCI9I5cvN3Z6+l3pGwCm6pHg ckuRYDBFkUUg9SE4mh4fRrdYGkJSk2AFu1daAIKYXGxG2ix/0vFTmW6IU/xTcACGl1FJ mRbncLlDyPeSOpn4xTQisn2XtTQDCuW2pnOIWMWQieOLG8xmBztpzxqFbOLjBG+HlRiF jUxRGF4lUCGKg2zLomJlsRUQcOj10fqXhcjYgE/3omMjfHJHqhrP5wvC7Ky8v1dcnxTf 6KmpMDPfhjWCp7G/E9pfIDqsPmI3r9joiSqkXpK0jTMd95mnjz4aE+Z1BMWDjnDxg0IX wNZg== X-Forwarded-Encrypted: i=1; AKwUvBxYA6rjzY+KpX1RSCvoKc/Qm+i7qPK0GLgQahE7CGrcIFXa1DnV5YN/utVKO8dkGFjqnqfp4K+iTxG62dQ=@vger.kernel.org X-Gm-Message-State: AFuF++kX2ZynTXTE8j7xAtMt+fKoAWf2S4o83x2+DsuqYqUk1hnxUB8k G4a2x/SZocSp9FfbEpad+0+J1az9YdruQ9OY7H3IxFC6pERafwn0m4s6gj2fxVzvMUY= X-Gm-Gg: AYBFou1+qHw8nJSP5Y+UgzjphZ/w+MK+oooh1XZFBzn09eeR/tzFtEJkljtSsuzx9+G /JQJiiPmkcrNto9UNTmTwDQVR0aSCYvmNqaJZNXVDGRyLxGVfOmoM6UMe5KenT/EtKj3i7ly3AM 47HGDSaIsBqb26xD0aEl3ka9I2pDVhX0UllhjQoXIY8sRw3ZxhINZqLwIsN0oQpb7Xu3j/aQ6Qw 1CkjBL4sYfsstmvGtLUIVvUusVjEJqBf3HChUxoB/GfaI21WT/6tfGT3ix61CNUXHQ/6bnRS0sY rdLTTtiYd1tGNl1ussBVT2F689V1K3nf/T0sUF0wvHGeVXbX1zQAQSZtCnUI5/66EPIIW38S8YL MGK7ZgyZXMSNrgzcq+1Vhiv5axbiv+9T+gqR2qg74AJnmXUMSme7q+zdYsD1E0fdLz2QCHhFM6g 9joJ9vBYWLpqtqO5TpVpYJ+altz+c4PVbdHynd43UxpzqomsCQX5VF4tvuv5QErPNWALzie2fv8 ZqRlJ6bQe2lgFJLYn2lqXpIneczoqyZPfz1XC5g0Q== X-Received: by 2002:a05:6000:4913:b0:47f:90df:4ec6 with SMTP id ffacd0b85a97d-48488deed8cmr9806707f8f.6.1788354488335; Wed, 02 Sep 2026 06:08:08 -0700 (PDT) Received: from alchark-surface.localdomain (bba-2-51-220-108.alshamil.net.ae. [2.51.220.108]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48448e72b5bsm6385800f8f.4.2026.09.02.06.08.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 06:08:06 -0700 (PDT) From: Alexey Charkov Date: Wed, 02 Sep 2026 17:07:52 +0400 Subject: [PATCH v2 1/4] nvmem: rockchip-otp: Serialize reads Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-rk3576-otp-cpuid-mac-v2-1-e4b7fe2ab13f@flipper.net> References: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> In-Reply-To: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Walle , Miquel Raynal , Finley Xiao , Greg Kroah-Hartman Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Alexey Charkov , stable@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3090; i=alchark@flipper.net; h=from:subject:message-id; bh=qiqsPxlbHv2Ud+rite1LTKKz01hObwxA2+aJF+2hat8=; b=owGbwMvMwCW2adGNfoHIK0sZT6slMWTNkN8s8+inzp11M5ymXJWy4XpYf/i/8cxf1m5/mQXsh aRs1jIrdExkYRDjYrAUU2SZ+22J7VQjvlm7PDy+wsxhZQIZIi3SwAAELAx8uYl5pUY6Rnqm2oZ6 hkY6xjpGDFycAjDVE2cxMmzmnWlzfMcxzYX7rp1SnBL6gWnV0bVu6Yzf/5yOzFGoZLFkZFjpfeI Uf5NNt0u8iMEtAZGLW++d6WzISLG1divjZuR4xgQA X-Developer-Key: i=alchark@flipper.net; a=openpgp; fpr=9DF6A43D95320E9ABA4848F5B2A2D88F1059D4A5 The OTP controller is driven through a single set of registers holding a state machine which has to be stepped through for every word read, yet nothing keeps two readers out of each other's way. Concurrent reads interleave, and the outcome is either a reader bailing out: rockchip-otp 2a580000.otp: timeout during read setup or, worse, one of them silently taking delivery of the other's data. Reading two cells in parallel from userspace on RK3576 reproduces both within 150 iterations - 53 read errors and 9 corrupted results, the latter either losing their first word or, in one case, ending in the two bytes which belong to the other reader's cell - whereas the same reads issued sequentially never fail. Concurrency is not hypothetical here, as six thermal sensors source their trim values from the OTP and reach the driver straight from asynchronous driver probing. Guard the read path with a mutex. Reads are the only way into the hardware, as the driver registers no write callback, and they always run in process context, so a plain mutex spanning the whole clock-enable, read, clock-disable sequence is enough. Fixes: 755864feb729 ("nvmem: add Rockchip OTP driver") Cc: stable@vger.kernel.org Reviewed-by: Miquel Raynal Signed-off-by: Alexey Charkov --- drivers/nvmem/rockchip-otp.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index 2c0feb036f3f..f8a8c7cece98 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -80,6 +81,8 @@ struct rockchip_otp { void __iomem *base; struct reset_control *rst; const struct rockchip_data *data; + /* Serializes access to the OTP controller state machine */ + struct mutex mutex; struct clk_bulk_data clks[]; }; =20 @@ -272,10 +275,12 @@ static int rockchip_otp_read(void *context, unsigned = int offset, if (!otp->data || !otp->data->reg_read) return -EINVAL; =20 + mutex_lock(&otp->mutex); + ret =3D clk_bulk_prepare_enable(otp->data->num_clks, otp->clks); if (ret < 0) { dev_err(otp->dev, "failed to prepare/enable clks\n"); - return ret; + goto unlock; } =20 offset +=3D otp->data->read_offset; @@ -308,6 +313,9 @@ static int rockchip_otp_read(void *context, unsigned in= t offset, err: clk_bulk_disable_unprepare(otp->data->num_clks, otp->clks); =20 +unlock: + mutex_unlock(&otp->mutex); + return ret; } =20 @@ -431,6 +439,11 @@ static int rockchip_otp_probe(struct platform_device *= pdev) =20 otp->data =3D data; otp->dev =3D dev; + + ret =3D devm_mutex_init(dev, &otp->mutex); + if (ret) + return ret; + otp->base =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(otp->base)) return dev_err_probe(dev, PTR_ERR(otp->base), --=20 2.54.0 From nobody Sat Sep 26 10:03:03 2026 Received: from mail-wr1-f43.google.com (mail-wr1-f43.google.com [209.85.221.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E072649C4BB for ; Wed, 2 Sep 2026 13:08:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788354495; cv=none; b=DmEgp9+K6ZuIm4OAXSvzOSp0M06vDMM2GXicAi8YdbCSCAUE7LY9eB1K+5iR+g+RHXP195Q2z3VZT9GNVY0Chma7xjx8Z6pUwbyi75qAgnFXuBWjozmT6P835/cILjTc9BrJlC6COf3AZWQh2xQMlGBMqe5vzuimNZWdlhm99GI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788354495; c=relaxed/simple; bh=/RzWURUSlbLsxwiuIazTsYvvak9uXPkuT7+9wqJHcUM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=D6sfuAjUxTpBDo1K1xZsWMRoymN/3dtXbuTTOL7v0Fn4P5MVpI5KkgxuTzLCWBZrUnmMLunu4AHJugLt4VGQs4SMYOY0tMrNYTrtt4VZp696X2sxEApKA2Bk9nqeykaf/aK7Gojcgxjr+3nH7MjahmrBG+aHS3MCSHTG4KbC+8w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=flipper.net; spf=pass smtp.mailfrom=flipper.net; dkim=pass (2048-bit key) header.d=flipper.net header.i=@flipper.net header.b=qz0Y2yRW; arc=none smtp.client-ip=209.85.221.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=flipper.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flipper.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=flipper.net header.i=@flipper.net header.b="qz0Y2yRW" Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-4843e9c5960so1080983f8f.0 for ; Wed, 02 Sep 2026 06:08:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flipper.net; s=google; t=1788354492; x=1788959292; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=VstGMH+clvE6OSCjH9oL0GGKXD+unvqTKSVxvTB8uDc=; b=qz0Y2yRWWS0fmakieDFb7ZVjrB1ScGQXul44n8A2VqoQ/Xjup+3nO7pw5wkce070Dl sf0B0husbDFGsCpDWq3iuxVf60wnQX0wIaRf3zcmZ67QG+OCcc49SP6ylGZ5zLOlX0tb yFjUcHr8WMDN63EwOhQuCJ3qsFkfvs5Keymrb+FrK7FFgEVE1Sc9NlxKCBdgXb7M/iT/ GVwHMCcLPwJ+DB0DZyqNj3IqJj4t26aKdpnpN8M3IE6Iyaoq4ptzV+P617N8Am1rd3Bu UOtjzQUrdHZHXYUQAQwHxzsmS+rvt9/tRMRrof8ydPzsyHecCBvnrwLXAG7W+FrxydUg 5D2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788354492; x=1788959292; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=VstGMH+clvE6OSCjH9oL0GGKXD+unvqTKSVxvTB8uDc=; b=nAWjf5LuInG2O+QVvuXwr/CWMvJGEbMkrF2J7bez6lG6SYyCCadDAL4i6JAadBH6XI zKEfc+g0ADHIJbWrlnbmiX+47fVzXsgObh2KwAKErjnuWL4flUHeMe3qzCtbZ+QrBPxJ j/aYIi+o/WMSzrPWjS29V2IjmCZLTl097aQ+8lZMdwcGA9DnlstLeZ/pq4YLLvPhiPOO oO6AIXvjAWDY3S8OhsTiuE7Rblfr60hK3bo5YHJAb7h1aUbojtSmC+VVFg0I7gBdubsS y/74ray72lfJslMFBC5oIK3g2wo6cCV/BrQtYbpQkSAACImfvrK+Nu3uI68S8CBuwdDh Khgw== X-Forwarded-Encrypted: i=1; AKwUvBxuUpTUMe2bCjPxwe5ZuR20KTWBTRoSAbsmgc2kj5q6gBSk38AbXORi8jL4cRcr4qtldtJVXGwwMtBFw8M=@vger.kernel.org X-Gm-Message-State: AFuF++na2dCCYXDEfFU0BDudzjAjDS3HWfSIE8FZXwdMkkujFZ9rZULV Qz1qouojWv0EL9Pdz56VpU+67ju43auRn0Xo9ROCkHN2YVFmW9jVS10T2YqzogFb1S8= X-Gm-Gg: AYBFou3JSGHgzBxZyG0P3ygLLXPsk5+BXGYNbUKt+2t4C7YIlRK4/knXXz8Zvxol8Cm jjkdggwByn8paqjvFTqB2Nn4wN6xJa96/9Zxy348AwVmKdWLWmyAH5mRzDm2okKm9otmWsJzmOm JI021hiw8wUtJPzVl6ryEe6lYFHXbYqvqk7mZDgfKdf8izbAaK1t/ggRa9YudrsgMCMd7xbMt9D 6aWfk+TCk9jDolIgMqim1y2V+4csxfWuO+kpFgTB87NgO/NaTGGNmbxtSvbX5zMepRXFrh7TJZ7 3CWKVfrHWSlztMK6q48AXfOvU63dQr10CIL2F/7Aoo1H8pVt0/RKMyfn3D85SPeIAQQF5Zk4YR2 j4Y8bXYdFK0KsYjSrUhfhjwtMZdeLG7Nb2Eo/S8HYOG+QcLG8uYVAJYFA53BNTBGJ0FG1VZ3l1n iO1AoqpHuYeyiV0IR65ap80/gLCq4lLDoapBnMasD/QQ1D5hg6zgn0GApex3A8Rgb+o2q0ed3Hr hwnQ61A91BBnvAO1ikRUrxoi28w12L7X1rn6D2wZw== X-Received: by 2002:a05:6000:290f:b0:484:3310:9ab0 with SMTP id ffacd0b85a97d-484914d8435mr8297857f8f.25.1788354492009; Wed, 02 Sep 2026 06:08:12 -0700 (PDT) Received: from alchark-surface.localdomain (bba-2-51-220-108.alshamil.net.ae. [2.51.220.108]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48448e72b5bsm6385800f8f.4.2026.09.02.06.08.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 06:08:10 -0700 (PDT) From: Alexey Charkov Date: Wed, 02 Sep 2026 17:07:53 +0400 Subject: [PATCH v2 2/4] dt-bindings: nvmem: layouts: Add Rockchip OTP CPUID layout Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-rk3576-otp-cpuid-mac-v2-2-e4b7fe2ab13f@flipper.net> References: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> In-Reply-To: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Walle , Miquel Raynal , Finley Xiao , Greg Kroah-Hartman Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Alexey Charkov X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4722; i=alchark@flipper.net; h=from:subject:message-id; bh=/RzWURUSlbLsxwiuIazTsYvvak9uXPkuT7+9wqJHcUM=; b=owGbwMvMwCW2adGNfoHIK0sZT6slMWTNkN98wCL61IsMQ7/0dv97TsGZmfZJz1W42WaKZtU0M Rt5c6Z1TGRhEONisBRTZJn7bYntVCO+Wbs8PL7CzGFlAhkiLdLAAAQsDHy5iXmlRjpGeqbahnqG RjrGOkYMXJwCMNXpLYwMy83XL+BRTM0vC1bx833+6pLjDmXt45cSjoV1f2O+cuhrKiPDj1/BvPa JFlwa/7vjN7y+NLmKzZgx8uDyNzLpKcrtjNPYAA== X-Developer-Key: i=alchark@flipper.net; a=openpgp; fpr=9DF6A43D95320E9ABA4848F5B2A2D88F1059D4A5 Rockchip SoCs ship with a unique CPU ID programmed into their internal OTP memory, and Rockchip bootloaders derive Ethernet MAC addresses from it so that boards with no dedicated storage for one still get a stable address. Describe that derivation as an NVMEM layout, so that the resulting addresses become available through the standard nvmem "mac-address" cell whether or not the firmware got a chance to patch them into the device tree. Keep the compatible SoC specific, as the location of the CPU ID within the OTP memory differs between SoCs. Signed-off-by: Alexey Charkov --- .../bindings/nvmem/layouts/nvmem-layout.yaml | 1 + .../nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml | 73 ++++++++++++++++++= ++++ MAINTAINERS | 6 ++ 3 files changed, 80 insertions(+) diff --git a/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.y= aml b/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml index 382507060651..ab94dbb41aac 100644 --- a/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml +++ b/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml @@ -21,6 +21,7 @@ oneOf: - $ref: fixed-layout.yaml - $ref: kontron,sl28-vpd.yaml - $ref: onie,tlv-layout.yaml + - $ref: rockchip,rk3576-otp-cpuid.yaml - $ref: u-boot,env.yaml =20 properties: diff --git a/Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk357= 6-otp-cpuid.yaml b/Documentation/devicetree/bindings/nvmem/layouts/rockchip= ,rk3576-otp-cpuid.yaml new file mode 100644 index 000000000000..85153d480950 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-c= puid.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/layouts/rockchip,rk3576-otp-cpuid= .yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVMEM layout of the CPU ID in Rockchip OTP memory + +maintainers: + - Alexey Charkov + +description: | + Rockchip SoCs are shipped with a unique CPU ID programmed into their + internal OTP memory. Rockchip bootloaders derive Ethernet MAC addresses + from it, so that boards which have no dedicated storage for a MAC address + still get a stable one. The addresses are computed by hashing the lowerc= ase + hexadecimal representation of the CPU ID with SHA-256 and taking the fir= st + six octets of the digest, with the multicast bit cleared and the locally + administered bit set. + + The location of the CPU ID within the OTP memory differs between SoCs, + hence the SoC specific compatible. + +select: false + +properties: + compatible: + const: rockchip,rk3576-otp-cpuid + + mac-address: + type: object + description: + MAC address derived from the CPU ID. The first argument of the phand= le + selects one of the two addresses that can be derived (can be 0 or 1). + + properties: + "#nvmem-cell-cells": + const: 1 + + additionalProperties: false + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + otp@2a580000 { + compatible =3D "rockchip,rk3576-otp"; + reg =3D <0x0 0x2a580000 0x0 0x400>; + clocks =3D <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>, + <&cru CLK_OTP_PHY_G>; + clock-names =3D "otp", "apb_pclk", "phy"; + resets =3D <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>; + reset-names =3D "otp", "apb"; + + nvmem-layout { + compatible =3D "rockchip,rk3576-otp-cpuid"; + + otp_mac_address: mac-address { + #nvmem-cell-cells =3D <1>; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index eb4e5a61056e..f3d07ce7b3c8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -23722,6 +23722,12 @@ F: Documentation/userspace-api/media/v4l/metafmt-r= kisp1.rst F: drivers/media/platform/rockchip/rkisp1 F: include/uapi/linux/rkisp1-config.h =20 +ROCKCHIP OTP CPUID NVMEM LAYOUT DRIVER +M: Alexey Charkov +L: linux-rockchip@lists.infradead.org +S: Maintained +F: Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpu= id.yaml + ROCKCHIP RK3568 RANDOM NUMBER GENERATOR SUPPORT M: Daniel Golle M: Aurelien Jarno --=20 2.54.0 From nobody Sat Sep 26 10:03:03 2026 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB72249CF48 for ; Wed, 2 Sep 2026 13:08:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788354500; cv=none; b=VkpnQVA3gwWRvGBmYWi2Stf93aBJSQGpIqnakVBts0ARmMhxesAkom+/PK5w3OgTSQrmoBb3cg2gMgcODzmqUc+VWc09cmpHgjUQkk5uculdyEC/AmPkTE50cG54IDfH1OJ4DWj9vTylQjhCisi7DKLVl2RXkRB5V4wK/Ht259U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788354500; c=relaxed/simple; bh=k/jn5XrqJoguASStGfL3pZWOMkauDZVjoO+fk0jB14g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WlxCj6LDnqyHFkZrf6P+W9+VmCLmliJIsk0/y6kVgTFkYLZR55N/rv0tL7pmwmGDZr/2K2L0xGJDxcjLGjhZU065095TKscVqrQ7Mi3nn0XHtJLXQnL+zKbBANDqWdvkzANdH52olcq2w9u13rut3A+wvfkG/WQewX4Qh9+wL+o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=flipper.net; spf=pass smtp.mailfrom=flipper.net; dkim=pass (2048-bit key) header.d=flipper.net header.i=@flipper.net header.b=IosNi0cx; arc=none smtp.client-ip=209.85.221.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=flipper.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flipper.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=flipper.net header.i=@flipper.net header.b="IosNi0cx" Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-482dbe4d247so445517f8f.2 for ; Wed, 02 Sep 2026 06:08:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flipper.net; s=google; t=1788354497; x=1788959297; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=rn7i8U/ATxkqsV19D/fOiSUDBdGRoqkMbRkOr4LDxWI=; b=IosNi0cx534Ak2Mui5hDKU0TucRIpo1NgqscCfqbh6iUBFuRf5LG5UIyrwrKfQCteo z8D1URknMVtKiSRUhWG+VDsKTvj2A5DqaHCdWlioTxKri7dnPh6e0GaA8KxZSSJQAhvW +OnAScBVXe5zQn7HtjbDM7Di7DVfVZChc2Z368BEROSfzA5EBVQNdCidTnM4uGQHSoTc 2oqyxHf7HINZN3xhvCBeBAGPBLqQFoNaHlwZ80unPc7Dsff+iQntvb9bwiZXsq+TAZTz TMtdm38Rzs4kEecCZsa8Fe55V+Ac6SrtxzI3LcLO2noGM3G/vu6X3Z/WM6oHSlVSu8ki tjSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788354497; x=1788959297; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=rn7i8U/ATxkqsV19D/fOiSUDBdGRoqkMbRkOr4LDxWI=; b=WCuKU2fy7FKXiPWIgipxO1I/sYqIeUCKdz3Az/lv5BXhsBKOFpCw2x4u9J1hkvFYem DGlnX1Btwh24L3po5WhOkCbChqOoWCYuNhSQ+BwffIuD7ZRAw345tXEQP6HRQX+5TOLg XoyuF6jl211gokFgYADICSr8wEQhD/5E238MbJRfLR8XGxfQWYfDB08P1p0wztFyOWJO atTfIY29j7xY2yMtpZEjY5L4L8PvillhCCe8ecfAK5/CUgUv5wOSkZ/E0HV6jYaPvrYi ANsvTgH2J0XvS9/SB4rbSinXgD9mn9KpKAfAHaLfCHi6quTOxbtes0C6wEB0Lkz91/xL 4xSg== X-Forwarded-Encrypted: i=1; AKwUvBzhi/Qu/v/O7VrGc3CLbx2TWbitws10PfJaZHGbqDV2XzbFsfRUFLZjR0aEdyn93gBY6F4fscVmQJT4Oco=@vger.kernel.org X-Gm-Message-State: AFuF++nH0237+yUcicBQlZGCic+CvLodCen4NvbF6fMZpS+iM2KHCd4R VuqutkK6FQem2kiXpgQy1AdSBH/RrV6eAwmkimlQwYucbQoYugWM7F6zznbd1Zzr/1w= X-Gm-Gg: AYBFou3/WHFXQnHG3GED33l+K4BtS9hquhStJKoanWM1MOg3wtbXrIurZB+l1OiQyCk fqBoakHeUkNsym2PnESlpK6mzzPTZDPFoQ7JAnFzPxp4UyiId7iETqwrEACGKg1zLejBVsNcoR1 yY6/XUgRJWNnP1ig9XBIW1jY4sXbzne7oj1soOMxcDjAn4ZLMDvfT0mOkUfa/F5wa59SXEKdLIX 1BmzCT0VhmY+RLRXk8CevFeuR76gB4SHNCB9wlfDsBobSIbqbVyi594q9wPJnReaxKrGGw9Qcvp ExVpE1mJyVdg6w9C+48AConM/YcIQKBxH5h2fpZp7dzqpJ+wd9gCBreATtRjctnmnDoqETEOzF1 ti12kaIzmyZQTlsg5uUsOZog0AeGC66bb/TR/bN4tAs82kV8QtE2eR671neRRlbVJjnMq964iZb 2LkxE96TF3D/HMuw+lzBZc1QB7ex1cGIQpL2G1n1WwXqOqyFVq2IJroODdUjgWBdZ+QSzkdS+Ni LJZ/zQV+Lk57wj4jX81rJV7Joe8QRgxxjGFWEjb8g== X-Received: by 2002:a05:6000:480a:b0:47f:eac2:6f55 with SMTP id ffacd0b85a97d-48488f2229cmr9455000f8f.19.1788354496630; Wed, 02 Sep 2026 06:08:16 -0700 (PDT) Received: from alchark-surface.localdomain (bba-2-51-220-108.alshamil.net.ae. [2.51.220.108]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48448e72b5bsm6385800f8f.4.2026.09.02.06.08.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 06:08:14 -0700 (PDT) From: Alexey Charkov Date: Wed, 02 Sep 2026 17:07:54 +0400 Subject: [PATCH v2 3/4] nvmem: layouts: Add Rockchip OTP CPUID layout driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-rk3576-otp-cpuid-mac-v2-3-e4b7fe2ab13f@flipper.net> References: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> In-Reply-To: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Walle , Miquel Raynal , Finley Xiao , Greg Kroah-Hartman Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Alexey Charkov X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6627; i=alchark@flipper.net; h=from:subject:message-id; bh=k/jn5XrqJoguASStGfL3pZWOMkauDZVjoO+fk0jB14g=; b=owGbwMvMwCW2adGNfoHIK0sZT6slMWTNkN/8sWiqYlX7jJmH7nT4e3brq3wwePmr7anCydLqP /wyV9p6OyayMIhxMViKKbLM/bbEdqoR36xdHh5fYeawMoEMkRZpYAACFga+3MS8UiMdIz1TbUM9 QyMdYx0jBi5OAZhq1VyGX0yeHJcebT3JbLu6IsNvjsrnOV83vHY4XReoHrj5q+iRUz8YGa6XBd7 8sviF8aWphy/ISb6zXftL997Uhvfbr/Jr3a69vocRAA== X-Developer-Key: i=alchark@flipper.net; a=openpgp; fpr=9DF6A43D95320E9ABA4848F5B2A2D88F1059D4A5 Rockchip SoCs customarily use the CPU ID programmed into their on-chip OTP memory to derive stable Ethernet MAC addresses even when a board doesn't otherwise have dedicated storage for those. The derivation depends on the particular bootloader implementation (e.g. it is done by upstream U-Boot, which patches the derived MAC addresses at runtime into the device tree it hands to the kernel). Using less featureful bootloaders, such as direct boot to Linux from SPL, leaves the kernel with only a random MAC address instead, even though everything required for the derivation is equally available to Linux as it is to U-Boot. Reproduce the same derivation in the kernel and expose the result as an nvmem cell named "mac-address", so that of_get_mac_address() picks it up through its standard nvmem fallback. The address index comes from the DT phandle argument, which lets both interfaces of a dual Ethernet board share a single cell. Enable the layout by default on Rockchip, as consumers of its cells would otherwise defer their probe indefinitely. Reviewed-by: Miquel Raynal Signed-off-by: Alexey Charkov --- MAINTAINERS | 1 + drivers/nvmem/layouts/Kconfig | 13 ++++ drivers/nvmem/layouts/Makefile | 1 + drivers/nvmem/layouts/rockchip-otp-cpuid.c | 119 +++++++++++++++++++++++++= ++++ 4 files changed, 134 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index f3d07ce7b3c8..73e0531445be 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -23727,6 +23727,7 @@ M: Alexey Charkov L: linux-rockchip@lists.infradead.org S: Maintained F: Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpu= id.yaml +F: drivers/nvmem/layouts/rockchip-otp-cpuid.c =20 ROCKCHIP RK3568 RANDOM NUMBER GENERATOR SUPPORT M: Daniel Golle diff --git a/drivers/nvmem/layouts/Kconfig b/drivers/nvmem/layouts/Kconfig index 5e586dfebe47..6e2511ac6f7e 100644 --- a/drivers/nvmem/layouts/Kconfig +++ b/drivers/nvmem/layouts/Kconfig @@ -26,6 +26,19 @@ config NVMEM_LAYOUT_ONIE_TLV =20 If unsure, say N. =20 +config NVMEM_LAYOUT_ROCKCHIP_OTP_CPUID + tristate "Rockchip OTP CPU ID layout support" + default ARCH_ROCKCHIP + select CRYPTO_LIB_SHA256 + help + Say Y here if you want to expose the MAC addresses that Rockchip + bootloaders derive from the CPU ID programmed into the OTP memory of + Rockchip SoCs. Boards which have no other source of MAC addresses + need this to get stable ones when the bootloader does not patch them + into the device tree. + + If unsure, say N. + config NVMEM_LAYOUT_U_BOOT_ENV tristate "U-Boot environment variables layout" select CRC32 diff --git a/drivers/nvmem/layouts/Makefile b/drivers/nvmem/layouts/Makefile index dd6c6c70b1a9..a0ade4c22c79 100644 --- a/drivers/nvmem/layouts/Makefile +++ b/drivers/nvmem/layouts/Makefile @@ -6,4 +6,5 @@ obj-$(CONFIG_NVMEM_LAYOUTS) +=3D fixed-layout.o obj-$(CONFIG_NVMEM_LAYOUT_SL28_VPD) +=3D sl28vpd.o obj-$(CONFIG_NVMEM_LAYOUT_ONIE_TLV) +=3D onie-tlv.o +obj-$(CONFIG_NVMEM_LAYOUT_ROCKCHIP_OTP_CPUID) +=3D rockchip-otp-cpuid.o obj-$(CONFIG_NVMEM_LAYOUT_U_BOOT_ENV) +=3D u-boot-env.o diff --git a/drivers/nvmem/layouts/rockchip-otp-cpuid.c b/drivers/nvmem/lay= outs/rockchip-otp-cpuid.c new file mode 100644 index 000000000000..61f509c4a8cf --- /dev/null +++ b/drivers/nvmem/layouts/rockchip-otp-cpuid.c @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: GPL-2.0 +// SPDX-FileCopyrightText: 2026 Flipper FZCO +/* + * NVMEM layout for the CPU ID in Rockchip OTP memory + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define ROCKCHIP_CPUID_LEN 16 + +struct rockchip_cpuid_data { + unsigned int offset; +}; + +static int rockchip_cpuid_mac_pp(void *priv, const char *id, int index, + unsigned int offset, void *buf, size_t bytes) +{ + char cpuid[ROCKCHIP_CPUID_LEN * 2]; + u8 digest[SHA256_DIGEST_SIZE]; + u8 *mac =3D buf; + + if (bytes !=3D ROCKCHIP_CPUID_LEN) + return -EINVAL; + + if (index < 0 || index > 1) + return -EINVAL; + + /* The buffer still holds the raw CPU ID at this point */ + bin2hex(cpuid, mac, ROCKCHIP_CPUID_LEN); + + sha256(cpuid, sizeof(cpuid), digest); + + memcpy(mac, digest, ETH_ALEN); + mac[0] &=3D 0xfe; /* clear the multicast bit */ + mac[0] |=3D 0x02; /* set the locally administered bit */ + mac[5] ^=3D index; + + if (!is_valid_ether_addr(mac)) + return -EINVAL; + + return 0; +} + +static int rockchip_cpuid_add_cells(struct nvmem_layout *layout) +{ + const struct rockchip_cpuid_data *data; + struct nvmem_cell_info info =3D {0}; + struct device_node *layout_np; + int ret; + + data =3D of_device_get_match_data(&layout->dev); + if (!data) + return -EINVAL; + + layout_np =3D of_nvmem_layout_get_container(layout->nvmem); + if (!layout_np) + return -ENOENT; + + info.name =3D "mac-address"; + info.offset =3D data->offset; + info.raw_len =3D ROCKCHIP_CPUID_LEN; + info.bytes =3D ETH_ALEN; + info.read_post_process =3D rockchip_cpuid_mac_pp; + info.np =3D of_get_child_by_name(layout_np, info.name); + + of_node_put(layout_np); + + ret =3D nvmem_add_one_cell(layout->nvmem, &info); + if (ret) + of_node_put(info.np); + + return ret; +} + +static int rockchip_cpuid_probe(struct nvmem_layout *layout) +{ + layout->add_cells =3D rockchip_cpuid_add_cells; + + return nvmem_layout_register(layout); +} + +static void rockchip_cpuid_remove(struct nvmem_layout *layout) +{ + nvmem_layout_unregister(layout); +} + +static const struct rockchip_cpuid_data rk3576_cpuid_data =3D { + .offset =3D 0x0a, +}; + +static const struct of_device_id rockchip_cpuid_of_match_table[] =3D { + { + .compatible =3D "rockchip,rk3576-otp-cpuid", + .data =3D &rk3576_cpuid_data, + }, + {}, +}; +MODULE_DEVICE_TABLE(of, rockchip_cpuid_of_match_table); + +static struct nvmem_layout_driver rockchip_cpuid_layout =3D { + .driver =3D { + .name =3D "rockchip-otp-cpuid-layout", + .of_match_table =3D rockchip_cpuid_of_match_table, + }, + .probe =3D rockchip_cpuid_probe, + .remove =3D rockchip_cpuid_remove, +}; +module_nvmem_layout_driver(rockchip_cpuid_layout); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Alexey Charkov "); +MODULE_DESCRIPTION("NVMEM layout driver for the CPU ID in Rockchip OTP mem= ory"); --=20 2.54.0 From nobody Sat Sep 26 10:03:03 2026 Received: from mail-wr1-f49.google.com (mail-wr1-f49.google.com [209.85.221.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B1D449CF55 for ; Wed, 2 Sep 2026 13:08:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788354503; cv=none; b=gCCs1RH+jaA370Rx5i5fOCTxrJhbR0afshoJ/iCBVeu+saqZ7NLGSOzc7hQD8+BVrwuwhVeqV280ic2boo6R/IRFRlqIMbcohDh7UjAf31vT1ZUPPCkGhMe7gN0zYrRuh7lBybHIcnQmGAr3E9WGGwrEecWkIpA1hZvpO/BwocI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788354503; c=relaxed/simple; bh=92HKX+rJXSdlXE5EQ1Vyyu1clzsl9p8JunUiEHK0e+k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=im9WUYXDSx317iGJs/89p8BfT57unSiF3mAjkyV9dgCEnpix8WAmmUU8keA0MQFIcKp/hDfhgFvnZxyOWbz9ucE28ZHQsMjX87jQxeeVxFjsMkR9pgwhWB/jwaiaDxReB+x5IT+9Ustz/Efa5Qd8iXgA1Cg89pLvFjQGPT0yV/c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=flipper.net; spf=pass smtp.mailfrom=flipper.net; dkim=pass (2048-bit key) header.d=flipper.net header.i=@flipper.net header.b=n6g7xOvl; arc=none smtp.client-ip=209.85.221.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=flipper.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flipper.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=flipper.net header.i=@flipper.net header.b="n6g7xOvl" Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-4843e397f74so1203262f8f.1 for ; Wed, 02 Sep 2026 06:08:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flipper.net; s=google; t=1788354500; x=1788959300; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=+GqdLb9S+dkzyo/uMEE+zALrMBgJbCVE5U0lvdKhWKM=; b=n6g7xOvl9ih0ghdVOYT1XhmnG0QylbUU0JLRsVw1nbXqAt0f0ahh5xgW/WlGqf2cie oQekWrhOjl/qT3S53K1UsVwVAgKOp3e8u2hVDh3C9EICI0dnqtW3yvn0YoTZv+uHNvn0 IjDs+7XYGBN6+0Ae7exZ13j8gTBm7yu1EQEaj2vkFrpIygRbeaG9pmYz+bFCRWi4V45I xyT5SIOKDfEOYI0BMbtzy43NmDstTLnkm4StjFOnvuLbkSMeaeVP0EmHBv4DOumdaHFs qJWkD1bbtLzGJ6WsQMIKGPkqGHj2aULs5iDnzz0ST5fIoyv1538Njzol8Wjz4fT3QHoY KZ0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788354500; x=1788959300; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=+GqdLb9S+dkzyo/uMEE+zALrMBgJbCVE5U0lvdKhWKM=; b=RSSSSJO2CgjLhSXpfAYl7imgXWX8NqTMTLxWIoXNTEK53sEZwbPjH4v3Eofp3KDzcK 8iGKcHlp3DYPUDDPNcJ2QsBiNpIqc6n5B11o+Pmou5hLq7sIuzDv2sLzHeODda88w0r3 G8TkFAqNnU9zN54mSTpv+TjInrKOpf7Gj1l6HZu6mflkUwxhgKMcEla1RlAqHmrnlxxA e9cGi3DL0sysmE2yUDNvh4+1Qtt6V8iZqtvuA2ifSt/qKT8pw5qGXzZWPiOoH0jTVUmZ zRUpe7juKfmhw9KExZMTJqUN4ntQBd/piKp3Ff6Wzty13NIchvBko7tIJ6wwS0+D5dgg slAw== X-Forwarded-Encrypted: i=1; AKwUvBydahWuzyonYMGvZ71vzfTb+aEody67vl/HCjbuolIQmWI1yJBUme8JJ3FCFduM2tnMb3i+tmKeLA5I8J8=@vger.kernel.org X-Gm-Message-State: AFuF++n5V6tcHGMQSKsETYYwWlCA6KKysqh6IB6YlawfFGKSiWVg1Y6T sMj6Quqdku1IWDQAuvJrpRaYlxGZJxrVh8Fc718G2dZBKaWgd2tmq0Ge6P/nYO3T6TI= X-Gm-Gg: AYBFou3NdaPZqKHB3lklskFJKxMJ9DnN6FZNeZfR+ogegRzVebnesW5uXTpuJTTjsms LTlIoKp4nyxKViZOthEqCYU1NF3yfnGU0xCp3bHVdCk8uo4nv+5/RIW8AYW21+/0CJdTaUtKyZH yKhoyIoYy3Jpf+wZqgGTEKtQj7gL3wGhPz9JP8Zc1WJEmv1Ak4sDD2An1LwAMj8M4VhBeHVeXHE 9fGHaQ6V8rlQ5xbXb+ymmOufiQdV4IvLQLPFsRA3FA+oNnYd4YMQZQtZ6OW7OIhX2Bih5NaNNWM OQyDyV4ULxoPXzFd5rdLfkt2Ah4g7rMjxjPD6NfUL155Z5GNbs72q1jwX3sCxjfod7bKBi/DgE4 LtZwzE59z10P+/pfX11/1yOxRBcSr/nbcgST47WvQO7FiMGRSf9U9Iss1dzDb2+yBbVLF0LzDaQ GMaptuFs/whOByL7nRFU117jjWgXi3SqZRfucvTA5nn88C3ATJFRhSKJ4XKiXwBWjl7oDDgKTMA WVm22tGmN1LW6SYimJoZLlioPwFU7dXlilw3CfqVA== X-Received: by 2002:a05:6000:387:b0:482:ea3e:882a with SMTP id ffacd0b85a97d-485781de9c7mr5755351f8f.6.1788354500289; Wed, 02 Sep 2026 06:08:20 -0700 (PDT) Received: from alchark-surface.localdomain (bba-2-51-220-108.alshamil.net.ae. [2.51.220.108]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48448e72b5bsm6385800f8f.4.2026.09.02.06.08.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 06:08:19 -0700 (PDT) From: Alexey Charkov Date: Wed, 02 Sep 2026 17:07:55 +0400 Subject: [PATCH v2 4/4] arm64: dts: rockchip: Derive GMAC MAC addresses from OTP on RK3576 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-rk3576-otp-cpuid-mac-v2-4-e4b7fe2ab13f@flipper.net> References: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> In-Reply-To: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Walle , Miquel Raynal , Finley Xiao , Greg Kroah-Hartman Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Alexey Charkov X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2071; i=alchark@flipper.net; h=from:subject:message-id; bh=92HKX+rJXSdlXE5EQ1Vyyu1clzsl9p8JunUiEHK0e+k=; b=owGbwMvMwCW2adGNfoHIK0sZT6slMWTNkN+stdDlfUizrGpdwOQDO7Wsb6x5/WrOvdW/mBVvR Uo9dBd26pjIwiDGxWAppsgy99sS26lGfLN2eXh8hZnDygQyRFqkgQEIWBj4chPzSo10jPRMtQ31 DI10jHWMGLg4BWCqP59mZHjJZMe74LTovK18N9U/6Wg8Dag9/iaBV+x//f7tD2Qtl7Iy/M9OYIj 4m7OmNjlfYPKW1exzZr8VEjH38ol2EzqvYtedxA4A X-Developer-Key: i=alchark@flipper.net; a=openpgp; fpr=9DF6A43D95320E9ABA4848F5B2A2D88F1059D4A5 Rockchip SoCs derive stable MAC addresses from the CPU ID in OTP memory, which a bootloader would normally process and patch the live device tree based on it. This depends on the particular bootloader implementation though, and the derivation itself is not described in the device tree. Add explicit nvmem layout for the CPU ID derived MAC addresses on RK3576, so that any OS can implement the same derivation without depending on the bootloader used. Boards which store a MAC address of their own can override the reference with a cell of their choosing. Signed-off-by: Alexey Charkov --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts= /rockchip/rk3576.dtsi index d418bfc04097..aa6d867b5a30 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1845,6 +1845,8 @@ gmac0: ethernet@2a220000 { interrupts =3D , ; interrupt-names =3D "macirq", "eth_wake_irq"; + nvmem-cells =3D <&otp_mac_address 0>; + nvmem-cell-names =3D "mac-address"; power-domains =3D <&power RK3576_PD_SDGMAC>; resets =3D <&cru SRST_A_GMAC0>; reset-names =3D "stmmaceth"; @@ -1893,6 +1895,8 @@ gmac1: ethernet@2a230000 { interrupts =3D , ; interrupt-names =3D "macirq", "eth_wake_irq"; + nvmem-cells =3D <&otp_mac_address 1>; + nvmem-cell-names =3D "mac-address"; power-domains =3D <&power RK3576_PD_SDGMAC>; resets =3D <&cru SRST_A_GMAC1>; reset-names =3D "stmmaceth"; @@ -2131,6 +2135,14 @@ soc_tsadc_trim: soc-tsadc-trim@64 { reg =3D <0x64 0x2>; bits =3D <0 10>; }; + + nvmem-layout { + compatible =3D "rockchip,rk3576-otp-cpuid"; + + otp_mac_address: mac-address { + #nvmem-cell-cells =3D <1>; + }; + }; }; =20 sai0: sai@2a600000 { --=20 2.54.0