From nobody Sat Sep 26 10:02:29 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3182D15C14F for ; Wed, 2 Sep 2026 09:57:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788343067; cv=none; b=hH12fo3WlKv1fhQOY4K4xl9lPj7dJRbr3E6mwlGgN370jqgLExVwTxf7QUp/ZzRbT+nHMtCUfjjqqeHpl8PC5uk13PRiccJhDEFqCLCRZ4l9AGRDuq7SisKZfN5fpehLiWLZXRG3OQ5QUhboRDZ86XB4GYDLcyprgprmFsz4DOc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788343067; c=relaxed/simple; bh=I28qNWvUt4LC9kmZmythP4voD2ADlBgQIZ3P3FwpCqc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Pm6DNfJx6N5HonR/V1QHd8gXr+XomTYvydzW1e4Phewxk6XpMGosSk+Cf2jBW6kGOwngbODcoOaVGrbdwMIri3PwR2d9mglos5cjQVug0FyoWIgdEPmRrG2Fa3qbfHe55uE6uaL0n8PMro1aGUk7ylcGsqNX7TzzskMLNTTUnPQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=m4dqfFoB; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="m4dqfFoB" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 53BDF1A1953; Wed, 2 Sep 2026 09:57:43 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 20B136053C; Wed, 2 Sep 2026 09:57:43 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id CABF111C792F3; Wed, 2 Sep 2026 11:57:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788343062; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=ZR5x64Lg3Tk7Sqz9cGWUyByPFFb6+HVUsdxJ3gbitLM=; b=m4dqfFoBaKi5navwViTMIVt0x6YDw25siYSElUyQ7Em82JfbIKHBgUMzyTBC09amCKsuj3 9GtlN48fMjhSyeK68rVcKu3T5Gzt+QkcSQDCYUTjAvvQtuA2P4Ghjk57uOyi4yPeG5KPfH fx6F9ttobbVb3PQBKoY6ejMPqaEtWCX4lXWjry7UZmENQkQ4TOgteNs0y8KFG6rKFxAlGk 882hI8VzWaQ7cdcHmwojZMH0O+LQ3eUO2e0KslKkB6qEcq/cmx6k7GI1D1cj8SHpedZe28 /vhBtU8EmQApB8wL2/7dEIbg+Bd6U8RNlR99SkVjWRQsJTlchLieTMo+Zw5mqA== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 02 Sep 2026 11:57:31 +0200 Subject: [PATCH net-next v2 01/10] net: dsa: microchip: add the number of pins to chip infos Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-1-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The number of periodic output pins available is hardcoded to 2 while KSZ8463 has 12 pins that can be used as periodic outputs. Add an n_pin attribute to the struct ksz_chip_data to make this setting configurable. Set it to 2 for all the PTP-capable switches. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 10 ++++++++++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 4 ++-- 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 1a9d6f83a023..d01fba253af5 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1194,6 +1194,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .ptp_capable =3D true, .wr_table =3D &ksz8563_register_set, .rd_table =3D &ksz8563_register_set, + .n_pins =3D 2, }, =20 [KSZ8795] =3D { @@ -1414,6 +1415,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .sgmii_port =3D 7, .wr_table =3D &ksz9477_register_set, .rd_table =3D &ksz9477_register_set, + .n_pins =3D 2, }, =20 [KSZ9896] =3D { @@ -1544,6 +1546,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, false}, .gbit_capable =3D {true, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [KSZ8567] =3D { @@ -1581,6 +1584,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .gbit_capable =3D {false, false, false, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [KSZ9567] =3D { @@ -1615,6 +1619,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { true, false, false}, .gbit_capable =3D {true, true, true, true, true, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9370] =3D { @@ -1646,6 +1651,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_rgmii =3D {false, false, false, false, true}, .internal_phy =3D {true, true, true, true, false}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9371] =3D { @@ -1677,6 +1683,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_rgmii =3D {false, false, false, false, true, true}, .internal_phy =3D {true, true, true, true, false, false}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9372] =3D { @@ -1712,6 +1719,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9373] =3D { @@ -1747,6 +1755,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, false, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9374] =3D { @@ -1782,6 +1791,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9646] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index cbe98494578c..c678fc6597dc 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -139,6 +139,7 @@ struct ksz_chip_data { u8 sgmii_port; const struct regmap_access_table *wr_table; const struct regmap_access_table *rd_table; + const u8 n_pins; }; =20 struct ksz_irq { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 39cc70d65900..c92936bf78d3 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1050,14 +1050,14 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) ptp_data->caps.do_aux_work =3D ksz_ptp_do_aux_work; ptp_data->caps.enable =3D ksz_ptp_enable; ptp_data->caps.verify =3D ksz_ptp_verify_pin; - ptp_data->caps.n_pins =3D KSZ_PTP_N_GPIO; + ptp_data->caps.n_pins =3D dev->info->n_pins; ptp_data->caps.n_per_out =3D 3; =20 ret =3D ksz_ptp_start_clock(dev); if (ret) return ret; =20 - for (i =3D 0; i < KSZ_PTP_N_GPIO; i++) { + for (i =3D 0; i < dev->info->n_pins; i++) { struct ptp_pin_desc *ptp_pin =3D &ptp_data->pin_config[i]; =20 snprintf(ptp_pin->name, --=20 2.55.0 From nobody Sat Sep 26 10:02:29 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8586D42FCA9 for ; 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bh=BlT4DlPDgE82qA3Y46UcHC0kXIZUrf5Dya5wq4mWlu8=; b=1vqY+pgYs9WMcy7HdEVlKB7LoCtsYChJ85A0+/sp922fVp9I8+PYj97t87qHmnX2F4E3WA LylUQIwCjjnWznWHAfSLdz6xJExpF4wdGKyf8R9s9Bt8sZyQ0yWnJ9t3muDfoaErmzBlqm EGOwpjEHVKgcLg26xwm6ZMqOJvacXPNjVBniEZvAfgglLIjv7nbCNzcyYvucB+FIEAbJmk XRDwv3G27RpUzzKN0DD4Gaoi0C8nZNgm1xpX3ecYD94RbgR18wZ0KoAPIual2KaczuUrxy fleZvbA2ZDyuyyv8KlYUgka4LJdjFMjS7a6BdunUNhpmbf/0DRe+reCeVxRhIw== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 02 Sep 2026 11:57:32 +0200 Subject: [PATCH net-next v2 02/10] net: dsa: microchip: add the number of periodic signals to chip infos Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-2-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The number of periodic signals available is hardcoded to 3 while KSZ8463 can produce 12 different periodic signals. Add an n_per_out attribute to the struct ksz_chip_data to make this setting configurable. Set it to 3 for all the PTP-capable switches. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 10 ++++++++++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 2 +- 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index d01fba253af5..041bb4f96365 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1195,6 +1195,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .wr_table =3D &ksz8563_register_set, .rd_table =3D &ksz8563_register_set, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ8795] =3D { @@ -1416,6 +1417,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .wr_table =3D &ksz9477_register_set, .rd_table =3D &ksz9477_register_set, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ9896] =3D { @@ -1547,6 +1549,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .gbit_capable =3D {true, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ8567] =3D { @@ -1585,6 +1588,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ9567] =3D { @@ -1620,6 +1624,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .gbit_capable =3D {true, true, true, true, true, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9370] =3D { @@ -1652,6 +1657,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9371] =3D { @@ -1684,6 +1690,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false, false}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9372] =3D { @@ -1720,6 +1727,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { false, false, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9373] =3D { @@ -1756,6 +1764,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { false, false, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9374] =3D { @@ -1792,6 +1801,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { false, false, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9646] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index c678fc6597dc..1155b39350c2 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -140,6 +140,7 @@ struct ksz_chip_data { const struct regmap_access_table *wr_table; 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b=GZJeXJ8iMiUM3Th6SL5077DMfUa3ixshGVSaGbC34rgRPTrGQ0ddgOLwleBEiIY3kdFCQh Ai12CFB512rF2A/OoKFRACE1iRYX+5BvvQIxx5Xg2JhMTTKVUyLxnPSG+5nD9+w6z41VC0 zer/fR5TY0LnB60XiPY6tw04YXLT8q57XHsfoMTEGtXS+lNJcTUhpI7mVQiACUwJULsQh4 2kJNMeU/e7r1Vx5U839u6tS5mPf++HquOyAHkhEVYDh5sGnOqJtC7j+M/DQRiEY0mo56ZK YDxk68jnP61aP+d5MNjemRNEryCUnibFAjWPnaTtYvnoKnDw4fi5YjAy9PnwZg== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 02 Sep 2026 11:57:33 +0200 Subject: [PATCH net-next v2 03/10] net: dsa: microchip: use dynamic mask to check pulse width validity Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-3-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The pulse width validity is checked against an hardcoded mask. KSZ8463 uses a smaller register than other switches so this check won't work for it. Move the mask as a ksz_ptp_tou_pulse_verify()'s input to allow changing it for KSZ8463 case. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index f80015250e5a..7bf83e0b5918 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -86,7 +86,7 @@ static int ksz_ptp_tou_reset(struct ksz_device *dev, u8 u= nit) 0); } =20 -static int ksz_ptp_tou_pulse_verify(u64 pulse_ns) +static int ksz_ptp_tou_pulse_verify(u64 pulse_ns, u32 mask) { u32 data; =20 @@ -94,7 +94,7 @@ static int ksz_ptp_tou_pulse_verify(u64 pulse_ns) return -EINVAL; =20 data =3D (pulse_ns / 8); - if (!FIELD_FIT(TRIG_PULSE_WIDTH_M, data)) + if ((mask & data) !=3D data) return -ERANGE; =20 return 0; @@ -245,7 +245,7 @@ static int ksz_ptp_enable_perout(struct ksz_device *dev, KSZ_MAX_PULSE_WIDTH); } =20 - ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns); + ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns, TRIG_PULSE_WIDTH_M); if (ret) return ret; =20 --=20 2.55.0 From nobody Sat Sep 26 10:02:29 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8582438010; Wed, 2 Sep 2026 09:57:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788343073; cv=none; b=K6GhbQEn1Ft1lCbep/KMPQ8TzU+YOcfb7HQZ7QpoHjf9jdFKNAx/kyVUO2otleAna1hJ8vl8foXGFsunI/Fo+WQIMw7VfsMaP5dZ4AeInBy/P6nu/RnRQBaT2llQbdLWkMfK3qqx9gBPoJae9yOZwD1M6P9DBrMAW/1Hf4SBXNQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788343073; c=relaxed/simple; bh=4ov+NSQSBX9Qvd8THsxWYSJTFFg1Yr0ldf+mlrYxNTE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ElsftlEnz1Dhq+qoT+JbkTDtjQYx0UVFs+TNoVqfdLsSmqrZ8rOF00LkXiEhLDtQjoKxvFdLwTZDS9Es4VXhkJ2MJZwz5YAHsPWi+s2Njk5JSztgpxZibqEW90Ob8IOTsazDKwnTNlXbRvFvU7eYfJjnGldg/ekTStTs2b0NvhQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=u6adEG5s; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="u6adEG5s" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 3F9481A1953; Wed, 2 Sep 2026 09:57:49 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 13F786053C; Wed, 2 Sep 2026 09:57:49 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 83AA011C792F3; Wed, 2 Sep 2026 11:57:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788343068; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=RZ7rb6VbA9/VWHZ6BBtewbfE+bCLAayiZRWpfJptYvM=; b=u6adEG5s1csP0qPRdW1eEReTkR6nzs5vg9t8eK+19v6wLiabD+XhqJt2Kp9UKopy+ezdpY 83lZtWrI4TNlf4eAnEBe4HD7cZ1GEYjtPQvFttny4vFqfsLJuy/FX8ayyLa8KLSD75tj2g JDgBMVR5w90lEnFADcbxDbO9D4nFUqFE6PfHfVdZJWNBovCssGpY1Xeka7QtYytyDyZdlc KnEQPrXzNuHe1za1S5mBfAOHFP6indRXxgtQr3rnm0bkje34RA6oTfDT/ov8H1v7wlkpsQ ZUM8MLAkOYq1vV/hkch70pViYufoEgjwIN/qeQF02gaB0hvQkeGiRpgVTjQLNg== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 02 Sep 2026 11:57:34 +0200 Subject: [PATCH net-next v2 04/10] net: dsa: microchip: extract PTP callbacks configuration from PTP registration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-4-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 also has periodic output capabilities but the way its outputs are driven differs from the other switches. It will need its own set of PTP callbacks to implements this behaviour. Extract the PTP callbacks configuration in a dedicated function to be called before the PTP registration to ease the use of others callbacks when needed. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 2 ++ drivers/net/dsa/microchip/ksz9477.c | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 20 ++++++++++++++------ drivers/net/dsa/microchip/ksz_ptp.h | 2 ++ drivers/net/dsa/microchip/lan937x_main.c | 1 + 5 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index 941ae9f66f70..f2a23e2e474a 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -2478,6 +2478,7 @@ static int ksz8463_setup(struct dsa_switch *ds) if (ret) goto free_girq; =20 + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", @@ -2775,6 +2776,7 @@ static int ksz8_setup(struct dsa_switch *ds) } =20 if (dev->info->ptp_capable) { + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchi= p/ksz9477.c index 3ee995545c57..72528a53b67d 100644 --- a/drivers/net/dsa/microchip/ksz9477.c +++ b/drivers/net/dsa/microchip/ksz9477.c @@ -1781,6 +1781,7 @@ static int ksz9477_setup(struct dsa_switch *ds) } =20 if (dev->info->ptp_capable) { + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 7bf83e0b5918..ea22601f6b26 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1028,17 +1028,12 @@ static int ksz_ptp_start_clock(struct ksz_device *d= ev) return 0; } =20 -int ksz_ptp_clock_register(struct dsa_switch *ds) +void ksz_ptp_set_caps(struct dsa_switch *ds) { struct ksz_device *dev =3D ds->priv; - const u16 *regs =3D dev->info->regs; struct ksz_ptp_data *ptp_data; - int ret; - u8 i; =20 ptp_data =3D &dev->ptp_data; - mutex_init(&ptp_data->lock); - spin_lock_init(&ptp_data->clock_lock); =20 ptp_data->caps.owner =3D THIS_MODULE; snprintf(ptp_data->caps.name, 16, "Microchip Clock"); @@ -1052,6 +1047,19 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) ptp_data->caps.verify =3D ksz_ptp_verify_pin; ptp_data->caps.n_pins =3D dev->info->n_pins; ptp_data->caps.n_per_out =3D dev->info->n_per_out; +} + +int ksz_ptp_clock_register(struct dsa_switch *ds) +{ + struct ksz_device *dev =3D ds->priv; + const u16 *regs =3D dev->info->regs; + struct ksz_ptp_data *ptp_data; + int ret; + u8 i; + + ptp_data =3D &dev->ptp_data; + mutex_init(&ptp_data->lock); + spin_lock_init(&ptp_data->clock_lock); =20 ret =3D ksz_ptp_start_clock(dev); if (ret) diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchi= p/ksz_ptp.h index 7067ec9bd1e6..89716b31596b 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.h +++ b/drivers/net/dsa/microchip/ksz_ptp.h @@ -33,6 +33,7 @@ struct ksz_ptp_data { struct timespec64 perout_period; }; =20 +void ksz_ptp_set_caps(struct dsa_switch *ds); int ksz_ptp_clock_register(struct dsa_switch *ds); =20 void ksz_ptp_clock_unregister(struct dsa_switch *ds); @@ -65,6 +66,7 @@ struct ksz_ptp_data { struct mutex lock; }; =20 +static inline void ksz_ptp_set_caps(struct dsa_switch *ds) { } static inline int ksz_ptp_clock_register(struct dsa_switch *ds) { return 0; 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Wed, 2 Sep 2026 09:57:51 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 13E4F6053C; Wed, 2 Sep 2026 09:57:51 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 9A53311C79321; Wed, 2 Sep 2026 11:57:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788343070; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=o9jL6igQLJRDua5JaF1IyEJ/zeHLPSI/dmv7m8kdRo8=; b=tD7rn33CWs64nV0nzLDUaHc7WhqOlgCZIzpFTdW5rgkj+VSEZS5uFFlWvongGvKHFoWrOr scq+4YuOMtzpoDA5EeRej10/ko1zOxWtaXUjMP2rFUKWpufH0VGDGwvsBn9fAWNY9bv0Qo bwc85OovAq3U26vddB1DeAwO5grc9ibSEFR9tDuIzIXsm33tMstGQRrxdrtlQzA2lsODxM DF8HsPHtjMIMHY6FGhgT7zpWIxYM1iXm8vfFhwMy2S6amxbuwfJUCLexmOIYAZhFZqDwSf /FSQRiLrIDbkAC6SIYaUrmxycqu9gQPP7wa5BNY7RBs1dauaZIEflAYTXLyScQ== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 02 Sep 2026 11:57:35 +0200 Subject: [PATCH net-next v2 05/10] net: dsa: microchip: extract ptp_get_pin Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-5-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_enable_perout() function needs to be created. This function will use the same algorithm to select the output pin as the common ksz_ptp_enable_perout() function. Extract the pin selection algorithm into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index ea22601f6b26..f97ea9d69ebc 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -183,17 +183,11 @@ static int ksz_ptp_configure_perout(struct ksz_device= *dev, return 0; } =20 -static int ksz_ptp_enable_perout(struct ksz_device *dev, - struct ptp_perout_request const *request, - int on) +static int ksz_ptp_get_pin(struct ksz_device *dev, + struct ptp_perout_request const *request) { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; - u64 req_pulse_width_ns; - u64 cycle_width_ns; - u64 pulse_width_ns; - int pin =3D 0; - u32 data32; - int ret; + int pin; =20 if (request->flags & ~PTP_PEROUT_DUTY_CYCLE) return -EOPNOTSUPP; @@ -206,6 +200,25 @@ static int ksz_ptp_enable_perout(struct ksz_device *de= v, if (pin < 0) return -EINVAL; =20 + return pin; +} + +static int ksz_ptp_enable_perout(struct ksz_device *dev, + struct ptp_perout_request const *request, + int on) +{ + struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + u64 req_pulse_width_ns; + u64 cycle_width_ns; + u64 pulse_width_ns; + int pin =3D 0; + u32 data32; + int ret; + + pin =3D ksz_ptp_get_pin(dev, request); + if (pin < 0) + return pin; + data32 =3D FIELD_PREP(PTP_GPIO_INDEX, pin) | FIELD_PREP(PTP_TOU_INDEX, request->index); ret =3D ksz_rmw32(dev, REG_PTP_UNIT_INDEX__4, --=20 2.55.0 From nobody Sat Sep 26 10:02:29 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 328D74334C5 for ; Wed, 2 Sep 2026 09:57:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-6-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_enable_perout() function needs to be created. This function will use the same algorithm to compute the periodic cycles as the common ksz_ptp_enable_perout() function. Extract these algorithms into dedicated functions so they can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 67 ++++++++++++++++++++++++---------= ---- 1 file changed, 43 insertions(+), 24 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index f97ea9d69ebc..2f141df65eb0 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -203,12 +203,49 @@ static int ksz_ptp_get_pin(struct ksz_device *dev, return pin; } =20 +static int ksz_ptp_compute_perout_cycle(struct ksz_device *dev, + struct ptp_perout_request const *request, + u64 *cycle_width_ns) +{ + struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + + ptp_data->perout_target_time_first.tv_sec =3D request->start.sec; + ptp_data->perout_target_time_first.tv_nsec =3D request->start.nsec; + + ptp_data->perout_period.tv_sec =3D request->period.sec; + ptp_data->perout_period.tv_nsec =3D request->period.nsec; + + *cycle_width_ns =3D timespec64_to_ns(&ptp_data->perout_period); + if ((*cycle_width_ns & TRIG_CYCLE_WIDTH_M) !=3D *cycle_width_ns) { + *cycle_width_ns =3D 0; + return -EINVAL; + } + + return 0; +} + +static u64 ksz_ptp_compute_perout_pulse(struct ksz_device *dev, + struct ptp_perout_request const *request, + u64 max_pulse_width) +{ + u64 req_pulse_width_ns; + + if (request->flags & PTP_PEROUT_DUTY_CYCLE) + return request->on.sec * NSEC_PER_SEC + request->on.nsec; + + /* Use a duty cycle of 50%. Maximum pulse width supported by the + * hardware is a little bit more than 125 ms. + */ + req_pulse_width_ns =3D (request->period.sec * NSEC_PER_SEC + + request->period.nsec) / 2; + return min_t(u64, req_pulse_width_ns, max_pulse_width); +} + static int ksz_ptp_enable_perout(struct ksz_device *dev, struct ptp_perout_request const *request, int on) { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; - u64 req_pulse_width_ns; u64 cycle_width_ns; u64 pulse_width_ns; int pin =3D 0; @@ -234,29 +271,11 @@ static int ksz_ptp_enable_perout(struct ksz_device *d= ev, ptp_data->tou_mode =3D KSZ_PTP_TOU_IDLE; return 0; } - - ptp_data->perout_target_time_first.tv_sec =3D request->start.sec; - ptp_data->perout_target_time_first.tv_nsec =3D request->start.nsec; - - ptp_data->perout_period.tv_sec =3D request->period.sec; - ptp_data->perout_period.tv_nsec =3D request->period.nsec; - - cycle_width_ns =3D timespec64_to_ns(&ptp_data->perout_period); - if ((cycle_width_ns & TRIG_CYCLE_WIDTH_M) !=3D cycle_width_ns) - return -EINVAL; - - if (request->flags & PTP_PEROUT_DUTY_CYCLE) { - pulse_width_ns =3D request->on.sec * NSEC_PER_SEC + - request->on.nsec; - } else { - /* Use a duty cycle of 50%. Maximum pulse width supported by the - * hardware is a little bit more than 125 ms. - */ - req_pulse_width_ns =3D (request->period.sec * NSEC_PER_SEC + - request->period.nsec) / 2; - pulse_width_ns =3D min_t(u64, req_pulse_width_ns, - KSZ_MAX_PULSE_WIDTH); - } + ret =3D ksz_ptp_compute_perout_cycle(dev, request, &cycle_width_ns); + if (ret) + return ret; + pulse_width_ns =3D ksz_ptp_compute_perout_pulse(dev, request, + KSZ_MAX_PULSE_WIDTH); =20 ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns, TRIG_PULSE_WIDTH_M); if (ret) --=20 2.55.0 From nobody Sat Sep 26 10:02:29 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 18834437467 for ; Wed, 2 Sep 2026 09:57:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788343079; cv=none; b=DzHLHVidTEwVkmc+qPY5c5uL1PNDehmOOMTvGnr+ePriloCgRcsz7j0awp136+Dv6Cb7WoP2avpTFnk7W2l9vojN0uowiH6bEmlm/quCyBUE5bcce8tqDFyqZCzO1W4+ymowNmpkAHXIVYsxGXIxjflEJedQ9KYdQUSjb3OJPXQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788343079; c=relaxed/simple; bh=j1+ZBVJmPVW03bJXf/56FabNKgWY7EFAGihdRcW3d0M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sogNue1nrrqupxSwyoYNy/XFcNpTwZn7PHsgt7cVmY5pOC9NvP76gR/qUJYKw9GudEbWsYpjUlJaPVcGhVMQMEEXUv/CEkfLtJJo6c7q+3SVcLmUAggYhxoe5gNFdDZeowpnOQngAkx8OrSiqTKW88Nt572pS8gtmZvDuR7FrXo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=N8+wLS2L; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="N8+wLS2L" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 888CE1A1953; Wed, 2 Sep 2026 09:57:54 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 5C2AB6053C; Wed, 2 Sep 2026 09:57:54 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 5FCAC11C79300; Wed, 2 Sep 2026 11:57:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788343073; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=B3aS/Mr7RC/ZOcg+EzhbjQUCCCKDV341PmBKKjmtwgs=; b=N8+wLS2Ll22TDwBLHiqNLg7OAedfUyffpzSliEukRmJdZMddNvq17l15e/8PW+RhsBaMnB 8Kvq72TBUWIgavrMZvJkNV6FSVc6NdRdV6DE4GEhe8eQiWwYaqoGcjEjF0+3z3m0ccRvQh 9PVMzY9RWGRdHq5DeLMgrFkfannxyFtaXD84eJmgpcViKC+8wzmtuKYSwkYj3VcCnrTtaO TuWHiIGg4Mn3vzK6A5Yf0CJ7bjrJrIH5SNFzKXGSIuMiLo8dP6CdMyta5U4v2nq8zenFwc Eh1eaj4OSw6Z2YCmosbkRn4JDqyHwGBU9OWlFRmfqmHLwJiBWYa2UfjR881Uow== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 02 Sep 2026 11:57:37 +0200 Subject: [PATCH net-next v2 07/10] net: dsa: microchip: extract prepare reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-7-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_restart_perout() function needs to be created. This function will use the same request initialization as the common ksz_ptp_restart_perout() function. Extract the inialization into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 2f141df65eb0..e262bc7448f2 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -788,11 +788,11 @@ static int ksz_ptp_gettime(struct ptp_clock_info *ptp= , struct timespec64 *ts) return ret; } =20 -static int ksz_ptp_restart_perout(struct ksz_device *dev) +static int ksz_ptp_prepare_restart_perout(struct ksz_device *dev, + struct ptp_perout_request *request) { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; s64 now_ns, first_ns, period_ns, next_ns; - struct ptp_perout_request request; struct timespec64 next; struct timespec64 now; unsigned int count; @@ -823,12 +823,24 @@ static int ksz_ptp_restart_perout(struct ksz_device *= dev) =20 /* Restart periodic output signal */ next =3D ns_to_timespec64(next_ns); - request.start.sec =3D next.tv_sec; - request.start.nsec =3D next.tv_nsec; - request.period.sec =3D ptp_data->perout_period.tv_sec; - request.period.nsec =3D ptp_data->perout_period.tv_nsec; - request.index =3D 0; - request.flags =3D 0; + request->start.sec =3D next.tv_sec; + request->start.nsec =3D next.tv_nsec; + request->period.sec =3D ptp_data->perout_period.tv_sec; + request->period.nsec =3D ptp_data->perout_period.tv_nsec; + request->index =3D 0; + request->flags =3D 0; + + return 0; +} + +static int ksz_ptp_restart_perout(struct ksz_device *dev) +{ + struct ptp_perout_request request; + int ret; + + ret =3D ksz_ptp_prepare_restart_perout(dev, &request); + if (ret) + return ret; =20 return ksz_ptp_enable_perout(dev, &request, 1); } --=20 2.55.0 From nobody Sat Sep 26 10:02:29 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5031B3A9DBA; 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bh=UE3d8uBd3AkiHRdBNbCVNULk3X2F/j5sdXNN38PNd5o=; b=mvCEQ4naV4Xqm4XB4laOSQ2m9P39ksFyMj4fBqh/3iFI/ahUzbyjtgB/i6VNw2qTOGthp7 Wr8L5w3UyGo+gdKSzDqhEnIZjEP4hKorHLd2jZ+NZGyYcTSOdtjOmlR3ryAvkzqF6+0gGU 2AZhd82e2zHEG5k6vr24xMOcHaWKRWJHaKcF9xR4j/cN+VW+WiD10ttPnQy4APJwSbAvja w8yC3LHgg4K+gZItf4YyeeD2q1RIhQcAkYPb7rqnbm1FMk6zgP1xXWIKn/Y660CYzIHdGQ nqn26XVjG56tfYoaDu1zgmr5XECohLOSpU+s4OzpBOItPi7VdnkKX6U3iqsanw== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 02 Sep 2026 11:57:38 +0200 Subject: [PATCH net-next v2 08/10] net: dsa: microchip: extract time update Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-8-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_settime() function needs to be created. This function will access the same registers than the common ksz_ptp_settime(). Extract the register accesses into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 30 +++++++++++++++++++++--------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index e262bc7448f2..aa73ad1f05d8 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -845,30 +845,42 @@ static int ksz_ptp_restart_perout(struct ksz_device *= dev) return ksz_ptp_enable_perout(dev, &request, 1); } =20 -static int ksz_ptp_settime(struct ptp_clock_info *ptp, - const struct timespec64 *ts) +static int __ksz_ptp_settime(struct ksz_device *dev, + const struct timespec64 *ts) { - struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); - struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); const u16 *regs =3D dev->info->regs; int ret; =20 - mutex_lock(&ptp_data->lock); - /* Write to shadow registers and Load PTP clock */ ret =3D ksz_write16(dev, regs[PTP_RTC_SUB_NANOSEC], PTP_RTC_0NS); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_write32(dev, regs[PTP_RTC_NANOSEC], ts->tv_nsec); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_write32(dev, regs[PTP_RTC_SEC], ts->tv_sec); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_LOAD_TIME, PTP_LOAD_TIME); + if (ret) + return ret; + + return 0; +} + +static int ksz_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_settime(dev, ts); if (ret) goto unlock; =20 --=20 2.55.0 From nobody Sat Sep 26 10:02:29 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC70F439F86; Wed, 2 Sep 2026 09:57:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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b=ub3n6nn5+EFAIW3jbI3PPkjdQKd/Q/d+KI+OQ3ZYymTAvphHVmIGqhYMC3q8ksb58bXZeR /Lw+b9N3YX0vxrHb9Xp0wIDQ+T2Nlibu2dz/jVJlpYzeMlUgyM+MuMychpOO1yPbeqB9/M fIM8SVbh4656VR9VV5hCkZj2EmOYqhD5C7WhrpuNo5Ez/w9JKtfiJeAJP3E09pBYmsPBR4 Y0bgE1F24yn+EczO/rPPgVMRlceLvLQ2ybiimOud+8nYDsfmJetP3J7jeSXOMTlHT2XBMB Pto8rC5MgNOypAATR9urk0D0LnKTzYLEN27MApP7kByeuxIgAU712lZwhTPYbg== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 02 Sep 2026 11:57:39 +0200 Subject: [PATCH net-next v2 09/10] net: dsa: microchip: extract time adjustment Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-9-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_adjtime() function needs to be created. This function will access the same registers as the common ksz_ptp_adjtime() function. Extract the register accesses into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index aa73ad1f05d8..0a77b46cfad2 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -946,18 +946,13 @@ static int ksz_ptp_adjfine(struct ptp_clock_info *ptp= , long scaled_ppm) return ret; } =20 -static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +static int __ksz_ptp_adjtime(struct ksz_device *dev, s64 delta) { - struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); - struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); - struct timespec64 delta64 =3D ns_to_timespec64(delta); const u16 *regs =3D dev->info->regs; s32 sec, nsec; u16 data16; int ret; =20 - mutex_lock(&ptp_data->lock); - /* do not use ns_to_timespec64(), * both sec and nsec are subtracted by hw */ @@ -965,15 +960,15 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp= , s64 delta) =20 ret =3D ksz_write32(dev, regs[PTP_RTC_NANOSEC], abs(nsec)); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_write32(dev, regs[PTP_RTC_SEC], abs(sec)); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_read16(dev, regs[PTP_CLK_CTRL], &data16); if (ret) - goto unlock; + return ret; =20 data16 |=3D PTP_STEP_ADJ; =20 @@ -984,6 +979,22 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp,= s64 delta) data16 |=3D PTP_STEP_DIR; =20 ret =3D ksz_write16(dev, regs[PTP_CLK_CTRL], data16); + if (ret) + return ret; + + return 0; +} + +static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + struct timespec64 delta64 =3D ns_to_timespec64(delta); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_adjtime(dev, delta); if (ret) goto unlock; =20 --=20 2.55.0 From nobody Sat Sep 26 10:02:29 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3167642C512 for ; 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bh=Xhk3GUOqCGFdUbXj3wIq5uMSCGnlHq+Y3cCP6LHT7ZI=; b=OF1y76gzxLqaywfI2lIJWshFGlWgtExbfRm0qDqfK17u+t8dzb4ioSRBSmS/axxEgb2hQH vHl+VCygwhRsevQcjR6ZDNW1lVwaofyF1cVgQNDnENkDIvdh+jv/QPME9LDFNaMs+UAjV+ ittS4tvOzZqGJkKG6zEs+0z7B3Wm1Imd9Hf7YncwKwJXQL4WUDjNw+X2AFu64iloanegRi OJpr/tDk97XfTvq8DNEbc1cg8gpa/EsNeigsE1dxnE6KoEopJbtUv1k64/yxZQEOZbyI3h +ydnsfALRQ5wCyYn2J+tvJIdpVamf4w5XzDE+pXGERNmMoEF1Lm5Ad7T3lIxLw== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 02 Sep 2026 11:57:40 +0200 Subject: [PATCH net-next v2 10/10] net: dsa: microchip: add periodic output support for the KSZ8463 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260902-ksz-perout-v2-10-6f277fcc9e68@bootlin.com> References: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> In-Reply-To: <20260902-ksz-perout-v2-0-6f277fcc9e68@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 has several periodic outputs. The way it handles them differ from the other KSZ switches: - KSZ8463 has one set of registers for each of its 12 units while others switches share on set of configuration registers for all their units. - Maximum size of the KSZ8463 pulse width is smaller - KSZ8463 has 12 outputs while others only have 2 Add support for the KSZ8463 periodics outputs through a set of KSZ8463 specific functions. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 2 +- drivers/net/dsa/microchip/ksz_common.c | 2 + drivers/net/dsa/microchip/ksz_ptp.c | 258 ++++++++++++++++++++++++++++= ++++ drivers/net/dsa/microchip/ksz_ptp.h | 3 +- drivers/net/dsa/microchip/ksz_ptp_reg.h | 16 ++ 5 files changed, 279 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index f2a23e2e474a..6b08bb8fed5b 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -2478,7 +2478,7 @@ static int ksz8463_setup(struct dsa_switch *ds) if (ret) goto free_girq; =20 - ksz_ptp_set_caps(ds); + ksz8463_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 041bb4f96365..9e234ad71b72 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1161,6 +1161,8 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_mii =3D {false, false, true}, .supports_rmii =3D {false, false, true}, .internal_phy =3D {true, true, false}, + .n_pins =3D 12, + .n_per_out =3D 12, }, =20 [KSZ8563] =3D { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 0a77b46cfad2..d33034892a8f 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -26,6 +26,7 @@ */ #define KSZ_MAX_DRIFT_CORR 6249999 #define KSZ_MAX_PULSE_WIDTH 125000000LL +#define KSZ8463_MAX_PULSE_WIDTH 500000LL =20 #define KSZ_PTP_INC_NS 40ULL /* HW clock is incremented every 40 ns (by 4= 0) */ #define KSZ_PTP_SUBNS_BITS 32 @@ -63,6 +64,17 @@ static int ksz_ptp_tou_gpio(struct ksz_device *dev) LED_SRC_PTP_GPIO_1 | LED_SRC_PTP_GPIO_2); } =20 +static int ksz8463_ptp_tou_reset(struct ksz_device *dev, u8 unit) +{ + int ret; + + ret =3D ksz_rmw16(dev, KSZ8463_TOU_SW_RST, BIT(unit), BIT(unit)); + if (ret) + return ret; + + return ksz_rmw16(dev, KSZ8463_TOU_SW_RST, BIT(unit), 0); +} + static int ksz_ptp_tou_reset(struct ksz_device *dev, u8 unit) { u32 data; @@ -120,6 +132,28 @@ static int ksz_ptp_tou_target_time_set(struct ksz_devi= ce *dev, return 0; } =20 +static int ksz8463_ptp_tou_start(struct ksz_device *dev, u8 unit) +{ + u16 data; + int ret; + + ret =3D ksz_rmw16(dev, KSZ8463_TOU_EN, BIT(unit), BIT(unit)); + if (ret) + return ret; + + ret =3D ksz_read16(dev, KSZ8463_TOU_ACTIVE, &data); + if (ret) + return ret; + + if (!(data & BIT(unit))) { + dev_err(dev->dev, "%s: Trigger unit%d error!\n", __func__, + unit); + return -EIO; + } + + return 0; +} + static int ksz_ptp_tou_start(struct ksz_device *dev, u8 unit) { u32 data; @@ -147,6 +181,56 @@ static int ksz_ptp_tou_start(struct ksz_device *dev, u= 8 unit) return 0; } =20 +static int ksz8463_ptp_configure_perout(struct ksz_device *dev, + u32 cycle_width_ns, u32 pulse_width_ns, + struct timespec64 const *target_time, + u8 index) +{ + struct ptp_pin_desc *pin =3D &dev->ptp_data.pin_config[index]; + u16 cfg_base =3D KSZ8463_TRIG1_CFG + KSZ8463_TRIGN_CFG_SIZE * pin->chan; + u16 data; + int ret; + + /* Hardware has only 32 bit */ + if ((target_time->tv_sec & 0xffffffff) !=3D target_time->tv_sec) + return -EINVAL; + + data =3D KSZ8463_NOTIFY_BIT | + FIELD_PREP(KSZ8463_PATTERN_M, TRIG_POS_PERIOD) | + pin->index; + ret =3D ksz_write16(dev, cfg_base + KSZ8463_PATTERN_OFF, data); + if (ret) + return ret; + + ret =3D ksz_write32(dev, cfg_base + KSZ8463_CYCLE_WIDTH_OFF, + cycle_width_ns); + if (ret) + return ret; + + /* Set cycle count 0 - Infinite */ + ret =3D ksz_write16(dev, cfg_base + KSZ8463_CYCLE_CNT_OFF, 0); + if (ret) + return ret; + + /* KSZ8463 uses a 8 ns unit value to compute the pulse width */ + data =3D (pulse_width_ns / 8); + ret =3D ksz_write16(dev, cfg_base + KSZ8463_PULSE_WIDTH_OFF, data); + if (ret) + return ret; + + ret =3D ksz_write32(dev, cfg_base + KSZ8463_TARGET_NSEC, + target_time->tv_nsec); + if (ret) + return ret; + + ret =3D ksz_write32(dev, cfg_base + KSZ8463_TARGET_SEC, + target_time->tv_sec); + if (ret) + return ret; + + return 0; +} + static int ksz_ptp_configure_perout(struct ksz_device *dev, u32 cycle_width_ns, u32 pulse_width_ns, struct timespec64 const *target_time, @@ -241,6 +325,58 @@ static u64 ksz_ptp_compute_perout_pulse(struct ksz_dev= ice *dev, return min_t(u64, req_pulse_width_ns, max_pulse_width); } =20 +static int ksz8463_ptp_enable_perout(struct ksz_device *dev, + struct ptp_perout_request const *request, + int on) +{ + struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + u64 cycle_width_ns; + u64 pulse_width_ns; + int pin; + int ret; + + pin =3D ksz_ptp_get_pin(dev, request); + if (pin < 0) + return pin; + + ret =3D ksz8463_ptp_tou_reset(dev, request->index); + if (ret) + return ret; + + if (!on) { + ptp_data->tou_mode =3D KSZ_PTP_TOU_IDLE; + return 0; + } + ret =3D ksz_ptp_compute_perout_cycle(dev, request, &cycle_width_ns); + if (ret) + return ret; + pulse_width_ns =3D ksz_ptp_compute_perout_pulse(dev, request, + KSZ8463_MAX_PULSE_WIDTH); + + ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns, + KSZ8463_TRIG_PULSE_WIDTH_M); + if (ret) + return ret; + + ret =3D ksz8463_ptp_configure_perout(dev, cycle_width_ns, pulse_width_ns, + &ptp_data->perout_target_time_first, + pin); + if (ret) + return ret; + + ret =3D ksz_ptp_tou_gpio(dev); + if (ret) + return ret; + + ret =3D ksz8463_ptp_tou_start(dev, request->index); + if (ret) + return ret; + + ptp_data->tou_mode =3D KSZ_PTP_TOU_PEROUT; + + return 0; +} + static int ksz_ptp_enable_perout(struct ksz_device *dev, struct ptp_perout_request const *request, int on) @@ -845,6 +981,18 @@ static int ksz_ptp_restart_perout(struct ksz_device *d= ev) return ksz_ptp_enable_perout(dev, &request, 1); } =20 +static int ksz8463_ptp_restart_perout(struct ksz_device *dev) +{ + struct ptp_perout_request request; + int ret; + + ret =3D ksz_ptp_prepare_restart_perout(dev, &request); + if (ret) + return ret; + + return ksz8463_ptp_enable_perout(dev, &request, 1); +} + static int __ksz_ptp_settime(struct ksz_device *dev, const struct timespec64 *ts) { @@ -871,6 +1019,41 @@ static int __ksz_ptp_settime(struct ksz_device *dev, return 0; } =20 +static int ksz8463_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_settime(dev, ts); + if (ret) + goto unlock; + + switch (ptp_data->tou_mode) { + case KSZ_PTP_TOU_IDLE: + break; + + case KSZ_PTP_TOU_PEROUT: + ret =3D ksz8463_ptp_restart_perout(dev); + if (ret) + goto unlock; + + break; + } + + spin_lock_bh(&ptp_data->clock_lock); + ptp_data->clock_time =3D *ts; + spin_unlock_bh(&ptp_data->clock_lock); + +unlock: + mutex_unlock(&ptp_data->lock); + + return ret; +} + static int ksz_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts) { @@ -985,6 +1168,40 @@ static int __ksz_ptp_adjtime(struct ksz_device *dev, = s64 delta) return 0; } =20 +static int ksz8463_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + struct timespec64 delta64 =3D ns_to_timespec64(delta); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_adjtime(dev, delta); + if (ret) + goto unlock; + + switch (ptp_data->tou_mode) { + case KSZ_PTP_TOU_IDLE: + break; + + case KSZ_PTP_TOU_PEROUT: + ret =3D ksz8463_ptp_restart_perout(dev); + if (ret) + goto unlock; + + break; + } + + spin_lock_bh(&ptp_data->clock_lock); + ptp_data->clock_time =3D timespec64_add(ptp_data->clock_time, delta64); + spin_unlock_bh(&ptp_data->clock_lock); + +unlock: + mutex_unlock(&ptp_data->lock); + return ret; +} + static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); @@ -1019,6 +1236,26 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *pt= p, s64 delta) return ret; } =20 +static int ksz8463_ptp_enable(struct ptp_clock_info *ptp, + struct ptp_clock_request *req, int on) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + int ret; + + switch (req->type) { + case PTP_CLK_REQ_PEROUT: + mutex_lock(&ptp_data->lock); + ret =3D ksz8463_ptp_enable_perout(dev, &req->perout, on); + mutex_unlock(&ptp_data->lock); + break; + default: + return -EOPNOTSUPP; + } + + return ret; +} + static int ksz_ptp_enable(struct ptp_clock_info *ptp, struct ptp_clock_request *req, int on) { @@ -1095,6 +1332,27 @@ static int ksz_ptp_start_clock(struct ksz_device *de= v) return 0; } =20 +void ksz8463_ptp_set_caps(struct dsa_switch *ds) +{ + struct ksz_device *dev =3D ds->priv; + struct ksz_ptp_data *ptp_data; + + ptp_data =3D &dev->ptp_data; + + ptp_data->caps.owner =3D THIS_MODULE; + snprintf(ptp_data->caps.name, 16, "Microchip Clock"); + ptp_data->caps.max_adj =3D KSZ_MAX_DRIFT_CORR; + ptp_data->caps.gettime64 =3D ksz_ptp_gettime; + ptp_data->caps.settime64 =3D ksz8463_ptp_settime; + ptp_data->caps.adjfine =3D ksz_ptp_adjfine; + ptp_data->caps.adjtime =3D ksz8463_ptp_adjtime; + ptp_data->caps.do_aux_work =3D ksz_ptp_do_aux_work; + ptp_data->caps.enable =3D ksz8463_ptp_enable; + ptp_data->caps.verify =3D ksz_ptp_verify_pin; + ptp_data->caps.n_pins =3D dev->info->n_pins; + ptp_data->caps.n_per_out =3D dev->info->n_per_out; +} + void ksz_ptp_set_caps(struct dsa_switch *ds) { struct ksz_device *dev =3D ds->priv; diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchi= p/ksz_ptp.h index 89716b31596b..92589cf373ac 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.h +++ b/drivers/net/dsa/microchip/ksz_ptp.h @@ -12,7 +12,7 @@ =20 #include =20 -#define KSZ_PTP_N_GPIO 2 +#define KSZ_PTP_N_GPIO 12 =20 enum ksz_ptp_tou_mode { KSZ_PTP_TOU_IDLE, @@ -34,6 +34,7 @@ struct ksz_ptp_data { }; =20 void ksz_ptp_set_caps(struct dsa_switch *ds); +void ksz8463_ptp_set_caps(struct dsa_switch *ds); int ksz_ptp_clock_register(struct dsa_switch *ds); =20 void ksz_ptp_clock_unregister(struct dsa_switch *ds); diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index 65ea8577af75..16f117fa5d49 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -51,6 +51,22 @@ =20 #define REG_PTP_UNIT_INDEX__4 0x0520 =20 +#define KSZ8463_TOU_ACTIVE 0x202 +#define KSZ8463_TOU_EN 0x206 +#define KSZ8463_TOU_SW_RST 0x208 + +#define KSZ8463_TRIGN_CFG_SIZE 0x20 +#define KSZ8463_TRIG1_CFG 0x220 +#define KSZ8463_TARGET_NSEC 0x000 +#define KSZ8463_TARGET_SEC 0x004 +#define KSZ8463_PATTERN_OFF 0x008 +#define KSZ8463_NOTIFY_BIT BIT(8) +#define KSZ8463_PATTERN_M GENMASK(6, 4) +#define KSZ8463_PULSE_WIDTH_OFF 0x00A +#define KSZ8463_TRIG_PULSE_WIDTH_M GENMASK(15, 0) +#define KSZ8463_CYCLE_WIDTH_OFF 0x00C +#define KSZ8463_CYCLE_CNT_OFF 0x010 + #define PTP_GPIO_INDEX GENMASK(19, 16) #define PTP_TSI_INDEX BIT(8) #define PTP_TOU_INDEX GENMASK(1, 0) --=20 2.55.0