From nobody Sat Sep 26 11:46:50 2026 Received: from BN1PR04CU002.outbound.protection.outlook.com (mail-eastus2azon11010038.outbound.protection.outlook.com [52.101.56.38]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9104449E5EB; Tue, 1 Sep 2026 19:29:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.56.38 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788290996; cv=fail; b=TQhptVFG9sigB3T9ktWQx2spGPj5Zk6TFkbQieuMRvSpG6i883D4fOGEhw4HFFfZbr8sQmJD8p23/uTZ4dQLd9X2Ec7U0I8EFyr0pSp6yvtPr2fBCavEtNbLLvINTV4ddR7eGUPtVKzsKMG88PzIC9KI/PaZ0eCjl6C4gpIVuvk= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788290996; c=relaxed/simple; bh=S98aUlrC/P8DAIDRiqA6MBuF9n3nN4DdEUYpGX5mVjc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aD6MRO5EaIQCXdR/kQeULR3OY1yfJphpE4VVa2HchHnYPaE/5f8fulMUhJ0NVca5Z8axa3joIqwbzzLESAxJO5BB38udpfvu9ZVexSZbP1jIakPkIZhr9s/HNvv36b4pSTFQsHfUnPuXZPJ+3ytJUZ3w5Q/f+F3rsiIFJo8iInc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=r8y43J9a; arc=fail smtp.client-ip=52.101.56.38 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="r8y43J9a" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=sk06zWymX3HGG/pSSuVbCLfKmttYONaWzxcqc6KnLRHWG+gtElodAj4Zl28qqdiPPOHpXBPzV6BHmafjbXJk73VWjmCRgf5QQoKSjH0kLk5Zyxqc44rKGpkJ9f4QDKRm9T1M6djWCOtbpdp39o23/YBhPWBswmrB7tlXm16uN6263SZ+e9i8nZjVH9QQSOOitkwkcUhiIF8lLXDOSzXHX4zGDcu0B96r6Ml0Sdv1J4VZ+ZJy2e9bcyveSODX/cz2wqnmDycswC0J6VOpy6o0lRhIxZGkSnVdiRcSTl/g6G1t8KX+CK9zEiRhlXD3uhwvtJArLK9N1kRlO8Rl2DmqUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=yI5E2roj7qAoB4uTIQksSLEJkJTR/dGIWafk1IZFcEE=; b=M0pmZl/GxNdDQcRHjcw4ToWeKIPCRCRbdDvn80rHBFTL4ZzXG7d00qb43x0XxBW6gqWemxkjn5EUgWk7sndakl8yRwWVwhyaxmAys2ad6x5rLZmnT8AbZQ2pXN2y6xEIC+FbDHccB6w+DuFjUL38MMPuHYo1YOMylwLj4eAu72/H53W1sv0WE6dmKOITz7ovgGkllW7uRw53T/uq7ACxs4xNuaD1HE8rVXAnkOpnoBuhubHCsYxMB1ZTAdzWgziNwAM3b4gPoFif9TjyiulI5+4a23eWdKaTO2UVR4teqzlOvrhaetZAKf6wo/rSmczupPtWFAMGACTJTc9vXOp+fA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=yI5E2roj7qAoB4uTIQksSLEJkJTR/dGIWafk1IZFcEE=; b=r8y43J9anooShvCyziBxTUaEfiAMof8FtG+zFrHMiKapvVrZctX6dFCXQaR3dzMmCryNfr5LiuIuI6CW+LXowwhZ2SSJ8xkcZEQ2fyPq6v/kVYexWxWP9776dFefOELPK0q6Xt7AXppG9FZGA+BWFpVrNrBNDlfydktWpoXEFiPSuxnG/TSAX+P+/PFvJBE855+vFbBQbs2ksUyQGCW2IvcGJrB8aWXbCaMlgPt1jbruvtytqb46sIPShOYfqfujS/hawJ01f8LWK0ZPZ17ShsaXMyVpsvLQc22kcFroPVl40smMq0JQryU5ngfY/grR5Bueoo1akBR9h3oMzmRm1Q== Received: from DM6PR08CA0047.namprd08.prod.outlook.com (2603:10b6:5:1e0::21) by DS0PR12MB8320.namprd12.prod.outlook.com (2603:10b6:8:f8::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.360.13; Tue, 1 Sep 2026 19:29:45 +0000 Received: from CY4PEPF0000EE3B.namprd03.prod.outlook.com (2603:10b6:5:1e0:cafe::3f) by DM6PR08CA0047.outlook.office365.com (2603:10b6:5:1e0::21) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.382.10 via Frontend Transport; Tue, 1 Sep 2026 19:29:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CY4PEPF0000EE3B.mail.protection.outlook.com (10.167.242.14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.382.8 via Frontend Transport; Tue, 1 Sep 2026 19:29:44 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 1 Sep 2026 12:29:14 -0700 Received: from rnnvmail205.nvidia.com (10.129.68.10) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 1 Sep 2026 12:29:14 -0700 Received: from dgx-1v-42.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46 via Frontend Transport; Tue, 1 Sep 2026 12:29:13 -0700 From: Jamie Nguyen To: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , "Catalin Marinas" , Will Deacon , "Rafael J . Wysocki" CC: Len Brown , Dat Mach , , , , Jamie Nguyen Subject: [PATCH v2 1/3] firmware: arm_ffa: Split the response out of ffa_msg_send_direct_req2() Date: Tue, 1 Sep 2026 12:29:04 -0700 Message-ID: <20260901192906.133670-2-jamien@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260901192906.133670-1-jamien@nvidia.com> References: <20260901192906.133670-1-jamien@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3B:EE_|DS0PR12MB8320:EE_ X-MS-Office365-Filtering-Correlation-Id: b00d0629-69e9-4c89-4423-08df085f60bd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|376014|23010399003|36860700016|82310400026|56012099006|5023799004|11063799006|6133799003|10067099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: JwEMyLU9ZgyYmC4FwdICdTCi7tIrofmLSgNX4NnX6vn6BMWySoC/yJU+f9w2PJsBl+nXq0R/aEO1k+HSybfVzYZAO881JZRBDekYRon289zM3rL/xi4sb7u2MZKv1bNOyEHpPgJeTB/3ffft5cK9phBsuBcgKzYh2BluxerFaFy6Op6txEQGk6GEkI4AGb3t6hozy1Y+opkRP9Dhqr9wIGe+vJL1te1+aQR0TwFUqTadkZZYYlDqa2m6cwzV6ctt1loWMlUVMYaDOWqa94YuRfMO5nrw4PAgoBV2RYT1QYhT9zuNJSFkKIXPdxKSCh/onCsLXlismulprLmu2HcS3JYeqirQz67OHvwjzzNPELZXNBFDtg3is/sqQk7HDTCnLf9I3po+YWbZWdevSHm1+FMQ6w5GymmEIv/FTQppqk4LzTiaYn7cYhBLuVzJOxgrYorPRYIqzq82K7lWQQvaoZ3J4rua4k5ebI3an1JzeCX6Jv6lx+qfo/9opqQKwDvG33SW4C5+8yll5aBxuYG2tnT/XCjpGreYS4Udr3+WMDjRyf/ReGgSk7jlXURaLgJh1F6dnQpUX7EUGV+Oq5cih3uf8ic2KQwXuDOYcX4G4y5kSWx8B74026sKRW1FnpMfwxLKg3ol4wr+1P8yEVIYSRDkeMgSGXk6RZR+I72JKKSYadEfiAyLJOCnRE2g8PY7Auw42W/fzDkIEi5UAP996Q== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(376014)(23010399003)(36860700016)(82310400026)(56012099006)(5023799004)(11063799006)(6133799003)(10067099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ZU3ifJTZzYI0FRwoBUBHgj06++dH87goEPV1diXtkYbGiwr2vCMNU+0B6Gaaer/pKeTJWbDdh+bhyPWP9BwZKE0paDTcTmV3FumYhKfA6wA1BsePFeLMIn9pCBq78QLlvEpZisQqeIqMc+Asx5mXqtwk3VFcrDhdImAMnO4qyTJX2fCgU/iMNuIkuBWvfz3SEf+VhOBj8rNPU1ZmQJr+XaIM4XE2ZrBE6dnH0NmOIkaF2fXNIOlf8mFTMHCxhyXEZakMw/DTKeKaXjDmJmseYqF7yYLPDAEJ7ku+Ne/1JdgWdPEI5oJEcIrg61JLmWgv4Jn0Z/WXNZhLA6mEyH3VucWIrHPy/1yUd3uYj0gF4FFaHtjN3dc3h0P1e4tG3LhAogRfBMxYY4WHrlsXnnQfRKkFyfp7JnpqaCbOohu/Ud4GHH5Fw80X6UdDgdN16pZx X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Sep 2026 19:29:44.6741 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b00d0629-69e9-4c89-4423-08df085f60bd X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3B.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8320 Content-Type: text/plain; charset="utf-8" ffa_msg_send_direct_req2() uses one buffer for both the request and the response, and it only ever reports a callee side FFA_ERROR as a translated errno. The ACPI FFH Operation Region handler added later in this series can work with neither. It has to hand every response register back to AML, including on the paths where the call failed. Move the body into __ffa_msg_send_direct_req2(). It writes the response to a buffer of its own, returns X1-X3 through @resp_regs, and separates three outcomes: success, a callee that returned FFA_ERROR (-EIO, with the FF-A error code left in @resp_regs[1]), and anything else (-EPROTO). ffa_msg_send_direct_req2() sits on top of that as a wrapper. It copies to the caller's buffer only on success and returns the same errnos it did before, so ffa_sync_send_receive2() and its users are untouched. No functional change. Assisted-by: Claude:claude-opus-5 Co-developed-by: Dat Mach Signed-off-by: Dat Mach Signed-off-by: Jamie Nguyen --- drivers/firmware/arm_ffa/driver.c | 51 ++++++++++++++++++++++++++----- 1 file changed, 44 insertions(+), 7 deletions(-) diff --git a/drivers/firmware/arm_ffa/driver.c b/drivers/firmware/arm_ffa/d= river.c index 8654b3365c9b6..3236cd0a731ab 100644 --- a/drivers/firmware/arm_ffa/driver.c +++ b/drivers/firmware/arm_ffa/driver.c @@ -560,8 +560,20 @@ static int ffa_msg_send2(struct ffa_device *dev, u16 s= rc_id, void *buf, size_t s return retval; } =20 -static int ffa_msg_send_direct_req2(u16 src_id, u16 dst_id, const uuid_t *= uuid, - struct ffa_send_direct_data2 *data) +/* + * Sends @req and reports the callee's X1-X3 through @resp_regs and its + * X4-X17 through @resp, both unconditionally, so that a caller bound by + * DEN0048D section 2.3.1.2 can copy every register back to AML even when = the + * callee returned FFA_ERROR. Keeping the response out of @req leaves the + * caller free to decide when, if ever, to overwrite its own buffer. Retur= ns + * -EIO for FFA_ERROR (the FF-A error code is left in @resp_regs[1] as X2)= and + * -EPROTO for an unexpected response; both mean the call was made. Callers + * that only need an errno should use ffa_msg_send_direct_req2(). + */ +static int __ffa_msg_send_direct_req2(u16 src_id, u16 dst_id, const uuid_t= *uuid, + const struct ffa_send_direct_data2 *req, + struct ffa_send_direct_data2 *resp, + u64 resp_regs[3]) { u32 src_dst_ids =3D PACK_TARGET_INFO(src_id, dst_id); union { @@ -574,21 +586,46 @@ static int ffa_msg_send_direct_req2(u16 src_id, u16 d= st_id, const uuid_t *uuid, .a2 =3D le64_to_cpu(uuid_regs.regs[0]), .a3 =3D le64_to_cpu(uuid_regs.regs[1]), }; - memcpy((void *)&args + offsetof(ffa_value_t, a4), data, sizeof(*data)); + memcpy((void *)&args + offsetof(ffa_value_t, a4), req, sizeof(*req)); =20 invoke_ffa_fn(args, &ret); =20 ffa_msg_send_wait_for_completion(&ret); =20 + resp_regs[0] =3D ret.a1; + resp_regs[1] =3D ret.a2; + resp_regs[2] =3D ret.a3; + memcpy(resp, (void *)&ret + offsetof(ffa_value_t, a4), sizeof(*resp)); + if (ret.a0 =3D=3D FFA_ERROR) - return ffa_to_linux_errno((int)ret.a2); + return -EIO; + + if (ret.a0 =3D=3D FFA_MSG_SEND_DIRECT_RESP2) + return 0; + + return -EPROTO; +} =20 - if (ret.a0 =3D=3D FFA_MSG_SEND_DIRECT_RESP2) { - memcpy(data, (void *)&ret + offsetof(ffa_value_t, a4), sizeof(*data)); +static int ffa_msg_send_direct_req2(u16 src_id, u16 dst_id, const uuid_t *= uuid, + struct ffa_send_direct_data2 *data) +{ + struct ffa_send_direct_data2 resp; + u64 resp_regs[3]; + int ret; + + ret =3D __ffa_msg_send_direct_req2(src_id, dst_id, uuid, data, &resp, + resp_regs); + if (!ret) { + *data =3D resp; return 0; } =20 - return -EINVAL; + if (ret =3D=3D -EIO) + return ffa_to_linux_errno((int)resp_regs[1]); + if (ret =3D=3D -EPROTO) + return -EINVAL; + + return ret; } =20 static int ffa_mem_first_frag(u32 func_id, phys_addr_t buf, u32 buf_sz, --=20 2.43.0 From nobody Sat Sep 26 11:46:50 2026 Received: from BL2PR02CU003.outbound.protection.outlook.com (mail-eastusazon11011065.outbound.protection.outlook.com [52.101.52.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F98B4A2050; Tue, 1 Sep 2026 19:29:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.52.65 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788290997; cv=fail; b=W3jigc4CxrnuUn1fRE2dnJ0iE9fAyTMDn2d0jDFmtGnORIOOsHGb1ul9ovkQiPZdesLziPBes2FgW8IrvOtR7aJLjTjYYm3yLWYKfGKknHm4QQr2Jup0xgA/hAeoekmBkyyFB4qq5+4v2O0hhTmRHa/hIX9TLz56n9GmtTTUN5U= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788290997; c=relaxed/simple; bh=0b3a6feinITLnwrW3IjPi8saqBFCARjvs+SjMAA/Rh0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ekrqJxK+/lP4SOsywyw7YOtV4ZbvklYFM3AxDOKrV54LpJrkmztODomyYZa+E/cdwBdII7cHOHXM692ZnxJui1mNmmQAkc83MNY84neIZrDaQki6l5btdQl6inrq5hOIeqoS9ao2rkqlpBSuqUb0pBDYtSEwqG5EI2+qJxCeHPM= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=ocdxzEjX; arc=fail smtp.client-ip=52.101.52.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="ocdxzEjX" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=BYu3onTeUn8Qvhg5p1SKx747CV4yOT9uw8jWurPKS9wjBQ5QrkFSPYKDy4FtPJaswEo3YVZsU2Bg2bHgX2UBMn3+1mhxyIyz8JPx1XVxhbgtzJl3a4pA3kFIR1tdNnQSiCgLoAHvO7BqDeCPWKd1uDdq9Q5FvUVqE88nJE7+vNv9IpGI30TnYeQUZ06hOFmy6ReQ9s+Kuky3ahqNBRplKWJmFWNrwTGesB9E3suJGPTT/0Wbs/82jqDGuwViKk7Ce91/35uXq1dTMD8zNJea8knwkd2zcMOUm7cOuHct5cBXNJ/9Mm1pb3xZGExSx3lhfCzyOYIHHIjmC/kYY4gB+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=dzl1fegg651C+BGn+9BpVpBQrZWJ8dZP9YkF2EBwbPE=; b=ZkIDs3xj0jMIyFeFBJ8rjuhSfIzeGE8msaGlnNZ4gPhOa53yIhg/NLMBqGIn4oORcUnEvSnJ1zmHY9Kh/eGV61m75XPvI+EkpwcxhFVM8W0JdPRnF55wUEmFAMDZtdjX3hJ9Lz31ZmSEQ1TDqvhGnokk9MF0ss6pKBmJvy4GtQohfHKOI7YhWSiVCLOP1E0EZYM0q1sxSGD8xFRv6+1dnMmzLlqCLxu00ZLzHOG4j/bKvhYEM823xJON0Rf6E9UN/hekMJnpzvV6sQ6dTPlSg2eBqQjoRyDAwv7tHbDGiQCNwCxpfzxIuRx6cO63vrQujnV6I5H3pA5Wfyb6XwddNw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=dzl1fegg651C+BGn+9BpVpBQrZWJ8dZP9YkF2EBwbPE=; b=ocdxzEjXSU9E6E7FuXfPxqjLvu/FEanrVc9aDEOvuQs82jDu1r2qLsJiCAxgf7PgdCuiSDtQKSAMvo4lEAD1cyycmMnBpSkM59Rn0Tg78OfBcQOP5l3EDIU/Eiu+RKvPimISpxeiDJkrg5XAiCxFPYZjoWBpwopBlHqIqCoXfZ7n9QyIpfvLMyDp49lj187wED8/MPFdOaP5K6pdW71xCBxCvKExUOg/V0yPWr1WLs7LOReeduoopjX8tVaa6PAnVCGCyd9sRjQ6HR29F9x7eHF8cQS5Swg1bktlda5l93vmaxyrf0U9t+qHpX4+AycVaR7r0sw7DIgxB24nd/2uNQ== Received: from PH7P221CA0006.NAMP221.PROD.OUTLOOK.COM (2603:10b6:510:32a::19) by PH0PR12MB7813.namprd12.prod.outlook.com (2603:10b6:510:286::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.360.13; Tue, 1 Sep 2026 19:29:47 +0000 Received: from CY4PEPF0000EE3D.namprd03.prod.outlook.com (2603:10b6:510:32a:cafe::8c) by PH7P221CA0006.outlook.office365.com (2603:10b6:510:32a::19) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.382.10 via Frontend Transport; Tue, 1 Sep 2026 19:29:45 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CY4PEPF0000EE3D.mail.protection.outlook.com (10.167.242.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.382.8 via Frontend Transport; Tue, 1 Sep 2026 19:29:44 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 1 Sep 2026 12:29:15 -0700 Received: from rnnvmail205.nvidia.com (10.129.68.10) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 1 Sep 2026 12:29:14 -0700 Received: from dgx-1v-42.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46 via Frontend Transport; Tue, 1 Sep 2026 12:29:14 -0700 From: Jamie Nguyen To: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , "Catalin Marinas" , Will Deacon , "Rafael J . Wysocki" CC: Len Brown , Dat Mach , , , , Jamie Nguyen Subject: [PATCH v2 2/3] ACPI: arm64: Add support for the FF-A FFH Operation Region (offset 2) Date: Tue, 1 Sep 2026 12:29:05 -0700 Message-ID: <20260901192906.133670-3-jamien@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260901192906.133670-1-jamien@nvidia.com> References: <20260901192906.133670-1-jamien@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3D:EE_|PH0PR12MB7813:EE_ X-MS-Office365-Filtering-Correlation-Id: 753f2201-0060-4578-cadc-08df085f60de X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|7416014|23010399003|36860700016|6133799003|3023799007|10067099003|56012099006|5023799004|22082099003|18002099003|11063799006; X-Microsoft-Antispam-Message-Info: /3I9U2+X8Lf0hDwPGBZgexHP9JEckmUYjUSk8PjZXcllS+ugoRNHq2KLyQbX4nAi7fHlt87I/mlQcidnfwXI29FpLJwJDHrCoiIcu2oF0RA+S53W1h6B2uhcGRoiIDgReM8X2+lRDKwTa03C/6bJUFcsT4qgrItD0lUMSRN734T8Oi57E/8pIa/MS1koQ2a0Ri9ulj4EomP5j9RmkmJSj1rKJT+WNOiq1byIlcJhFIEYe6WRV8i3AU96MZgdEmiMj6SEB5IBm+UTxSatevB2CtQq89S7VjiRR7MrubmS0sCq7tUhdoKSNAMYg4/wSwru2SvMM/Vez9jzHSGTB9AYHrM5nWM158ii7y7WRoQGb305As8Cfh6Vidlr9LuiFcOsj110Vv3uHgNOnEfg0Sq2hyfg+PiXqMjmlSZqvMkk5sxyWm3VHAydmp7/xBynr7UFKImKVOWaxZfF4vXPq0uRZU6vDEdpzGN9RensmAZaGiXIC0ZbXbA41VMmtByxqMYNJrDOA73vS7XyE8AhjZK3GQpDpfXHcN7d5GgkGEX/YcsuV9uxfY8b0lmHAekvUoSrRt6pM/Tb3/P2Ss3RF2eyECOxSlu3wbjvF7b21eGjByAN2qyBZqO+jaVkosplnFX+VaLyESFtFzumqCeaF4gwdcG7EzhWu0mx+TJQP0FVIZLK3tjVKpTv7WwGijSdzS9TcPT/1po++19xYOLmMGLR1A== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(7416014)(23010399003)(36860700016)(6133799003)(3023799007)(10067099003)(56012099006)(5023799004)(22082099003)(18002099003)(11063799006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: CQgNuzdlX+/g5G157tlbHjBEG3kEWfAr56PmohFMxQtr5LNaHYajlGGgB4hwRe5/o6SnJBqetHvQ8KHImqe1DHI93ZVWBT1OJmxRAtn/uvTM6ErZ8JnsvV3IyIm0SqhItu5n5/1Nfoovsg1OKZq4ASRdhPe7xm45dcWq5i331qkLBpMr4mzGzWCOVPGCMbPDefqqdfi6813JGXlijvLLYbYazMzPt5ZMrrx4Nuo5Ujfc9DDfGvWTglMS8xvIZbeLxintDIXUH8DD84911O+EvXF0/7zedmq7EGMGYdTdRyJ34nbo0Z68m77CPlt7ahwoHKhRK/PbGHwsKJO8ahD1tHR7xlAYpTXuDRTLpvtTQhM6ZExNiOdT3owQIGHhz7eqsgIuBOc/o3T1yGTAZRiR8vuP14gh1eOPkp55zmsnwAsoZYhFzGhogzAljrUDl39J X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Sep 2026 19:29:44.9306 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 753f2201-0060-4578-cadc-08df085f60de X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3D.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7813 Content-Type: text/plain; charset="utf-8" Arm DEN0048D (Functional Fixed Hardware Specification v1.3, March 2026) added a third FFH Operation Region flavour. An Operation Region declared with an Offset of 0x2 triggers an FFA_MSG_SEND_DIRECT_REQ2 call instead of a bare SMC or HVC, and each 64-bit field of the region is one register, starting at X0: X0 call status, populated by OSPM on return X1 Bits[15:0] receiver endpoint ID, or zero to have OSPM resolve it from the service UUID X2-X3 service UUID of the callee partition, written by ACPI platform firmware using ToUUID() X4-X17 message payload, X4 is always present DEN0048D recommends Offset 0x2 for new platforms, since not every OSPM implements Offsets 0x0 and 0x1. Linux implements both and rejects anything else, so AML using the recommended encoding simply fails today. Add the Operation Region side of it. Region length validation, the X0-X17 layout, the ToUUID() to FF-A UUID byte order conversion and the DEN0048D table 3 status codes all live here; they are ACPI semantics, not FF-A ones. The call itself goes out through a small set of ops that the FF-A driver registers. That indirection is needed because this file is built in, while CONFIG_ARM_FFA_TRANSPORT is a tristate. Anything that stops the call being made comes back to AML in the X0 status field: a malformed region length, or a null service UUID when AML has asked OSPM to find the endpoint itself. Once the call has gone out every register is copied back, whatever the outcome, which is what DEN0048D requires. That also takes care of table 3, because FFA_ERROR reports the FF-A error code in X2 and FFH_FFA_CALL_FAILED wants it in the same place. A response that is neither FFA_ERROR nor FFA_MSG_SEND_DIRECT_RESP2 is handled the same way; the call did complete. Assisted-by: Claude:claude-opus-5 Co-developed-by: Dat Mach Signed-off-by: Dat Mach Signed-off-by: Jamie Nguyen --- drivers/acpi/arm64/ffh.c | 185 +++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 41 +++++++++ 2 files changed, 226 insertions(+) diff --git a/drivers/acpi/arm64/ffh.c b/drivers/acpi/arm64/ffh.c index 04380bab193df..9f8a508cf2d4a 100644 --- a/drivers/acpi/arm64/ffh.c +++ b/drivers/acpi/arm64/ffh.c @@ -1,7 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only #include #include +#include #include +#include =20 /* * Implements ARM64 specific callbacks to support ACPI FFH Operation Regio= n as @@ -62,6 +64,183 @@ static bool acpi_ffh_smccc_owner_allowed(u32 fid) return false; } =20 +/* + * FFH Operation Regions declared with an Offset of 0x2 trigger an + * FFA_MSG_SEND_DIRECT_REQ2 call, as described in Arm DEN0048D (Functional + * Fixed Hardware Specification v1.3) section 2.3.1.2. Every 64-bit field = of + * the region maps to one register, ordered from X0: + * + * X0 status, one of the ACPI_FFH_FFA_* codes below, populated by + * OSPM on return + * X1 Bits[15:0] hold the receiver endpoint ID, or zero to have OSPM + * resolve it from the service UUID + * X2-X3 service UUID of the callee partition, written by ACPI platform + * firmware with the ToUUID() ASL operator + * X4-X17 message payload, X4 is always present + * + * The region Length is "32 + 8 * N" bytes with 1 <=3D N <=3D 14, which is= X0-X4 + * at minimum and X0-X17 at most. + */ +#define ACPI_FFH_FFA_HDR_REGS 4 /* X0 - X3 */ +#define ACPI_FFH_FFA_MAX_PAYLOAD_REGS 14 /* X4 - X17 */ +#define ACPI_FFH_FFA_UUID_OFFSET (2 * sizeof(u64)) +#define ACPI_FFH_FFA_MIN_LENGTH ((ACPI_FFH_FFA_HDR_REGS + 1) * sizeof(u64= )) +#define ACPI_FFH_FFA_MAX_LENGTH \ + ((ACPI_FFH_FFA_HDR_REGS + ACPI_FFH_FFA_MAX_PAYLOAD_REGS) * sizeof(u64)) + +/* DEN0048D table 3, FFH Operation Region status codes for FFA calls */ +#define ACPI_FFH_FFA_CALL_FAILED 1 +#define ACPI_FFH_FFA_SUCCESS 0 +#define ACPI_FFH_FFA_NOT_SUPPORTED (-1) +#define ACPI_FFH_FFA_INVALID_PARAMETERS (-2) +#define ACPI_FFH_FFA_OUT_OF_MEMORY (-3) +#define ACPI_FFH_FFA_UNSPECIFIED_ERROR (-4) + +static const struct acpi_ffh_ffa_ops *ffa_ops; +static DECLARE_RWSEM(ffa_ops_sem); + +int acpi_ffh_ffa_register(const struct acpi_ffh_ffa_ops *ops) +{ + int ret =3D 0; + + if (!ops || !ops->partition_id || !ops->direct_req2) + return -EINVAL; + + down_write(&ffa_ops_sem); + if (ffa_ops) + ret =3D -EBUSY; + else + ffa_ops =3D ops; + up_write(&ffa_ops_sem); + + return ret; +} +EXPORT_SYMBOL_GPL(acpi_ffh_ffa_register); + +void acpi_ffh_ffa_unregister(const struct acpi_ffh_ffa_ops *ops) +{ + down_write(&ffa_ops_sem); + if (ffa_ops =3D=3D ops) + ffa_ops =3D NULL; + up_write(&ffa_ops_sem); +} +EXPORT_SYMBOL_GPL(acpi_ffh_ffa_unregister); + +/* + * ToUUID() emits the UUID in mixed-endian (EFI GUID) byte order whereas F= F-A + * expects the RFC4122 layout, which is exactly a guid_t to uuid_t convers= ion. + */ +static void acpi_ffh_ffa_uuid(uuid_t *uuid, const u8 *aml_buf) +{ + int i; + + for (i =3D 0; i < UUID_SIZE; i++) + uuid->b[i] =3D aml_buf[guid_index[i]]; +} + +static int acpi_ffh_ffa_status(int err) +{ + switch (err) { + case 0: + return ACPI_FFH_FFA_SUCCESS; + case -EIO: + case -EPROTO: + return ACPI_FFH_FFA_CALL_FAILED; + case -EOPNOTSUPP: + return ACPI_FFH_FFA_NOT_SUPPORTED; + case -EINVAL: + case -ENOENT: + case -ENODEV: + case -ENOTUNIQ: + return ACPI_FFH_FFA_INVALID_PARAMETERS; + case -ENOMEM: + return ACPI_FFH_FFA_OUT_OF_MEMORY; + default: + return ACPI_FFH_FFA_UNSPECIFIED_ERROR; + } +} + +static bool acpi_ffh_ffa_length_valid(u64 length) +{ + return length >=3D ACPI_FFH_FFA_MIN_LENGTH && + length <=3D ACPI_FFH_FFA_MAX_LENGTH && + !(length % sizeof(u64)); +} + +static void acpi_ffh_ffa_handler(struct acpi_ffh_info *info, void *value) +{ + int status =3D ACPI_FFH_FFA_INVALID_PARAMETERS; + u64 resp_regs[3] =3D {}; + unsigned int nr_payload; + u64 *regs =3D value; + uuid_t uuid; + u16 dst_id; + int ret; + + if (!acpi_ffh_ffa_length_valid(info->length)) + goto out; + + nr_payload =3D info->length / sizeof(u64) - ACPI_FFH_FFA_HDR_REGS; + + acpi_ffh_ffa_uuid(&uuid, (u8 *)value + ACPI_FFH_FFA_UUID_OFFSET); + + down_read(&ffa_ops_sem); + if (!ffa_ops) { + status =3D ACPI_FFH_FFA_NOT_SUPPORTED; + goto out_unlock; + } + + /* + * A zero receiver endpoint ID means ACPI platform firmware expects + * OSPM to derive it from the service UUID. + */ + dst_id =3D regs[1] & GENMASK(15, 0); + if (!dst_id) { + /* + * A null UUID means "every partition" to + * FFA_PARTITION_INFO_GET, so reject it here rather than let a + * bare read of the Operation Region, which arrives as a zeroed + * buffer, resolve to an arbitrary endpoint. + */ + if (uuid_is_null(&uuid)) + goto out_unlock; + + ret =3D ffa_ops->partition_id(&uuid, &dst_id); + if (ret) { + status =3D acpi_ffh_ffa_status(ret); + goto out_unlock; + } + } + + ret =3D ffa_ops->direct_req2(dst_id, &uuid, regs + ACPI_FFH_FFA_HDR_REGS, + nr_payload, resp_regs); + status =3D acpi_ffh_ffa_status(ret); + + /* + * DEN0048D asks for the response registers to be copied back. That also + * takes care of table 3: FFA_ERROR reports the FF-A error code in X2, + * which is exactly where FFH_FFA_CALL_FAILED wants it. -EIO and -EPROTO + * both mean the call completed, so the registers hold the callee's + * response and not AML's own request. + */ + if (!ret || ret =3D=3D -EIO || ret =3D=3D -EPROTO) { + regs[1] =3D resp_regs[0]; + regs[2] =3D resp_regs[1]; + regs[3] =3D resp_regs[2]; + } + +out_unlock: + up_read(&ffa_ops_sem); +out: + /* + * DEN0048D describes this field as 64 bits wide and gives the table 3 + * codes as signed values, so sign extend rather than write a narrower + * quantity. 0xfffe or 0xfffffffe would read back as a positive number + * in a 64-bit AML comparison. + */ + regs[0] =3D (u64)(s64)status; +} + int acpi_ffh_address_space_arch_handler(acpi_integer *value, void *region_= context) { int ret =3D 0; @@ -99,6 +278,12 @@ int acpi_ffh_address_space_arch_handler(acpi_integer *v= alue, void *region_contex ffh_ctxt->invoke_ffh64_fn(r, r); memcpy(value, r, ffh_ctxt->info.length); } + } else if (ffh_ctxt->info.offset =3D=3D 2) { + /* FFA_MSG_SEND_DIRECT_REQ2 call */ + if (ffh_ctxt->info.length < sizeof(u64)) + ret =3D AE_ERROR; + else + acpi_ffh_ffa_handler(&ffh_ctxt->info, value); } else { ret =3D AE_ERROR; } diff --git a/include/linux/acpi.h b/include/linux/acpi.h index ddacac8120947..9f219a75cffe6 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1649,6 +1649,35 @@ void acpi_init_pcc(void); static inline void acpi_init_pcc(void) { } #endif =20 +/** + * struct acpi_ffh_ffa_ops - FF-A backend for the FFH Operation Region + * @partition_id: Resolve @uuid to a unique endpoint ID. Must fail with a + * negative errno if the UUID resolves to no endpoint or to + * more than one distinct endpoint. + * @direct_req2: Issue FFA_MSG_SEND_DIRECT_REQ2 towards @dst_id using @uu= id + * as the service UUID. @payload holds the X4-X17 registers + * taken from the Operation Region and is updated in place + * with the response payload; @nr_payload is the number of + * registers in use (1 to 14). @resp_regs is filled with the + * X1-X3 registers returned by the callee, and @payload with + * the response, whenever the call was actually made. Returns + * 0 on success, -EIO if the callee returned FFA_ERROR, + * -EPROTO if it returned something unexpected, or another + * negative errno if the call could not be made at all. -EIO + * and -EPROTO both mean the registers hold the callee's + * response and must be copied back to AML. + * + * Backend for FFH Operation Regions declared with an Offset of 0x2, as + * described in Arm DEN0048D (Functional Fixed Hardware Specification v1.3) + * section 2.3.1.2. Registered by the FF-A driver, which may be a module, + * while the Operation Region handler itself is built in. + */ +struct acpi_ffh_ffa_ops { + int (*partition_id)(const uuid_t *uuid, u16 *dst_id); + int (*direct_req2)(u16 dst_id, const uuid_t *uuid, u64 *payload, + unsigned int nr_payload, u64 resp_regs[3]); +}; + #ifdef CONFIG_ACPI_FFH void acpi_init_ffh(void); extern int acpi_ffh_address_space_arch_setup(void *handler_ctxt, @@ -1659,6 +1688,18 @@ extern int acpi_ffh_address_space_arch_handler(acpi_= integer *value, static inline void acpi_init_ffh(void) { } #endif =20 +#if defined(CONFIG_ACPI_FFH) && defined(CONFIG_ARM64) +int acpi_ffh_ffa_register(const struct acpi_ffh_ffa_ops *ops); +void acpi_ffh_ffa_unregister(const struct acpi_ffh_ffa_ops *ops); +#else +static inline int acpi_ffh_ffa_register(const struct acpi_ffh_ffa_ops *ops) +{ + return -EOPNOTSUPP; +} + +static inline void acpi_ffh_ffa_unregister(const struct acpi_ffh_ffa_ops *= ops) { } +#endif + #ifdef CONFIG_ACPI extern void acpi_device_notify(struct device *dev); extern void acpi_device_notify_remove(struct device *dev); --=20 2.43.0 From nobody Sat Sep 26 11:46:50 2026 Received: from PH0PR06CU001.outbound.protection.outlook.com (mail-westus3azon11011017.outbound.protection.outlook.com [40.107.208.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4B964A2613; Tue, 1 Sep 2026 19:29:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.208.17 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788290998; cv=fail; b=Zcdm9YVv2xfp0N+UXrrCf3ZOMAO6zus1kuvFDJBlOLSF912+02lAZN92ZiITK1Z82wBBl05FU0GehdmSCp01U+cUP7lG/U1LLWHhi1mSfYQ14NrRM/cX8IPt5wpSSRUJo5SJV3OO5Q6XHgNzRUGsPZxHR7U6o4lVYVNscVMLrM0= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788290998; c=relaxed/simple; bh=Hxy+yXNQHtg2qfXYZxJ9lXKh+kZLtHpYHhmd75ADPKA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HF1op0HEWlj4RzuwGrWql+eyqOl3mLg1uEynvYHlRqdeoRP8+Pm0vbJ7ros3n1eqa97s0HdgPX0lTeFMXNOMM9giTDU+4KDMAGNrBBr45bJPX1BeMdM9f464YlcAQA7EUHhEVIZSQ8edwN4hFQAC96Kq41lq+HVT5FeW/u+UnDI= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=RJKgLQk8; arc=fail smtp.client-ip=40.107.208.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="RJKgLQk8" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=eyVE/YZ6z5UEceHJ4DHT9hLsLUx0gek4sVCVmoRrJJvX5cx9NEJgUJ0O8ab/c0jvbM9jxKmqNP9SG6qhFeFA3EMZvYuZ6FHrkAnI+OhY5LVHNE5Muv6FHWHcNt14QARJv6idZbpqvEic8mNILRGcy7NBM3ABtFm8aHWMBEucIgicxk26u9E+zqhkPpncFaytuIFWj5Ze+8dS57CLLUlSs4XupeK97BX2ydI6QVwSpmH0IgJ9+tcGRZ3ErU8aTD46Rc3n6FgG3y5idhIB1nvBS8qqpUtm8O6/CnZoSX9fTG8jXX+FneV2ng/DMLTaj+ECeeqCn1gHaosPXflq8g7KYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=NP765eIK3i1h4ElPABCA1IyV3GB75Wkk4F2PfSzC7Fs=; b=D2N2aWuI3IIlmZkRTjgj/uE29eBEZLDm/N2rFyPFewn0Se5TrHbwRxpPeBkmLkBKN9PKAmarlU0KdE6PcMVI0LnWjkVvT96z//k0hq74xLI2Ej3B/KPHmuTmse9s4uJxl3bOYjZWFnvhBDalcbIC9Ph0j/FYbqQ5wzr7g01prcLhNA6Wco2Glp3k0jlG+p5R1cgzGHqxqDubhUBOFeC/8gFs8NJ6w7x1SW7ptQBKqziGLcenNm7D5I2dzu695feQp6hgKbhf8M53TUBidaqlOOKwCafnovh6uJZxZ4h74NBDIPUvlFiuCyCqxqpT9xQg4zStYqNUiG9OSf1XZB+cxA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=NP765eIK3i1h4ElPABCA1IyV3GB75Wkk4F2PfSzC7Fs=; b=RJKgLQk8yTy6HQX9FXjjhQEmzyBBe8nJBHg+TO7XQOMhtuZMoqLRNgnh/YEAaXyyacUjHq/XY5k0GrEp4KO85qsuNQe2rZWDecUMBP6ujGYCSGwDmja4+7bfQXfiBwGqrYxpzVhnyNDEE/kNK4BSaFD8tMI2t1/tnprURSQsQ/ESEH5c34PS5R4A9FCnDHFLqF89IlVFd0qMSQnQy6ak/ZDP0IXTGD5SXNJNcFAX8kKuM8bXOAV6ITsP1YN4UbmrI8K2hkDf0J9cUeaS24BED+vMJpveSy3Phku34ay3sX/sMTixc9CmirmkutndU79npoVfmLstop9OGLC5CITBLg== Received: from BN0PR03CA0039.namprd03.prod.outlook.com (2603:10b6:408:e7::14) by LVUPR12MB999138.namprd12.prod.outlook.com (2603:10b6:408:39e::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.360.13; Tue, 1 Sep 2026 19:29:51 +0000 Received: from BN3PEPF00022BC0.namprd04.prod.outlook.com (2603:10b6:408:e7:cafe::9) by BN0PR03CA0039.outlook.office365.com (2603:10b6:408:e7::14) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.382.10 via Frontend Transport; Tue, 1 Sep 2026 19:29:51 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN3PEPF00022BC0.mail.protection.outlook.com (10.167.248.123) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.382.8 via Frontend Transport; Tue, 1 Sep 2026 19:29:49 +0000 Received: from rnnvmail203.nvidia.com (10.129.68.9) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 1 Sep 2026 12:29:16 -0700 Received: from rnnvmail205.nvidia.com (10.129.68.10) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 1 Sep 2026 12:29:15 -0700 Received: from dgx-1v-42.nvidia.com (10.127.8.11) by mail.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46 via Frontend Transport; Tue, 1 Sep 2026 12:29:15 -0700 From: Jamie Nguyen To: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , "Catalin Marinas" , Will Deacon , "Rafael J . Wysocki" CC: Len Brown , Dat Mach , , , , Jamie Nguyen Subject: [PATCH v2 3/3] firmware: arm_ffa: Back the ACPI FF-A FFH Operation Region Date: Tue, 1 Sep 2026 12:29:06 -0700 Message-ID: <20260901192906.133670-4-jamien@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260901192906.133670-1-jamien@nvidia.com> References: <20260901192906.133670-1-jamien@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF00022BC0:EE_|LVUPR12MB999138:EE_ X-MS-Office365-Filtering-Correlation-Id: bf64c89b-b66e-47cb-1012-08df085f63c9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|23010399003|1800799024|7416014|376014|56012099006|11063799006|10067099003|3023799007|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: 7lsNEmAyn0Otubvs/OkrOvlVbCRxj0FjD74FcqBwnYfbl1qLvyYvOUKXVpKq/J/Hu2cTma+fMYvCb3NWGJBx+eur3AP0zZbZ6OYL09G9dfgJvir9dZNDu56aK3QDlLiWvk93lnUdnKI2DPSH3ajyqaLaScl3JCWGts9mZXvVFZGzC0AkvR1S/5IWXa2DbXSyaJX/VZDMNdPc4VQzHSRaTTwEtgjoMxnCP3kUkWQhdjG1C2ZgTGG2CXGc8GjN8Ry9j6i7zA0o9C7kBNAysE2nR3r34ejKV38N3/+88Q2YQPp+QQ3XJTRax7Gs4PGDUwQ35QSMLhfg9vF93scDUvN69tuuc7P6NycLnpiyR5vAkEg/gOJpO+8EsY/lDpJOLL3FU2iBOgZLj17IrYrddvVlYegsG6pgiikMdXPQI9OoFQYEB6HAmoJWOXpX0Et3HKPQ/2qbSB5R0KfyS646W64y6vYKkfsjRwnem7s4tRDb0otW5aZMVlSYzneGqcaTuqDkh9MWlkPcAF385XToMX3VLepyhHxuNWYAt+WkuzrNlUBmbqIe4qYM4Uxo1jtaqGw+ss0phiabEz4gfQmXxMme0hRO8uZfW2YiWZOoYIhAhh5lo+SIJFLI/2o3/B5c/sj1fex0Y7o0frEKIeKzdh3qerdLBcMc97DlTgcDmlivgzsuPkLKEi/KkF4E++SWHvVnXva8bjNfFe2ULVaQn1af2w== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(23010399003)(1800799024)(7416014)(376014)(56012099006)(11063799006)(10067099003)(3023799007)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 35tC+pRezPjV24WvUCf3mPhtxi0h984qzgERjkB++UuVei4YBEM3a2b7uP+mkayNtfTesWyKg+8jeBvXW/2DHk7IZ7MkzvawS8XrR9/HGIsh+pgB8liiRE995Fk5r+l7Sunm4+HWRpfo0MTrNJ9juvXs/djQiraFnZdF4h8nOmCNRvWVm1CsDwvf6TGKDkV2Ix9OaDYWCwdOOgJYvNawg7gJzXUasj5kY+ag9xvHMRu7HE7NI6nzlAH0mPQB0MMFlQ3BeGkrFPLfKjJIqlv0NHL3tHQz6cxnLei4O4ojL4uvNmMqq8Ls9m3L8g43AWvCjsbZixxO4fUK2DVJDy4pei4jf6dj2NXCEBFaQKwYagbYaVvlH45sKegNvPLlPfydYFXQRnZR7KGTqkzG5KJhr5jTR2UkfN+JCAfMEDsJYiTiAfGbSTyEbjrlQpdH9Xu8 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Sep 2026 19:29:49.7128 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bf64c89b-b66e-47cb-1012-08df085f63c9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF00022BC0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LVUPR12MB999138 Content-Type: text/plain; charset="utf-8" Add the FFA_MSG_SEND_DIRECT_REQ2 backend behind FFH Operation Regions declared with an Offset of 0x2, as described in Arm DEN0048D section 2.3.1.2, and register it once partition setup has completed. None of what the Operation Region handler needs was reachable through the existing ffa_device based interface. Resolving a service UUID to an endpoint ID had no user yet. ffa_sync_send_receive2() always addresses dev->vm_id, so a receiver endpoint ID that AML supplied in X1 cannot be honoured. And the response registers DEN0048D wants copied back to AML are discarded by ffa_msg_send_direct_req2(), which folds the FF-A error code into an errno instead; patch 1 dealt with that one. DEN0048D only requires the resolved endpoint to be unique, and a single partition may be described by more than one entry, so compare endpoint IDs instead of insisting on exactly one descriptor. Where the endpoint was enumerated at probe time, check first that it can receive direct request2 messages. AML then gets FFH_FFA_NOT_SUPPORTED instead of a call that was never going to work. An endpoint with no matching device is passed through and left for the callee to reject. Assisted-by: Claude:claude-opus-5 Co-developed-by: Dat Mach Signed-off-by: Dat Mach Signed-off-by: Jamie Nguyen --- drivers/firmware/arm_ffa/driver.c | 118 +++++++++++++++++++++++++++++- 1 file changed, 116 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/arm_ffa/driver.c b/drivers/firmware/arm_ffa/d= river.c index 3236cd0a731ab..0577c7d5685ee 100644 --- a/drivers/firmware/arm_ffa/driver.c +++ b/drivers/firmware/arm_ffa/driver.c @@ -2146,6 +2146,114 @@ static void ffa_notifications_setup(void) ffa_notifications_cleanup(); } =20 +/* + * Backend for FFH Operation Regions declared with an Offset of 0x2, see A= rm + * DEN0048D (Functional Fixed Hardware Specification v1.3) section 2.3.1.2. + * The Operation Region handler itself lives in drivers/acpi/arm64/ffh.c a= nd + * is built in, so it reaches this driver, which may be a module, through = the + * ops registered below. + */ +static int ffa_acpi_ffh_partition_id(const uuid_t *uuid, u16 *dst_id) +{ + struct ffa_partition_info *pbuf; + int count, idx, ret =3D 0; + u16 id; + + count =3D ffa_partition_probe(uuid, &pbuf); + if (count <=3D 0) + return count ? : -ENOENT; + + /* + * DEN0048D only requires the endpoint ID to be unique. A partition may + * be described by more than one entry, so compare IDs rather than + * insisting on a single descriptor. + */ + id =3D pbuf[0].id; + for (idx =3D 1; idx < count; idx++) { + if (pbuf[idx].id !=3D id) { + ret =3D -ENOTUNIQ; + goto out; + } + } + + *dst_id =3D id; +out: + kfree(pbuf); + return ret; +} + +static int ffa_acpi_ffh_match_id(struct device *dev, const void *data) +{ + const u16 *dst_id =3D data; + + return to_ffa_dev(dev)->vm_id =3D=3D *dst_id; +} + +static int ffa_acpi_ffh_check_partition(u16 dst_id) +{ + struct device *dev; + bool supported; + + dev =3D bus_find_device(&ffa_bus_type, NULL, &dst_id, + ffa_acpi_ffh_match_id); + /* + * Only partitions reported by FFA_PARTITION_INFO_GET at probe time have + * a device here. AML may name an endpoint that was never enumerated, so + * an unknown one is left to the callee to reject rather than refused + * outright. + */ + if (!dev) + return 0; + + supported =3D ffa_partition_supports_direct_req2_recv(to_ffa_dev(dev)); + put_device(dev); + + return supported ? 0 : -EOPNOTSUPP; +} + +static int ffa_acpi_ffh_direct_req2(u16 dst_id, const uuid_t *uuid, + u64 *payload, unsigned int nr_payload, + u64 resp_regs[3]) +{ + struct ffa_send_direct_data2 req =3D {}, resp; + int ret; + + BUILD_BUG_ON(sizeof(req.data[0]) !=3D sizeof(*payload)); + + if (!drv_info->msg_direct_req2_supp) + return -EOPNOTSUPP; + + if (!nr_payload || nr_payload > ARRAY_SIZE(req.data)) + return -EINVAL; + + ret =3D ffa_acpi_ffh_check_partition(dst_id); + if (ret) + return ret; + + /* + * Registers not represented in the Operation Region stay zero, as + * required by DEN0048D. + */ + memcpy(req.data, payload, nr_payload * sizeof(*payload)); + + ret =3D __ffa_msg_send_direct_req2(drv_info->vm_id, dst_id, uuid, &req, + &resp, resp_regs); + + /* + * DEN0048D asks for the registers to be copied back once the call has + * completed, whatever the outcome, so this runs on the FFA_ERROR path + * too rather than leaving AML looking at its own request. + */ + memcpy(payload, resp.data, nr_payload * sizeof(*payload)); + + return ret; +} + +static const struct acpi_ffh_ffa_ops ffa_acpi_ffh_ops =3D { + .partition_id =3D ffa_acpi_ffh_partition_id, + .direct_req2 =3D ffa_acpi_ffh_direct_req2, +}; + static int ffa_probe(struct platform_device *pdev) { int ret; @@ -2228,8 +2336,13 @@ static int ffa_probe(struct platform_device *pdev) ffa_notifications_setup(); =20 ret =3D ffa_setup_partitions(); - if (!ret) - return ret; + if (!ret) { + ret =3D acpi_ffh_ffa_register(&ffa_acpi_ffh_ops); + if (ret && ret !=3D -EOPNOTSUPP) + pr_warn("failed to register ACPI FFH backend (%d)\n", + ret); + return 0; + } =20 pr_err("failed to setup partitions\n"); ffa_notifications_cleanup(); @@ -2249,6 +2362,7 @@ static void ffa_remove(struct platform_device *pdev) { struct ffa_drv_info *info =3D platform_get_drvdata(pdev); =20 + acpi_ffh_ffa_unregister(&ffa_acpi_ffh_ops); ffa_notifications_cleanup(); ffa_partitions_cleanup(); ffa_rxtx_unmap(); --=20 2.43.0