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charset="utf-8" NVIDIA Olympus implements spatial SMT with symmetric steady-state PE capacity but two different resource modes. One-Thread Active mode gives one PE the full core, while waking the other PE restores Two-Thread Active mode and partitions decode, issue, cache, TLB, and vector resources. Returning to full-resource mode requires the sibling to remain in WFI for 10 Ki cycles. Measurements show that pinned workloads perform equally on either PE, but freely migratable workloads lose substantial throughput when they alternate between PE identities. Consistently selecting PE0 keeps PE1 idle, avoids repeated SMT repartitioning, and restores one-thread-per-core performance. Describe this scheduling preference with SD_ASYM_PACKING and give PE0, identified by MPIDR_EL1.Aff0, the higher arch_asym_cpu_priority(). This is independent of SD_ASYM_CPUCAPACITY: SMT siblings retain equal capacity, while physical cores with different maximum frequencies are handled by a higher scheduling domain. Firmware currently provides no interface for describing the preferred SMT sibling. Detect Olympus by MIDR until such an interface is available. Signed-off-by: Andrea Righi --- arch/arm64/include/asm/topology.h | 1 + arch/arm64/kernel/smp.c | 1 + arch/arm64/kernel/topology.c | 62 +++++++++++++++++++++++++++++++ 3 files changed, 64 insertions(+) diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/top= ology.h index b9eaf4ad70850..edc1c59b3448d 100644 --- a/arch/arm64/include/asm/topology.h +++ b/arch/arm64/include/asm/topology.h @@ -18,6 +18,7 @@ int pcibus_to_node(struct pci_bus *bus); #include =20 void update_freq_counters_refs(void); +void arm64_init_sched_topology(void); =20 /* Replace task scheduler's default frequency-invariant accounting */ #define arch_scale_freq_tick topology_scale_freq_tick diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index a61dc3016a117..0135ac4eea8bd 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -443,6 +443,7 @@ void __init smp_cpus_done(unsigned int max_cpus) hyp_mode_check(); setup_system_features(); setup_user_features(); + arm64_init_sched_topology(); mark_linear_text_alias_ro(); } =20 diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index d28438f8b83f1..0dd9eec1c4946 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -19,6 +19,8 @@ #include #include #include +#include +#include #include =20 #include @@ -44,6 +46,66 @@ static DEFINE_PER_CPU_READ_MOSTLY(unsigned long, arch_max_freq_scale) =3D = 1UL << (2 * SCHED_CAPACITY_SHIFT); static cpumask_var_t amu_fie_cpus; =20 +/* + * Switching the active PE on an NVIDIA Olympus SMT core can keep the core= in + * two-thread active mode, with resources partitioned between the PEs. + * + * Prefer PE0 so PE1 can remain idle and the core can stay in full-resource + * mode. Firmware does not currently describe this preference, so detect + * Olympus by MIDR until a firmware interface is available. + */ +static bool olympus_prefer_pe0 __ro_after_init; + +#ifdef CONFIG_SCHED_SMT +static int arm64_smt_flags(void) +{ + int flags =3D cpu_smt_flags(); + + if (olympus_prefer_pe0) + flags |=3D SD_ASYM_PACKING; + + return flags; +} +#endif + +static struct sched_domain_topology_level arm64_asym_smt_topology[] =3D { +#ifdef CONFIG_SCHED_SMT + SDTL_INIT(tl_smt_mask, arm64_smt_flags, SMT), +#endif +#ifdef CONFIG_SCHED_CLUSTER + SDTL_INIT(tl_cls_mask, cpu_cluster_flags, CLS), +#endif +#ifdef CONFIG_SCHED_MC + SDTL_INIT(tl_mc_mask, cpu_core_flags, MC), +#endif + SDTL_INIT(tl_pkg_mask, NULL, PKG), + { NULL, }, +}; + +void __init arm64_init_sched_topology(void) +{ + if (!IS_ENABLED(CONFIG_SCHED_SMT)) + return; + + if ((read_cpuid_id() & MIDR_CPU_MODEL_MASK) !=3D MIDR_NVIDIA_OLYMPUS) + return; + + if (!topology_core_has_smt(smp_processor_id())) + return; + + olympus_prefer_pe0 =3D true; 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charset="utf-8" SD_ASYM_PACKING orders CPUs that share an SMT core, but idle CPU selection does not consult that order. A task can therefore wake on an arbitrary sibling and remain there until load balancing corrects the placement. On SMT implementations where changing the active sibling repartitions core resources, that initial choice can cause a large and persistent performance loss. When idle selection finds an available CPU in an SMT core, choose the highest-priority available sibling. On SMT2 this only changes selection on fully idle cores, because a partially idle core has only one available CPU. On wider SMT cores it also fills available siblings in priority order while the core is partially busy. Apply the preference to idle-core and idle-CPU scans, asymmetric capacity scans, and the target, previous, and recently-used CPU fast paths. Keep physical-core capacity selection independent from SMT sibling ordering. SD_ASYM_CPUCAPACITY can first select among cores with different maximum capacities, SD_ASYM_PACKING then selects the preferred available sibling inside the chosen core, whose siblings continue to share equal capacity. Signed-off-by: Andrea Righi --- kernel/sched/fair.c | 81 ++++++++++++++++++++++++++++++++++++----- kernel/sched/sched.h | 6 +++ kernel/sched/topology.c | 36 ++++++++++++++++++ 3 files changed, 114 insertions(+), 9 deletions(-) diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index 8dff37059faf7..3c49aa63742cb 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -8587,6 +8587,65 @@ static inline bool test_idle_cores(int cpu) return false; } =20 +/* + * Return true when @cpu has a higher asymmetric-packing priority than @ot= her in their SMT + * scheduling domain. + */ +static bool sched_smt_asym_prefer(int cpu, int other) +{ + struct sched_domain *sd; + + for_each_domain(cpu, sd) { + /* + * Only honor priorities declared at shared-capacity SMT levels. + * SD_ASYM_PACKING at higher levels may describe core ordering. + */ + if (!(sd->flags & SD_SHARE_CPUCAPACITY)) + break; + + if ((sd->flags & SD_ASYM_PACKING) && cpumask_test_cpu(other, sched_domai= n_span(sd))) + return sched_asym_prefer(cpu, other); + } + + return false; +} + +/* + * Return the highest-priority available CPU in @cpu's SMT core that is al= so in @cpus. + */ +static int __select_idle_smt_cpu(struct task_struct *p, int cpu, const str= uct cpumask *cpus) +{ + int best =3D cpu; + int sibling; + + for_each_cpu_and(sibling, cpu_smt_mask(cpu), cpus) { + if (sibling =3D=3D best || !choose_idle_cpu(sibling, p)) + continue; + + if (sched_smt_asym_prefer(sibling, best)) + best =3D sibling; + } + + return best; +} + +static inline int +select_idle_smt_cpu(struct task_struct *p, int cpu, const struct cpumask *= cpus) +{ + if (!sched_smt_asym_active()) + return cpu; + + return __select_idle_smt_cpu(p, cpu, cpus); +} + +/* + * Redirect an available SMT CPU to a higher-priority available sibling al= lowed by task affinity. + */ +static inline int select_idle_smt_priority(struct task_struct *p, int cpu) +{ + return select_idle_smt_cpu(p, cpu, p->cpus_ptr); +} + /* * Scans the local SMT mask to see if the entire core is idle, and records= this * information in sd_balance_shared->has_idle_cores. @@ -8645,7 +8704,7 @@ static int select_idle_core(struct task_struct *p, in= t core, struct cpumask *cpu } =20 if (idle) - return core; + return select_idle_smt_cpu(p, core, cpus); =20 cpumask_andnot(cpus, cpus, cpu_smt_mask(core)); return -1; @@ -8668,7 +8727,7 @@ static int select_idle_smt(struct task_struct *p, str= uct sched_domain *sd, int t if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) continue; if (choose_idle_cpu(cpu, p)) - return cpu; + return select_idle_smt_priority(p, cpu); } =20 return -1; @@ -8720,7 +8779,7 @@ static int select_idle_cpu(struct task_struct *p, str= uct sched_domain *sd, bool return -1; idle_cpu =3D __select_idle_cpu(cpu, p); if ((unsigned int)idle_cpu < nr_cpumask_bits) - return idle_cpu; + return select_idle_smt_priority(p, idle_cpu); } } cpumask_andnot(cpus, cpus, sched_group_span(sg)); @@ -8745,7 +8804,8 @@ static int select_idle_cpu(struct task_struct *p, str= uct sched_domain *sd, bool if (has_idle_core) set_idle_cores(target, false); =20 - return idle_cpu; + return (unsigned int)idle_cpu < nr_cpumask_bits ? + select_idle_smt_priority(p, idle_cpu) : idle_cpu; } =20 /* @@ -8858,7 +8918,7 @@ select_idle_capacity(struct task_struct *p, struct sc= hed_domain *sd, int target) * immediately. */ if (fits > 0 && preferred_core) - return cpu; + return select_idle_smt_cpu(p, cpu, cpus); /* * Only the min performance hint (i.e. uclamp_min) doesn't fit. * Look for the CPU with best capacity. @@ -8915,6 +8975,9 @@ select_idle_capacity(struct task_struct *p, struct sc= hed_domain *sd, int target) if (has_idle_core && best_fits > ASYM_IDLE_COMPLETE_MISFIT) set_idle_cores(target, false); =20 + if (best_cpu >=3D 0) + best_cpu =3D select_idle_smt_cpu(p, best_cpu, cpus); + return best_cpu; } =20 @@ -8971,7 +9034,7 @@ static int select_idle_sibling(struct task_struct *p,= int prev, int target) =20 if (choose_idle_cpu(target, p) && asym_fits_cpu(task_util, util_min, util_max, target)) - return target; + return select_idle_smt_priority(p, target); =20 /* * If the previous CPU is cache affine and idle, don't be stupid: @@ -8982,9 +9045,9 @@ static int select_idle_sibling(struct task_struct *p,= int prev, int target) =20 if (!static_branch_unlikely(&sched_cluster_active) || cpus_share_resources(prev, target)) - return prev; + return select_idle_smt_priority(p, prev); =20 - prev_aff =3D prev; + prev_aff =3D select_idle_smt_priority(p, prev); } =20 /* @@ -9015,7 +9078,7 @@ static int select_idle_sibling(struct task_struct *p,= int prev, int target) =20 if (!static_branch_unlikely(&sched_cluster_active) || cpus_share_resources(recent_used_cpu, target)) - return recent_used_cpu; + return select_idle_smt_priority(p, recent_used_cpu); =20 } else { recent_used_cpu =3D -1; diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index e656c7059bf86..73731e9439b97 100644 --- a/kernel/sched/sched.h +++ b/kernel/sched/sched.h @@ -2240,6 +2240,7 @@ DECLARE_PER_CPU(struct sched_domain __rcu *, sd_asym_= packing); DECLARE_PER_CPU(struct sched_domain __rcu *, sd_asym_cpucapacity); =20 extern struct static_key_false sched_asym_cpucapacity; +extern struct static_key_false sched_smt_asym_packing; extern struct static_key_false sched_cluster_active; =20 static __always_inline bool sched_asym_cpucap_active(void) @@ -2247,6 +2248,11 @@ static __always_inline bool sched_asym_cpucap_active= (void) return static_branch_unlikely(&sched_asym_cpucapacity); } =20 +static __always_inline bool sched_smt_asym_active(void) +{ + return static_branch_unlikely(&sched_smt_asym_packing); +} + struct sched_group_capacity { atomic_t ref; /* diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c index 0248227d983a7..06c40eb5932af 100644 --- a/kernel/sched/topology.c +++ b/kernel/sched/topology.c @@ -683,8 +683,24 @@ DEFINE_PER_CPU(struct sched_domain __rcu *, sd_asym_pa= cking); DEFINE_PER_CPU(struct sched_domain __rcu *, sd_asym_cpucapacity); =20 DEFINE_STATIC_KEY_FALSE(sched_asym_cpucapacity); +DEFINE_STATIC_KEY_FALSE(sched_smt_asym_packing); DEFINE_STATIC_KEY_FALSE(sched_cluster_active); =20 +static bool has_asym_smt_domain(int cpu) +{ + struct sched_domain *sd; + + for_each_domain(cpu, sd) { + if (!(sd->flags & SD_SHARE_CPUCAPACITY)) + break; + + if (sd->flags & SD_ASYM_PACKING) + return true; + } + + return false; +} + static void update_top_cache_domain(int cpu) { struct sched_domain_shared *sds =3D NULL; @@ -3084,6 +3100,7 @@ build_sched_domains(const struct cpumask *cpu_map, st= ruct sched_domain_attr *att struct rq *rq =3D NULL; int i, ret =3D -ENOMEM; bool has_asym =3D false; + bool has_asym_smt =3D false; bool has_cluster =3D false; =20 if (WARN_ON(cpumask_empty(cpu_map))) @@ -3202,6 +3219,9 @@ build_sched_domains(const struct cpumask *cpu_map, st= ruct sched_domain_attr *att =20 cpu_attach_domain(sd, d.rd, i); =20 + if (has_asym_smt_domain(i)) + has_asym_smt =3D true; + if (lowest_flag_domain(i, SD_CLUSTER)) has_cluster =3D true; } @@ -3210,6 +3230,9 @@ build_sched_domains(const struct cpumask *cpu_map, st= ruct sched_domain_attr *att if (has_asym) static_branch_inc_cpuslocked(&sched_asym_cpucapacity); =20 + if (has_asym_smt) + static_branch_inc_cpuslocked(&sched_smt_asym_packing); + if (has_cluster) static_branch_inc_cpuslocked(&sched_cluster_active); =20 @@ -3310,11 +3333,24 @@ int __init sched_init_domains(const struct cpumask = *cpu_map) static void detach_destroy_domains(const struct cpumask *cpu_map) { unsigned int cpu =3D cpumask_any(cpu_map); + bool has_asym_smt =3D false; int i; =20 + rcu_read_lock(); + for_each_cpu(i, cpu_map) { + if (has_asym_smt_domain(i)) { + has_asym_smt =3D true; + break; + } + } + rcu_read_unlock(); + if (rcu_access_pointer(per_cpu(sd_asym_cpucapacity, cpu))) static_branch_dec_cpuslocked(&sched_asym_cpucapacity); =20 + if (has_asym_smt) + static_branch_dec_cpuslocked(&sched_smt_asym_packing); + if (static_branch_unlikely(&sched_cluster_active)) static_branch_dec_cpuslocked(&sched_cluster_active); =20 --=20 2.55.0