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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDA3MiBTYWx0ZWRfXz/r1KunpI8ab 1S47+e0/tYZhIgfu6JILnEAio8uv2n1bhTNvsAUlZ9Eydxbq+PEdPj5TymczzVDg006OsuUP9qG 9/g3eftuuOUh/2fOApLeHUfND7McVXceFuZ3cxe8qDuVG9WH2B/Q X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDA3MiBTYWx0ZWRfX61Ee4jN/N2sR cQa9hKP7i+RJrcL9Gnh0GhMoj0k7BX7am4El7rRxR/RDRqh6JHFVs2Yj8STEwpAmaiu1X1AHg48 PaA+5gdohxpBayAA2d2ZIRiO/1V+nDLyubF1B8pueKS8QhhR0lvL4h8C6XnfyyXEheUaChCX+mr rcwXLTQLLdEV6Y9799ahRAKcmTK+7KVXompK0C82Q/J+gMf4/WSZzkIfZwOTerUNyg5xq6Q1uo0 +2kQ6GWS7d6uBUw2BOmjyZvP0zlhhr1O+6aLw9LEpzVI0lDuCkpVsMDQVWq5NABQOj/0mNLz8tx 3/Jd5X2C2Mwpvamdw86JXdcoD0rAorWTaPUUCNSv+aDclVc094+keKdnGGltsC7WtQGgTvinr1H T9uhiFPe3dKG60Q+Xp9bCG64U8QoZi80A6NplRvdm5tJ2ktMD6MYzHNRhedy20nKDC5/w7II3TP 7V+hkDklugdC8FPFdwA== X-Proofpoint-GUID: 80qHS_XGIxN2AqQjMRBGP0gF34neapt2 X-Proofpoint-ORIG-GUID: 80qHS_XGIxN2AqQjMRBGP0gF34neapt2 X-Authority-Analysis: v=2.4 cv=c9Cbhx9l c=1 sm=1 tr=0 ts=6a953bf5 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0sLvza09kfJOxVLZPwjg:22 a=uXIjobp8t2wMuQ0fPvqm:22 a=gEfo2CItAAAA:8 a=gAnH3GRIAAAA:8 a=VwQbUJbxAAAA:8 a=0BJKTBZvRJlxmc1XXDQA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_03,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310072 Cosmin's Analog Devices address is no longer valid, leaving the ADXL367, AD4130, AD74115 and AD74413R bindings without a reachable maintainer. Take over maintainership of those bindings and add myself to the corresponding MAINTAINERS entries alongside Marcelo. Signed-off-by: Antoniu Miclaus Reviewed-by: Nuno S=C3=A1 Reviewed-by: Marcelo Schmitt --- Changes in v4: - Collected Reviewed-by from Marcelo Schmitt. Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml | 2 +- Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml | 3 ++- Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml | 3 ++- Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml | 3 ++- MAINTAINERS | 4 ++++ 5 files changed, 11 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml b= /Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml index f10d98d34cb8..29689bc38b90 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices ADXL367 3-Axis Digital Accelerometer =20 maintainers: - - Cosmin Tanislav + - Antoniu Miclaus =20 description: | The ADXL367 is an ultralow power, 3-axis MEMS accelerometer. diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml b/Do= cumentation/devicetree/bindings/iio/adc/adi,ad4130.yaml index cc38617bb829..a4ab6adef1c6 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml @@ -8,7 +8,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AD4130 family ADCs =20 maintainers: - - Cosmin Tanislav + - Marcelo Schmitt + - Antoniu Miclaus =20 description: | Bindings for the Analog Devices AD4130 family ADCs. diff --git a/Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml b= /Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml index 2a04906531fb..6aa86cb56032 100644 --- a/Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml +++ b/Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AD74115H device =20 maintainers: - - Cosmin Tanislav + - Marcelo Schmitt + - Antoniu Miclaus =20 description: | The AD74115H is a single-channel software configurable input/output diff --git a/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml = b/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml index 590ea7936ad7..5318a00e7669 100644 --- a/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml +++ b/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AD74412R/AD74413R device =20 maintainers: - - Cosmin Tanislav + - Marcelo Schmitt + - Antoniu Miclaus =20 description: | The AD74412R and AD74413R are quad-channel software configurable input/o= utput diff --git a/MAINTAINERS b/MAINTAINERS index 04fa5322d9f7..ade07e6637bc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -641,6 +641,7 @@ F: drivers/iio/accel/adxl355_spi.c =20 ADXL367 THREE-AXIS DIGITAL ACCELEROMETER DRIVER M: Marcelo Schmitt +M: Antoniu Miclaus L: linux-iio@vger.kernel.org S: Supported W: https://ez.analog.com/linux-software-drivers @@ -1493,6 +1494,7 @@ F: drivers/iio/adc/ad4080.c =20 ANALOG DEVICES INC AD4130 DRIVER M: Marcelo Schmitt +M: Antoniu Miclaus L: linux-iio@vger.kernel.org S: Supported W: https://ez.analog.com/linux-software-drivers @@ -1598,6 +1600,7 @@ F: drivers/iio/dac/ad7293.c =20 ANALOG DEVICES INC AD74115 DRIVER M: Marcelo Schmitt +M: Antoniu Miclaus L: linux-iio@vger.kernel.org S: Supported W: https://ez.analog.com/linux-software-drivers @@ -1606,6 +1609,7 @@ F: drivers/iio/addac/ad74115.c =20 ANALOG DEVICES INC AD74413R DRIVER M: Marcelo Schmitt +M: Antoniu Miclaus L: linux-iio@vger.kernel.org S: Supported W: https://ez.analog.com/linux-software-drivers --=20 2.43.0 From nobody Sat Sep 26 19:35:14 2026 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C29893D75DE; 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Mon, 31 Aug 2026 04:31:43 -0400 From: Antoniu Miclaus To: Marcelo Schmitt , Antoniu Miclaus , =?UTF-8?q?Nuno=20S=C3=A1?= , Michael Hennerich , Jonathan Cameron , David Lechner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Subject: [PATCH v4 2/4] dt-bindings: iio: accel: adi,adxl367: add interrupt-names Date: Mon, 31 Aug 2026 11:31:20 +0300 Message-ID: <20260831083122.3486-3-antoniu.miclaus@analog.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831083122.3486-1-antoniu.miclaus@analog.com> References: <20260831083122.3486-1-antoniu.miclaus@analog.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDA3MiBTYWx0ZWRfX7ryaDjOtsh+w wun+FSaa2GIOigZScvsW76q1jfdk6ajqFcqoK9qOz0TnmSVfc2gG+joQ1Dk7La8N7tcdw4MHcfY xz4C9Xx+1qZGbI7eZ8bAU2LMrab5FjbIX7ZtjLKfOgYF6DBoGQCu X-Authority-Analysis: v=2.4 cv=QopuG1yd c=1 sm=1 tr=0 ts=6a953bf7 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0sLvza09kfJOxVLZPwjg:22 a=Z0pTeXoby7EwIRygza74:22 a=gAnH3GRIAAAA:8 a=VwQbUJbxAAAA:8 a=U76RtYCq33gtdKK1WSkA:9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDA3MiBTYWx0ZWRfXzJ17+HZdMPO8 vAW6P3rc/63lgab/r1cJr+AvOxNuFxFOf4L/bRNDBRpsqkbD7s6PlvGI8gGnE+aBc1Tyl67Y1/X 9fwas9A83zZf7nj42l8K0Q0lQI/DY4It7OVDE8dCX41Hd6z3b4+twevxem7fPcR6H6LmDjRgBvF OXAEwGLAWgUTELy2g487K52Ey1KkE45i1w32LTABpIJTVsVNid3y9/T6Qj4QUSFo4SAkD5nGnvy NgJtGqYR4A64KPWo1KY0Bjqya/9/zgjuW+CfDM3ywlRbT5Ga+btdtqlr+7xkWxuT/WG/BWuTrp/ paF3THeWbW5ElBPcOgxjGC4kyZX5iPiCsNv49WvqB/R9LXXnRkbdJP74r8rUmeSfqHDhm53W9vi n4IdUro717Fgaoi8LzsseibEmuV1zX71w+RLMLYlapyXa66ZMTKl2HQt+hxk1Xx4DaeSzCjVOiY l9fN7HOusRVqSMA9PBA== X-Proofpoint-GUID: -ifo6E11ZO_V6yzwXG0wBndTJNt4SIGh X-Proofpoint-ORIG-GUID: -ifo6E11ZO_V6yzwXG0wBndTJNt4SIGh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_03,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 suspectscore=0 bulkscore=0 adultscore=0 priorityscore=1501 malwarescore=0 spamscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310072 Content-Type: text/plain; charset="utf-8" The ADXL367 has two independent interrupt output pins, INT1 and INT2, either of which may be wired to the host. Allow the interrupt line that is connected to be described by adding an optional interrupt-names property accepting "INT1" and/or "INT2", and permit a second interrupt entry. interrupt-names is kept optional so existing device trees that only specify a bare interrupts property remain valid. Signed-off-by: Antoniu Miclaus Reviewed-by: Rob Herring (Arm) --- Changes in v4: - No changes. .../devicetree/bindings/iio/accel/adi,adxl367.yaml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml b= /Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml index 29689bc38b90..115170eac058 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml @@ -33,7 +33,14 @@ properties: maxItems: 1 =20 interrupts: - maxItems: 1 + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + items: + - enum: [INT1, INT2] + - const: INT2 =20 vdd-supply: true vddio-supply: true @@ -61,6 +68,7 @@ examples: reg =3D <0x53>; interrupt-parent =3D <&gpio>; interrupts =3D <25 IRQ_TYPE_EDGE_RISING>; + interrupt-names =3D "INT1"; }; }; - | @@ -76,5 +84,6 @@ examples: spi-max-frequency =3D <1000000>; interrupt-parent =3D <&gpio>; interrupts =3D <25 IRQ_TYPE_EDGE_RISING>; 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charset="utf-8" Several helpers set or clear a fixed set of bits based on a boolean using the regmap_update_bits(reg, mask, en ? mask : 0) idiom. Replace these with regmap_assign_bits(), which expresses the same intent more concisely. No functional change intended. Signed-off-by: Antoniu Miclaus Reviewed-by: Marcelo Schmitt --- Changes in v4: - Collected Reviewed-by from Marcelo Schmitt. drivers/iio/accel/adxl367.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/iio/accel/adxl367.c b/drivers/iio/accel/adxl367.c index 4ff1c7a0988b..54c4d1226790 100644 --- a/drivers/iio/accel/adxl367.c +++ b/drivers/iio/accel/adxl367.c @@ -366,8 +366,7 @@ static int adxl367_set_act_interrupt_en(struct adxl367_= state *st, { unsigned int mask =3D adxl367_act_int_mask_tbl[act]; =20 - return regmap_update_bits(st->regmap, ADXL367_REG_INT1_MAP, - mask, en ? mask : 0); + return regmap_assign_bits(st->regmap, ADXL367_REG_INT1_MAP, mask, en); } =20 static int adxl367_get_act_interrupt_en(struct adxl367_state *st, @@ -401,9 +400,8 @@ static int adxl367_set_act_en(struct adxl367_state *st, static int adxl367_set_fifo_watermark_interrupt_en(struct adxl367_state *s= t, bool en) { - return regmap_update_bits(st->regmap, ADXL367_REG_INT1_MAP, - ADXL367_INT_FIFO_WATERMARK_MASK, - en ? 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charset="utf-8" The ADXL367 provides two independent interrupt output pins, INT1 and INT2, each with its own event mapping register (INTMAP1_LOWER at 0x2A and INTMAP2_LOWER at 0x2B) sharing an identical bit layout. Until now the driver hardcoded INT1 for all interrupt mappings, so a board that routes only INT2 to the host could never receive activity, inactivity or FIFO watermark interrupts. Determine the connected pin from the interrupt-names device tree property using fwnode_irq_get_byname(), and route the interrupt mappings to the matching register. Use the interrupt number returned by the lookup for devm_request_threaded_irq() so the requested line always matches the routed INTMAP register, regardless of the order in which the interrupts are listed. When no interrupt-names are present, default to INT1 and the bus-provided interrupt to preserve the existing behaviour. Signed-off-by: Antoniu Miclaus --- Changes in v4: - Propagate errors from fwnode_irq_get_byname() instead of silently falling back: only -EINVAL (no interrupt-names) and -ENODATA (requested name not listed) select the INT1 default, so -EPROBE_DEFER and other errors are returned to the caller. drivers/iio/accel/adxl367.c | 45 ++++++++++++++++++++++++++++++++++--- 1 file changed, 42 insertions(+), 3 deletions(-) diff --git a/drivers/iio/accel/adxl367.c b/drivers/iio/accel/adxl367.c index 54c4d1226790..9a2312da6238 100644 --- a/drivers/iio/accel/adxl367.c +++ b/drivers/iio/accel/adxl367.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -81,6 +82,7 @@ #define ADXL367_SAMPLES_L_MASK GENMASK(7, 0) =20 #define ADXL367_REG_INT1_MAP 0x2A +#define ADXL367_REG_INT2_MAP 0x2B #define ADXL367_INT_INACT_MASK BIT(5) #define ADXL367_INT_ACT_MASK BIT(4) #define ADXL367_INT_FIFO_WATERMARK_MASK BIT(2) @@ -168,6 +170,8 @@ struct adxl367_state { enum adxl367_odr odr; enum adxl367_range range; =20 + u8 int_map_reg; + unsigned int act_threshold; unsigned int act_time_ms; unsigned int inact_threshold; @@ -366,7 +370,7 @@ static int adxl367_set_act_interrupt_en(struct adxl367_= state *st, { unsigned int mask =3D adxl367_act_int_mask_tbl[act]; =20 - return regmap_assign_bits(st->regmap, ADXL367_REG_INT1_MAP, mask, en); + return regmap_assign_bits(st->regmap, st->int_map_reg, mask, en); } =20 static int adxl367_get_act_interrupt_en(struct adxl367_state *st, @@ -377,7 +381,7 @@ static int adxl367_get_act_interrupt_en(struct adxl367_= state *st, unsigned int val; int ret; =20 - ret =3D regmap_read(st->regmap, ADXL367_REG_INT1_MAP, &val); + ret =3D regmap_read(st->regmap, st->int_map_reg, &val); if (ret) return ret; =20 @@ -400,7 +404,7 @@ static int adxl367_set_act_en(struct adxl367_state *st, static int adxl367_set_fifo_watermark_interrupt_en(struct adxl367_state *s= t, bool en) { - return regmap_assign_bits(st->regmap, ADXL367_REG_INT1_MAP, + return regmap_assign_bits(st->regmap, st->int_map_reg, ADXL367_INT_FIFO_WATERMARK_MASK, en); } =20 @@ -1423,6 +1427,36 @@ static int adxl367_setup(struct adxl367_state *st) return adxl367_set_measure_en(st, true); } =20 +static int adxl367_set_int_map_reg(struct adxl367_state *st, int irq) +{ + int ret; + + /* + * Route the mappings to whichever of INT1/INT2 is named in the + * interrupt-names property. -EINVAL (property absent) and -ENODATA + * (name not listed) are not errors; anything else is. + */ + ret =3D fwnode_irq_get_byname(dev_fwnode(st->dev), "INT1"); + if (ret > 0) { + st->int_map_reg =3D ADXL367_REG_INT1_MAP; + return ret; + } + if (ret !=3D -ENODATA && ret !=3D -EINVAL) + return ret; + + ret =3D fwnode_irq_get_byname(dev_fwnode(st->dev), "INT2"); + if (ret > 0) { + st->int_map_reg =3D ADXL367_REG_INT2_MAP; + return ret; + } + if (ret !=3D -ENODATA && ret !=3D -EINVAL) + return ret; + + /* No INT1/INT2 named: default to INT1 and the bus interrupt. */ + st->int_map_reg =3D ADXL367_REG_INT1_MAP; + return irq; +} + int adxl367_probe(struct device *dev, const struct adxl367_ops *ops, void *context, struct regmap *regmap, int irq) { @@ -1479,6 +1513,11 @@ int adxl367_probe(struct device *dev, const struct a= dxl367_ops *ops, if (ret) return ret; =20 + ret =3D adxl367_set_int_map_reg(st, irq); + if (ret < 0) + return dev_err_probe(st->dev, ret, "Failed to get interrupt\n"); + irq =3D ret; + ret =3D devm_request_threaded_irq(st->dev, irq, NULL, adxl367_irq_handler, IRQF_ONESHOT, indio_dev->name, indio_dev); --=20 2.43.0