From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FE863F39C8; Mon, 31 Aug 2026 08:20:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164421; cv=none; b=q8hV0/0UiGJJ8jOYiadaBNCol1B2atAGF7sl72BOB77SKLvAVYiWtdlMoPNnRslFBoR0bAwn+pdlOktUN+BSvjRBNaXRLp8+CN6E5giKy2Ya2Bst0DQBWUUrTbfyq0Ccg5nFKN+ZlNIWjQP04YwXRt5sXIATQLnyaJkNZp8R2jY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164421; c=relaxed/simple; bh=Ya4pJnpX5WisDeNUR/GYAcZlBrgSDyfWCdda9z8QRxY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tCHkji71KIepkHFWyGdQbWUxZ7VO09vVp1PWSPwVUxWdYbAp89O7rnvnshgIHlsQoIIIdwDAbNYAVVNHw49D8nvwaO/ThS3yCkK03++STfp37JuOde5+OTj2ZlM42XVZgNhRGmy0pgeD23fXCda6McB+Kl8Uwe2kQ6bmsPQdxRg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=tRQmTI60; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=exEIEtKO; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="tRQmTI60"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="exEIEtKO" Received: from phl-compute-06.internal (phl-compute-06.internal [10.202.2.46]) by mailflow.phl.internal (Postfix) with ESMTP id A27F013800E9; Mon, 31 Aug 2026 04:20:18 -0400 (EDT) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-06.internal (MEProxy); Mon, 31 Aug 2026 04:20:18 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164418; x= 1788171618; bh=mBpU3Op3r4JDPeCWNFWPI1BaBuK91a9+fdBYmwtcAeI=; b=t RQmTI60W9XwmBoHzH5DW0CYxtcPfC6TxBa31AAWWwrub3Zv0Wb5a3KPboRgT16X3 EnNUadFOymS3t7xrEuzgdn2619Sp4d8WMMWKICvTWWAK0+CUdHMD46ZJ+7LMCK1A licFPuo0eRVvH4gqpA0N5PZ1u+9DeCh5OeBLj/Y6fMmDWh01WqZ6sve4zThmbZJU +wy+E5XdWiGWSpIpin6IXQaGrHMS/+MEXDKYm5cI6Z5Jy65lTplJq3kSdcYsbKX3 KOoi12Z45f52+/fB0DbLn7b0IcXSaYyrjAaqCaMv+4kbewQdFxazPpiW5b23r/eN 5mdIwzW7nU2oId7t680+g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164418; x=1788171618; bh=m BpU3Op3r4JDPeCWNFWPI1BaBuK91a9+fdBYmwtcAeI=; b=exEIEtKO175hhr46o stOgpFoP2ju2zWl3Cm938ErxptBTLcWozObm6hy2I8StS7KsdkU+mvKzxQi6b4+E bayzdzcWnEHTe8mERvemzoGiAYcY8t1Ehophm2hQEB3x3LsjCiyZFn5Bi+DvJktq M5nkFed/HgyosWPSPW8b08eSsSkw1tsmX+NE47JAbdnSwx2gVOun99ZReknPzuM6 kIbY+5RTj8JhWpGiBpO8rQzgp4Z4YFHfcAXeLNnS52FwWq05Ir9BXPHfitSfTVb9 Uex+0lSCP/gndl4HKLaDgymKjffVw+l9x1peAlKk14Xhvdb7lxO8ss86X5l2JTYc pCTMQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTGGv45yNZEVAFcnckiDzpTtShgB5u7mCs5YP5orSJ890J7bGUFahPSU03RmgLiAtr Jw4l31ghUGxCrG3APtLbl3i8GBubnvSq6gl6HKO8aHRUp5ikWaIvYCsJEGeV3tML7pOPXs CzEWC4pDFu+WHpAxNESshJYienY6rRqnAUfknBAVdHfefUILJ2XaoNpfTOvKv++FVGciMC B2ncF57mixOvt8aQehNcPNzuhLHc0b8pEmUA7/vQ2/jGpxr0FfbPNP2unmeFFHN2HVJZoV SLAAmz+ZYwpapuC6rFgs88iyyqWIh5rltqj2sRnN8oNbNaCk4EkbW41/vBKDpfaD74T7Do O/hEpNU8ZFEQ1F8xb5+orO0vAHY/Z7MdGJzBD9o7p9A+6bQuOPKDaMfbXREYsX9MO7W6JK ofXFSeW0HvTtXSTimAxb9+UYBAubavQMZYe5tGXrvQvRoNQ1uIycyq9N6cBq8peWhO5AmH ON8D9haiotqLqx3eAHHVTHQK8qjdd0a7Cqfb1V0/khWI+Cag77QcnyFriIEWDZmoLHWLKO +qepF3mCvnd1RdqjANo0z1o0BAEQ0Wd0iwjy/0jAiRX9hmXhMRf6t11d9m7cWfPAeiTNBB VqKv0wUaQAnNalA6H1aZg3GnKmylHU/7Qxnc91QDAlhNw7SI9rp4RKuDRB6w X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:20:09 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sidong Yang , Sebastian Reichel , Jiaxing Hu Subject: [PATCH v11 01/14] accel/rocket: request the core clocks by name Date: Mon, 31 Aug 2026 20:19:43 +1200 Message-ID: <20260831081956.84871-2-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Igor Paunovic rocket_core_init() hands core->clks to devm_clk_bulk_get() without ever setting the .id members. The rocket_core array is allocated with devm_kcalloc() in rocket_device_init(), and rocket_probe() only fills in .rdev, .dev and .index, so all four clk_bulk_data entries are requested with a NULL con_id (unlike core->resets, whose ids are set a few lines above). clk_get(dev, NULL) ends up in of_clk_get_hw(np, 0, NULL), and of_parse_clkspec() only consults "clock-names" when a name was passed, so the index stays 0 for all four entries. Every entry therefore ends up holding a handle to the *first* clock of the DT "clocks" property, i.e. ACLK_NPUn. Nothing fails: probe succeeds and the driver believes it owns four different clocks. The consequence is that rocket_device_runtime_resume() prepares and enables the AXI clock four times, while hclk, pclk and - most importantly - the NPU compute clock ("npu", SCMI_CLK_NPU on RK3588) are never prepared or enabled by this driver at all. The NPU still works only because the Rockchip power-domain driver sets GENPD_FLAG_PM_CLK and its attach_dev() callback walks the device node with of_clk_get() and adds every clock to the pm_clk list, so genpd happens to keep the remaining clocks running. The bug is therefore latent today, but it means the driver holds no reference to the clock that actually feeds the NPU, which stands in the way of any future frequency scaling (OPP/devfreq) work. Found on an Orange Pi 5 Plus (RK3588) by reading the live clock tree: /sys/kernel/debug/clk/clk_summary shows four "fdab0000.npu" consumer handles on aclk_npu0 (and likewise on aclk_npu1/aclk_npu2 for the other two cores), while hclk_npu0, pclk_npu_root and scmi_clk_npu have no "fdab0000.npu" consumer at all - their only consumers are the "npu@fdab0000" handles created by the power-domain driver via of_clk_get(). Set the ids explicitly, in the order mandated by the binding (Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml): aclk, hclk, npu, pclk. After the change the driver holds one handle per distinct clock and clk_bulk_prepare_enable() covers all four. Note that this is a user-visible tightening for out-of-tree DTs: the old NULL-id requests resolved by index and succeeded no matter what "clock-names" contained, while the named requests fail probe with -ENOENT when one of the four names is missing. That is the right outcome for in-tree users - the binding requires exactly these four clock-names and rk3588-base.dtsi carries them on all three cores - but a DT that relied on the permissive lookup goes from silently running on the wrong clock handles to not probing at all, so record the change here where git log will find it. Fixes: ed98261b4168 ("accel/rocket: Add a new driver for Rockchip's NPU") Signed-off-by: Igor Paunovic Tested-by: Sidong Yang Tested-by: Diederik de Haas # NanoPC-T6 LTS, Nan= oPC-T6 Plus Reviewed-by: Sebastian Reichel Reviewed-by: Jiaxing Hu Signed-off-by: Jiaxing Hu --- drivers/accel/rocket/rocket_core.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/accel/rocket/rocket_core.c b/drivers/accel/rocket/rock= et_core.c index b3b2fa9ba..5dd260bac 100644 --- a/drivers/accel/rocket/rocket_core.c +++ b/drivers/accel/rocket/rocket_core.c @@ -28,6 +28,10 @@ int rocket_core_init(struct rocket_core *core) if (err) return dev_err_probe(dev, err, "failed to get resets for core %d\n", cor= e->index); =20 + core->clks[0].id =3D "aclk"; + core->clks[1].id =3D "hclk"; + core->clks[2].id =3D "npu"; + core->clks[3].id =3D "pclk"; err =3D devm_clk_bulk_get(dev, ARRAY_SIZE(core->clks), core->clks); if (err) return dev_err_probe(dev, err, "failed to get clocks for core %d\n", cor= e->index); --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66B973F4DD1; Mon, 31 Aug 2026 08:20:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164429; cv=none; b=QzEX5hLj8ivQWGYES+VLv/mRZcVIApVOsfIx2hl3LfimMnOkKtdIdWoJekrsMTl3RRovVYAcuTOq9+bHYR751eiRQX6T9K3x6ak1QjYlx/ATLtz2jzRJ4fVJJBX5ufzn0xbM019W9GTRgq/UX8lV1koRdkTapdVIer62el9nbrA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164429; c=relaxed/simple; bh=vprsrG8sAYEblGk2j6cjGM8odDdLxA4Y92VQQpSkgYg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NjH5buh+gKgdf5EYCgkekWLyAzeUdvt0uj4g4YdCrSZjR3V35XAoJxy3n3jc5akGSG/b4PxCUdL5dUjzrCECQQVWmkBwoZLbbf9PqiaZEeIPNBrgJw8EX9gKW8lup2O8mbJB2rHqy97bQvNgT1w1Lu2pGNcQ4ifXykPqrQEChIQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=qdJuzmgk; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=fNWh8OPK; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="qdJuzmgk"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="fNWh8OPK" Received: from phl-compute-05.internal (phl-compute-05.internal [10.202.2.45]) by mailflow.phl.internal (Postfix) with ESMTP id ADDF41380074; Mon, 31 Aug 2026 04:20:27 -0400 (EDT) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-05.internal (MEProxy); Mon, 31 Aug 2026 04:20:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164427; x= 1788171627; bh=kOD0qgmgpDkG6VHfvGiR3DFrto+S5r/nxaFB/JMutG8=; b=q dJuzmgkWhpdba45E/IZDNrBexfCuFwyqPV3K5bvm08CfPMOPSEjC0Z/oWcBNmLSW r3wtDilk0H3rd1Eofg0ZvuqrCVTehqSZENRO6xfS06Xx/ioz3tlsqtB+El0VJ/yK ihhbg0b/DJ+vNSeaU9qSfHAMFGjrXBr92kNUpcvRiA4JQRdUN2BkLcHm7cSnUhQ3 MeDUK43aQ2LVbsULph0iD45j+1uzYkosZRmSQlzdGATM+/u5AQQGmZjHh5VwdwZK clqCRiGjSHjGhu1V5I6CVWQi2cD9k3j/1i6Vme+pEcxqh+VpJYvqq7qgU48KcRut 43xhbi2NIR6yrmrVnv0wg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164427; x=1788171627; bh=k OD0qgmgpDkG6VHfvGiR3DFrto+S5r/nxaFB/JMutG8=; b=fNWh8OPK62oA66hAc 8XgWQ9cgdPkz8WXhjdFRWI04WpuNTOTsUvU8hmqiZkRLfNxiRo3KJACoaU5RgOWk ncggU63aQynXSuss2Eoe1UUCHpVPjN+TrCaH+0C7iKp8a3TIlmYVe9BEWUzRxjnL gcjqKgDx112aRGbVzBnk85lrOoadjnoCaRlzhYmZGtUFycLJUtmpNwGecZ7074Oe TdarY/Is1h8bXdcPpVE1qMps5y9L9iPI6Rg/EXo0hJKWcU3Q5TpvJ7Z5x0+RXiIg IoAIwU6y0Nw0G9D4A2VFP5N3kLrZNggCWaIewSe6qut9sP2EV1DFN2GU/kyUcdG7 HwRPQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTGIFgHn697QN77LvkxTVd0HUgqc7dtgfWAXvrJnzjyYk/1E0GgI5UhaHEirT/WT1x b+qszzNdMAzVFopaNRs2dxhnDg09r1jPoC9MEUtixnInykmU3Pw0l3hwtCEJ1ad3c93Xay bd+l5sHxlTS6v/5iZXzAZK/4u27Ei0nAwXdeaVFF7kRMXjXXfW3iRGTZonBhmmpTvqhV+z V8Wknu+rEOyAMoGvxP8cZTL5kJKYkaLJxiSkeTXi9Trr4J2M5YjykmqP7kv72jWCs8a19h BukMvHNfzyzCVsSYvDh2T5LUAPpVgmVJhTbdZLaOSzh+ILq3lNXn5p+T2rNKefe0YsrRS2 nK19gDxbE2YJhY+vL2jbro3X9j/dRTbv5TdGtGhNPNSRS7uLUQ81Z0NnrcRq6QYtOzq69n owSQget5go3lW6V919x9l3Yh4n9dbXkPEmi8kSVCux4cIDm8l9IMm7hmlSm8FNq5kP4gQw sJGmGlW2GRNrGjgw9QXG3fx7n5P9FFCPJHKERaqPJY2W1uEmSOgrpJQMfVxhz1NEuvu/VL SOreMBdz6XnyaS1JwnFxK6n/aCkF+2HS4FzELxYp7/Xd0V2M1whCR43sgVjDJQLqvr6kO/ 5jMc7wdEk/gOegV10ylNRly2WSHBAw0eKpvubGW/ADSTRnFVDeHCabJrztDA X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:20:20 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: [PATCH v11 02/14] accel/rocket: take the completion register writes under job_lock Date: Mon, 31 Aug 2026 20:19:44 +1200 Message-ID: <20260831081956.84871-3-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" rocket_job_handle_irq() writes OPERATION_ENABLE and INTERRUPT_CLEAR before taking job_lock, while rocket_job_hw_submit() writes OPERATION_ENABLE from inside it. The two can therefore race: a completion being handled on one co= re can write its zero after a submit on the same core has written its one, and stop a task that has only just started. Nothing in tree hits this often, because the interrupt is the only completi= on path and it does not overlap its own submit, but the ordering is wrong on i= ts own terms. Move both writes inside the existing scoped_guard() rather than adding a se= cond critical section, so stopping the block and deciding what to start next are= one atomic step. Fixes: 0810d5ad88a1 ("accel/rocket: Add job submission IOCTL") Signed-off-by: Jiaxing Hu Tested-by: Igor Paunovic # RK3588, three cores --- drivers/accel/rocket/rocket_job.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index 3141f210f..5f0f9682e 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -345,10 +345,15 @@ static void rocket_job_handle_irq(struct rocket_core = *core) { pm_runtime_mark_last_busy(core->dev); =20 - rocket_pc_writel(core, OPERATION_ENABLE, 0x0); - rocket_pc_writel(core, INTERRUPT_CLEAR, 0x1ffff); + scoped_guard(mutex, &core->job_lock) { + /* + * Stopping the block belongs under the lock. hw_submit() writes + * OPERATION_ENABLE too, and outside the lock this zero can land + * after that one and stop a task that has only just started. + */ + rocket_pc_writel(core, OPERATION_ENABLE, 0x0); + rocket_pc_writel(core, INTERRUPT_CLEAR, 0x1ffff); =20 - scoped_guard(mutex, &core->job_lock) if (core->in_flight_job) { if (core->in_flight_job->next_task_idx < core->in_flight_job->task_coun= t) { rocket_job_hw_submit(core, core->in_flight_job); @@ -360,6 +365,7 @@ static void rocket_job_handle_irq(struct rocket_core *c= ore) pm_runtime_put_autosuspend(core->dev); core->in_flight_job =3D NULL; } + } } =20 static void --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4ED1A3D412B; Mon, 31 Aug 2026 08:20:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164440; cv=none; b=hAXAn/NWzgAMznwH8izlso9VYtPvJAQIlLu76iJhm4rEfmAbSkCtDgl2H7xPUp1zn1/nuQGz5JUg/lMkqO3K8rOq77wyh8tpYLqy6KhGyPk/c0nNP/AdZ1YqhkVFTQecn3qQGFqym+3TJ6n6FUtHA6ZvagdgRrQBDisVlFkOAtM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164440; c=relaxed/simple; bh=mLKiP59LoXJVXWQoRWVwvz6rmlSIz6KcbchWojiNylA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ErVCcqb9DjAeiY0CbE4DS7zi8pDjOfgmR0ySIsOY4ZlKNowB/nz3nId+/zHFDzUpU/f8YJmMhAVNdF2TfOUyLpUTQXV/1gVEAbkbAnSc2Mbj9iLKnT4nm+oJT/DpFTw9pseMp9nvVw7W3qv9EaC+U7xiC+WxZqX1Acddxyw90EY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=f7H7XXRw; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=c19MCD0x; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="f7H7XXRw"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="c19MCD0x" Received: from phl-compute-02.internal (phl-compute-02.internal [10.202.2.42]) by mailflow.phl.internal (Postfix) with ESMTP id 7240E1380074; Mon, 31 Aug 2026 04:20:37 -0400 (EDT) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-02.internal (MEProxy); Mon, 31 Aug 2026 04:20:37 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164437; x= 1788171637; bh=AsPhvud3azvo0r2BrkdCIsXDLM/tUzAdsviQlX0O/e8=; b=f 7H7XXRw2WskfLXnNQQjlE0X/A8JbiuMdh5Sb24A0nQoqHes1rZQ5ssNSoWZS9t/b 50HB7m6jVyKS9wFSkRTqU6jh7gdriWO7xIDZ7ujPjuRCuuop3rFnV5QDWUpBiO0v n7BAhNNHJQIR68v0vtY++neYGaMLwl5sq3US/MHsq3qDm9TKs/HGuF0QOwt0U/ub cSw6b71Rd/ikwvVKl/wMfM+V6ZB3dRn3RFCKXkQDR2uJ6ICP/NmqEC9mmi9J0PKN p3PsTJ26aZ4rtOUsWQ9kSF4msCvEajkL1XfMjrgCWJjq/m3DsxBlumLZ2M5Jzoim acItKbHejyyseivD/49ug== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164437; x=1788171637; bh=A sPhvud3azvo0r2BrkdCIsXDLM/tUzAdsviQlX0O/e8=; b=c19MCD0xNppLdqjSo 8UMZaMV9pHgM3SgXS+9AgAoVVD1l3WqvIe6PrAls/sXKPYAfI/xeghxioyDYDX+U vkmKYRi7IxYmXx2XeozDHo5N6qHuua0eKPJoctlVDC7bXo5E/nBwHIFJdhehyMes wHUu0f6ahrP4LDSfcVK3Gzm8eamGMGO4DAUM7M8OeeI8FlhVjd0eODg1ik6teDiE RG0CO4Hnxz2jduC1N995yur26RxDr0CYA444xoJhxwmvUK6FH+JwYSv+i1euhA1z iAUkXAeExVYPb4IKDy+rS8qRjLEWKq+DnbQ9z4TEfBse5wEGo+pSzhwMzs9Kvzdb gECIg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTGIFgHn697QN77LvkxTVd0HUgqc7dtgfWAXvrJnzjyYk/1E0GgI5UhaHEirT/WT1x b+qszzNdMAzVFopaNRs2dxhnDg09r1jPoC9MEUtixnInykmU3Pw0l3hwtCEJ1ad3c93Xay bd+l5sHxlTS6v/5iZXzAZK/4u27Ei0nAwXdeaVFF7kRMXjXXfW3iRGTZonBhmmpTvqhV+z V8Wknu+rEOyAMoGvxP8cZTL5kJKYkaLJxiSkeTXi9Trr4J2M5YjykmqP7kv72jWCs8a19h BukMvHNfzyzCVsSYvDh2T5LUAPpVgmVJhTbdZLaOSzh+ILq3lNXn5p+T2rNKefe0YsrRTV GXWCy4Nc6Xg5c2VMDpArm7CB7Jqsiy342MSwQWT5trhAiWCV8fd4ssQLpHBERMjS/r/glS tRymfWbA3D3Yt5lxoQ5UaT2AV0P28HX+apnpEw55tFUre7Tt+fGkBMVrtfXBoodKUEWMjI XuUtixBqv45vv8lvC2OufSPVaM/B5A9Uqx7UnYGUsFjnrZPzvENdV4bak+YnxayLUEO0K1 DAar6K7DjAS88jNJmUPbRA0I4ePZk6y1yTKI3C+K+uOZXdCB/uWLrnW+ffqtCNUVs7e9se 50HHvYlzHgomOP2xboIJ6k5N7368PMaMav6EX1v0PDmFfFxbt66E6scp7FDg X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:20:29 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: [PATCH v11 03/14] accel/rocket: wait for a running IRQ handler before resetting a core Date: Mon, 31 Aug 2026 20:19:45 +1200 Message-ID: <20260831081956.84871-4-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" rocket_reset() calls drm_sched_stop(), which stops the scheduler and returns. It does not wait for a threaded handler that is already running, so the comment that follows, "Remaining interrupts have been handled", states an assumption rather than something the code arranges. Call synchronize_irq(core->irq) after drm_sched_stop() and reword the comment to say what holds afterwards. It has to go before the scoped_guard(mutex, &core->job_lock) rather than inside it. rocket_job_handle_irq() takes job_lock, so waiting for the handler while holding that lock would be waiting for a handler that is waiting for us. Nothing is held at that point, and both callers, rocket_job_timedout() and rocket_reset_work(), run in process context, so sleeping there is allowed. This does not stop a handler that has already read in_flight_job from finishing its work on the job the reset is about to drop. That window needs the check and the register writes to be one step under the lock, which is what the previous patch does; the two are complementary. Mask the block before the sync as well. INTERRUPT_MASK is armed by hw_submit() on every submit and cleared only by the hardirq, so on an ordinary timeout it is still live and a completion can arrive after synchronize_irq() returns. Nothing is lost by clearing it, since the next submit arms it again. That write is the first register access this function has ever made, and it is guarded, because the function holds no runtime PM reference of its own. The only reference in the window belongs to in_flight_job, and the completion path can have put it and cleared the pointer before the timeout worker arrives: drm_sched_stop() sits in between and can block on cancel_work_sync() and on a dma_fence_wait(), and it subtracts every pending job's credits, so rocket_job_is_idle() is true and rocket_device_runtime_suspend() will not refuse. With the autosuspend delay elapsed the clocks are off and both NPU domains are down. A register access in that state takes an async SError on this hardware, which is the failure two later patches in this series describe from the power-on side. pm_runtime_get_if_active() resumes nothing and allocates nothing; if the core is already down there is no live interrupt to mask and the following synchronize_irq() is all that is needed. Igor Paunovic asked the general form of this on v8 -- whether rocket_reset() should hold a reference -- and it was deferred then because nothing in the path touched a register. This patch is what makes it matter. The deadlock this placement avoids would not have been reported. The wait is on desc->wait_for_threads rather than on a lock, so lockdep does not model it and it would have hung silently. Suggested-by: Igor Paunovic Signed-off-by: Jiaxing Hu Tested-by: Igor Paunovic # RK3588, three cores, ind= uced reset, differential base, JOB_TIMEOUT_MS=3D2 --- drivers/accel/rocket/rocket_job.c | 34 ++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index 5f0f9682e..3c0ed4605 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -377,9 +377,37 @@ rocket_reset(struct rocket_core *core, struct drm_sche= d_job *bad) drm_sched_stop(&core->sched, bad); =20 /* - * Remaining interrupts have been handled, but we might still have - * stuck jobs. Let's make sure the PM counters stay balanced by - * manually calling pm_runtime_put_noidle(). + * Mask the block before waiting. hw_submit() arms INTERRUPT_MASK on + * every submit and only the hardirq clears it, so on an ordinary + * timeout it is still live and a completion can arrive after the sync + * returns. The next submit re-arms it, so nothing is lost here. + * + * Only when the device is already awake, though. This function holds no + * runtime PM reference of its own: the only one in the window belongs to + * in_flight_job, and the completion path may have put it and cleared the + * pointer before the timeout worker got here. drm_sched_stop() above can + * block for a long time, and it drops every pending job's credits, so + * rocket_job_is_idle() is true and nothing keeps the core resumed. On + * this hardware a register access with the domain down takes an async + * SError, so a reset must not be the thing that causes one. + */ + if (pm_runtime_get_if_active(core->dev) > 0) { + rocket_pc_writel(core, INTERRUPT_MASK, 0x0); + pm_runtime_put_autosuspend(core->dev); + } + + /* + * drm_sched_stop() returns without waiting for a threaded handler that + * is already running, so wait for one here. This has to stay outside + * job_lock: the handler takes that lock, so waiting for it while + * holding it would deadlock instead of fencing anything. + */ + synchronize_irq(core->irq); + + /* + * No handler is running now, but we might still have stuck jobs. Let's + * make sure the PM counters stay balanced by manually calling + * pm_runtime_put_noidle(). */ scoped_guard(mutex, &core->job_lock) { if (core->in_flight_job) --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0E713D412B; Mon, 31 Aug 2026 08:20:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164449; cv=none; b=GaeDcF/4JgK/10ydI/2X99VLgxPwgfTQkQXEHIOrqkXvOyFIIbu3SRknPouya8DTmiVgymFe76JITublObFYycciUAmMRccsAkK9n5/lc7f/8WDioEr9xW9qTfmfRa7cD43kqWBiilElaVFCHzNvkkdFuMEMRu4/lGALoRiTvVo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164449; c=relaxed/simple; bh=vZnl+SVwuYDa7p+OKu3BmFsZ3d9XjM1VhDHTaTiOnfc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qfSs12m+ptpoy1/6WXDlrwT1GCocHdcNpK2P6rg/7TlznFY26y1TNWYIlbIT4YiT8I7ZBEJlVSEb/FAH7gmqsZbYoPBDB7VfvpkXReZomycU8POnm/8Shzz1Odg2E8xPoxSAn8s3tO4B6R5I2KX4IA6uPkjjypu0Ildn4eiVI7M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=ZEQqs4Kj; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=Auryg44p; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="ZEQqs4Kj"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="Auryg44p" Received: from phl-compute-05.internal (phl-compute-05.internal [10.202.2.45]) by mailflow.phl.internal (Postfix) with ESMTP id 0265013800E9; Mon, 31 Aug 2026 04:20:47 -0400 (EDT) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-05.internal (MEProxy); Mon, 31 Aug 2026 04:20:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164446; x= 1788171646; bh=mJzKMlAoFsqTCOtfDur8Zx+vsisRMUUea0lzAQccblM=; b=Z EQqs4KjrYEAzn2cyphBBrALVJMuYodWKxbKxCXfJmmdvGEeOtITJ78xJ4sANY5aR ODMjoFaYYZ0EpKBgUHUXZEnZORhvuoY4w2F+TAluKxTCrjAHuS4z36F8SneHyo3u tMX/crgmysu210nuO9234/CWlakbxHbrQjhUS+V2FhtFYec6gs1eWUQph4uZPt5Z P1peQlS5aHvnalc5VbGPWB7EU/sEU9Oi4lzTS8bNQIPmz1V6h6BE9ipMunRmoTCo zfwJX/Lbxbki494RtsBOfsgs/9uXpMUuGpaCllN/P4IebjMi0PDDYmJWJaHlk0yB X+uj3fEyAJpMuVw7L1OYQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164446; x=1788171646; bh=m JzKMlAoFsqTCOtfDur8Zx+vsisRMUUea0lzAQccblM=; b=Auryg44p6QAsBkDIW MFaxdRgVpf542XchrVK8wMys8Ot9D4GQ+G1vupjCsWVQ6+i8vsw99uzcMUjJJJrh 96PtLfPItLzpFALnsEBG9EU+xdOeZoZVBldxAxn9j77wD7D64uJL0fwlkGPk1rL2 x1Pg55yCDya81y80qhciY0pHifZW2xDylwqfipNioSuDRe+KcIXTXWaw2+UwK6/e 8H1gbOjSw6db9hY8UV3XYNFz15tLF5JMrwzHWS5zmoHnawMWD5JvJDta2mzxmmbu t+xlZjBkNx3BnmMe84LcVW4UUqJf/+eTIaNY6BaMGo9JmjgJGgawZJ6wu+jlUk1G t8Agg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTEDSj4wf5uUH7b4VW5aGgPjNYkwheCnOBlFEaSCsKAZCO4DaPX41bDfdUe6cEq7XV f/SxT4jjt3FgAg44zOlOGDc1jgWZqzUmYg1MOeAIqeuz86G52KG6X2EgZlGQI9zLdkd+0n Wbv1J+k6GhdWB4CQjKDHdSduI5SClYBbcPC+mMOg7aGcg9fw0WzllV0BJecnkxXDyJ7th0 DFxuYmsvE+hnSyGGN6geSTjCaHWIZE5tWcxAqdIf8erZijwCLNDVRRDtjdlPwOQLoHh2VV LEBek4TkRF0y4AtOKmEoZmiBIX4K9KGufMIc+sck/DxIta7+M76kGmE07PnV6ZDYC9/dQL mb57IWomXJfh4cx8AcF365LiBaw8ewMs7088Ac3YlDBmqHfUnOUZTbFifdU3iuj1jr+MmB OegAlD62xTSKDSxGR6+/6mJQvNjy91cjW5GIddnmGqCpGsmohvE9YJ1X44F07tSzJXyhxA 3775yyYoj93sBx1iCKwQ1k+3NHqXEDQRLsIPQuVetkhlzC94dMb/NVBufHhtzIu5vCVmDZ IKu0nXp3muIkQvF0fyMejMZxk/3FzYySwsjtkpw18JUwAMChNXeovifeCm7OTtnAiI8F1Z 6KboOjiGxKA/NZ1osKPnbXn6JvNQ3k4Xak553J0wE0s9Qk2sToCjctn0dLZg X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:20:40 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: [PATCH v11 04/14] accel/rocket: let the core suspend after a reset Date: Mon, 31 Aug 2026 20:19:46 +1200 Message-ID: <20260831081956.84871-5-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" rocket_reset() drops the in-flight job's runtime PM reference with pm_runtime_put_noidle(), a bare decrement that requests nothing. The core is left at usage_count 0 but still runtime-active with no idle request pending, so it does not suspend until something else asks, and on a platform whose power domain does work on power-on that work never happens. On RK3576 that work is a bus interface reset the domain cycles when it comes up. Without it the NPU's IOMMU stops answering, and the job after a timeout returns a surface of the output zero point with rk_iommu reporting that MMU_DTE_ADDR is not functioning. Measured on a ROCK 4D in one boot, three runs, one variable between them. With the bare put the core reads runtime-active with its rail still up after the reset, the IOMMU reports the failure on the next attach and the inference returns 0 of 128 channels. With the reference put back through pm_runtime_put_autosuspend() the core reads suspended with the rail down, there is no IOMMU message, and the same inference returns 128 of 128. A third run repeating the first failed the same way. It also matches the put in the completion path a few lines away, so the reset path no longer leaves the device in a state the rest of the driver never produces. The remaining put, on the error path in rocket_job_run(), is a plain pm_runtime_put() and is left alone here: it unwinds a get_sync() that never reached the hardware, and changing it belongs in its own patch. Igor Paunovic ran the differential on RK3588: 45 induced resets across three cores, with and without the two preceding patches, and the domain dropped every single time with no MMU message on either kernel. So this is not rocket-wide. His conditions cross a healthy block with a lowered timeout rather than a hung one, which he was careful to say his protocol cannot settle, but it is what scopes the change to RK3576. Link: https://lore.kernel.org/all/20260819073530.6087-1-royalnet026@gmail.c= om/ Fixes: 0810d5ad88a1 ("accel/rocket: Add job submission IOCTL") Signed-off-by: Jiaxing Hu Tested-by: Igor Paunovic # RK3588, three cores, ind= uced reset, JOB_TIMEOUT_MS=3D2 --- drivers/accel/rocket/rocket_job.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index 3c0ed4605..a89ab49e1 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -406,12 +406,12 @@ rocket_reset(struct rocket_core *core, struct drm_sch= ed_job *bad) =20 /* * No handler is running now, but we might still have stuck jobs. Let's - * make sure the PM counters stay balanced by manually calling - * pm_runtime_put_noidle(). + * make sure the PM counters stay balanced by putting the reference the + * job took, and request idle while doing it so the core can suspend. */ scoped_guard(mutex, &core->job_lock) { if (core->in_flight_job) - pm_runtime_put_noidle(core->dev); + pm_runtime_put_autosuspend(core->dev); =20 iommu_detach_group(NULL, core->iommu_group); =20 --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BFCF3DB96B; Mon, 31 Aug 2026 08:20:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164458; cv=none; b=sMWLqXS3seZvGTUafKXawNq9xwDCV+yPs1DInG6Zzla835fnDFUDuddNV0J4y4rRB0cqb+Py7IrizhOi3K3c8KNwzqiYLn4CZSAZF70402Pql2awQfq/5AfOT6jbndhhf+RRWMmCU8HPVfC+8DQcdfBAMGYezkA/Ke4yV0SdjbQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164458; c=relaxed/simple; bh=SRHQE8bCG1hZarDfuj2dLy5ZE4gG7sSEuLmBWXWIfB4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EOiJV5kpxt3TBP2W5esyD70XhzmlchPrkFhM1HOfTZdFz0895MO7ZzyAPRrQdDb1e4EnChwUtswgoH0gY2/EZ/VLkW6OMCwA/nSGuRyVT2l7bXG20V+0na6fMvmXkKyo/+I+y8RcMKuCUR26T9mcm+pv8JnxzCja5Xu+f7suTdA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=Fwwx/Wd7; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=EW/WL4KX; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="Fwwx/Wd7"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="EW/WL4KX" Received: from phl-compute-05.internal (phl-compute-05.internal [10.202.2.45]) by mailflow.phl.internal (Postfix) with ESMTP id 73BB113800E9; Mon, 31 Aug 2026 04:20:56 -0400 (EDT) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-05.internal (MEProxy); Mon, 31 Aug 2026 04:20:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164456; x= 1788171656; bh=hIs4JGkCZbe1hIfuDPjKMzbKJ3jJLbxC1l4hzdrLCRw=; b=F wwx/Wd7DfSW5KwV1i0PS2+qyAzZ2F9GvdUIsJk50qWErbHET0LDSC9TldcRYUp5v OZCBIzAI+nWE948A3++nxZkeA9vdGsbdY9InLklsm5CUpzZJLQO0a4oxLRLSn9gs 0TKhUg1XkHBQGzCJAeGPC7VQVt0g0SHuH/o0ik47NQlC7d7fCFmky2e1ay3C4GTi IsUacoSywDuR4Z28yMOEwkVErjoHgA/yiec6wsIoLr/Duo0rA/MmbHNcLMtn+XmI Eagy6xPPi9M6gE6FcCn0vzH7xcqJsYWmYscsnK4AJuDZJMmFzm30EKXPVsh5O71y kcfxPpb+24d2ATZmzIgzw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164456; x=1788171656; bh=h Is4JGkCZbe1hIfuDPjKMzbKJ3jJLbxC1l4hzdrLCRw=; b=EW/WL4KXxK2rs/WO4 NvOHQhYLmkY139g/cAE84dq4uJw7vmZtkPya3NDZC8nBY+b/h/i5AvMd8tMgQXTp RWucNaTffvPxMnkDMU8etkFSh2u0acNprZY6WN2g3uKcmGOzNiH5L5Oyn2dbnJAg SDLbyAUU4Z4YnWCdzpwbfJdTB8t5nNgs2A5mBfOPFZrV29KgQYiyhzEjR1XVmkqt 0YzG8RpKG1Lsx6NJf32/7r7TTHgidAhiJCRd9DZxByNWZaNiZxESAMarIZp4k4BA dLCgwoLqLD+RaImuo8cYWaE/3DumnS5pgrdAP63Ec1sgmn/EEiuR8lhUslRcUHiv HH4/g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTGYrYQ2jbMIxuQQCTBrQEZV+2IeEJvNcIZdcE9k2+nonI+MXWeL+Fq1FR2QwCrGvg gGSdLycSMfgfbE1kxPSllUMxTP/iJF0lzsn6HivhDL3LXGwnti4ujyK/i8Q7drADO1i81K M3noTNzJzt5qFNP+YDvtmt4fDPa9SsdmVpmUjZRssqd/d2WIk0TSez88y0itYx7VRZu9p5 hyBi/gwTU3HsYOw0HnQy3iy84WTZdJBZDEJUN+mIXpXclmSEQ9RkG9+4o9+kafPrg479JT lNLt9nPHiC8q9WThD5Zm2cxB8DqJUzOHOFBcRpz3xfx4ph80NuZX6vZFgzhR+6ENZvUJGO FrePjJEJbnA2bUwY0CCh4e4f4ARti5hvrFJGiKgGTEXt1zfMaDZjglPR+n6A/rzkP+6RDM R0dFN3fuEhBX6/EeEboQ9DFWad5VJFFv3p1fonh4nGMdYHyo2h8tNLAToBHt68MenAon2a hNb5sumWlFwSvHkhesnazqDpWe9h5RnZlrX8kG/snk0jvi0Z2NHPKWtUa9+5mK1+lLljXt RwEU1vAQfCqpCziYEcZRlcCjPghrRanypXiEJ1KE96B0x3Lo0lQUjbINEN6WOBHgS2mfzs IBZ0oHeu3FqmxPXb5loFD+zG6EbylmiXYeDWm1sSEk16h8O2D97GUkM589EA X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:20:49 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: [PATCH v11 05/14] accel/rocket: factor the completion tail out of the IRQ handler Date: Mon, 31 Aug 2026 20:19:47 +1200 Message-ID: <20260831081956.84871-6-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" rocket_job_handle_irq() stops the block and then either starts the job's next task or retires the job. The second half is a step of its own and reads better with a name, now that taking the register writes under job_lock has moved it a level deeper inside the scoped guard. Move it to rocket_job_next_locked(). The early return that used to leave the handler now leaves the helper, which is the same thing here: the scoped guard drops job_lock either way and nothing follows it. Doing it as its own patch keeps the locking fix at the head of the series minimal, so a bisect that stops before this one gets that fix and nothing else. There is one caller, and no functional change. Signed-off-by: Jiaxing Hu Reviewed-by: Igor Paunovic --- drivers/accel/rocket/rocket_job.c | 31 ++++++++++++++++++++----------- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index a89ab49e1..69e29f40f 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -341,6 +341,25 @@ static struct dma_fence *rocket_job_run(struct drm_sch= ed_job *sched_job) return ERR_PTR(ret); } =20 +/* Start the job's next task, or retire it. Caller holds job_lock. */ +static void rocket_job_next_locked(struct rocket_core *core) +{ + lockdep_assert_held(&core->job_lock); + + if (!core->in_flight_job) + return; + + if (core->in_flight_job->next_task_idx < core->in_flight_job->task_count)= { + rocket_job_hw_submit(core, core->in_flight_job); + return; + } + + iommu_detach_group(NULL, iommu_group_get(core->dev)); + dma_fence_signal(core->in_flight_job->done_fence); + pm_runtime_put_autosuspend(core->dev); + core->in_flight_job =3D NULL; +} + static void rocket_job_handle_irq(struct rocket_core *core) { pm_runtime_mark_last_busy(core->dev); @@ -354,17 +373,7 @@ static void rocket_job_handle_irq(struct rocket_core *= core) rocket_pc_writel(core, OPERATION_ENABLE, 0x0); rocket_pc_writel(core, INTERRUPT_CLEAR, 0x1ffff); =20 - if (core->in_flight_job) { - if (core->in_flight_job->next_task_idx < core->in_flight_job->task_coun= t) { - rocket_job_hw_submit(core, core->in_flight_job); - return; - } - - iommu_detach_group(NULL, iommu_group_get(core->dev)); - dma_fence_signal(core->in_flight_job->done_fence); - pm_runtime_put_autosuspend(core->dev); - core->in_flight_job =3D NULL; - } + rocket_job_next_locked(core); } } =20 --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5DCF53D567F; Mon, 31 Aug 2026 08:21:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164468; cv=none; b=e0mnDieuHOrEMr70P/7wfKmwMgcac3ZnhcJSpOwPbfQk3yu2rTeiMVxGOGXBGqiUg8JCjdOx/wUS8s3FDXla46wdkXg6gsPQJ538tujw0vl9Gz43KKU3lVdgwFvfmCtYmaV5TaoGkhR6vr8dX2cZ/2GxnTq/vlvlMHYZbK9+ARc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164468; c=relaxed/simple; bh=NEsxuPX5MEC4uueUZv3V5rYxGhi3i5wdU0ScVrfkiDg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OGfpU4DLzQTWncg+IyND6kMTZkFvarQXfHE2ZURZt9BIIFrny8/ZT+zHZ9wZUZnuLsG4TFLKA8epU2sYaXwkswN8AhvuJ4MsDxNjEYy5qalbVSdEBdQkbmcYocfQ9w5suCK6rMcFVggxxz5/rKf0/XDaC3uDZN2dIxJPSJvF49o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=sX2cxHa4; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=VmE4+3iW; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="sX2cxHa4"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="VmE4+3iW" Received: from phl-compute-06.internal (phl-compute-06.internal [10.202.2.46]) by mailflow.phl.internal (Postfix) with ESMTP id 5AAA71380074; Mon, 31 Aug 2026 04:21:06 -0400 (EDT) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-06.internal (MEProxy); Mon, 31 Aug 2026 04:21:06 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164466; x= 1788171666; bh=OySDevrrI40i+GobXOkYgg/pX4BBqshAOlV1V9u/EO4=; b=s X2cxHa4GS7Qpxdi5kZyWmfglGGEARi81GHBrKHhbCitq1BmDmRYySiRNJ/aHNVL/ 74ElVDNLlxh5NUiScMOolLJ0NJQI652U63X6hVj+6plmWvASM9Or3IFBsc5ORWGR S5bVDpPhiUY/NMlzcM6flyyb1M7RCFquZaNVNd50PATUp/dtj0C8ZiOdDpbwE6jF Ii8zfTe3mGFY9APS3A/YQmR5jnpGsGEByYoTbOkIUJp9voN9Ess5U8hMyvNbr959 guA+FECtfukfGZBfyWKbxRMRQ7aogYY/uXOFFErvxTPJVC1C9LgILeCAnoysOrv8 ASSZRrtBq+3UIrhDKxmMg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164466; x=1788171666; bh=O ySDevrrI40i+GobXOkYgg/pX4BBqshAOlV1V9u/EO4=; b=VmE4+3iWGuMh39x+e b0d3821m0KR2AltYTUXvnVZsWz3DtXV5CLBHuti6yAj39P55sn8qcVw86/xUUjam QRNIcZ6cLhrWlNGc9EXiZ4kNySjZNgTFkwjgn2EJrAalcztXtjTGM5cVGK6upaEW 8LEDqGlLyH8qvVtyIl0U2SSc6eNHPTZrHrh+1QZlNG1Fa/dEqpRNR4SltCNfwARq 7ZidHpnMzq2khqcc2UyaLBLA1nsyCae2L0thfjLnSblk2Z4BgewWRLz0kb0j8B5P DSOD9vlbVgo4DgszfkVOipMJQWRhrcaQdvVR1GHvKTDy9E2DNK3hsIN264a5y5lg 8lYaQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTEKWQSpa8iZqUtW1ZQqP4bDvh9SK/YZ53CarhgclGKwi9pBkSeAm2pl18Ydw9NqYm Zr/AB6JK94O+RJj3+nPdviPN4WL0ogDKkl2CMFV9N9D6NSBN5M/LV+S4GH+TRhS9zu3x5c x2UqefLwNZ1g6jIgnHYbLgvH6Qcfxwr5ayCKwx4jXlH2P7ErMCLVryfACFcfAxxNF+zWzB vhDdjBzJlYCkkDZuwtnUqHTI+YlUUPPhU6uGHE0mVT/tu7g0EvFCbzZenGG7GfkWbRsTX/ Fnz7vKpfqzHdp9e6NpI62zQZ3fDQSeSft9eBVteswNRFnAgakK0VawtlqkiHWFDHZGPme9 FK+iRODoSKjjukM6Xyrcpmvw4fUtDI/0wnkrfFECfNyhK5vH7KZBoMhqKog/ArX+0KpeXP Etn9iyKTthy2UGP2dk2e+rv4Z0yV8Gh/NsjJpGGuMF+uD8QsPKhwRbZgJDrCEZFMtzgh9j xRBKa/LyAOFhrJ2LRXf6yEDukjxeuWSt4G9wvWw0PgtjEDL1VU0xqPp9iumRgXsXJzdIYc 8ZkzBx8oOoRySfWubwpotUODTY/sBT+Cx7gTfKjwE5Cxfpiib27eudYnDfwdm0xWZn8b0X 8j8PkqzWlkcOGMZ6Yfz9FUPGuoEI/2FhrOIQNl9dzbdK1qzyfLUP/ZghXt/g X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:20:58 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu , Krzysztof Kozlowski Subject: [PATCH v11 06/14] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Date: Mon, 31 Aug 2026 20:19:48 +1200 Message-ID: <20260831081956.84871-7-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The RK3576 NPU has two cores of the same RKNN block the RK3588 binding already describes, but it wires them up differently: two extra CBUF clocks, two power domains per core, and a single reset instead of two. It also has no NPU SRAM supply. Widen the property ranges to cover both, then pin each SoC back to its own shape in allOf so nothing loosens for RK3588, and keep sram-supply required for rockchip,rk3588-rknn-core only. Signed-off-by: Jiaxing Hu Reviewed-by: Krzysztof Kozlowski --- .../npu/rockchip,rk3588-rknn-core.yaml | 47 +++++++++++++++++-- 1 file changed, 44 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-cor= e.yaml b/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.ya= ml index caca2a490..3b611b64c 100644 --- a/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml +++ b/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml @@ -21,6 +21,7 @@ properties: =20 compatible: enum: + - rockchip,rk3576-rknn-core - rockchip,rk3588-rknn-core =20 reg: @@ -33,14 +34,18 @@ properties: - const: core # Main NPU core processing unit registers =20 clocks: - maxItems: 4 + minItems: 4 + maxItems: 6 =20 clock-names: + minItems: 4 items: - const: aclk - const: hclk - const: npu - const: pclk + - const: aclk_cbuf + - const: hclk_cbuf =20 interrupts: maxItems: 1 @@ -51,12 +56,15 @@ properties: npu-supply: true =20 power-domains: - maxItems: 1 + minItems: 1 + maxItems: 2 =20 resets: + minItems: 1 maxItems: 2 =20 reset-names: + minItems: 1 items: - const: srst_a - const: srst_h @@ -75,7 +83,40 @@ required: - resets - reset-names - npu-supply - - sram-supply + +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3588-rknn-core + then: + properties: + clocks: + maxItems: 4 + clock-names: + maxItems: 4 + power-domains: + maxItems: 1 + resets: + minItems: 2 + reset-names: + minItems: 2 + required: + - sram-supply + else: + properties: + clocks: + minItems: 6 + clock-names: + minItems: 6 + power-domains: + minItems: 2 + resets: + maxItems: 1 + reset-names: + maxItems: 1 + sram-supply: false =20 additionalProperties: false =20 --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8434A2D0629; Mon, 31 Aug 2026 08:21:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164478; cv=none; b=ra6u3hTLjhMlLFayp3/KCSmsoN+7OuNrRnVHE/zS66X4kGrbW7pZ9T4e/Zc4maGsvDjnqMqdfgLL8yJCMaIlUH6bbM/rIGf0az2e4TI34gMi6HfU/yWBBk9om01zcpZpuH9rUVRXoRyRCqXLLzFmSKqP4Uv8nNzf8SmsPHHCJjg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164478; c=relaxed/simple; bh=ocxI92rXz6jlGIQBVHlzlo7HwU0/NSLjOc0Plg88GpU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dlFTZ3nDEvH1Yap28RZIf9WdYrmxHmFpQvRf/Auwg71u+AHzwJrsSos5Iaekz1iTQVmZXZEeVPZTvT1b8mk/snDPa3HKN05ZtpN78yIvTBff3tjMHxFXFDsO6ht0Jpw/zmrJan2pIff68uQuCWtuiwqxKkYpzNQhBCObENksaaw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=FBA15nfl; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=M0sdoCPe; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="FBA15nfl"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="M0sdoCPe" Received: from phl-compute-04.internal (phl-compute-04.internal [10.202.2.44]) by mailflow.phl.internal (Postfix) with ESMTP id E70371380074; Mon, 31 Aug 2026 04:21:16 -0400 (EDT) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-04.internal (MEProxy); Mon, 31 Aug 2026 04:21:16 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164476; x= 1788171676; bh=W7m+cCkjA3WueMD/RPZpNcMr0lXTVLw93fSG4CHMuGk=; b=F BA15nfl4XMlldY/SWRxQZKiFoS0d8nHJg25a1URC1plCcMZuJh9GyPGFY54TZRSV vuATOsmXhKyNsyAATBX0iCAOphIryqSNPGavtCGc2aF8fvkqq++/u5wTsKS3L/Jg rMJlK3KWL4XxHJqSC/JgXI95WjMEYQxt20qEx9T/G6A3/lgGijnhf8O4hkd5o/YD oGqDj7PZcG433aX+sVqAdB78uy0W2ghQTQGjK5gp1fvlv/PiFkwmJspn8n0nXWZs EQTUmnu3kxQJgGrjCPOrfpsSclRpVk3fgDKNw28SDCTUD97mOx7bg+4dDHL/N6Hc qMHykoTYzjCAY0GVQ6BkA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164476; x=1788171676; bh=W 7m+cCkjA3WueMD/RPZpNcMr0lXTVLw93fSG4CHMuGk=; b=M0sdoCPecJefgty0L 9yJtb1eecSqh4Fp1pVxJnFXDveH7QeOM8fMq7OiRrpvD9QFmwxqkNyoamEm+eIT/ W7gdM7i4NaJ9IC2zhQiTwPxJG6FBuagZnZtYzYib2RgfS6Ii1SJa5w3QDSZ7pGRL GLGR43zFQh8s9mBlzyng+qnVkiDV81KJxUNLJh/zaY0EW7bXwyL+CiMZlmkwlU+w lLacYy5gbRITMPbvgb4UZlu1JgtSsxA9HRumqzhXoou2iVYpBlPgbDtFnk+8Ga+8 9Fi4JDjcgufVP5CT9ip25+jnW3UNzm6724naaovZpb5dWJVsqP55q8+BESb157VZ MOdpA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTEKWQSpa8iZqUtW1ZQqP4bDvh9SK/YZ53CarhgclGKwi9pBkSeAm2pl18Ydw9NqYm Zr/AB6JK94O+RJj3+nPdviPN4WL0ogDKkl2CMFV9N9D6NSBN5M/LV+S4GH+TRhS9zu3x5c x2UqefLwNZ1g6jIgnHYbLgvH6Qcfxwr5ayCKwx4jXlH2P7ErMCLVryfACFcfAxxNF+zWzB vhDdjBzJlYCkkDZuwtnUqHTI+YlUUPPhU6uGHE0mVT/tu7g0EvFCbzZenGG7GfkWbRsTX/ Fnz7vKpfqzHdp9e6NpI62zQZ3fDQSeSft9eBVteswNRFnAgakK0VawtlqkiHWFDHZGPmGy ES5cI/K4VKSyJ3NT8NrFVMq3e235rxbEpOwsyuw/XGIxET5zjS9kaaOq0ERZHsHWwsL3LD iCRjxH4INK6zOwqMV8vRJID7sEzY215dgJOz/LIPs7XbSoLgejsLkuf3A2xSpLC43BVJqT fa81NwWad6rIk8RtsvWSRzSln02R4zJgW1Djw5ShC01BtYrWZo2zD6HQEc8Ht+kJLrWNFI u8f/54JTonqlMAbDCCHB2hIYvrCNN4xWH24nUaYvQ7gc86VDxTEXdjVgPN9GPtqTic7yJG k72T/Zjiji9JBSgNqLaUakxB8frfuI6xr0HNDhPryC6AOqMGwObQri7qs+ug X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:21:08 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu , Conor Dooley Subject: [PATCH v11 07/14] dt-bindings: power: rockchip: allow resets in a power domain node Date: Mon, 31 Aug 2026 20:19:49 +1200 Message-ID: <20260831081956.84871-8-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some domains do not come up in a usable state on their own and need their resets cycled once power is on. The RK3576 NPU domains are one case: without it the first access after power-on takes an async SError. Signed-off-by: Jiaxing Hu Acked-by: Conor Dooley --- .../bindings/power/rockchip,power-controller.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/power/rockchip,power-control= ler.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controlle= r.yaml index b41db576f..83741f048 100644 --- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -136,6 +136,13 @@ $defs: A number of phandles to clocks that need to be enabled while power domain switches state. =20 + resets: + maxItems: 1 + description: + A phandle to a reset that needs to be cycled once the power doma= in has + been switched on, for domains whose logic does not come up in a = usable + state by itself. + domain-supply: description: domain regulator supply. =20 @@ -216,6 +223,7 @@ examples: reg =3D ; clocks =3D <&cru ACLK_IEP>, <&cru HCLK_IEP>; + resets =3D <&cru SRST_A_IEP>; pm_qos =3D <&qos_iep>; #power-domain-cells =3D <0>; }; --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86A133D6682; Mon, 31 Aug 2026 08:21:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164488; cv=none; b=kB8bnMIp0UTphKyl5hQvAJHGq3mWSKVyTsnz2LhGs1i6u3t9f2wKhNz5gX2hNcKN7Gd1WRtyDZfr7dxeQR6VbmmeEYy+tVOdzRiCyuVm9mV1B2NuZxl/qYMefa7nTQKQc/0b0vy2b1Kn7x5Fe5r1hQSFa0XTWTo+VJavkY9b9/0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164488; c=relaxed/simple; bh=CnWYRGn8A2CYIxAKUN6+IpvR0RZSQZ+TrHmYhGYwjSw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rklQTsR5zwM+Bhl36RUMOMXKHv6jr2lDxZ+Sbr1g5ovpECk8DawSbFopJsComISQZ+dTmgYahg8y0D7ezyjAB1vCwwOp3OeXqFDm5mecR/gPCdKILSklUukjOpiBEKn5y/xiIODBitZwqhz8jrd3l8GGNDfRYm1JR8nuGkOt65Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=ibDflDyj; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=CN5zPA41; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="ibDflDyj"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="CN5zPA41" Received: from phl-compute-02.internal (phl-compute-02.internal [10.202.2.42]) by mailflow.phl.internal (Postfix) with ESMTP id B631E1380045; Mon, 31 Aug 2026 04:21:26 -0400 (EDT) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-02.internal (MEProxy); Mon, 31 Aug 2026 04:21:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164486; x= 1788171686; bh=Bm7huY5WQXjxwqWxfiTvH04R09OwCZF8hQZPpxtRqLo=; b=i bDflDyjBgQ0J+IIy4xlOXSay/81GUr8smw5IDwtIoHehw9BVCj6u44zGqvj2umV8 NBT98cLunQVdT5dk7z/2T8FXrfTU6k1FEkOS6GWFyD8p2tUdhtQYTd58EPUkGfOL IdcYlwwAFsw7aTnZKxQZsGMBRHlBZboEFBbR6MVB+MJHoMs/+cn6OmiX9ln9AriD 21yZQss5nPmT/my/KwxZZrMbKbNK3Vy1xOyyHp0EVfR5ptCnimTm2Aa4v+wkfjUo eRLu4EkFlq2dLblJt7+To5Pi2ynAx4QhMCKIBFrAMvmDKy/QWPMZw30KySDi8Q3A nP8JnyAuJQOE7cWrm5meA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164486; x=1788171686; bh=B m7huY5WQXjxwqWxfiTvH04R09OwCZF8hQZPpxtRqLo=; b=CN5zPA41V+cL4kDhz cNMRI6ph8Op0KW4QcbIQLaiDSzMTPwkz1dr1+uwtm+hRqliYfWFeW50Ir6Ff4qKL XSiKMkEgxTgtoz+27EQrusul5f7ZTjLOzaDCUdQPY6sJhGsFeESjsonbxgIRhENV BzkeOOI0+wcp9jUQ2F7bkItncxFefJw/wN/aATCIbV7hTA2gHcRS56XNdCa7wbl+ qvnXLxbVUlE+ojGB7ogfjRMeicbhCmrgumWY6k7h4zW+bzeQZ9HYcbzSZfxf6C8v Qb9LU0Aap1atfNNiuGXvknBklyt3LdZhz0D1fyjMn4jwKSCwaj+4W0Lq43UOpE4M zdgPg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTGdGJxeVuW+Fmrt/Ef5qeMDFHGjonl8OVkqV4Q9pjx4ZDlXIa4Z3pOc6nqsAGbFM5 cWlbiX1SVX30CexdPBxYt3awlQb1f1VabgQ1+kwGrf/tqGBQR6d2lw5RrnEV6FL0zCLBXY ybqqMjW04LTdiKVaoW/ueoWC57BUXXhq/gLbRORJuDA51/iSsme3r5tmV2YwHq2SFTmV8f qmkLVMySqF/+M0VTPAV1bEl/RNXhLViTLJtdkIjM0/0F1iGTOIQFc8XdpRTpYODYq5KIVJ rrfOCVoYg5oCW3a07vpVJtmuFrLRw/b3yMPQFvd+9PcwM7BPjK/SyOTGn8jtYhGarwxLdb xXbl3j/fcqsE7TsqdsIqt3W5yY8+Dbkb1p0BNv6PM+egLTskWXj+912F8OUU/DaLhEfQ4X lq4oRCA/JrphBVR8E/44M+b9AwF1BD6npJme38cKZEcTqrfUrgx5j/K+Dx912pDCFTwcay /gErKAsoa4jXfcojxfpMMFTnsoxGNWZ6fOQf1Pn+jhMX0A9E4BdYmzPsoP2tSiYKapwCfQ 71iu8EIi0sZFvZ6OLtxe86qwLP1f5lLaKPo28LyU4bM1Ka+Yp44jRq6a3SNKCbw8xbczuP ZP6YPztvg1WhRkz3vw8ueCsXH0ZOACh3cvdv3GU8v6DPKNZ1YlTRyNXVp48w X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:21:19 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu , Conor Dooley Subject: [PATCH v11 08/14] dt-bindings: iommu: rockchip: describe the RK3576 NPU MMU Date: Mon, 31 Aug 2026 20:19:50 +1200 Message-ID: <20260831081956.84871-9-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The RK3576 NPU MMUs are rk3568-iommu compatible but take five clocks where every other Rockchip MMU takes two, the extra three being the compute clock and the two convolution buffer clocks. Give them a compatible of their own and pin both sides with an allOf, so that an rk3568-iommu cannot carry five clocks and an NPU MMU cannot carry two. Describing the extra clocks as belonging to one SoC without saying so in the schema, which is what a comment on a description does, leaves both of those spellings valid. Signed-off-by: Jiaxing Hu Acked-by: Conor Dooley --- .../bindings/iommu/rockchip,iommu.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml b/= Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml index 6ce41d11f..83d7e7c8e 100644 --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml @@ -26,6 +26,7 @@ properties: - items: - enum: - rockchip,rk3576-iommu + - rockchip,rk3576-npu-iommu - rockchip,rk3588-iommu - const: rockchip,rk3568-iommu =20 @@ -42,14 +43,22 @@ properties: minItems: 1 =20 clocks: + minItems: 2 items: - description: Core clock - description: Interface clock + - description: Compute clock + - description: Convolution buffer core clock + - description: Convolution buffer interface clock =20 clock-names: + minItems: 2 items: - const: aclk - const: iface + - const: npu + - const: aclk_cbuf + - const: hclk_cbuf =20 "#iommu-cells": const: 0 @@ -72,6 +81,25 @@ required: - clock-names - "#iommu-cells" =20 +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3576-npu-iommu + then: + properties: + clocks: + minItems: 5 + clock-names: + minItems: 5 + else: + properties: + clocks: + maxItems: 2 + clock-names: + maxItems: 2 + additionalProperties: false =20 examples: --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E524E3DD86B; Mon, 31 Aug 2026 08:21:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164499; cv=none; b=Jp+ac89GArxN26X7elXFFz57HpgEXGeVapUWOoUF2MNsO76+FqfGHmjS1xMQA0MKJZkskBSyJKtsQY9U4bQXej8fM8JCLrV7tpXd2HeDxnwvSES/zPvPdR8zbsTmn/QWdkufNHvWfHiSaiCmvDXZsTMKQz6RVcAVIjhwkf2z7vA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164499; c=relaxed/simple; bh=SRhhWMlozuwNggx+S4JqVHrnjVkGIzrN0X/1ZjwOLlo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f3YkzsNxMrr8mL1GhOWMD5J7xPbTpRJkHcMkLKMqrE6uSE5WrgmQHNSGHZZaVSv2QMdcUMFOIHeOUJ6K2IY4Zmt5yv/5rrIApukIXGMYxGpkIKU4GWbS/h/53njHAym9Zr8adXGZ26TQ/jStOB99oygv+/7k7u1Y88n4GJYd0qQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=ovE718xW; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=WpB1qFCI; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="ovE718xW"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="WpB1qFCI" Received: from phl-compute-04.internal (phl-compute-04.internal [10.202.2.44]) by mailflow.phl.internal (Postfix) with ESMTP id EC7531380045; Mon, 31 Aug 2026 04:21:36 -0400 (EDT) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-04.internal (MEProxy); Mon, 31 Aug 2026 04:21:36 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164496; x= 1788171696; bh=RQ6rBrSJe6hrXKU3Mfyt8fg+HplP4vBGkXqKwlm5QaQ=; b=o vE718xWn7mabuGt9w8tUv08ZpyTcL2I2mD7awbjzRbQhdaxgK7QEohD8/gt56dck 98TX3DjnGwULc0YmkLGXVMvtxF5sKDrdvPiqNU8UCKJxLOse2Ec/B3sV6HmXlLKB n8GtxuJ4ZfC+9bJPT2m5UagM8LZoQax9IzzkZLyN1vmjlOAn9xnC/qwIgM9Mlv2I 4VtavGwFQ0KlsXWS6OcY8FqyPO0SOxDJlr7INwfXCd6yglDlmVcOtahJUjTphC2u oCIBm1Ny+ExX1+3dyJOucHny9hzLvAPukldP7F+3kEwAjNxtVXwzUo0TLQ9Kgfa8 b4tyop1DQi+45r622yHmg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164496; x=1788171696; bh=R Q6rBrSJe6hrXKU3Mfyt8fg+HplP4vBGkXqKwlm5QaQ=; b=WpB1qFCIylWx0BC0w BBx6zU2SsdabK8dPfT/xTIF2hwRTRbx8r1Mo4xEu93XpcAawr86rSvntanZVrDHp INRT+PZlevXiBvAtO6+fkEuKnkFcbjIkl4HsCB7b77/kWH35KrGtQOinvGJ2Mb7I Jibkgdz0orceA+AC5SNh6gk0fMgzG9oyOKOKhlFXquhYVCM6lfnhM4vrG031LfhH ehkVH5nhRQ4V19swUx30oUVzH6ZedtD5SHN2OV81plZWSHfxkMV0YgDFIQeFAxix XZ34VcPpcopElHYHV0YL/3K2HScHSSXgnEYAZUZMUh5ByZ0DqvIx+dHmhj4Kpcrk PBK9g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTEKWQSpa8iZqUtW1ZQqP4bDvh9SK/YZ53CarhgclGKwi9pBkSeAm2pl18Ydw9NqYm Zr/AB6JK94O+RJj3+nPdviPN4WL0ogDKkl2CMFV9N9D6NSBN5M/LV+S4GH+TRhS9zu3x5c x2UqefLwNZ1g6jIgnHYbLgvH6Qcfxwr5ayCKwx4jXlH2P7ErMCLVryfACFcfAxxNF+zWzB vhDdjBzJlYCkkDZuwtnUqHTI+YlUUPPhU6uGHE0mVT/tu7g0EvFCbzZenGG7GfkWbRsTX/ Fnz7vKpfqzHdp9e6NpI62zQZ3fDQSeSft9eBVteswNRFnAgakK0VawtlqkiHWFDHZGPmGj cWZGrc1W4131dd/QJGTSTo0YtgxXW88jNcw5ijVRGejVF+DcynmD5wU2k8W2BvDD2uQEjx 2HtddvRiCoYOZpZrRKSXNpzjCLpzx34OOhQNWX1F0+YNbgP0FiNe2w8nT0N5sPuFBX1j1J qrSt292yNXClnmtjIEn3q8HzQ8ujEaAEalvKhVmIEKp6EkAuhW5rzIaYuZakSC7B/86r2A xjbNiZiq8SchXNRSi8qlS5ZUo88Ci/8xSMFEyZfHcsq85KSpCgwXLCLQuVIrFryJSwDPdC wFL/cZgZZwgfmDb+WzsjSgug21gogalzjnJ/8riG50jWjyJ5pM3Mn6AX9ZMg X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:21:29 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu , Abel Vesa Subject: [PATCH v11 09/14] pmdomain/rockchip: add optional per-domain power-on settle delay Date: Mon, 31 Aug 2026 20:19:51 +1200 Message-ID: <20260831081956.84871-10-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The RK3576 NPU domains need a short settle time after the idle request is released before the registers behind the domain answer. Without it the QoS writes that rockchip_pmu_restore_qos() issues land while the domain is still coming up, and the NPU throws an async SError on the first cold power-on. Give rockchip_domain_info an optional delay_us and wait for it between releasing idle and restoring QoS. Rename DOMAIN_M_O_R_G to DOMAIN_M_O_R_G_W, since the suffixes name the fields the macro sets and this one now also carries a wakeup delay; RK3576 is its only user, so the old spelling is not kept around. While the macro is being rewritten, give it the regulator argument that DOMAIN_M_O_R and DOMAIN_M_R already take. Without .need_regulator set, rockchip_pd_regulator_enable() returns early for every RK3576 domain, so a domain-supply in the device tree is never looked up and never enabled. Add a DOMAIN_RK3576_R spelling that passes true and use it for RK3576_PD_NPU, which is the one RK3576 domain with a rail of its own; every other domain passes false and is unchanged. Signed-off-by: Jiaxing Hu Reviewed-by: Abel Vesa --- drivers/pmdomain/rockchip/pm-domains.c | 56 ++++++++++++++++---------- 1 file changed, 34 insertions(+), 22 deletions(-) diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rock= chip/pm-domains.c index ba66ae719..39988efd8 100644 --- a/drivers/pmdomain/rockchip/pm-domains.c +++ b/drivers/pmdomain/rockchip/pm-domains.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -59,6 +60,7 @@ struct rockchip_domain_info { u32 pwr_offset; u32 mem_offset; u32 req_offset; + u32 delay_us; }; =20 struct rockchip_pmu_info { @@ -185,7 +187,7 @@ struct rockchip_pmu { .need_regulator =3D regulator, \ } =20 -#define DOMAIN_M_O_R_G(_name, p_offset, pwr, status, m_offset, m_status, r= _status, r_offset, req, idle, ack, g_mask, wakeup) \ +#define DOMAIN_M_O_R_G_W(_name, p_offset, pwr, status, m_offset, m_status,= r_status, r_offset, req, idle, ack, g_mask, delay, wakeup, regulator) \ { \ .name =3D _name, \ .pwr_offset =3D p_offset, \ @@ -200,8 +202,10 @@ struct rockchip_pmu { .req_mask =3D (req), \ .idle_mask =3D (idle), \ .clk_ungate_mask =3D (g_mask), \ + .delay_us =3D (delay), \ .ack_mask =3D (ack), \ .active_wakeup =3D wakeup, \ + .need_regulator =3D regulator, \ } =20 #define DOMAIN_M_R(_name, pwr, status, req, idle, ack, wakeup, regulator) \ @@ -258,8 +262,11 @@ struct rockchip_pmu { #define DOMAIN_RK3568(name, pwr, req, wakeup, regulator) \ DOMAIN_M_R(name, pwr, pwr, req, req, req, wakeup, regulator) =20 -#define DOMAIN_RK3576(name, p_offset, pwr, status, r_status, r_offset, req= , idle, g_mask, wakeup) \ - DOMAIN_M_O_R_G(name, p_offset, pwr, status, 0, r_status, r_status, r_offs= et, req, idle, idle, g_mask, wakeup) +#define DOMAIN_RK3576(name, p_offset, pwr, status, r_status, r_offset, req= , idle, g_mask, delay, wakeup) \ + DOMAIN_M_O_R_G_W(name, p_offset, pwr, status, 0, r_status, r_status, r_of= fset, req, idle, idle, g_mask, delay, wakeup, false) + +#define DOMAIN_RK3576_R(name, p_offset, pwr, status, r_status, r_offset, r= eq, idle, g_mask, delay, wakeup) \ + DOMAIN_M_O_R_G_W(name, p_offset, pwr, status, 0, r_status, r_status, r_of= fset, req, idle, idle, g_mask, delay, wakeup, true) =20 /* * Dynamic Memory Controller may need to coordinate with us -- see @@ -681,6 +688,10 @@ static int rockchip_pd_power(struct rockchip_pm_domain= *pd, bool power_on) if (ret < 0) goto out; =20 + /* Some domains need to settle before the QoS registers answer. */ + if (pd->info->delay_us) + udelay(pd->info->delay_us); + rockchip_pmu_restore_qos(pd); } =20 @@ -1300,25 +1311,26 @@ static const struct rockchip_domain_info rk3568_pm_= domains[] =3D { }; =20 static const struct rockchip_domain_info rk3576_pm_domains[] =3D { - [RK3576_PD_NPU] =3D DOMAIN_RK3576("npu", 0x0, BIT(0), BIT(0), 0, = 0x0, 0, 0, 0, false), - [RK3576_PD_NVM] =3D DOMAIN_RK3576("nvm", 0x0, BIT(6), 0, BIT(6)= , 0x4, BIT(2), BIT(18), BIT(2), false), - [RK3576_PD_SDGMAC] =3D DOMAIN_RK3576("sdgmac", 0x0, BIT(7), 0, BIT(= 7), 0x4, BIT(1), BIT(17), 0x6, false), - [RK3576_PD_AUDIO] =3D DOMAIN_RK3576("audio", 0x0, BIT(8), 0, BIT(8= ), 0x4, BIT(0), BIT(16), BIT(0), false), - [RK3576_PD_PHP] =3D DOMAIN_RK3576("php", 0x0, BIT(9), 0, BIT(9)= , 0x0, BIT(15), BIT(15), BIT(15), false), - [RK3576_PD_SUBPHP] =3D DOMAIN_RK3576("subphp", 0x0, BIT(10), 0, BIT(= 10), 0x0, 0, 0, 0, false), - [RK3576_PD_VOP] =3D DOMAIN_RK3576("vop", 0x0, BIT(11), 0, BIT(11= ), 0x0, 0x6000, 0x6000, 0x6000, false), - [RK3576_PD_VO1] =3D DOMAIN_RK3576("vo1", 0x0, BIT(14), 0, BIT(14= ), 0x0, BIT(12), BIT(12), 0x7000, false), - [RK3576_PD_VO0] =3D DOMAIN_RK3576("vo0", 0x0, BIT(15), 0, BIT(15= ), 0x0, BIT(11), BIT(11), 0x6800, false), - [RK3576_PD_USB] =3D DOMAIN_RK3576("usb", 0x4, BIT(0), 0, BIT(16= ), 0x0, BIT(10), BIT(10), 0x6400, true), - [RK3576_PD_VI] =3D DOMAIN_RK3576("vi", 0x4, BIT(1), 0, BIT(17)= , 0x0, BIT(9), BIT(9), BIT(9), false), - [RK3576_PD_VEPU0] =3D DOMAIN_RK3576("vepu0", 0x4, BIT(2), 0, BIT(1= 8), 0x0, BIT(7), BIT(7), 0x280, false), - [RK3576_PD_VEPU1] =3D DOMAIN_RK3576("vepu1", 0x4, BIT(3), 0, BIT(1= 9), 0x0, BIT(8), BIT(8), BIT(8), false), - [RK3576_PD_VDEC] =3D DOMAIN_RK3576("vdec", 0x4, BIT(4), 0, BIT(20= ), 0x0, BIT(6), BIT(6), BIT(6), false), - [RK3576_PD_VPU] =3D DOMAIN_RK3576("vpu", 0x4, BIT(5), 0, BIT(21= ), 0x0, BIT(5), BIT(5), BIT(5), false), - [RK3576_PD_NPUTOP] =3D DOMAIN_RK3576("nputop", 0x4, BIT(6), 0, BIT(= 22), 0x0, 0x18, 0x18, 0x18, false), - [RK3576_PD_NPU0] =3D DOMAIN_RK3576("npu0", 0x4, BIT(7), 0, BIT(23= ), 0x0, BIT(1), BIT(1), 0x1a, false), - [RK3576_PD_NPU1] =3D DOMAIN_RK3576("npu1", 0x4, BIT(8), 0, BIT(24= ), 0x0, BIT(2), BIT(2), 0x1c, false), - [RK3576_PD_GPU] =3D DOMAIN_RK3576("gpu", 0x4, BIT(9), 0, BIT(25= ), 0x0, BIT(0), BIT(0), BIT(0), false), + /* name p_offset pwr s= tatus r_status r_offset req idle g_mask delay wakeup */ + [RK3576_PD_NPU] =3D DOMAIN_RK3576_R("npu", 0x0, BIT(0), BIT(0), 0, = 0x0, 0, 0, 0, 0, false), + [RK3576_PD_NVM] =3D DOMAIN_RK3576("nvm", 0x0, BIT(6), 0, BIT(6)= , 0x4, BIT(2), BIT(18), BIT(2), 0, false), + [RK3576_PD_SDGMAC] =3D DOMAIN_RK3576("sdgmac", 0x0, BIT(7), 0, BIT(= 7), 0x4, BIT(1), BIT(17), 0x6, 0, false), + [RK3576_PD_AUDIO] =3D DOMAIN_RK3576("audio", 0x0, BIT(8), 0, BIT(8= ), 0x4, BIT(0), BIT(16), BIT(0), 0, false), + [RK3576_PD_PHP] =3D DOMAIN_RK3576("php", 0x0, BIT(9), 0, BIT(9)= , 0x0, BIT(15), BIT(15), BIT(15), 0, false), + [RK3576_PD_SUBPHP] =3D DOMAIN_RK3576("subphp", 0x0, BIT(10), 0, BIT(= 10), 0x0, 0, 0, 0, 0, false), + [RK3576_PD_VOP] =3D DOMAIN_RK3576("vop", 0x0, BIT(11), 0, BIT(11= ), 0x0, 0x6000, 0x6000, 0x6000, 0, false), + [RK3576_PD_VO1] =3D DOMAIN_RK3576("vo1", 0x0, BIT(14), 0, BIT(14= ), 0x0, BIT(12), BIT(12), 0x7000, 0, false), + [RK3576_PD_VO0] =3D DOMAIN_RK3576("vo0", 0x0, BIT(15), 0, BIT(15= ), 0x0, BIT(11), BIT(11), 0x6800, 0, false), + [RK3576_PD_USB] =3D DOMAIN_RK3576("usb", 0x4, BIT(0), 0, BIT(16= ), 0x0, BIT(10), BIT(10), 0x6400, 0, true), + [RK3576_PD_VI] =3D DOMAIN_RK3576("vi", 0x4, BIT(1), 0, BIT(17)= , 0x0, BIT(9), BIT(9), BIT(9), 0, false), + [RK3576_PD_VEPU0] =3D DOMAIN_RK3576("vepu0", 0x4, BIT(2), 0, BIT(1= 8), 0x0, BIT(7), BIT(7), 0x280, 0, false), + [RK3576_PD_VEPU1] =3D DOMAIN_RK3576("vepu1", 0x4, BIT(3), 0, BIT(1= 9), 0x0, BIT(8), BIT(8), BIT(8), 0, false), + [RK3576_PD_VDEC] =3D DOMAIN_RK3576("vdec", 0x4, BIT(4), 0, BIT(20= ), 0x0, BIT(6), BIT(6), BIT(6), 0, false), + [RK3576_PD_VPU] =3D DOMAIN_RK3576("vpu", 0x4, BIT(5), 0, BIT(21= ), 0x0, BIT(5), BIT(5), BIT(5), 0, false), + [RK3576_PD_NPUTOP] =3D DOMAIN_RK3576("nputop", 0x4, BIT(6), 0, BIT(= 22), 0x0, 0x18, 0x18, 0x18, 15, false), + [RK3576_PD_NPU0] =3D DOMAIN_RK3576("npu0", 0x4, BIT(7), 0, BIT(23= ), 0x0, BIT(1), BIT(1), 0x1a, 15, false), + [RK3576_PD_NPU1] =3D DOMAIN_RK3576("npu1", 0x4, BIT(8), 0, BIT(24= ), 0x0, BIT(2), BIT(2), 0x1c, 15, false), + [RK3576_PD_GPU] =3D DOMAIN_RK3576("gpu", 0x4, BIT(9), 0, BIT(25= ), 0x0, BIT(0), BIT(0), BIT(0), 0, false), }; =20 static const struct rockchip_domain_info rk3588_pm_domains[] =3D { --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 489153D34AC; Mon, 31 Aug 2026 08:21:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164509; cv=none; b=ZKk4UOXF2UZnm5D6N1tpo3KPVAiiiFyadF7ZciK6UtYwTuvXOIt440dTQPwmc4m4KiLEPOUBqIobmUsxkkqXKhnJNz7gwSYyNRE4OfuAh92Z/DYc1/VlgHzzZQ96NkgMac90PtJVKLovM+ITtHzc9lnEVzuSplS0plXhCI4Je5Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164509; c=relaxed/simple; bh=i98h2KyVaWOr/iBF7stkkIKZk/URJTaweBKbY2mKOOs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EXcfzFON9mrUC5KR3s3QYhZzEgKlpdeGpGByAzmwrq+eu0d9pGMdsV4a91d+7xm6AQ8TZyo6/5xIqTDBauEsBHbC5KUKkA5wCZO+Ii8WgkwhsgQFC/W9G5kZwACqypu/tsyiNjbcaKjX25qwFvf6N63K/8oYmJag7P0W/5uqtIY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=qHVikLFW; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=BkzsxfYd; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="qHVikLFW"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="BkzsxfYd" Received: from phl-compute-03.internal (phl-compute-03.internal [10.202.2.43]) by mailflow.phl.internal (Postfix) with ESMTP id 711431380045; Mon, 31 Aug 2026 04:21:47 -0400 (EDT) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-03.internal (MEProxy); Mon, 31 Aug 2026 04:21:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164507; x= 1788171707; bh=EuzlYllSmAZP6yajMRsW2NaQ/7lmKof72TRcxeRmWS4=; b=q HVikLFWi/fiHRnyEhpJfLitC7oOvrcleOhyCbn1OJcHyu9NPO3ooGG/WTcy1JsCb olbUAFmPsaguSETvAJLoLuImX5PChS586MYiAj3vczxsIaubCUSnkbcvcfwgj/Vj 1nJh3+P95+frqy67AHi7pn3BWAjLb+btqRqRPCI0Zc0Bbx8NNlI1oiNyWGmOH3DF 8xbd8yVoIyAYfJdXuML+o9y6c7jbZw2gm5aR2V9x4vKSAt/YBm3bFplLfQR1zYsz 87iqrQ1gzpfYdkRqAcYvt6CqYTqwrf8UNVMr+qR4z0xaGSmxe3AO4Td7h4xahMFh z0BiOORGd9o3MHl0lQABQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164507; x=1788171707; bh=E uzlYllSmAZP6yajMRsW2NaQ/7lmKof72TRcxeRmWS4=; b=BkzsxfYdLk9VCMPCM pLjQh1ftD51Sx35+o+7C5/wN7L7V+SNz+1gGxjKPAfyCjV32bkK22zQjFg1H3HR0 GsG7629+oe9evY4/0kjhq+GNPCfQmPx+sSWd+tG8Pu2Ay/Ztck0oPqt6MURPoxlk e7ASDHTbGPG1T1ijhvPuZeptg6gRhjeKnF4ILzZpV3JlfxM54rb2+JF90pn2pMsq 4Q1tapk8H3DrnBNf4gVCgvLmv36/KZSu3a5DYqphPizlCzzzVAm/UFICndF5NxP4 UwEFFwTginyjlfJgdjwEFyAYe0RKgstmuPWQQ7BmTr/2CrGGEdx6GFZwQDCFDlBL 6CW2g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTEKWQSpa8iZqUtW1ZQqP4bDvh9SK/YZ53CarhgclGKwi9pBkSeAm2pl18Ydw9NqYm Zr/AB6JK94O+RJj3+nPdviPN4WL0ogDKkl2CMFV9N9D6NSBN5M/LV+S4GH+TRhS9zu3x5c x2UqefLwNZ1g6jIgnHYbLgvH6Qcfxwr5ayCKwx4jXlH2P7ErMCLVryfACFcfAxxNF+zWzB vhDdjBzJlYCkkDZuwtnUqHTI+YlUUPPhU6uGHE0mVT/tu7g0EvFCbzZenGG7GfkWbRsTX/ Fnz7vKpfqzHdp9e6NpI62zQZ3fDQSeSft9eBVteswNRFnAgakK0VawtlqkiHWFDHZGPmZ/ RLA6W00BnZUPO6lPqXvK27Vlt5IfgVBTlyK1yCf8jZiswalTyHVn+ITtwUR0RD0f54lamZ sjkAa9RCPa7WKjY+nVcSM0dJhkMmx/0jT4JVsE+B4qygxld8PnfwgnHoi5LjDQTMoTxFwl D/jKHGt/EwB9eQR7cHAj/ATpydqxeskcarggV1qP0x/4mH0YQLqo4WNHuOtO3YD4JwTenZ lLTnngdjyHpXAnoSF1m7QP0Y7apOK5p6dUybBq4UPJJ5FDpvcWYzqS8RZEovNgnyYrOteX BXn56WQw6ZmE7E2ZGL+ptlPXXBR9Ignbqe2LI+F/d5dnIFIhoZ18IlP6KBew X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:21:39 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu , Abel Vesa Subject: [PATCH v11 10/14] pmdomain/rockchip: cycle optional power-domain resets on power-on Date: Mon, 31 Aug 2026 20:19:52 +1200 Message-ID: <20260831081956.84871-11-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some Rockchip domains come out of power-on with their bus interface in an undefined state. On the RK3576 NPU this shows up as a hang on the first register access after the domain is switched on, and pulsing the domain's resets at this point clears it. Take the domain node's resets if it has any, and pulse them between releasing idle and restoring QoS. The resets are optional, so domains that do not list any are unaffected. Signed-off-by: Jiaxing Hu Reviewed-by: Abel Vesa --- drivers/pmdomain/rockchip/pm-domains.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rock= chip/pm-domains.c index 39988efd8..8f2fd8a83 100644 --- a/drivers/pmdomain/rockchip/pm-domains.c +++ b/drivers/pmdomain/rockchip/pm-domains.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -103,6 +104,7 @@ struct rockchip_pm_domain { struct clk_bulk_data *clks; struct device_node *node; struct regulator *supply; + struct reset_control *resets; }; =20 struct rockchip_pmu { @@ -692,6 +694,13 @@ static int rockchip_pd_power(struct rockchip_pm_domain= *pd, bool power_on) if (pd->info->delay_us) udelay(pd->info->delay_us); =20 + /* Optional: some domains need their resets cycled after power-on. */ + if (pd->resets) { + reset_control_assert(pd->resets); + usleep_range(10, 20); + reset_control_deassert(pd->resets); + } + rockchip_pmu_restore_qos(pd); } =20 @@ -861,6 +870,14 @@ static int rockchip_pm_add_one_domain(struct rockchip_= pmu *pmu, if (error) goto err_put_clocks; =20 + pd->resets =3D of_reset_control_array_get_optional_exclusive(node); + if (IS_ERR(pd->resets)) { + error =3D dev_err_probe(pmu->dev, PTR_ERR(pd->resets), + "%pOFn: failed to get resets\n", node); + pd->resets =3D NULL; + goto err_unprepare_clocks; + } + pd->num_qos =3D of_count_phandle_with_args(node, "pm_qos", NULL); =20 @@ -931,6 +948,7 @@ static int rockchip_pm_add_one_domain(struct rockchip_p= mu *pmu, clk_bulk_unprepare(pd->num_clks, pd->clks); err_put_clocks: clk_bulk_put(pd->num_clks, pd->clks); + reset_control_put(pd->resets); return error; } =20 @@ -949,6 +967,7 @@ static void rockchip_pm_remove_one_domain(struct rockch= ip_pm_domain *pd) =20 clk_bulk_unprepare(pd->num_clks, pd->clks); clk_bulk_put(pd->num_clks, pd->clks); + reset_control_put(pd->resets); =20 /* protect the zeroing of pm->num_clks */ mutex_lock(&pd->pmu->mutex); --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2EF483D333F; Mon, 31 Aug 2026 08:21:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164519; cv=none; b=dL35K2DRjFxfgesYdQtjyH5B0NV3vzLvU5epyQFjBpXU+WWO1aCM2IwUH6RITAls1g6gcWRBEphTiAA3X2NY1EtaBJjj8oTO7TJV7UgQeF5mHIwz3zNGyjPrPZGbmtlwj+CD8qleZsDzDeay0fTwKHn2/qnc+LFQ9VnmVv2UwZg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164519; c=relaxed/simple; bh=kN06lZ9HD0pj4xFD/f2Qilt0vzfMYrJJB1Lsh3PgnAY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kxA25duD8EMI0znkinwX6EbTYnbD/ThJr1uHDW88+UGWLCKbeoB1pQSCQqqd6Vgfr+mBdFuo5vtPjQol8KwSgmhtbZ17zoetvQ+M/J8smOBQwt1pdsqE1uKzb0Yt+vf45vMiY3iDzkbdCdmIHLxhndpsba17Kg62VASUWsQlyFA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=FSDPicFI; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=D6fgqtoB; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="FSDPicFI"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="D6fgqtoB" Received: from phl-compute-11.internal (phl-compute-11.internal [10.202.2.51]) by mailflow.phl.internal (Postfix) with ESMTP id 8A9381380045; Mon, 31 Aug 2026 04:21:57 -0400 (EDT) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-11.internal (MEProxy); Mon, 31 Aug 2026 04:21:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164517; x= 1788171717; bh=mPwoBZVvD5IiMKU/tQGUb6tRYFOiIEKnit/tY33hzAg=; b=F SDPicFI73gUkaSDJDyPP9x4ylawnqNAL6gSMzKLjgAyE6dHZ3crUZ4kBxwk5YsyJ /QWe73G6Wj4pdQWZbQ9tU+9/NnxPZg/eR9LaIXbeconBwXQDYrznT3IP2ZuCumq2 6tTgz0BwRPqJusnpN28F6Jvv8K+tLOZc51sp4t8Y3q1Lunue+DabaZLnYSsfoqCc xIgUtnPtDMwJDq+alhPlC22QF75MQZ/2vjffNZ83ektnQ9G+pegGrvtMQazFs9xD tMrA419tOJoi413nEHUpfiy3BhbFoA86giaY2WJWWWUB07N6grXcnwSRhDlCRrRJ /yQF6MzoPPsY5ZIxx9FcA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164517; x=1788171717; bh=m PwoBZVvD5IiMKU/tQGUb6tRYFOiIEKnit/tY33hzAg=; b=D6fgqtoBcmH5r17lj Latf/pegm9kE9CA8F0kUPe4/uP/bMiPN0l4Pvr86c2C3LI/H079qSd7oK2eqmv8J iaNpZLK67cykfmEiaqKHPHP26Jdz11F2lyNINLzb1kjfRQOFo9j9WQ9qtDdJYGti RzohTO07W4vZCJztXoRHSfISMNxVCIEzjvl4RPyjluUNwiD0AjmYRp6T5HzbQkew OCVVK8ct+OYGSF4JJi90Y/fd7l32bAlzT0yvVxpL50Bq2RFp0Po5qTr6w1OnQckg KUqSP1KS5nKl+/jJkU8HXDRHjnMh5tS6Ysz+vbP/pF8QbrNGCBITLtw9TIG5g3xW SqkKA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTGIFgHn697QN77LvkxTVd0HUgqc7dtgfWAXvrJnzjyYk/1E0GgI5UhaHEirT/WT1x b+qszzNdMAzVFopaNRs2dxhnDg09r1jPoC9MEUtixnInykmU3Pw0l3hwtCEJ1ad3c93Xay bd+l5sHxlTS6v/5iZXzAZK/4u27Ei0nAwXdeaVFF7kRMXjXXfW3iRGTZonBhmmpTvqhV+z V8Wknu+rEOyAMoGvxP8cZTL5kJKYkaLJxiSkeTXi9Trr4J2M5YjykmqP7kv72jWCs8a19h BukMvHNfzyzCVsSYvDh2T5LUAPpVgmVJhTbdZLaOSzh+ILq3lNXn5p+T2rNKefe0YsrRCm kp/nrGKrzUBgtGVe6D3IE8KpZxmONp46E3TI5jUlHmF3BelNeketdsJdADjX3e4DRXTUh7 T5VtgKTpcPlL8i8cSg8Z65UoSLxgRfdPhSJ1AqvOgJsTjR23dTtD7NWbqBh3MTz9ZhAGzk tUXGA/huZ1iuy5MrCsDioQnSZAxlMupa73ixGtpiraRZ9pBvGM4sqaRvZ31JGM4PxfAHbl MeaXAVU3qFl//5jtZGujsuFmKIpZORpn+AbJmclLxxUWHGqa85cJjwD70tj0zmyuc4SieE s5O3WjIwaiKPsodHXzYXbUfGnvdKooLwWxYLuxFPv9+0phDzMuXeLaqPKMkQ X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:21:49 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: [PATCH v11 11/14] accel/rocket: select the per-core clock and reset counts from match data Date: Mon, 31 Aug 2026 20:19:53 +1200 Message-ID: <20260831081956.84871-12-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The RK3576 carries the same RKNN block with a different set of clocks and resets, so the counts cannot stay compile-time constants. Add a soc_data struct to the of_device_id match data and take the bulk counts from it. RK3588 keeps four clocks and two resets, so nothing changes for it, and the arrays keep their present sizes: the SoC that needs a longer one grows it in the patch that adds the names. rocket_core_reset() is switched over as well. It is the same array, and leaving it on ARRAY_SIZE() would walk entries that were never acquired once a SoC asks for fewer. Signed-off-by: Jiaxing Hu --- drivers/accel/rocket/rocket_core.c | 8 ++++---- drivers/accel/rocket/rocket_core.h | 7 +++++++ drivers/accel/rocket/rocket_drv.c | 12 +++++++++--- 3 files changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/accel/rocket/rocket_core.c b/drivers/accel/rocket/rock= et_core.c index 5dd260bac..b202d1581 100644 --- a/drivers/accel/rocket/rocket_core.c +++ b/drivers/accel/rocket/rocket_core.c @@ -23,7 +23,7 @@ int rocket_core_init(struct rocket_core *core) =20 core->resets[0].id =3D "srst_a"; core->resets[1].id =3D "srst_h"; - err =3D devm_reset_control_bulk_get_exclusive(&pdev->dev, ARRAY_SIZE(core= ->resets), + err =3D devm_reset_control_bulk_get_exclusive(&pdev->dev, core->soc->num_= resets, core->resets); if (err) return dev_err_probe(dev, err, "failed to get resets for core %d\n", cor= e->index); @@ -32,7 +32,7 @@ int rocket_core_init(struct rocket_core *core) core->clks[1].id =3D "hclk"; core->clks[2].id =3D "npu"; core->clks[3].id =3D "pclk"; - err =3D devm_clk_bulk_get(dev, ARRAY_SIZE(core->clks), core->clks); + err =3D devm_clk_bulk_get(dev, core->soc->num_clks, core->clks); if (err) return dev_err_probe(dev, err, "failed to get clocks for core %d\n", cor= e->index); =20 @@ -109,9 +109,9 @@ void rocket_core_fini(struct rocket_core *core) =20 void rocket_core_reset(struct rocket_core *core) { - reset_control_bulk_assert(ARRAY_SIZE(core->resets), core->resets); + reset_control_bulk_assert(core->soc->num_resets, core->resets); =20 udelay(10); =20 - reset_control_bulk_deassert(ARRAY_SIZE(core->resets), core->resets); + reset_control_bulk_deassert(core->soc->num_resets, core->resets); } diff --git a/drivers/accel/rocket/rocket_core.h b/drivers/accel/rocket/rock= et_core.h index f6d738285..ba74c5339 100644 --- a/drivers/accel/rocket/rocket_core.h +++ b/drivers/accel/rocket/rocket_core.h @@ -27,9 +27,16 @@ #define rocket_core_writel(core, reg, value) \ writel(value, (core)->core_iomem + (REG_CORE_##reg) - REG_CORE_S_STATUS) =20 +/* Per-SoC differences, selected by the of_device_id match data. */ +struct rocket_soc_data { + unsigned int num_clks; /* clk_bulk count */ + unsigned int num_resets; /* reset_bulk count */ +}; + struct rocket_core { struct device *dev; struct rocket_device *rdev; + const struct rocket_soc_data *soc; unsigned int index; =20 int irq; diff --git a/drivers/accel/rocket/rocket_drv.c b/drivers/accel/rocket/rocke= t_drv.c index 8bbbce594..6e7dc91c5 100644 --- a/drivers/accel/rocket/rocket_drv.c +++ b/drivers/accel/rocket/rocket_drv.c @@ -176,6 +176,7 @@ static int rocket_probe(struct platform_device *pdev) =20 rdev->cores[core].rdev =3D rdev; rdev->cores[core].dev =3D &pdev->dev; + rdev->cores[core].soc =3D of_device_get_match_data(&pdev->dev); rdev->cores[core].index =3D core; =20 rdev->num_cores++; @@ -213,8 +214,13 @@ static void rocket_remove(struct platform_device *pdev) } } =20 +static const struct rocket_soc_data rk3588_soc_data =3D { + .num_clks =3D 4, + .num_resets =3D 2, +}; + static const struct of_device_id dt_match[] =3D { - { .compatible =3D "rockchip,rk3588-rknn-core" }, + { .compatible =3D "rockchip,rk3588-rknn-core", .data =3D &rk3588_soc_data= }, {} }; MODULE_DEVICE_TABLE(of, dt_match); @@ -240,7 +246,7 @@ static int rocket_device_runtime_resume(struct device *= dev) if (core < 0) return -ENODEV; =20 - err =3D clk_bulk_prepare_enable(ARRAY_SIZE(rdev->cores[core].clks), rdev-= >cores[core].clks); + err =3D clk_bulk_prepare_enable(rdev->cores[core].soc->num_clks, rdev->co= res[core].clks); if (err) { dev_err(dev, "failed to enable (%d) clocks for core %d\n", err, core); return err; @@ -260,7 +266,7 @@ static int rocket_device_runtime_suspend(struct device = *dev) if (!rocket_job_is_idle(&rdev->cores[core])) return -EBUSY; =20 - clk_bulk_disable_unprepare(ARRAY_SIZE(rdev->cores[core].clks), rdev->core= s[core].clks); + clk_bulk_disable_unprepare(rdev->cores[core].soc->num_clks, rdev->cores[c= ore].clks); =20 return 0; } --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7F6A3D6CB4; Mon, 31 Aug 2026 08:22:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164529; cv=none; b=tYgmSjYeq/PTE0itIC3bvLLZZdrJfPA5CVROIKm+5/mUBQVhUdGc3uBeUjw6VxJkFTtadLj3/1xegHh8ci+xpvhzav82EImyEVKEBnKM2bPipT7dKVzorXqb0TIX2OISENMMO+Tt0ay743Edd9LmuvyJeXfNHB2QlpwBv4ra4B4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164529; c=relaxed/simple; bh=1NTOzrYCVQWlt3cQYFhqB4RGbz/RE/1+VAbNqd34s5M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lLYm8wWctBe+iVToUu3oXMEQeFo8Wcz4s8fzqQ2zOt9ujALUZ5wVK8WWOPs4J5G/+qXFRQkKA7eI3dej1JET2wtSxe0lHi0aUoQ1r7PkGGYpBiyvlf3RVNnS9DkuGXikBaGke3J2NIurqFFYxwzXQZvkcF85GfNTsjggfSGxbT0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=r8xvdOtM; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=diitvk6f; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="r8xvdOtM"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="diitvk6f" Received: from phl-compute-12.internal (phl-compute-12.internal [10.202.2.52]) by mailflow.phl.internal (Postfix) with ESMTP id 1E0381380045; Mon, 31 Aug 2026 04:22:07 -0400 (EDT) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-12.internal (MEProxy); Mon, 31 Aug 2026 04:22:07 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164527; x= 1788171727; bh=dkrqqZhM7WlyaP2wiDCA1VTmGxSMLxzEHskNyNB2USg=; b=r 8xvdOtMUEUW1zhJOXWijyCUHkjq5mQnMu5XEio1nNfaj76hgyQ0cXjqY0WWbF/oK eBntC3xv2QzmARU42J+Hl5UWO5umLjw9cWvH13tlok9gQ95JDdKKxDZUzO1UjPL/ axI/PwE1t0rATfpBKJkWHj/7BQtCv4PefDj42UHUhqmSkbD3z9HkiL+osaG40Obx rGuGcr6iuar8zRtFr7N99J1zRAGexDka//UiFyIEe/pkBLh+RutO1lMCfeV4fEfQ p+MoMtaSvnBDfcKso16K0Wcl/kSwhplSu2/GM7D/mXHnBDwT8BMWNdlPReriqCoF 4vI5I1+8e5EhPdxw0rW4A== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164527; x=1788171727; bh=d krqqZhM7WlyaP2wiDCA1VTmGxSMLxzEHskNyNB2USg=; b=diitvk6fMTPAUclnx FdPLcUxnDPyp5fd0zIp7GdXU3TV9KxpVX/nlSVaPto1USW5aLvDvxFSBENmTIyx0 q/t0kniFN5ZkseMWuWdnZDDnnC40Sh25Qv0KwdwRUMJPDVUd/nq3AOOxNJZJlLEA sMiyexTRFCCX3TIeLRx86Yegvag+nCTF292NxaTJ5Ed7x+/E3MI5Ywudb7Clnzr9 rkCwg+0IH6Oh7uPX1EQXvzBHKnEe8hk4gehdSF6M3cJxJeOQVpDXskmZPrqelkE5 EVXJA5moN+GKw0bNKbgysZkIE/ZfYFBC3xrhrLi+WdMI3KHRanpYA+efXPEkopHH /EhQw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTFFT6hIjFmpaWg1cHbYlBA6+CP+jfLTw9N+vEAzKTkkE4MEXhFgzNFg2+Gbmij01y 7w62eGw06RVKi1V9LplreKzgu9bzOf2YrczDsVEuvotz8loqiF3unOcqje+q9PwFaMl6WP VWrDCi74Nv2cLR9pO6pMN6nTapGUlpYmeAYqyNyn40lf/Pl9wk8CSwz6ONzYWARECeV4D9 SmDJDYDprXNxGk1/gHVdu5+05jRKHvP1Ad6Rpoz9OiiAv0t5zNAkx3jLfve465sYAZT5W9 N/4xs+/ZiFCAOlsBzX+qQUEYYihd7NlW5TCO6VrzMV8vL/t5qkWuFJDZgTEE22V19SyKTH ANM9+WbKPQOexJoImfnoFh9CT5Li764S5RXHiHt88PTTaPkJqFcwQQ1mT8gIbHoDNX0cZC jOJ1RlCSd3EUIqthOg971MTyVOt8r4csKtuBgJV8HBvFuaUhxKCVjg7vy8CgkOSCguMxTd X2Sc5z5a2y1qw6gcXjKo3hPNQfPsSArdftMz3mosu6qOxCp0tUD0vFdkvjWXuuF8m1KyGs PrHqTDH2NDchrSPi7jDxGLmW7AprdoOXAWaGL3k0fKYHVdivYy3p+rxxnnEFqCwU0Fw7Ec JMRm6+CRlhoIBTaEAauAmDYDo9pUHF5BfJkLOLvObNEJg4RMcn2eWkrggq/Q X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:21:59 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: [PATCH v11 12/14] accel/rocket: add RK3576 NPU (RKNN) support Date: Mon, 31 Aug 2026 20:19:54 +1200 Message-ID: <20260831081956.84871-13-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The RK3576 has two cores of the same RKNN block and a few platform differences: - the CBUF (convolution buffer) has its own clock domain, so the core needs six clocks rather than four; - there is no per-core hclk reset. The CRU has SRST_A_RKNN0 and SRST_A_RKNN1 but no SRST_H_RKNN0 or SRST_H_RKNN1, so a core takes one reset where RK3588 takes two; - the NPU spans two power domains, and a device with more than one is skipped by the driver-core single-domain auto-attach, so the list has to be attached explicitly; - PC_TASK_CON packs the task number with sixteen bits rather than twelve, moving the three controls above it up by four. That last one is the reason this series has been reporting, since v3, that the block accepts exactly one task per reset. rocket_registers.h is generated from the RK3588 description, so writing it unchanged to an RK3576 asks for task_number 0x7001, which is 28673 tasks, and puts TASK_COUNT_CLEAR on a bit that does nothing. The counter is then only ever cleared by a reset. The layout was confirmed by Chaoyi Chen of Rockchip, including a fourth control at BIT(18), task_last_layer_clear, which belongs on every submit alongside the count clear: https://lore.kernel.org/all/4f300b78-d96d-4d98-8819-dc292b0c9b97@rock-chi= ps.com/ With that written correctly a job of several tasks runs to completion, the completion interrupt arrives, and /proc/interrupts counts up. A convolution submitted three times with three different inputs is byte exact against the CPU reference each time, with no reset in between and with nothing retiring the job but the interrupt. Counting the cores now walks the driver's own match table instead of a second, hand-kept list of compatibles. The array sized from that count is indexed by every core that goes on to probe, so the two lists cannot be allowed to disagree. All of it hangs off the soc_data added earlier, so the RK3588 path keeps its existing counts and behaviour. The match table moves to rocket_drv.h so rocket_device.c can walk it with for_each_matching_node() rather than repeating a for_each_compatible_node() loop per SoC, which also keeps num_cores in step with the table that sizes the array it counts into. The declaration needs struct of_device_id, taken from rather than , which carries every subsystem's tables with it. Signed-off-by: Jiaxing Hu --- drivers/accel/rocket/rocket_core.c | 20 +++++++++++++++ drivers/accel/rocket/rocket_core.h | 8 +++--- drivers/accel/rocket/rocket_device.c | 7 ++++- drivers/accel/rocket/rocket_drv.c | 16 +++++++++--- drivers/accel/rocket/rocket_drv.h | 2 ++ drivers/accel/rocket/rocket_job.c | 38 +++++++++++++++++++++++++--- 6 files changed, 80 insertions(+), 11 deletions(-) diff --git a/drivers/accel/rocket/rocket_core.c b/drivers/accel/rocket/rock= et_core.c index b202d1581..91f690176 100644 --- a/drivers/accel/rocket/rocket_core.c +++ b/drivers/accel/rocket/rocket_core.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include =20 @@ -21,6 +22,7 @@ int rocket_core_init(struct rocket_core *core) u32 version; int err =3D 0; =20 + /* RK3576 has no per-core hclk reset, so it takes srst_a alone. */ core->resets[0].id =3D "srst_a"; core->resets[1].id =3D "srst_h"; err =3D devm_reset_control_bulk_get_exclusive(&pdev->dev, core->soc->num_= resets, @@ -32,6 +34,9 @@ int rocket_core_init(struct rocket_core *core) core->clks[1].id =3D "hclk"; core->clks[2].id =3D "npu"; core->clks[3].id =3D "pclk"; + /* RK3576 clocks the CBUF separately; the compute path stalls without the= se. */ + core->clks[4].id =3D "aclk_cbuf"; + core->clks[5].id =3D "hclk_cbuf"; err =3D devm_clk_bulk_get(dev, core->soc->num_clks, core->clks); if (err) return dev_err_probe(dev, err, "failed to get clocks for core %d\n", cor= e->index); @@ -60,6 +65,21 @@ int rocket_core_init(struct rocket_core *core) if (err) return err; =20 + /* + * RK3576 spans two power domains, and a multi-domain device is skipped + * by the driver-core single-domain auto-attach, so attach the list here. + * This goes before the first thing that would have to be unwound, so a + * failure can simply return. + */ + if (core->soc->multi_power_domain) { + struct dev_pm_domain_list *pd_list; + + err =3D devm_pm_domain_attach_list(dev, NULL, &pd_list); + if (err < 0) + return dev_err_probe(dev, err, + "failed to attach NPU power domains\n"); + } + core->iommu_group =3D iommu_group_get(dev); =20 err =3D rocket_job_init(core); diff --git a/drivers/accel/rocket/rocket_core.h b/drivers/accel/rocket/rock= et_core.h index ba74c5339..8c8d1f453 100644 --- a/drivers/accel/rocket/rocket_core.h +++ b/drivers/accel/rocket/rocket_core.h @@ -29,8 +29,10 @@ =20 /* Per-SoC differences, selected by the of_device_id match data. */ struct rocket_soc_data { - unsigned int num_clks; /* clk_bulk count */ - unsigned int num_resets; /* reset_bulk count */ + unsigned int num_clks; /* clk_bulk count: 4 base, 6 with CBUF */ + unsigned int num_resets; /* reset_bulk count: 2 base, 1 on RK3576 */ + bool multi_power_domain; /* device spans more than one PM domain */ + bool task_con_16bit; /* PC_TASK_CON uses the 16-bit task number */ }; =20 struct rocket_core { @@ -43,7 +45,7 @@ struct rocket_core { void __iomem *pc_iomem; void __iomem *cna_iomem; void __iomem *core_iomem; - struct clk_bulk_data clks[4]; + struct clk_bulk_data clks[6]; struct reset_control_bulk_data resets[2]; =20 struct iommu_group *iommu_group; diff --git a/drivers/accel/rocket/rocket_device.c b/drivers/accel/rocket/ro= cket_device.c index 46e6ee1e7..923add5bd 100644 --- a/drivers/accel/rocket/rocket_device.c +++ b/drivers/accel/rocket/rocket_device.c @@ -9,6 +9,7 @@ #include =20 #include "rocket_device.h" +#include "rocket_drv.h" =20 struct rocket_device *rocket_device_init(struct platform_device *pdev, const struct drm_driver *rocket_drm_driver) @@ -27,7 +28,11 @@ struct rocket_device *rocket_device_init(struct platform= _device *pdev, ddev =3D &rdev->ddev; dev_set_drvdata(dev, rdev); =20 - for_each_compatible_node(core_node, NULL, "rockchip,rk3588-rknn-core") + /* + * Count over the same match table the platform driver binds with, so + * that a core added there is counted here without a second edit. + */ + for_each_matching_node(core_node, rocket_dt_match) if (of_device_is_available(core_node)) num_cores++; =20 diff --git a/drivers/accel/rocket/rocket_drv.c b/drivers/accel/rocket/rocke= t_drv.c index 6e7dc91c5..e46962949 100644 --- a/drivers/accel/rocket/rocket_drv.c +++ b/drivers/accel/rocket/rocket_drv.c @@ -217,13 +217,23 @@ static void rocket_remove(struct platform_device *pde= v) static const struct rocket_soc_data rk3588_soc_data =3D { .num_clks =3D 4, .num_resets =3D 2, + .multi_power_domain =3D false, + .task_con_16bit =3D false, }; =20 -static const struct of_device_id dt_match[] =3D { +static const struct rocket_soc_data rk3576_soc_data =3D { + .num_clks =3D 6, + .num_resets =3D 1, + .multi_power_domain =3D true, + .task_con_16bit =3D true, +}; + +const struct of_device_id rocket_dt_match[] =3D { { .compatible =3D "rockchip,rk3588-rknn-core", .data =3D &rk3588_soc_data= }, + { .compatible =3D "rockchip,rk3576-rknn-core", .data =3D &rk3576_soc_data= }, {} }; -MODULE_DEVICE_TABLE(of, dt_match); +MODULE_DEVICE_TABLE(of, rocket_dt_match); =20 static int find_core_for_dev(struct device *dev) { @@ -282,7 +292,7 @@ static struct platform_driver rocket_driver =3D { .driver =3D { .name =3D "rocket", .pm =3D pm_ptr(&rocket_pm_ops), - .of_match_table =3D dt_match, + .of_match_table =3D rocket_dt_match, }, }; =20 diff --git a/drivers/accel/rocket/rocket_drv.h b/drivers/accel/rocket/rocke= t_drv.h index 2c673bb99..0cd692a66 100644 --- a/drivers/accel/rocket/rocket_drv.h +++ b/drivers/accel/rocket/rocket_drv.h @@ -6,10 +6,12 @@ =20 #include #include +#include =20 #include "rocket_device.h" =20 extern const struct dev_pm_ops rocket_pm_ops; +extern const struct of_device_id rocket_dt_match[]; =20 struct rocket_iommu_domain { struct iommu_domain *domain; diff --git a/drivers/accel/rocket/rocket_job.c b/drivers/accel/rocket/rocke= t_job.c index 69e29f40f..2a272c2ef 100644 --- a/drivers/accel/rocket/rocket_job.c +++ b/drivers/accel/rocket/rocket_job.c @@ -21,6 +21,29 @@ =20 #define JOB_TIMEOUT_MS 500 =20 +/* + * PC_TASK_CON packs the task number with three controls, and the field wi= dths + * are not the same on every SoC. rocket_registers.h is generated from the + * RK3588 description, where the task number is twelve bits: + * + * RK3588 BIT[11:0] task_number, BIT[12] pp_en, BIT[13] count_clear + * RK3576 BIT[15:0] task_number, BIT[16] pp_en, BIT[17] count_clear, + * BIT[18] last_layer_clear + * + * The RK3576 layout was confirmed by Chaoyi Chen of Rockchip: + * https://lore.kernel.org/all/4f300b78-d96d-4d98-8819-dc292b0c9b97@rock-c= hips.com/ + * + * Writing the RK3588 layout to an RK3576 therefore asks for task_number + * 0x7001, that is 28673 tasks, and lands the count clear on a bit that do= es + * nothing. The task counter is then only ever cleared by a reset, which is + * exactly the "one task per reset" behaviour this series has been reporti= ng + * since v3. + */ +#define RK3576_PC_TASK_CON_TASK_NUMBER(n) ((n) & 0xffff) +#define RK3576_PC_TASK_CON_PP_EN BIT(16) +#define RK3576_PC_TASK_CON_COUNT_CLEAR BIT(17) +#define RK3576_PC_TASK_CON_LAST_LAYER_CLEAR BIT(18) + static struct rocket_job * to_rocket_job(struct drm_sched_job *sched_job) { @@ -142,10 +165,17 @@ static void rocket_job_hw_submit(struct rocket_core *= core, struct rocket_job *jo rocket_pc_writel(core, INTERRUPT_MASK, PC_INTERRUPT_MASK_DPU_0 | PC_INTER= RUPT_MASK_DPU_1); rocket_pc_writel(core, INTERRUPT_CLEAR, PC_INTERRUPT_CLEAR_DPU_0 | PC_INT= ERRUPT_CLEAR_DPU_1); =20 - rocket_pc_writel(core, TASK_CON, PC_TASK_CON_RESERVED_0(1) | - PC_TASK_CON_TASK_COUNT_CLEAR(1) | - PC_TASK_CON_TASK_NUMBER(1) | - PC_TASK_CON_TASK_PP_EN(1)); + if (core->soc->task_con_16bit) + rocket_pc_writel(core, TASK_CON, + RK3576_PC_TASK_CON_LAST_LAYER_CLEAR | + RK3576_PC_TASK_CON_COUNT_CLEAR | + RK3576_PC_TASK_CON_PP_EN | + RK3576_PC_TASK_CON_TASK_NUMBER(1)); + else + rocket_pc_writel(core, TASK_CON, PC_TASK_CON_RESERVED_0(1) | + PC_TASK_CON_TASK_COUNT_CLEAR(1) | + PC_TASK_CON_TASK_NUMBER(1) | + PC_TASK_CON_TASK_PP_EN(1)); =20 rocket_pc_writel(core, TASK_DMA_BASE_ADDR, PC_TASK_DMA_BASE_ADDR_DMA_BASE= _ADDR(0x0)); =20 --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 809953D348C; Mon, 31 Aug 2026 08:22:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164538; cv=none; b=S+K3OcUETBfTFjH8hY2Aykj/Yk47KFy26jyRaPSX4yS/TjDaP43hciiSQnyO2s9vah95r8AQ6MmRcbGkVrDLSuPDhstOfvml8ADEtp7rwXBCz5tpCftSyRjDnuioklEx/R/yKx9CqBCZGXLpVfMq4gZL2oj/sMKY4l8DyhqKXHw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164538; c=relaxed/simple; bh=Q7f6h2o7wP5Hoej+DyrcZiCqR03D55viOHuUpQpfWBM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DV8yBGwL1VPj3ijOdu8FafjmjP8ALK/jSSlaxuT/+3yKxCI7ylk2ChfWj0rS8OpmROCV3Q5JeVuxGk9U89zUvJ10V2PuWpjdbacc861WFVx6stK08CT1mpiTELDUvBXPsK1RdR+S6ZudbtdQfFPXpDaOJV4AL8theTbR7iAe7m4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=QJU39e55; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=P78DHlYA; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="QJU39e55"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="P78DHlYA" Received: from phl-compute-02.internal (phl-compute-02.internal [10.202.2.42]) by mailflow.phl.internal (Postfix) with ESMTP id DC0EF1380045; Mon, 31 Aug 2026 04:22:16 -0400 (EDT) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-02.internal (MEProxy); Mon, 31 Aug 2026 04:22:16 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164536; x= 1788171736; bh=1rtSl7F1lXnj0NSEGIt5XoDJWgiooLMidXujnASVSco=; b=Q JU39e55+WQN23kDxA7nD7K5GSpe0xv/FKvrfjPS3B7o/1iI1DIUqRDj83WQcgV2j YfyFBNHNgKOf28giDnEyKX30zlKz+U0paA1TGjSo7b9sinql2TFRLZyBfskWB4rd Zp7mi8ysfGXX6BKiipmlv81cbQWPvr5FzUk39B33hLDFQLWzL1MGRJNx1QhGCkfb LZVbOjakZaHW0xVd8UqPYBtuRdILPxoSvMiZkQiwP8HdWvHt6lV70tqvfo0snK2u LBEmOGJrANczdAD3cNb+wsTYdgmdixEB2OOlU6oNXZAmKvEd3+czyLovTZdA/enM 5EL58sQsR/BF/4U621q/Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164536; x=1788171736; bh=1 rtSl7F1lXnj0NSEGIt5XoDJWgiooLMidXujnASVSco=; b=P78DHlYAwuLwwZyqo bp55NjODmFIZ6G/u3X47WRzLg0Lb+9Ia+4KUoCKgYEioBW9MLlbDiF7MC91ug6uK WtfNwjE6/LcKSZ+zDDFCO9wNPsL/vsEmcouWsAoj4fbjFMbNVEAscSXYbXuOHYaQ LR/D53qKzn+NSPYWR1bF8ZzP0LAm0YhBOvEX6vbpirFafHLTwrHusRpkrBCz99CX l2pShkkGGPAtNgNQfJ/F0j/747wgC5Qbz8ImH7cenzA0f3UidTZTuMbAmtcFFQ1k k8WQKtf8P4WNUK4+t30RzgsQHrfGn77mkzPQ7d0Bslm4uUEnjWKXkNPfR1QIKx3R G8lcg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTFpYZzbCorKWlZk8zdfC/L1wYqstk9pIbGHwtVsZJ9Q5h4E/ZFLSTh60i2uH6Kazz zW3rvA+krkpQQTNXaXejICAHOtIPIr4L4LZHub0z/CvEnTK5g2d2SRxpho9Hdbll2MX/I/ azBrggjp+HVSQqmFmbp/f0XBWiAFeJsMzew/Bv8BpJrWG8MywYcMmECBLwLmucHaajSPyM av+rn0SyoTQdnlRzjyGRsPAybrAK8ZNLGpK3NvbOrenbXBx/jnRWsZKZ9CsFGKDAFIjOFS AJSL1wjMyVOC9UcM1mXGTm6LVMRm4ipt98vwHadJu66cqJGnSHzoQXseQ2M2bgS58mUOcH XSfp6Pdch7jaKJsr2shTVY4R3r4xQp9in491MH0xyOa9h/Z+jr/sRiXopgsLWCVKz8ZjkJ GEZilqPFiP7CBcRNPAFFqRBZ7JxxfnuEKHeOGIeLqw/ko1kzK/guw9oLxq26A8PnIHVUb+ RhQzdbahUQ9tAMAQ7eOFEX/l+yGzO1GENKwmCgjTWA5NUY6JDCNfKMiKhriqCbUlymQ1mi co7N6G5zG3K7LqgQykhO8hphCi81YapwLtCbxGxShf/2FteRE02cnKnL5UjP3yKRLKDwOm 4qOGNsOcyHDdFFEbbFyYcdO3D7Y7aCS5lSfdvfdXYiRdavsgze+Iw4dBiC3Q X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:22:09 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: [PATCH v11 13/14] arm64: dts: rockchip: rk3576: add NPU (RKNN) nodes Date: Mon, 31 Aug 2026 20:19:55 +1200 Message-ID: <20260831081956.84871-14-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the two RKNN cores and their IOMMUs. Both cores are disabled by default; boards enable what they wire up. PD_NPU0 and PD_NPU1 are siblings under PD_NPUTOP and hold one core each, but the convolution buffer and the DSU sit above them: ACLK_RKNN_CBUF, HCLK_RKNN_CBUF and CLK_RKNN_DSU0 belong to the block rather than to either core, and PD_NPUTOP already lists all three. Add them to both core domains as well, so a core domain switching state has the clocks of the path it shares running, and give each core domain the BIU reset that the pmdomain driver now cycles once power is on. Each core lists both core domains, its own first, so that a core in use has the whole block powered. Whether a single core can reach the shared path with the sibling domain off is not something this series establishes; listing both is the description that has been tested here. The IOMMU in front of each core lists that core's domain only. Label the outer PD_NPU node so a board can attach the NPU rail to the domain that gates the block. Signed-off-by: Jiaxing Hu --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 82 +++++++++++++++++++++++- 1 file changed, 79 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts= /rockchip/rk3576.dtsi index b0c0d3c8b..2d0133cdf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1042,7 +1042,7 @@ power: power-controller { #address-cells =3D <1>; #size-cells =3D <0>; =20 - power-domain@RK3576_PD_NPU { + pd_npu: power-domain@RK3576_PD_NPU { reg =3D ; #power-domain-cells =3D <1>; #address-cells =3D <1>; @@ -1070,14 +1070,22 @@ power-domain@RK3576_PD_NPUTOP { power-domain@RK3576_PD_NPU0 { reg =3D ; clocks =3D <&cru HCLK_RKNN_ROOT>, - <&cru ACLK_RKNN0>; + <&cru ACLK_RKNN0>, + <&cru CLK_RKNN_DSU0>, + <&cru ACLK_RKNN_CBUF>, + <&cru HCLK_RKNN_CBUF>; + resets =3D <&cru SRST_A_RKNN0_BIU>; pm_qos =3D <&qos_npu_m0>; #power-domain-cells =3D <0>; }; power-domain@RK3576_PD_NPU1 { reg =3D ; clocks =3D <&cru HCLK_RKNN_ROOT>, - <&cru ACLK_RKNN1>; + <&cru ACLK_RKNN1>, + <&cru CLK_RKNN_DSU0>, + <&cru ACLK_RKNN_CBUF>, + <&cru HCLK_RKNN_CBUF>; + resets =3D <&cru SRST_A_RKNN1_BIU>; pm_qos =3D <&qos_npu_m1>; #power-domain-cells =3D <0>; }; @@ -1261,6 +1269,74 @@ power-domain@RK3576_PD_VO1 { }; }; =20 + rknn_core_0: npu@27700000 { + compatible =3D "rockchip,rk3576-rknn-core"; + reg =3D <0x0 0x27700000 0x0 0x1000>, + <0x0 0x27701000 0x0 0x1000>, + <0x0 0x27703000 0x0 0x1000>; + reg-names =3D "pc", "cna", "core"; + interrupts =3D ; + clocks =3D <&cru ACLK_RKNN0>, <&cru HCLK_RKNN_ROOT>, + <&cru CLK_RKNN_DSU0>, <&cru PCLK_NPUTOP_ROOT>, + <&cru ACLK_RKNN_CBUF>, <&cru HCLK_RKNN_CBUF>; + clock-names =3D "aclk", "hclk", "npu", "pclk", + "aclk_cbuf", "hclk_cbuf"; + resets =3D <&cru SRST_A_RKNN0>; + reset-names =3D "srst_a"; + power-domains =3D <&power RK3576_PD_NPU0>, <&power RK3576_PD_NPU1>; + iommus =3D <&rknn_mmu_0>; + status =3D "disabled"; + }; + + rknn_mmu_0: iommu@27702000 { + compatible =3D "rockchip,rk3576-npu-iommu", "rockchip,rk3568-iommu"; + reg =3D <0x0 0x27702000 0x0 0x100>, + <0x0 0x27702100 0x0 0x100>; + interrupts =3D ; + clocks =3D <&cru ACLK_RKNN0>, <&cru HCLK_RKNN_ROOT>, + <&cru CLK_RKNN_DSU0>, <&cru ACLK_RKNN_CBUF>, + <&cru HCLK_RKNN_CBUF>; + clock-names =3D "aclk", "iface", "npu", + "aclk_cbuf", "hclk_cbuf"; + #iommu-cells =3D <0>; + power-domains =3D <&power RK3576_PD_NPU0>; + status =3D "disabled"; + }; + + rknn_core_1: npu@27708000 { + compatible =3D "rockchip,rk3576-rknn-core"; + reg =3D <0x0 0x27708000 0x0 0x1000>, + <0x0 0x27709000 0x0 0x1000>, + <0x0 0x2770b000 0x0 0x1000>; + reg-names =3D "pc", "cna", "core"; + interrupts =3D ; + clocks =3D <&cru ACLK_RKNN1>, <&cru HCLK_RKNN_ROOT>, + <&cru CLK_RKNN_DSU0>, <&cru PCLK_NPUTOP_ROOT>, + <&cru ACLK_RKNN_CBUF>, <&cru HCLK_RKNN_CBUF>; + clock-names =3D "aclk", "hclk", "npu", "pclk", + "aclk_cbuf", "hclk_cbuf"; + resets =3D <&cru SRST_A_RKNN1>; + reset-names =3D "srst_a"; + power-domains =3D <&power RK3576_PD_NPU1>, <&power RK3576_PD_NPU0>; + iommus =3D <&rknn_mmu_1>; + status =3D "disabled"; + }; + + rknn_mmu_1: iommu@2770a000 { + compatible =3D "rockchip,rk3576-npu-iommu", "rockchip,rk3568-iommu"; + reg =3D <0x0 0x2770a000 0x0 0x100>, + <0x0 0x2770a100 0x0 0x100>; + interrupts =3D ; + clocks =3D <&cru ACLK_RKNN1>, <&cru HCLK_RKNN_ROOT>, + <&cru CLK_RKNN_DSU0>, <&cru ACLK_RKNN_CBUF>, + <&cru HCLK_RKNN_CBUF>; + clock-names =3D "aclk", "iface", "npu", + "aclk_cbuf", "hclk_cbuf"; + #iommu-cells =3D <0>; + power-domains =3D <&power RK3576_PD_NPU1>; + status =3D "disabled"; + }; + gpu: gpu@27800000 { compatible =3D "rockchip,rk3576-mali", "arm,mali-bifrost"; reg =3D <0x0 0x27800000 0x0 0x20000>; --=20 2.43.0 From nobody Sat Sep 26 19:34:28 2026 Received: from flow-a4-smtp.messagingengine.com (flow-a4-smtp.messagingengine.com [103.168.172.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EA0A3D331E; Mon, 31 Aug 2026 08:22:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164548; cv=none; b=QvxDmvrDL10rc7bXLksYsQZ2q4GTrmPQJq0SgGROYqca8OuGvLtpqufoHj/38xPfEF6Z138BFxxQDFoIf9VD5K6VqEwPpX5pLnxZeqwPFRCagfVRo3ZtaccEEvAnfEKNdxRbq1zJPFot/rqtA693Z7daCrIwXXueYxk/OqjgYqw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788164548; c=relaxed/simple; bh=rKtYZ4cuNw2XD4BIP9sPPE9g0fpAvvKP/Sfa/QGMjIk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UWgyueMSYjJMaCoLNbkl/DNqJ+OohmTJv9TW7qR1yniYhS0l/UIW9MoRxYEG4vO4B7u5xXEz4a/EdX8VhVml5KIbtEo41Z9b9r27GeDjPqmaLhK1haad+kVlJS2Zd75Lao//9izS0zPFvGkSlTEaJFK5hRUOOH0vHNN5mZ0V9vE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com; spf=pass smtp.mailfrom=gahingwoo.com; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b=P5vqeOw3; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=VZ1NMvm9; arc=none smtp.client-ip=103.168.172.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gahingwoo.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gahingwoo.com header.i=@gahingwoo.com header.b="P5vqeOw3"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="VZ1NMvm9" Received: from phl-compute-11.internal (phl-compute-11.internal [10.202.2.51]) by mailflow.phl.internal (Postfix) with ESMTP id 7AC0E1380045; Mon, 31 Aug 2026 04:22:26 -0400 (EDT) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-11.internal (MEProxy); Mon, 31 Aug 2026 04:22:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gahingwoo.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1788164546; x= 1788171746; bh=yyAlnjllRJoc8EnuoheqRfmGGLiMMzIInITnv3UMbRQ=; b=P 5vqeOw3ShNwcVBCo0k+wdZQceJK5uqFU/EnL4qZRbrjVznhH5r/SdRUCKEqhIDpP y1h3ZY4Sm1jwrGe7p3Lsabi+MnMnhQ73tiQcRNC3FmJoJCrdADhfikvkLq5gYpZy HG87BJPuMPrHUEPOALX0FOjWhS14GrDssJp6xZPrNuiwA/obU966sk1+zMk08ulF YM7g50Ptv39ILyEs9AREsWIxRlung84TzctmEhAYEi3FGewxS+csk39JRVHdbzaW 6M+kj45fhtsDMZ8IBWZam8TvwLMuqE9c/VPSKoItahq630nSb100GJ+TvjxDI10e E/yopNWFLbk+NkYhfdHVw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1788164546; x=1788171746; bh=y yAlnjllRJoc8EnuoheqRfmGGLiMMzIInITnv3UMbRQ=; b=VZ1NMvm9ufm+ap+8t SuJlH6aAjIyhx4gM+mcBuqtMaHkNbpB2nYr+BrYV56iwqCpFB1VUwS3rBezMP3hP 1hjUSZEj8B6uqdfdG+TcpgPIzp8RTUp/U+5SBe7QrZDeILnzn6uZteItf2vaZSCH EYG5OxRla/e8bb+AnqDA4yMYHqSxRNm+d6AXbqxgnOb5oG+7aE6Kkkpq+QDAS6c3 mP5+2S3h9IYhy2ohBwHQxzsA66zmUyTusjdjzjtPV652oCr22bL25HKVL8w/4myI t4hary/SDcsS2Jcv7bavfTe2BNUJ3CTuStrRAbVnTPfX1Ns3CtJekefeC8mSeqo4 4+Hdg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: dmFkZTGO980Yn8uMbt0j2BdcD4QX/iOl9tUTFXCQ903aZIrMv7Tc6fuat3dY7duyg1xULb yz10ob59tw/e4mxHxusC7Au1N4yhmt1yaDLIz0vcL8AJV9F7KQx+2+AsVtAkp8ss8MY4Kn JM/nREETieohMZYv4RIh7Ygrpu4ZhAjUJQvWYoB8T1YSEXSwyUcny6aAbDZsJTqMdR5hRt YbkWmcbdFOkc3c+lkICatwo6JMUCVpLlTOLedKImNWzhQDajBwqfhQjyXd8NbiMRLpQrNO vpYClpYhFWPE/Y0sKG5xjf/eaGk7Zjv8nlP0Vq5z/Uo/jONQQ3T8oIPx3LprFSjLy2zQIk hDBNgVO1mJx4GPGpisLvnD+Rzrr663mMdvMu22MeP6cfBXkMxCEJZNAHoQ/XlY0/PPOs1S JDmj/dMRdpjl/TpDdpzwRbCTSdz8Vq16CRR2y1PCRdCNo20v24Kt9rdjDzTdINn2cB/0dg OxQhrJEJtwez/a31NOTkjaKktqc4zh9EOj1uY0cHFxXLel43FBPKheMPj0xHWxa2nCfkRH TExXjedslOHuXQKdJj0MTUHSw78E5y7IzQdV+VYcO0gqF74uxkEmE8vxl+/DlHyOhlT+EX miAYGYwV+EjxcFrWe1AWjjplN6NrfjBzfiLI6yt/gjvzy1X66z1qKJpW2JYA X-ME-Proxy: Feedback-ID: i7a5e4b5f:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Aug 2026 04:22:19 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: [PATCH v11 14/14] arm64: dts: rockchip: rk3576-rock-4d: enable NPU Date: Mon, 31 Aug 2026 20:19:56 +1200 Message-ID: <20260831081956.84871-15-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com> References: <20260831081956.84871-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable rknn_core_0 and its IOMMU on the Radxa ROCK 4D, and hand vdd_npu_s0 to the NPU power domain as its domain-supply, so the rail is switched by the domain that gates the block. Measured on a ROCK 4D with this in place. The rail's regulator debugfs reports open_count 1, so the domain is the consumer that took it. A sampler running beside an inference caught use_count at 1, and three reads at rest report use_count 0 with the rail disabled, so it follows the domain rather than staying on. Over the same run the genpd active_time of all four NPU domains rises by roughly 60ms per inference, and the inferences either side of that are 128 of 128 channels against the CPU reference. rknn_core_0 keeps npu-supply on the same rail, which the binding requires. Only rknn_core_0 is enabled: the driver binds one core per node and the second core is left to whoever can test it. Signed-off-by: Jiaxing Hu --- arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts b/arch/arm64/b= oot/dts/rockchip/rk3576-rock-4d.dts index 272af1012..79e039bee 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts @@ -722,6 +722,10 @@ &pcie0 { status =3D "okay"; }; =20 +&pd_npu { + domain-supply =3D <&vdd_npu_s0>; +}; + &pinctrl { hdmi { hdmi_tx_on_h: hdmi-tx-on-h { @@ -779,6 +783,15 @@ wifi_en_h: wifi-en-h { }; }; =20 +&rknn_core_0 { + npu-supply =3D <&vdd_npu_s0>; + status =3D "okay"; +}; + +&rknn_mmu_0 { + status =3D "okay"; +}; + &sai6 { status =3D "okay"; }; --=20 2.43.0