From nobody Sat Sep 26 19:34:48 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67C7F20E030; Mon, 31 Aug 2026 07:38:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788161886; cv=none; b=HWUQPrel4rDHaFV4FFjrOfkXEsAbHepitFUR7DkcZRZHaav2NHwVDxVPqQdNGndLY/8rXUk/7WRViRpXK0Za5IoYYPmOu4/gng51ZC0rGLK0gl0rdbAhWh8zXx1NBaYOuXAY+Jq0a8OCRFSo/LQym7f0ZN5WwGKkrv2VrvBuHxU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788161886; c=relaxed/simple; bh=64/OFULvzbLlpYJvKHLvybzuSZs7NGzcE1bk3VvxVpI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JxtvR2oq3pUjLOZiVDPhTmta4IDGkB46ctTH4O1Un3ygMJOp6NNXmeih0/PMPs70dlX4Sx3cjeH22UuQGdLl3pKho8/EcX10vV8AGX46JN/xOq1KWQMm8PVBj6xtVTDf5PXv/o/XY/3sBuKAM4RGG7//P3cKBrWYjLAT1aIrg0o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=GPt4V02L; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="GPt4V02L" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id C97484E41466; Mon, 31 Aug 2026 07:38:02 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 93467601E1; Mon, 31 Aug 2026 07:38:02 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 6F77B11C783E3; Mon, 31 Aug 2026 09:37:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788161881; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=rKqQvcYTnwhaeJBQ2ar7dKiQ42957hc/hTbAjzWCFPM=; b=GPt4V02LsQZNwWDDGo0O6bovgr21NkxPD57nBj3tF/tYpUaC1MSLADXxXq5lemvazZzewf ejQwVvIvyTYZ9eO+8G/nS39rcy+AlML9hDbVyOhvsmnN50PO772iGl4NAY2E2DWx12+dgB QEWpxldZtdFNw88WMVLEkxrYF4IAPtgqEGajxq9XBm/O+aGBbThK8tpoGMnw3VjscxXi2e Qxp/YlI+hxUesRi8RymjGSGD3Fps0qiFFcK2ymzkiY73+gBsPJS9wcoozJqVOZ9A8epeNA zSnHFW5EHAWiTzoT640+idGYhFlyK4FTT06wYPZEZVMaDx+VPqfpeILgqAl2dQ== From: Maxime Chevallier To: Andrew Lunn , Jakub Kicinski , davem@davemloft.net, Eric Dumazet , Paolo Abeni , Simon Horman , Maxime Coquelin , Alexandre Torgue , Russell King , Heiner Kallweit , Yao Zi , Frank Cc: Maxime Chevallier , thomas.petazzoni@bootlin.com, =?UTF-8?q?Alexis=20Lothor=C3=A9?= , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH net-next 1/3] net: phy: motorcomm: Split yt8521_config_init() page management Date: Mon, 31 Aug 2026 09:37:43 +0200 Message-ID: <20260831073747.361482-2-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260831073747.361482-1-maxime.chevallier@bootlin.com> References: <20260831073747.361482-1-maxime.chevallier@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" In preparation for separate .config_init() implementations for YT8521 and YT8531S, let's split the yt8521_config_init() into a high-level helper that deals with page handling, and another one that implements the logic. This will ease splitting the YT8531S-specific logic out. Signed-off-by: Maxime Chevallier --- drivers/net/phy/motorcomm.c | 38 ++++++++++++++++++++++--------------- 1 file changed, 23 insertions(+), 15 deletions(-) diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index c5a2cda8d31b..58e4d67b945f 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -1680,27 +1680,16 @@ static int yt8521_resume(struct phy_device *phydev) return yt8521_modify_utp_fiber_bmcr(phydev, BMCR_PDOWN, 0); } =20 -/** - * yt8521_config_init() - called to initialize the PHY - * @phydev: a pointer to a &struct phy_device - * - * returns 0 or negative errno code - */ -static int yt8521_config_init(struct phy_device *phydev) +static int __yt8521_config_init(struct phy_device *phydev) { struct device *dev =3D &phydev->mdio.dev; - int old_page; int ret =3D 0; =20 - old_page =3D phy_select_page(phydev, YT8521_RSSR_UTP_SPACE); - if (old_page < 0) - goto err_restore_page; - /* set rgmii delay mode */ if (phydev->interface !=3D PHY_INTERFACE_MODE_SGMII) { ret =3D ytphy_rgmii_clk_delay_config(phydev); if (ret < 0) - goto err_restore_page; + return ret; } =20 if (device_property_read_bool(dev, "motorcomm,auto-sleep-disabled")) { @@ -1708,7 +1697,7 @@ static int yt8521_config_init(struct phy_device *phyd= ev) ret =3D ytphy_modify_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1_REG, YT8521_ESC1R_SLEEP_SW, 0); if (ret < 0) - goto err_restore_page; + return ret; } =20 if (device_property_read_bool(dev, "motorcomm,keep-pll-enabled")) { @@ -1716,13 +1705,32 @@ static int yt8521_config_init(struct phy_device *ph= ydev) ret =3D ytphy_modify_ext(phydev, YT8521_CLOCK_GATING_REG, YT8521_CGR_RX_CLK_EN, 0); if (ret < 0) - goto err_restore_page; + return ret; } =20 if (phy_interface_is_rgmii(phydev) && phydev_id_compare(phydev, PHY_ID_YT8531S)) ret =3D yt8531_set_ds(phydev); =20 + return ret; +} + +/** + * yt8521_config_init() - called to initialize the PHY + * @phydev: a pointer to a &struct phy_device + * + * returns 0 or negative errno code + */ +static int yt8521_config_init(struct phy_device *phydev) +{ + int old_page, ret =3D 0; + + old_page =3D phy_select_page(phydev, YT8521_RSSR_UTP_SPACE); + if (old_page < 0) + goto err_restore_page; + + ret =3D __yt8521_config_init(phydev); + err_restore_page: return phy_restore_page(phydev, old_page, ret); } --=20 2.55.0 From nobody Sat Sep 26 19:34:48 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23F223CAA31 for ; Mon, 31 Aug 2026 07:38:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788161887; cv=none; b=eIhth2deAzWOgM0X+7em1W/JGEOWhWUlOT+NipDLGmBXX2kXWuod69vR13VrfaeZpTdR+XJpZsPxr4dlRFbyQrljDyunxb9dnnQbi6Mx+VtjZ8Z4GnpBCuUQgLUJQOZkFajqvV6+CEyQXBJD/+YY2oXEztG1QtvE4VPn9NHgGog= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788161887; 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charset="utf-8" The YT8531S PHY configuration logic is similar to the YT8521, but with some extra steps for the RGMII configuration. In preparation for improvements in the YT8531S configuration for the version found integrated with the YT6801 PCIe NIC, let's split the logic out by extending the YT8521 configuration sequence. Signed-off-by: Maxime Chevallier --- drivers/net/phy/motorcomm.c | 36 ++++++++++++++++++++++++------------ 1 file changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index 58e4d67b945f..36c229460a77 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -1700,19 +1700,12 @@ static int __yt8521_config_init(struct phy_device *= phydev) return ret; } =20 - if (device_property_read_bool(dev, "motorcomm,keep-pll-enabled")) { + if (device_property_read_bool(dev, "motorcomm,keep-pll-enabled")) /* enable RXC clock when no wire plug */ - ret =3D ytphy_modify_ext(phydev, YT8521_CLOCK_GATING_REG, - YT8521_CGR_RX_CLK_EN, 0); - if (ret < 0) - return ret; - } + return ytphy_modify_ext(phydev, YT8521_CLOCK_GATING_REG, + YT8521_CGR_RX_CLK_EN, 0); =20 - if (phy_interface_is_rgmii(phydev) && - phydev_id_compare(phydev, PHY_ID_YT8531S)) - ret =3D yt8531_set_ds(phydev); - - return ret; + return 0; } =20 /** @@ -1735,6 +1728,25 @@ static int yt8521_config_init(struct phy_device *phy= dev) return phy_restore_page(phydev, old_page, ret); } =20 +static int yt8531s_config_init(struct phy_device *phydev) +{ + int old_page, ret =3D 0; + + old_page =3D phy_select_page(phydev, YT8521_RSSR_UTP_SPACE); + if (old_page < 0) + goto err_restore_page; + + ret =3D __yt8521_config_init(phydev); + if (ret) + goto err_restore_page; + + if (phy_interface_is_rgmii(phydev)) + ret =3D yt8531_set_ds(phydev); + +err_restore_page: + return phy_restore_page(phydev, old_page, ret); +} + static const unsigned long supported_trgs =3D (BIT(TRIGGER_NETDEV_FULL_DUP= LEX) | BIT(TRIGGER_NETDEV_HALF_DUPLEX) | BIT(TRIGGER_NETDEV_LINK) | @@ -3143,7 +3155,7 @@ static struct phy_driver motorcomm_phy_drvs[] =3D { .set_wol =3D ytphy_set_wol, .config_aneg =3D yt8521_config_aneg, .aneg_done =3D yt8521_aneg_done, - .config_init =3D yt8521_config_init, + .config_init =3D yt8531s_config_init, .read_status =3D yt8521_read_status, .soft_reset =3D yt8521_soft_reset, .suspend =3D yt8521_suspend, --=20 2.55.0 From nobody Sat Sep 26 19:34:48 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DBDD23C13EE for ; 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bh=k8/zkJTEH+6Vr7PveY/3bVW0CtCwJqmEOXtgHVQOUrc=; b=mnb+riN9q6mcC+1deaaN4ax1ARZE+Yoh3uxjpu1qKVyg0jccyHzJPqUNCa54Yix/VrlHTY /wD3ZrcWZIs9ywtLFBu4K/15ZScAld1nliaC01w0aKkTKkdiRBsjBqNUljfRva9aXhqJO4 bORSIoksiBZPH26IrzD3ScHxPBKBz5LQHYJyT56qgXESq8TKOHElz5Nd42MjVdnE5g78LJ 5hdXiW4M/LKqJXDtZfvnuza9GKD1LuV7R2x7gLZ2B+xt/+bOZA0WEmTEio9WtWn5NRyxCC cqhugPO5OAaOuubKJb2troVmZkxiYeo733w6uLeV0EjTN8rsJUJGbKyOJ+9d4w== From: Maxime Chevallier To: Andrew Lunn , Jakub Kicinski , davem@davemloft.net, Eric Dumazet , Paolo Abeni , Simon Horman , Maxime Coquelin , Alexandre Torgue , Russell King , Heiner Kallweit , Yao Zi , Frank Cc: Maxime Chevallier , thomas.petazzoni@bootlin.com, =?UTF-8?q?Alexis=20Lothor=C3=A9?= , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH net-next 3/3] net: phy: motorcomm: Enable analog frontend on YT8531S Date: Mon, 31 Aug 2026 09:37:45 +0200 Message-ID: <20260831073747.361482-4-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260831073747.361482-1-maxime.chevallier@bootlin.com> References: <20260831073747.361482-1-maxime.chevallier@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" The YT6801 PCIe NIC includes the dwmac-motorcomm IP for the MAC part, as well as a YT8531S PHY, configured in GMII mode. It seems this PHY requires the Analog Front-end (AFE) DAC clock to be enabled for link to reliably establish, otherwise the link just doesn't come up. Let's enable it at config_init(). This logic has been extracted from the vendor driver provided by Motorcomm. It's really unclear if this is specific to the integrated version of that PHY, and how this potentially interacts with the fiber mode this PHY supports, so this configuration is only enabled when the interface is GMII, i.e. the PHY is integrated. With this, the PHY reliably establishes link and the YT6801 PCIe card becomes fully functional. Signed-off-by: Maxime Chevallier --- drivers/net/phy/motorcomm.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index 36c229460a77..90a4f86f2758 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -144,6 +144,11 @@ #define YT8521_CLOCK_GATING_REG 0xC #define YT8521_CGR_RX_CLK_EN BIT(12) =20 +/* Analog front-end control register 3 */ +#define YT8531S_EXT_AFE_CTRL3 0x12 +/* Analog front-end DAC clock enable */ +#define YT8531S_AFE_CTRL3_CLKDAC_AON BIT(13) + #define YT8521_EXTREG_SLEEP_CONTROL1_REG 0x27 #define YT8521_ESC1R_SLEEP_SW BIT(15) #define YT8521_ESC1R_PLLON_SLP BIT(14) @@ -1740,8 +1745,15 @@ static int yt8531s_config_init(struct phy_device *ph= ydev) if (ret) goto err_restore_page; =20 - if (phy_interface_is_rgmii(phydev)) + if (phy_interface_is_rgmii(phydev)) { ret =3D yt8531_set_ds(phydev); + if (ret) + goto err_restore_page; + } + + if (phydev->interface =3D=3D PHY_INTERFACE_MODE_GMII) + ret =3D ytphy_modify_ext(phydev, YT8531S_EXT_AFE_CTRL3, + 0, YT8531S_AFE_CTRL3_CLKDAC_AON); =20 err_restore_page: return phy_restore_page(phydev, old_page, ret); --=20 2.55.0