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Mon, 31 Aug 2026 09:36:54 -0700 (PDT) X-Received: by 2002:a17:90b:48d1:b0:398:9bd4:d13 with SMTP id 98e67ed59e1d1-39907e4aeb2mr2834531a91.18.1788194214064; Mon, 31 Aug 2026 09:36:54 -0700 (PDT) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3990d75fc49sm271260a91.12.2026.08.31.09.36.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 09:36:53 -0700 (PDT) From: Praveen Talari Date: Mon, 31 Aug 2026 22:06:35 +0530 Subject: [PATCH 1/3] dmaengine: qcom: gpi: trace: Add trace events header for Qualcomm GPI DMA Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260831-add-trace-support-gpio-v1-1-7b0fd0d0ddb3@oss.qualcomm.com> References: <20260831-add-trace-support-gpio-v1-0-7b0fd0d0ddb3@oss.qualcomm.com> In-Reply-To: <20260831-add-trace-support-gpio-v1-0-7b0fd0d0ddb3@oss.qualcomm.com> To: konrad.dybcio@oss.qualcomm.com, Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , Vinod Koul , Frank Li Cc: chandana.chiluveru@oss.qualcomm.com, mukesh.savaliya@oss.qualcomm.com, linux-kernel@vger.kernel.org, linux-trace-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dmaengine@vger.kernel.org, Praveen Talari X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; 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The events defined here cover channel/event command dispatch, IRQ type handling, channel/event control state transitions, error IRQ status, completion event processing (including the no-pending- descriptor and transfer result paths), per-event processing in the event ring, ring allocation/programming details, already-in-state checks for pause/resume, and TRE queuing and contents. Together they give full runtime visibility into GPI DMA behavior in place of the driver's former dev_dbg() based debug logging. Signed-off-by: Praveen Talari --- include/trace/events/qcom_gpi.h | 313 ++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 313 insertions(+) diff --git a/include/trace/events/qcom_gpi.h b/include/trace/events/qcom_gp= i.h new file mode 100644 index 000000000000..5474e762f4b6 --- /dev/null +++ b/include/trace/events/qcom_gpi.h @@ -0,0 +1,313 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM qcom_gpi + +#if !defined(_TRACE_QCOM_GPI_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_QCOM_GPI_H + +#include + +TRACE_EVENT(gpi_send_cmd, + TP_PROTO(struct device *dev, u32 chid, u32 cmd, const char *cmd_str), + TP_ARGS(dev, chid, cmd, cmd_str), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __string(cmd_str, cmd_str) + __field(u32, chid) + __field(u32, cmd) + ), + + TP_fast_assign(__assign_str(name); + __assign_str(cmd_str); + __entry->chid =3D chid; + __entry->cmd =3D cmd; + ), + + TP_printk("%s: chid=3D%u cmd=3D%s(%u)", + __get_str(name), __entry->chid, __get_str(cmd_str), + __entry->cmd) +); + +TRACE_EVENT(gpi_irq_status, + TP_PROTO(struct device *dev, u32 gpii_id, u32 irq_type), + TP_ARGS(dev, gpii_id, irq_type), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, gpii_id) + __field(u32, irq_type) + ), + + TP_fast_assign(__assign_str(name); + __entry->gpii_id =3D gpii_id; + __entry->irq_type =3D irq_type; + ), + + TP_printk("%s: gpii=3D%u irq_type=3D0x%08x", + __get_str(name), __entry->gpii_id, __entry->irq_type) +); + +TRACE_EVENT(gpi_ch_ctrl_irq, + TP_PROTO(struct device *dev, u32 chid, u32 ch_state), + TP_ARGS(dev, chid, ch_state), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, chid) + __field(u32, ch_state) + ), + + TP_fast_assign(__assign_str(name); + __entry->chid =3D chid; + __entry->ch_state =3D ch_state; + ), + + TP_printk("%s: chid=3D%u ch_state=3D%u", + __get_str(name), __entry->chid, __entry->ch_state) +); + +TRACE_EVENT(gpi_ev_process, + TP_PROTO(struct device *dev, u32 chid, u32 ev_type, u8 code, + u16 status, u32 length), + TP_ARGS(dev, chid, ev_type, code, status, length), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, chid) + __field(u32, ev_type) + __field(u8, code) + __field(u16, status) + __field(u32, length) + ), + + TP_fast_assign(__assign_str(name); + __entry->chid =3D chid; + __entry->ev_type =3D ev_type; + __entry->code =3D code; + __entry->status =3D status; + __entry->length =3D length; + ), + + TP_printk("%s: chid=3D%u ev_type=3D0x%02x code=3D%u status=3D%u lengt= h=3D%u", + __get_str(name), __entry->chid, __entry->ev_type, + __entry->code, __entry->status, __entry->length) +); + +TRACE_EVENT(gpi_queue_xfer, + TP_PROTO(struct device *dev, u32 chid, u32 num_tre), + TP_ARGS(dev, chid, num_tre), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, chid) + __field(u32, num_tre) + ), + + TP_fast_assign(__assign_str(name); + __entry->chid =3D chid; + __entry->num_tre =3D num_tre; + ), + + TP_printk("%s: chid=3D%u num_tre=3D%u", + __get_str(name), __entry->chid, __entry->num_tre) +); + +TRACE_EVENT(gpi_gen_err_irq, + TP_PROTO(struct device *dev, u32 gpii_id, u32 irq_stts), + TP_ARGS(dev, gpii_id, irq_stts), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, gpii_id) + __field(u32, irq_stts) + ), + + TP_fast_assign(__assign_str(name); + __entry->gpii_id =3D gpii_id; + __entry->irq_stts =3D irq_stts; + ), + + TP_printk("%s: gpii=3D%u irq_stts=3D0x%08x", + __get_str(name), __entry->gpii_id, __entry->irq_stts) +); + +TRACE_EVENT(gpi_ev_ctrl_irq, + TP_PROTO(struct device *dev, u32 gpii_id, u32 ev_ch_irq, u32 ev_state= ), + TP_ARGS(dev, gpii_id, ev_ch_irq, ev_state), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, gpii_id) + __field(u32, ev_ch_irq) + __field(u32, ev_state) + ), + + TP_fast_assign(__assign_str(name); + __entry->gpii_id =3D gpii_id; + __entry->ev_ch_irq =3D ev_ch_irq; + __entry->ev_state =3D ev_state; + ), + + TP_printk("%s: gpii=3D%u ev_ch_irq=3D0x%08x ev_state=3D%u", + __get_str(name), __entry->gpii_id, __entry->ev_ch_irq, + __entry->ev_state) +); + +TRACE_EVENT(gpi_ev_no_desc, + TP_PROTO(struct device *dev, u32 chid, const u32 *ev_dword, + const u32 *tre_dword), + TP_ARGS(dev, chid, ev_dword, tre_dword), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, chid) + __array(u32, ev_dword, 4) + __array(u32, tre_dword, 4) + ), + + TP_fast_assign(__assign_str(name); + __entry->chid =3D chid; + memcpy(__entry->ev_dword, ev_dword, sizeof(__entry->ev_dword)); + memcpy(__entry->tre_dword, tre_dword, sizeof(__entry->tre_dword)); + ), + + TP_printk("%s: chid=3D%u event=3D%08x:%08x:%08x:%08x pending_tre=3D%0= 8x:%08x:%08x:%08x", + __get_str(name), __entry->chid, + __entry->ev_dword[0], __entry->ev_dword[1], + __entry->ev_dword[2], __entry->ev_dword[3], + __entry->tre_dword[0], __entry->tre_dword[1], + __entry->tre_dword[2], __entry->tre_dword[3]) +); + +TRACE_EVENT(gpi_xfer_result, + TP_PROTO(struct device *dev, u32 chid, int result, u32 residue), + TP_ARGS(dev, chid, result, residue), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, chid) + __field(int, result) + __field(u32, residue) + ), + + TP_fast_assign(__assign_str(name); + __entry->chid =3D chid; + __entry->result =3D result; + __entry->residue =3D residue; + ), + + TP_printk("%s: chid=3D%u result=3D%d residue=3D%u", + __get_str(name), __entry->chid, __entry->result, + __entry->residue) +); + +TRACE_EVENT(gpi_process_event, + TP_PROTO(struct device *dev, u32 chid, u32 type, const u32 *dword), + TP_ARGS(dev, chid, type, dword), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, chid) + __field(u32, type) + __array(u32, dword, 4) + ), + + TP_fast_assign(__assign_str(name); + __entry->chid =3D chid; + __entry->type =3D type; + memcpy(__entry->dword, dword, sizeof(__entry->dword)); + ), + + TP_printk("%s: chid=3D%u type=3D0x%02x %08x:%08x:%08x:%08x", + __get_str(name), __entry->chid, __entry->type, + __entry->dword[0], __entry->dword[1], + __entry->dword[2], __entry->dword[3]) +); + +TRACE_EVENT(gpi_alloc_ring, + TP_PROTO(struct device *dev, u32 elements, u32 el_size, + u32 req_len, u64 len, size_t alloc_size), + TP_ARGS(dev, elements, el_size, req_len, len, alloc_size), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, elements) + __field(u32, el_size) + __field(u32, req_len) + __field(u64, len) + __field(size_t, alloc_size) + ), + + TP_fast_assign(__assign_str(name); + __entry->elements =3D elements; + __entry->el_size =3D el_size; + __entry->req_len =3D req_len; + __entry->len =3D len; + __entry->alloc_size =3D alloc_size; + ), + + TP_printk("%s: elements=3D%u el_size=3D%u req_len=3D%u len=3D%llu all= oc_size=3D%zu", + __get_str(name), __entry->elements, __entry->el_size, + __entry->req_len, __entry->len, __entry->alloc_size) +); + +TRACE_EVENT(gpi_ring_info, + TP_PROTO(struct device *dev, dma_addr_t dma_handle, phys_addr_t phys_= addr, + u32 len, u32 el_size, u32 elements), + TP_ARGS(dev, dma_handle, phys_addr, len, el_size, elements), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u64, dma_handle) + __field(u64, phys_addr) + __field(u32, len) + __field(u32, el_size) + __field(u32, elements) + ), + + TP_fast_assign(__assign_str(name); + __entry->dma_handle =3D dma_handle; + __entry->phys_addr =3D phys_addr; + __entry->len =3D len; + __entry->el_size =3D el_size; + __entry->elements =3D elements; + ), + + TP_printk("%s: dma_handle=3D%llx phys_addr=3D%llx len=3D%u el_size=3D= %u elements=3D%u", + __get_str(name), __entry->dma_handle, __entry->phys_addr, + __entry->len, __entry->el_size, __entry->elements) +); + +TRACE_EVENT(gpi_already_state, + TP_PROTO(struct device *dev, u32 gpii_id, u32 pm_state), + TP_ARGS(dev, gpii_id, pm_state), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, gpii_id) + __field(u32, pm_state) + ), + + TP_fast_assign(__assign_str(name); + __entry->gpii_id =3D gpii_id; + __entry->pm_state =3D pm_state; + ), + + TP_printk("%s: gpii=3D%u already in pm_state=3D%u", + __get_str(name), __entry->gpii_id, __entry->pm_state) +); + +TRACE_EVENT(gpi_tre, + TP_PROTO(struct device *dev, u32 chid, u32 idx, const u32 *dword), + TP_ARGS(dev, chid, idx, dword), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, chid) + __field(u32, idx) + __array(u32, dword, 4) + ), + + TP_fast_assign(__assign_str(name); + __entry->chid =3D chid; + __entry->idx =3D idx; + memcpy(__entry->dword, dword, sizeof(__entry->dword)); + ), + + TP_printk("%s: chid=3D%u tre[%u]=3D%08x:%08x:%08x:%08x", + __get_str(name), __entry->chid, __entry->idx, + __entry->dword[0], __entry->dword[1], + __entry->dword[2], __entry->dword[3]) +); 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Tracepoints are added at the same points as their existing dev_dbg() counterparts: channel/event command dispatch in gpi_send_cmd(), top-level interrupt type in gpi_handle_irq(), channel state transitions in gpi_process_ch_ctrl_irq(), completion event handling in gpi_process_xfer_compl_event() and gpi_process_imed_data_event(), and TRE queuing in gpi_issue_pending(). Signed-off-by: Praveen Talari --- drivers/dma/qcom/gpi.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c index a5055a6273af..b09354a73b46 100644 --- a/drivers/dma/qcom/gpi.c +++ b/drivers/dma/qcom/gpi.c @@ -17,6 +17,9 @@ #include "../dmaengine.h" #include "../virt-dma.h" =20 +#define CREATE_TRACE_POINTS +#include + #define TRE_TYPE_DMA 0x10 #define TRE_TYPE_IMMEDIATE_DMA 0x11 #define TRE_TYPE_GO 0x20 @@ -683,6 +686,7 @@ static int gpi_send_cmd(struct gpii *gpii, struct gchan= *gchan, =20 dev_dbg(gpii->gpi_dev->dev, "sending cmd: %s:%u\n", TO_GPI_CMD_STR(gpi_cmd), chid); + trace_gpi_send_cmd(gpii->gpi_dev->dev, chid, gpi_cmd, TO_GPI_CMD_STR(gpi_= cmd)); =20 /* send opcode and wait for completion */ reinit_completion(&gpii->cmd_completion); @@ -773,6 +777,7 @@ static void gpi_process_ch_ctrl_irq(struct gpii *gpii) if (gpii->gpi_cmd =3D=3D GPI_CH_CMD_DE_ALLOC) state =3D DEFAULT_CH_STATE; gchan->ch_state =3D state; + trace_gpi_ch_ctrl_irq(gpii->gpi_dev->dev, chid, gchan->ch_state); =20 /* * Triggering complete all if ch_state is not a stop in process. @@ -841,6 +846,7 @@ static irqreturn_t gpi_handle_irq(int irq, void *data) =20 offset =3D GPII_n_CNTXT_TYPE_IRQ_OFFS(gpii->gpii_id); type =3D gpi_read_reg(gpii, gpii->regs + offset); + trace_gpi_irq_status(gpii->gpi_dev->dev, gpii_id, type); =20 do { /* global gpii error */ @@ -968,6 +974,8 @@ static void gpi_process_imed_data_event(struct gchan *g= chan, smp_wmb(); =20 chid =3D imed_event->chid; + trace_gpi_ev_process(gpii->gpi_dev->dev, chid, IMMEDIATE_DATA_EV_TYPE, + imed_event->code, imed_event->status, imed_event->length); if (imed_event->code =3D=3D MSM_GPI_TCE_EOT && gpii->ieob_set) { if (chid =3D=3D GPI_RX_CHAN) goto gpi_free_desc; @@ -1043,6 +1051,8 @@ static void gpi_process_xfer_compl_event(struct gchan= *gchan, smp_wmb(); =20 chid =3D compl_event->chid; + trace_gpi_ev_process(gpii->gpi_dev->dev, chid, XFER_COMPLETE_EV_TYPE, + compl_event->code, compl_event->status, compl_event->length); if (compl_event->code =3D=3D MSM_GPI_TCE_EOT && gpii->ieob_set) { if (chid =3D=3D GPI_RX_CHAN) goto gpi_free_desc; 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Tracepoints are added at the same points as the dev_dbg() calls they replace: channel/event command dispatch in gpi_send_cmd(), error and top-level interrupt status in gpi_process_gen_err_irq() and gpi_handle_irq(), event/channel control state transitions in the IRQ handler and gpi_process_ch_ctrl_irq(), completion event handling (including the no-pending-descriptor and transfer result paths) in gpi_process_imed_data_event(), gpi_process_xfer_compl_event() and gpi_process_events(), ring allocation details in gpi_alloc_ring(), already-in-state checks in gpi_pause()/gpi_resume(), TRE contents in gpi_create_i2c_tre()/gpi_create_spi_tre(), and TRE queuing in gpi_issue_pending(). Signed-off-by: Praveen Talari --- drivers/dma/qcom/gpi.c | 58 ++++++++++++++--------------------------------= ---- 1 file changed, 16 insertions(+), 42 deletions(-) diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c index b09354a73b46..8e7d25a46147 100644 --- a/drivers/dma/qcom/gpi.c +++ b/drivers/dma/qcom/gpi.c @@ -684,8 +684,6 @@ static int gpi_send_cmd(struct gpii *gpii, struct gchan= *gchan, if (IS_CHAN_CMD(gpi_cmd)) chid =3D gchan->chid; =20 - dev_dbg(gpii->gpi_dev->dev, - "sending cmd: %s:%u\n", TO_GPI_CMD_STR(gpi_cmd), chid); trace_gpi_send_cmd(gpii->gpi_dev->dev, chid, gpi_cmd, TO_GPI_CMD_STR(gpi_= cmd)); =20 /* send opcode and wait for completion */ @@ -797,7 +795,7 @@ static void gpi_process_gen_err_irq(struct gpii *gpii) u32 irq_stts =3D gpi_read_reg(gpii, gpii->regs + offset); =20 /* clear the status */ - dev_dbg(gpii->gpi_dev->dev, "irq_stts:0x%x\n", irq_stts); + trace_gpi_gen_err_irq(gpii->gpi_dev->dev, gpii_id, irq_stts); =20 /* Clear the register */ offset =3D GPII_n_CNTXT_GPII_IRQ_CLR_OFFS(gpii_id); @@ -866,8 +864,6 @@ static irqreturn_t gpi_handle_irq(int irq, void *data) u32 ev_state; u32 ev_ch_irq; =20 - dev_dbg(gpii->gpi_dev->dev, - "processing EV CTRL interrupt\n"); offset =3D GPII_n_CNTXT_SRC_EV_CH_IRQ_OFFS(gpii_id); ev_ch_irq =3D gpi_read_reg(gpii, gpii->regs + offset); =20 @@ -887,15 +883,14 @@ static irqreturn_t gpi_handle_irq(int irq, void *data) ev_state =3D DEFAULT_EV_CH_STATE; =20 gpii->ev_state =3D ev_state; - dev_dbg(gpii->gpi_dev->dev, "setting EV state to %s\n", - TO_GPI_EV_STATE_STR(gpii->ev_state)); + trace_gpi_ev_ctrl_irq(gpii->gpi_dev->dev, gpii_id, ev_ch_irq, + gpii->ev_state); complete_all(&gpii->cmd_completion); type &=3D ~(GPII_n_CNTXT_TYPE_IRQ_MSK_EV_CTRL); } =20 /* channel control irq */ if (type & GPII_n_CNTXT_TYPE_IRQ_MSK_CH_CTRL) { - dev_dbg(gpii->gpi_dev->dev, "process CH CTRL interrupts\n"); gpi_process_ch_ctrl_irq(gpii); type &=3D ~(GPII_n_CNTXT_TYPE_IRQ_MSK_CH_CTRL); } @@ -945,17 +940,10 @@ static void gpi_process_imed_data_event(struct gchan = *gchan, struct gpi_tre *gpi_tre; =20 spin_unlock_irqrestore(&gchan->vc.lock, flags); - dev_dbg(gpii->gpi_dev->dev, "event without a pending descriptor!\n"); gpi_ere =3D (struct gpi_ere *)imed_event; - dev_dbg(gpii->gpi_dev->dev, - "Event: %08x %08x %08x %08x\n", - gpi_ere->dword[0], gpi_ere->dword[1], - gpi_ere->dword[2], gpi_ere->dword[3]); gpi_tre =3D tre; - dev_dbg(gpii->gpi_dev->dev, - "Pending TRE: %08x %08x %08x %08x\n", - gpi_tre->dword[0], gpi_tre->dword[1], - gpi_tre->dword[2], gpi_tre->dword[3]); + trace_gpi_ev_no_desc(gpii->gpi_dev->dev, imed_event->chid, + gpi_ere->dword, gpi_tre->dword); return; } gpi_desc =3D to_gpi_desc(vd); @@ -1064,11 +1052,10 @@ static void gpi_process_xfer_compl_event(struct gch= an *gchan, dev_err(gpii->gpi_dev->dev, "Error in Transaction\n"); result.result =3D DMA_TRANS_ABORTED; } else { - dev_dbg(gpii->gpi_dev->dev, "Transaction Success\n"); result.result =3D DMA_TRANS_NOERROR; } result.residue =3D gpi_desc->len - compl_event->length; - dev_dbg(gpii->gpi_dev->dev, "Residue %d\n", result.residue); + trace_gpi_xfer_result(gpii->gpi_dev->dev, chid, result.result, result.res= idue); =20 dma_cookie_complete(&vd->tx); dmaengine_desc_get_callback_invoke(&vd->tx, &result); @@ -1100,11 +1087,8 @@ static void gpi_process_events(struct gpii *gpii) chid =3D gpi_event->xfer_compl_event.chid; type =3D gpi_event->xfer_compl_event.type; =20 - dev_dbg(gpii->gpi_dev->dev, - "Event: CHID:%u, type:%x %08x %08x %08x %08x\n", - chid, type, gpi_event->gpi_ere.dword[0], - gpi_event->gpi_ere.dword[1], gpi_event->gpi_ere.dword[2], - gpi_event->gpi_ere.dword[3]); + trace_gpi_process_event(gpii->gpi_dev->dev, chid, type, + gpi_event->gpi_ere.dword); =20 switch (type) { case XFER_COMPLETE_EV_TYPE: @@ -1113,7 +1097,6 @@ static void gpi_process_events(struct gpii *gpii) &gpi_event->xfer_compl_event); break; case STALE_EV_TYPE: - dev_dbg(gpii->gpi_dev->dev, "stale event, not processing\n"); break; case IMMEDIATE_DATA_EV_TYPE: gchan =3D &gpii->gchan[chid]; @@ -1121,11 +1104,8 @@ static void gpi_process_events(struct gpii *gpii) &gpi_event->immediate_data_event); break; case QUP_NOTIF_EV_TYPE: - dev_dbg(gpii->gpi_dev->dev, "QUP_NOTIF_EV_TYPE\n"); break; default: - dev_dbg(gpii->gpi_dev->dev, - "not supported event type:0x%x\n", type); } gpi_ring_recycle_ev_element(ev_ring); } @@ -1409,10 +1389,8 @@ static int gpi_alloc_ring(struct gpi_ring *ring, u32= elements, bit++; len =3D 1 << bit; ring->alloc_size =3D (len + (len - 1)); - dev_dbg(gpii->gpi_dev->dev, - "#el:%u el_size:%u len:%u actual_len:%llu alloc_size:%zu\n", - elements, el_size, (elements * el_size), len, - ring->alloc_size); + trace_gpi_alloc_ring(gpii->gpi_dev->dev, elements, el_size, + (elements * el_size), len, ring->alloc_size); =20 ring->pre_aligned =3D dma_alloc_coherent(gpii->gpi_dev->dev, ring->alloc_size, @@ -1437,10 +1415,8 @@ static int gpi_alloc_ring(struct gpi_ring *ring, u32= elements, /* update to other cores */ smp_wmb(); =20 - dev_dbg(gpii->gpi_dev->dev, - "phy_pre:%pad phy_alig:%pa len:%u el_size:%u elements:%u\n", - &ring->dma_handle, &ring->phys_addr, ring->len, - ring->el_size, ring->elements); + trace_gpi_ring_info(gpii->gpi_dev->dev, ring->dma_handle, ring->phys_addr, + ring->len, ring->el_size, ring->elements); =20 return 0; } @@ -1542,7 +1518,7 @@ static int gpi_pause(struct dma_chan *chan) * client needs to call pause only once */ if (gpii->pm_state =3D=3D PAUSE_STATE) { - dev_dbg(gpii->gpi_dev->dev, "channel is already paused\n"); + trace_gpi_already_state(gpii->gpi_dev->dev, gpii->gpii_id, gpii->pm_stat= e); mutex_unlock(&gpii->ctrl_lock); return 0; } @@ -1578,7 +1554,7 @@ static int gpi_resume(struct dma_chan *chan) =20 mutex_lock(&gpii->ctrl_lock); if (gpii->pm_state =3D=3D ACTIVE_STATE) { - dev_dbg(gpii->gpi_dev->dev, "channel is already active\n"); + trace_gpi_already_state(gpii->gpi_dev->dev, gpii->gpii_id, gpii->pm_stat= e); mutex_unlock(&gpii->ctrl_lock); return 0; } @@ -1703,8 +1679,7 @@ static int gpi_create_i2c_tre(struct gchan *chan, str= uct gpi_desc *desc, } =20 for (i =3D 0; i < tre_idx; i++) - dev_dbg(dev, "TRE:%d %x:%x:%x:%x\n", i, desc->tre[i].dword[0], - desc->tre[i].dword[1], desc->tre[i].dword[2], desc->tre[i].dword[3]); + trace_gpi_tre(dev, chan->chid, i, desc->tre[i].dword); =20 return tre_idx; } @@ -1797,8 +1772,7 @@ static int gpi_create_spi_tre(struct gchan *chan, str= uct gpi_desc *desc, TRE_FLAGS_IEOT); =20 for (i =3D 0; i < tre_idx; i++) - dev_dbg(dev, "TRE:%d %x:%x:%x:%x\n", i, desc->tre[i].dword[0], - desc->tre[i].dword[1], desc->tre[i].dword[2], desc->tre[i].dword[3]); + trace_gpi_tre(dev, chan->chid, i, desc->tre[i].dword); =20 return tre_idx; } --=20 2.34.1