From nobody Sat Sep 26 23:53:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D43218A6DB; Fri, 28 Aug 2026 03:12:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886755; cv=none; b=XPXHDHxPAWsddr0eDIPdT3NL3Pv60ZxbyHIPZyoKqBTj2scy3jra3JGS/lnhDHw61Giah0qgnWt7wr7C04qfGY7ooFTRvmjVkUHMZL+/DB8sCAIaL+AlUmfcLmve0GaTA0stcb6tSJ5SdrHeE8ghvh87TFNK9gTjKAm55btVCYk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886755; c=relaxed/simple; bh=F6J6hOMqJ02khF6DLq0baIBkwyZyXoOa8H3w+2q4oKA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HTn9bXDgySAFomETuU99fRBB6OLPFgNAuGVAfwJCQZIGU4SH8bhOxPPsSTJhSMCm5pvpFx0TCBIUidyIdxMwygr2aXqTiyHWRFsFIWBgW9uX5LPI89AXnKi5s0Q5pEOKV3C0KOaxIRzfl7qADfcgS+RgfYpZidtUhiI6shSHF/w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6F99E1F000E9; Fri, 28 Aug 2026 03:12:31 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org Subject: [PATCH V2 1/5] cpufreq: loongson3: Make this driver depend on MACH_LOONGSON64 Date: Fri, 28 Aug 2026 11:11:57 +0800 Message-ID: <20260828031201.1500767-2-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260828031201.1500767-1-chenhuacai@loongson.cn> References: <20260828031201.1500767-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" 32BIT Loongson machines don't have SMC and FreqCtrl registers, so make this driver depend on MACH_LOONGSON64 (only for LoongArch based 64bit machines currently). Cc: stable@vger.kernel.org Fixes: ccf51454145b ("cpufreq: Add Loongson-3 CPUFreq driver support") Signed-off-by: Huacai Chen Reviewed-by: Zhongqiu Han --- drivers/cpufreq/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig index db83f3365698..edc1299098d4 100644 --- a/drivers/cpufreq/Kconfig +++ b/drivers/cpufreq/Kconfig @@ -288,6 +288,7 @@ endif if LOONGARCH config LOONGSON3_CPUFREQ tristate "Loongson3 CPUFreq Driver" + depends on MACH_LOONGSON64 help This option adds a CPUFreq driver for Loongson processors which support software configurable cpu frequency. --=20 2.52.0 From nobody Sat Sep 26 23:53:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C82A18A6DB; Fri, 28 Aug 2026 03:12:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886765; cv=none; b=Wo9OYpx8GJHG+M9YtMkxLbKfIXc5tlyPRx+PniZF/8g4HHYF1OsZM43lpp/FsU4X3j4MqWA5TZ2nVBq1kbmMvft2lTFJkmH5VDP80redNyLv2nB/T1x61ibkD3OPIm63+BFB+Ka9z0ZTKP+pwENnhC2MsS1VfGAl99JFugiBeGg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886765; c=relaxed/simple; bh=5WCAVng/l3b8WfWSj9bo6v9ee58+XeTdQWmGB/nWk8Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Lsf1j6Wk/k6BxuAPuxKuO6YXUWCOqBNKMqqlGp4Oka1IaVDNg/gp3FGqJKiy7G6EgJJU2flYLI8M062qH//6sEaZYtDuMqHhUdZwxVkhYxsCPn1Va3Ek/bBxs3zYCbkHwS5+IsfvgvLd/gLg6kRAOu8XnEiKSFgF6/JoVGi7kME= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 79E4E1F000E9; Fri, 28 Aug 2026 03:12:41 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org, Hongliang Wang Subject: [PATCH V2 2/5] cpufreq: loongson3: Adjust the width of id and val in smc_message Date: Fri, 28 Aug 2026 11:11:58 +0800 Message-ID: <20260828031201.1500767-3-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260828031201.1500767-1-chenhuacai@loongson.cn> References: <20260828031201.1500767-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The id field of smc_message is usually stand for the CPU ID. In the past this driver was only tested for desktop and laptop productions so 4-bits are enough. But now we have servers that can have as many as 256 cores, so we need 8-bits CPU ID. On the other hand, the val field is usually stand for CPU frequency so 12-bits are enough to represent 4GHz, and for higher frequencies there is an extra bit to extend (enough for 8GHz). In theory, this is a incompatible change, but fortunately the old SMC firmwares are not widely shipped and can be updated on the air, thus we can safely adjust the widths. Cc: stable@vger.kernel.org Fixes: ccf51454145b ("cpufreq: Add Loongson-3 CPUFreq driver support") Signed-off-by: Hongliang Wang Signed-off-by: Huacai Chen Reviewed-by: Zhongqiu Han --- drivers/cpufreq/loongson3_cpufreq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/loongson3_cpufreq.c b/drivers/cpufreq/loongson= 3_cpufreq.c index 1e8715ea1b77..630f679aa739 100644 --- a/drivers/cpufreq/loongson3_cpufreq.c +++ b/drivers/cpufreq/loongson3_cpufreq.c @@ -21,9 +21,9 @@ union smc_message { u32 value; struct { - u32 id : 4; + u32 id : 8; u32 info : 4; - u32 val : 16; + u32 val : 12; u32 cmd : 6; u32 extra : 1; u32 complete : 1; --=20 2.52.0 From nobody Sat Sep 26 23:53:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A8CB374198; Fri, 28 Aug 2026 03:13:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886783; cv=none; b=ap9NATo1/0+orzPMsOkbVypk0YU4avYWAx22rUoxnYwzzEkd3Pa0hfn51bxn7sbbsRIoCKbTuJXE9UvEy0tD8NrGVI6jaNya0LD9Qe2iAXvpBONmcwd9hXLQGT2iqjM9rLhA1JTeabwUpH8RwjXPhS1klZfQiXuGj9aKceY2PgY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886783; c=relaxed/simple; bh=0ReQKf+gQB8Z5BzyqVzkTc1CDD8iMBxi5eiEIaszKzM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=K5cuvVolUd/X+FQ2mhBgoSu1Xj7QjVhsq+wvb0Oj9a2Nxvzehgkl+XpbTMJBq/JAKINsupwyboi/MFy3bVbqxJyt2QfzDMXEPW+L7SKVCGg8rD0VfvJrRPsfig2ro0Hkoh/LIasohEAQRZscbo72+Rn0RkCD2SPC/NkMWK1Z5Ww= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id C61AF1F000E9; Fri, 28 Aug 2026 03:12:58 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org, Hongliang Wang Subject: [PATCH V2 3/5] cpufreq: loongson3: Replace per-package mutex with per-node Date: Fri, 28 Aug 2026 11:11:59 +0800 Message-ID: <20260828031201.1500767-4-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260828031201.1500767-1-chenhuacai@loongson.cn> References: <20260828031201.1500767-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Our server productions (e.g. Loongson-3D6000/3E6000) can have multiple nodes in one package and SMC mailboxes are also per-node. So replace the per-package mutex with per-node one. Cc: stable@vger.kernel.org Fixes: ccf51454145b ("cpufreq: Add Loongson-3 CPUFreq driver support") Signed-off-by: Hongliang Wang Signed-off-by: Huacai Chen Reviewed-by: Zhongqiu Han --- drivers/cpufreq/loongson3_cpufreq.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/cpufreq/loongson3_cpufreq.c b/drivers/cpufreq/loongson= 3_cpufreq.c index 630f679aa739..e3cd78a5ab18 100644 --- a/drivers/cpufreq/loongson3_cpufreq.c +++ b/drivers/cpufreq/loongson3_cpufreq.c @@ -169,7 +169,7 @@ struct loongson3_freq_data { struct cpufreq_frequency_table table[]; }; =20 -static struct mutex cpufreq_mutex[MAX_PACKAGES]; +static struct mutex cpufreq_mutex[MAX_NUMNODES]; static struct cpufreq_driver loongson3_cpufreq_driver; static DEFINE_PER_CPU(struct loongson3_freq_data *, freq_data); =20 @@ -177,14 +177,14 @@ static inline int do_service_request(u32 id, u32 info= , u32 cmd, u32 val, u32 ext { int retries; unsigned int cpu =3D raw_smp_processor_id(); - unsigned int package =3D cpu_data[cpu].package; + unsigned int nid =3D cpu_to_node(cpu); union smc_message msg, last; =20 - mutex_lock(&cpufreq_mutex[package]); + mutex_lock(&cpufreq_mutex[nid]); =20 last.value =3D iocsr_read32(LOONGARCH_IOCSR_SMCMBX); if (!last.complete) { - mutex_unlock(&cpufreq_mutex[package]); + mutex_unlock(&cpufreq_mutex[nid]); return -EPERM; } =20 @@ -208,11 +208,11 @@ static inline int do_service_request(u32 id, u32 info= , u32 cmd, u32 val, u32 ext } =20 if (!msg.complete || msg.cmd !=3D CMD_OK) { - mutex_unlock(&cpufreq_mutex[package]); + mutex_unlock(&cpufreq_mutex[nid]); return -EPERM; } =20 - mutex_unlock(&cpufreq_mutex[package]); + mutex_unlock(&cpufreq_mutex[nid]); =20 return msg.val; } @@ -337,7 +337,7 @@ static int loongson3_cpufreq_probe(struct platform_devi= ce *pdev) { int i, ret; =20 - for (i =3D 0; i < MAX_PACKAGES; i++) { + for (i =3D 0; i < MAX_NUMNODES; i++) { ret =3D devm_mutex_init(&pdev->dev, &cpufreq_mutex[i]); if (ret) return ret; --=20 2.52.0 From nobody Sat Sep 26 23:53:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9CD135F19D; Fri, 28 Aug 2026 03:13:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886798; cv=none; b=gZq2mu72EzMOr8TpaWR+ZcoyhfqU+eA8O7kP0hgFvHmJShD0u1Pp+3/g0iFyq1z4psIY1rUsbPSkxziex+Nmh1YltNUSI4P/5dv4JXZzr8OtgKOOw7+8yQVnuIBRzKBdhIANh5euvXwdqSg1/dQMDG6tJPyJ0Y1FuRrynCHDsxs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886798; c=relaxed/simple; bh=pa+zw+pSaw4M4okFgFMGWjtaUCxmByvOf5guTgaIaI0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pzDVLHU5dPF+H3ArmOc7mNGargaIJz/BLw2q5oejKvXYNnF2wBkaELt0dFglMIECPwIXzQooRWVwTXaRRsbY2fPlpKn9QVFK3/RO1Hp5OwLHFby+sI+DgqO94h7LSjioeUQt28azkV/wE2rQ1ybyRE+lM0a+jhyUNEiqpai9t1s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id C9E3F1F000E9; Fri, 28 Aug 2026 03:13:14 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org, Hongliang Wang Subject: [PATCH V2 4/5] cpufreq: loongson3: Use global physical CPU ID in get/target callbacks Date: Fri, 28 Aug 2026 11:12:00 +0800 Message-ID: <20260828031201.1500767-5-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260828031201.1500767-1-chenhuacai@loongson.cn> References: <20260828031201.1500767-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Our server productions (e.g. Loongson-3D6000/3E6000) can have discrete global physical CPU IDs while the core ID inside the packages are always continuous. In these cases we should use global physical CPU IDs to get and set frequencies. Cc: stable@vger.kernel.org Fixes: ccf51454145b ("cpufreq: Add Loongson-3 CPUFreq driver support") Signed-off-by: Hongliang Wang Signed-off-by: Huacai Chen Reviewed-by: Zhongqiu Han --- drivers/cpufreq/loongson3_cpufreq.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/cpufreq/loongson3_cpufreq.c b/drivers/cpufreq/loongson= 3_cpufreq.c index e3cd78a5ab18..3a5bf970077a 100644 --- a/drivers/cpufreq/loongson3_cpufreq.c +++ b/drivers/cpufreq/loongson3_cpufreq.c @@ -16,6 +16,7 @@ #include #include #include +#include =20 /* Message */ union smc_message { @@ -219,38 +219,40 @@ static inline int do_service_request(u32 id, u32 info= , u32 cmd, u32 val, u32 ext =20 static unsigned int loongson3_cpufreq_get(unsigned int cpu) { - int ret; + int ret, core =3D cpu_logical_map(cpu); =20 - ret =3D do_service_request(cpu, FREQ_INFO_TYPE_FREQ, CMD_GET_FREQ_INFO, 0= , 0); + ret =3D do_service_request(core, FREQ_INFO_TYPE_FREQ, CMD_GET_FREQ_INFO, = 0, 0); =20 - return ret * KILO; + return (ret < 0) ? 0 : ret * KILO; } =20 static int loongson3_cpufreq_target(struct cpufreq_policy *policy, unsigne= d int index) { - int ret; + int ret, core =3D cpu_logical_map(policy->cpu); =20 - ret =3D do_service_request(cpu_data[policy->cpu].core, - FREQ_INFO_TYPE_LEVEL, CMD_SET_FREQ_INFO, index, 0); + ret =3D do_service_request(core, FREQ_INFO_TYPE_LEVEL, CMD_SET_FREQ_INFO, + index, 0); =20 return (ret >=3D 0) ? 0 : ret; } =20 static int configure_freq_table(int cpu) { - int i, ret, boost_level, max_level, freq_level; + int i, ret, core, boost_level, max_level, freq_level; struct platform_device *pdev =3D cpufreq_get_driver_data(); struct loongson3_freq_data *data; =20 if (per_cpu(freq_data, cpu)) return 0; =20 - ret =3D do_service_request(cpu, 0, CMD_GET_FREQ_LEVEL_NUM, 0, 0); + core =3D cpu_logical_map(cpu); + + ret =3D do_service_request(core, 0, CMD_GET_FREQ_LEVEL_NUM, 0, 0); if (ret < 0) return ret; max_level =3D ret; =20 - ret =3D do_service_request(cpu, 0, CMD_GET_FREQ_BOOST_LEVEL, 0, 0); + ret =3D do_service_request(core, 0, CMD_GET_FREQ_BOOST_LEVEL, 0, 0); if (ret < 0) return ret; boost_level =3D ret; @@ -263,7 +265,7 @@ static int configure_freq_table(int cpu) data->def_freq_level =3D boost_level - 1; =20 for (i =3D 0; i < freq_level; i++) { - ret =3D do_service_request(cpu, FREQ_INFO_TYPE_FREQ, CMD_GET_FREQ_LEVEL_= INFO, i, 0); + ret =3D do_service_request(core, FREQ_INFO_TYPE_FREQ, CMD_GET_FREQ_LEVEL= _INFO, i, 0); if (ret < 0) { devm_kfree(&pdev->dev, data); return ret; --=20 2.52.0 From nobody Sat Sep 26 23:53:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A7A5B381EA3; Fri, 28 Aug 2026 03:13:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886810; cv=none; b=mSgDgJfeBBj9RsL6aTj83BgXH4b95DpwwMIsuuMxoyIXC0wW46ngGTtINblzDF5rm42V6M4bw2/9aca6yuJB+ojsWOu436yqXrXglX7/eJev6uA/8Jv7NfjQVtTzl7f+oZS2EWldJkqHM8E240e1vFDfRWXF8pmTHwMfJI2TBgY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787886810; c=relaxed/simple; bh=ZsF9BHMV8HOeRUybQmeX5BLLV0crMaLcBiNlhT8/+zQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=O9wvyDMX5cpKW8ZlU/p0l4DehaZ+R2ZcAG5k1du5HBxI/dzIFboeaQKPY2d9H2dmgcDoPfoeK83S/oEubmTKtr2oMBC8XBY3oMpKyap1KpRtsy9MgVbE+rdO7AkEEDZeATsXvqAUtKBK4qO2AZMD8yXDsq84CIHXxll+UJv8XB8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 410DA1F000E9; Fri, 28 Aug 2026 03:13:24 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org, Xi Ruoyao Subject: [PATCH V2 5/5] cpufreq: loongson3: Replace IOCSR read/write with MMIO ones Date: Fri, 28 Aug 2026 11:12:01 +0800 Message-ID: <20260828031201.1500767-6-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260828031201.1500767-1-chenhuacai@loongson.cn> References: <20260828031201.1500767-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Our server productions (e.g. Loongson-3D6000/3E6000) can have multiple nodes in one package and SMC mailboxes are also per-node. However, IOCSR read/write can only perform on the current node, while sometimes we want to perform on other nodes (e.g. when switch governor, the get and target callbacks are not run on target core). So replace IOCSR read/write with MMIO ones. Cc: stable@vger.kernel.org Fixes: ccf51454145b ("cpufreq: Add Loongson-3 CPUFreq driver support") Tested-by: Xi Ruoyao Signed-off-by: Huacai Chen Reviewed-by: Zhongqiu Han --- drivers/cpufreq/loongson3_cpufreq.c | 34 +++++++++++++++++++++++------ 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/cpufreq/loongson3_cpufreq.c b/drivers/cpufreq/loongson= 3_cpufreq.c index 3a5bf970077a..dcb6c70c0def 100644 --- a/drivers/cpufreq/loongson3_cpufreq.c +++ b/drivers/cpufreq/loongson3_cpufreq.c @@ -16,6 +16,7 @@ #include #include #include +#include =20 /* Message */ union smc_message { @@ -164,6 +165,12 @@ union smc_message { =20 #define FREQ_MAX_LEVEL 16 =20 +#define MMIO_SMCMBX(node) \ + ((void __iomem *)(nid_to_addrbase(node) | IO_BASE | LOONGSON_REG_BASE | L= OONGARCH_IOCSR_SMCMBX)) + +#define MMIO_MISC_FUNC(node) \ + ((void __iomem *)(nid_to_addrbase(node) | IO_BASE | LOONGSON_REG_BASE | L= OONGARCH_IOCSR_MISC_FUNC)) + struct loongson3_freq_data { unsigned int def_freq_level; struct cpufreq_frequency_table table[]; @@ -176,13 +183,27 @@ static DEFINE_PER_CPU(struct loongson3_freq_data *, f= req_data); static inline int do_service_request(u32 id, u32 info, u32 cmd, u32 val, u= 32 extra) { int retries; - unsigned int cpu =3D raw_smp_processor_id(); - unsigned int nid =3D cpu_to_node(cpu); + unsigned int cpu =3D 0, nid; union smc_message msg, last; =20 +#ifdef CONFIG_SMP + switch (cmd) { + case CMD_GET_FREQ_INFO: + case CMD_SET_FREQ_INFO: + case CMD_GET_FREQ_LEVEL_NUM: + case CMD_GET_FREQ_LEVEL_INFO: + case CMD_GET_FREQ_BOOST_LEVEL: + cpu =3D cpu_number_map(id); + break; + default: + cpu =3D raw_smp_processor_id(); + } +#endif + nid =3D cpu_to_node(cpu); + mutex_lock(&cpufreq_mutex[nid]); =20 - last.value =3D iocsr_read32(LOONGARCH_IOCSR_SMCMBX); + last.value =3D readl(MMIO_SMCMBX(nid)); if (!last.complete) { mutex_unlock(&cpufreq_mutex[nid]); return -EPERM; @@ -195,12 +216,11 @@ static inline int do_service_request(u32 id, u32 info= , u32 cmd, u32 val, u32 ext msg.extra =3D extra; msg.complete =3D 0; =20 - iocsr_write32(msg.value, LOONGARCH_IOCSR_SMCMBX); - iocsr_write32(iocsr_read32(LOONGARCH_IOCSR_MISC_FUNC) | IOCSR_MISC_FUNC_S= OFT_INT, - LOONGARCH_IOCSR_MISC_FUNC); + writel(msg.value, MMIO_SMCMBX(nid)); + writel(readl(MMIO_MISC_FUNC(nid)) | IOCSR_MISC_FUNC_SOFT_INT, MMIO_MISC_F= UNC(nid)); =20 for (retries =3D 0; retries < 10000; retries++) { - msg.value =3D iocsr_read32(LOONGARCH_IOCSR_SMCMBX); + msg.value =3D readl(MMIO_SMCMBX(nid)); if (msg.complete) break; =20 --=20 2.52.0