From nobody Sat Sep 26 23:02:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8D49449B11; Fri, 28 Aug 2026 11:52:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787917934; cv=none; b=nh9BL/aYlCq4Xda3vuxvaNnCdTpZcU6kEPCjUex/zC8pK4y7q8JFuR9l8H20ZzbxeyRUBgPscnH5u/UlurHUB1YQlqRJOAvUNzWM2CqVtaZkrG6lDl0lqg3W+gab3F3ozH0u5JP3JTN4nvX3Z6KhDGfJvKYdXBA9XHYzIsbs0Lk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787917934; c=relaxed/simple; bh=rdQUteIaSUPwsRmpuLSNBayvkd4cABMkIzTlpYcMQiE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aUoGjtnKS6Iu7ORkJFZFmr7FIACms9OI+6JCh+RywO5IjvRf45RR+ICz1XXrWykBZNNdN4aioxdc/EV1LNPG0aPZlcuhDRKiVEwojvEFZ2Ig6fcahJxvBzoNuaTOUvsKLHSb/hhKShGm5ZNk2SD1D7C0SAbxBmQan/DG8Q1qhVY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EB0EhLVL; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EB0EhLVL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 949871F00A3A; Fri, 28 Aug 2026 11:51:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787917919; bh=GN4dzhCVNYuFNlRqNx2kYhGqEu7OFj46LaEj9Hl1nmM=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=EB0EhLVLASP5Uv9plkvA4XIi6sxxdNpKm0L3QTjLpvjTNedlXXIecpKn9Php19lXD q3tY3Io6wVY2Y5jNGS2z/DNMJtu0iK3ucgf/ruDnC484Pzutuq+5WScF+7FyZdnVPA Fo4XLFpv/AhVoHhkLvivbqQ8nS8+0NV9JwWvayPkRxUeyQOJSP0xmbd79M23CHgtZx GVbJ1n/Ug4UAe5qG90lvj2kCZlkoPKDslE0Qt70GO0NUHSOGO0oIQLK0dFXzsyNS3X dIPsmCj/dlGVtAT3Gni/G2tb+ISnx40fMiHzNurSqFoLVEbESdhjnNuZbpsv16OZ/y e+5HCe39rTpeA== From: Thierry Reding Date: Fri, 28 Aug 2026 13:51:37 +0200 Subject: [PATCH v2 1/3] arm64: tegra: Add PWM fan on Jetson AGX Thor DevKit Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260828-tegra264-fan-v2-1-a460389d8ef5@nvidia.com> References: <20260828-tegra264-fan-v2-0-a460389d8ef5@nvidia.com> In-Reply-To: <20260828-tegra264-fan-v2-0-a460389d8ef5@nvidia.com> To: Thierry Reding Cc: Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1224; i=treding@nvidia.com; h=from:subject:message-id; bh=Ip51aTiqgLVTRh0twWqTH6fgaUqaeRi7gl82nKxw9Vo=; b=owEBbQKS/ZANAwAKAd0jrNd/PrOhAcsmYgBqkXZZipy8/vc12+p2EJFr9s84nqgFjuEHNUaDN yO0oW3l7BWJAjMEAAEKAB0WIQSI6sMIAUnM98CNyJ/dI6zXfz6zoQUCapF2WQAKCRDdI6zXfz6z oV9+EACfjqdbdzL6s50BrXFSIqP33pepyF+s5Vk5KbmBWSpZ4PiK1ZGLuiUuFBoyPpC2cwaJbjP 6dYZVQ3KfCiQF5CfNGQWMM/cNBTSD7zGTV8Wn9qnwX5CzP6q8ZFR9QpFyQfoeRwOxftDWUFgHvg HPeChYEYF+sa7agfrFuFw/rOFqlLu3OkKv8lZYE8YtSALmt5MZQvHjZQnKQZZfTes095toszpCJ h6FSpkXCU//Dg7+pcx5kkXVlREALTtBBfzLp0tmiBcvkOK9ZsLRBauh0izv1jsfTJQKx4vtMY+a PztBmmqkWEaY/jLFRj6Gdwmm3VO9ASZ9JJCrLzOjLrTmY/ZbOtlIzGa3pG4otamJGhu3AlEYXH2 a/3EvFQOFSgZRxMXcXBNjiLlkK7fquDtUh/bJuYwwLQ8kPYfL+PQo2iTaKMNTazy1cicWXtgEkO /R86HV/fS1/SVckFtYdj9UlFlH9WoGw1qnpZPiKQG/sXVylLu6MVYUF5swclheFZvYokdz8wEja 5U/2D4hTtgP7Bm667fkKT9ZESf1ctF3+ssk/LUREiCGkaMqMpdug1T56W9ctZ50espaej5vLrSu UHAZMbwJKjm0Tw7ePQJHxALFRL7cyunTrkofoHVTEP1IqX17xPSAioiZXq9+qdN3BgOPwTX2/9b eVtnoUCFzsokX6w== X-Developer-Key: i=treding@nvidia.com; a=openpgp; fpr=88EAC3080149CCF7C08DC89FDD23ACD77F3EB3A1 From: Thierry Reding Without a PWM fan device node to actively control the PWM, the fan will either stop or run at full speed, depending on the state of the PWM when the controller's clock gets turned off during boot. One is bad for the system's lifetime and the other is very annoying for anyone in close proximity to the device, so add the PWM fan in device tree to fix this. Signed-off-by: Thierry Reding --- Changes in v2: - fix device name in commit subject --- arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi | 13 +++++++++++= ++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi b/ar= ch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi index 45f8df9bbfd6..4550e843f513 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi @@ -9,4 +9,17 @@ aliases { chosen { stdout-path =3D "serial0:115200n8"; }; + + bus@0 { + pwm@c6a0000 { + status =3D "okay"; + }; + }; + + fan: pwm-fan { + compatible =3D "pwm-fan"; + cooling-levels =3D <77 102 140 192 255>; + pwms =3D <&pwm4 0 40000>; + #cooling-cells =3D <2>; + }; }; --=20 2.55.0 From nobody Sat Sep 26 23:02:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24BB532BF4B; Fri, 28 Aug 2026 11:52:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787917936; cv=none; b=Q+xBTsmKBvrv26MlVTZh4bMF+Br/x7x91ON76No/JBo75MP2W56h9RHXYjjMJRT5bKHTo2+EGA8MJKSm1KTTP6DYDDztXjro4/mr5RGbAJQonuhIQZnkI5GJFrMvKrchxAl3FQofFstK/H1160T81cl52VvMK2erzyu0BMXu6Rs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787917936; c=relaxed/simple; bh=gG2CbM2u6TmysQTxpoOe5BODyoWCT1j7W05U9DU6yHk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VAwddeLI9OtITcfFRFB/V7o20H7p5HGgUdOyn5uOn2bmuYwogsHiXyaMF0PhBHGK8aEZNTelOMBbFmvHzbc8GVZBWImtmZN3ZdeIC7UG/k70q1H2/VLK9ApBqW109LImcae2cHDjuFP8D0DZXyZiKlcOyKaqB7btMKRgI3I5JPY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OdfzBVRV; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OdfzBVRV" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 635631F00A3D; Fri, 28 Aug 2026 11:52:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787917922; bh=P28sB6K3sJRCfiuN+FcPvtop805Z234fNqsa7lD6qCU=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=OdfzBVRVY4gXTT2XKyFVqTbbFoce5mZ3ecUK0aBnJMC+uFvnrC1YQQfZBzHIQcwLX hu9eKbpaNJp6RTT0emz+hO5gl5fARKrSclWY1IbG2wEXhS8fB5yGuUT8qku3mzyqGP RpaPQ0WoXhHvHsgjV78t4eiYmKrJ7wpPPySTtfGvaPwHxWUW8C95HLKyAFi9wdIYPY NzFNemN7Cw/z/nu990/a6dSquSucbsYLMX9rBMYwGfCcGcMSj0OibohZtNnUdn8CDJ iiqWHDhGqObNc0eKajNQZfQ4DZU3syCt9hOwjWPKTeG9IkQ2KBtlSX0WTNZGkz/wzb /2qpS/nlKeHKQ== From: Thierry Reding Date: Fri, 28 Aug 2026 13:51:38 +0200 Subject: [PATCH v2 2/3] arm64: tegra: Add thermal zones for Tegra264 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260828-tegra264-fan-v2-2-a460389d8ef5@nvidia.com> References: <20260828-tegra264-fan-v2-0-a460389d8ef5@nvidia.com> In-Reply-To: <20260828-tegra264-fan-v2-0-a460389d8ef5@nvidia.com> To: Thierry Reding Cc: Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2970; i=treding@nvidia.com; h=from:subject:message-id; bh=dP9aJ8Xqhp6Gk+Qp2TKG1UPeFLFWgmi95sK8ad9l9w0=; b=owEBbQKS/ZANAwAKAd0jrNd/PrOhAcsmYgBqkXZZwCp9KDe1M2ODQCFxjxo/vPHmjkLZVD6Er ERIXs1QXTeJAjMEAAEKAB0WIQSI6sMIAUnM98CNyJ/dI6zXfz6zoQUCapF2WQAKCRDdI6zXfz6z obUID/0Vt62Qbl1kNOS5LWBk6vjDsVRd3pEs2GkUf4/3i+FbRYjHpOqHUAxycYWIJgABUsIPkfP 8VriYru+BiKMjtNAH+LBqYPIJugZUkkSiCKHIsYaXNhLy6Z/m3dTOLWXwXsV8sGpuTGvIJWDr3W qrJiNA1WfB6rzj+5pAoeYsWsqiI3ORmJuRtULG2jHDutkkh7GzIySrErzenMsVi/ttEkL6Hz4rW cJK8ax2pmVy2ClW3WtD4inVtOyoxrq9iDJzB3n6ireucUw1RC8soUlnQDZ6W4Url8uCEGBxoPH2 cQEEmkoOF39U4M644dmY9VsrIv4ivWdhFNyK+rTRIOYSAkvIt+RhtPNmfUBOa95ahuW5tkkdxoO 4xhXMokNI7pZlYTAT0pjqHVvwQpJgJilfhbW/mJpJ3G9NyGFCh2KgQKu+vTgAOh1kijBpzkTKvU hWK0sD+saLqBUBgp0P2CFXAW6NzkTfvZ23v9saqE/vwHlt77ShFJnXV8izra1wEpMjB8D2ozGsI +KmPTobrUSXEkxyWas5XVMubei2WMasCzgXfjC14FC1gHMngkGLy0jip8N6kJiKV1UAVJeyiUD7 dJYE+yS1B3vE/i3GDgJxCPJz8UFernxXPQqUUdLtVqhFs5SUtz0YZLVTzOT6HtqN4Kx6AwZYtrM 4hR90sDv9vM7v4Q== X-Developer-Key: i=treding@nvidia.com; a=openpgp; fpr=88EAC3080149CCF7C08DC89FDD23ACD77F3EB3A1 From: Thierry Reding Add the thermal zones exposed by the BPMP on Tegra264 so that cooling devices can be attached to them in board-level DTS files. Signed-off-by: Thierry Reding --- Changes in v2: - move thermal header below DTS directory - fix typo in include guard comment --- arch/arm64/boot/dts/nvidia/tegra264.dtsi | 29 ++++++++++++++++++= ++++ .../boot/dts/nvidia/thermal/nvidia,tegra264-bpmp.h | 20 +++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts= /nvidia/tegra264.dtsi index 630c20523dcf..953d50af0c08 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi @@ -7,6 +7,8 @@ #include #include =20 +#include "thermal/nvidia,tegra264-bpmp.h" + / { compatible =3D "nvidia,tegra264"; interrupt-parent =3D <&gic>; @@ -4625,6 +4627,33 @@ sound { status =3D "disabled"; }; =20 + thermal-zones { + cpu-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_CPU_MAX>; + status =3D "disabled"; + }; + + gpu-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_GPU_MAX>; + status =3D "disabled"; + }; + + soc012-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_SOC_012_MAX= >; + status =3D "disabled"; + }; + + soc345-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_SOC_345_MAX= >; + status =3D "disabled"; + }; + + tj-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_TJ_MAX>; + status =3D "disabled"; + }; + }; + timer { compatible =3D "arm,armv8-timer"; interrupts =3D , diff --git a/arch/arm64/boot/dts/nvidia/thermal/nvidia,tegra264-bpmp.h b/ar= ch/arm64/boot/dts/nvidia/thermal/nvidia,tegra264-bpmp.h new file mode 100644 index 000000000000..29695881f4cc --- /dev/null +++ b/arch/arm64/boot/dts/nvidia/thermal/nvidia,tegra264-bpmp.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AF= FILIATES. All rights reserved. */ + +#ifndef DT_BINDINGS_THERMAL_NVIDIA_TEGRA264_BPMP_H +#define DT_BINDINGS_THERMAL_NVIDIA_TEGRA264_BPMP_H + +#define TEGRA264_THERMAL_ZONE_TJ_MAX 0 +#define TEGRA264_THERMAL_ZONE_TJ_MIN 1 +#define TEGRA264_THERMAL_ZONE_GPU_AVG 2 +#define TEGRA264_THERMAL_ZONE_CPU_AVG 3 +#define TEGRA264_THERMAL_ZONE_SOC_012_AVG 4 +#define TEGRA264_THERMAL_ZONE_SOC_45_AVG 5 +#define TEGRA264_THERMAL_ZONE_SOC_3_AVG 6 +#define TEGRA264_THERMAL_ZONE_GPU_MAX 7 +#define TEGRA264_THERMAL_ZONE_CPU_MAX 8 +#define TEGRA264_THERMAL_ZONE_SOC_012_MAX 9 +#define TEGRA264_THERMAL_ZONE_SOC_345_MAX 10 +#define TEGRA264_THERMAL_ZONE_TJ_AVG 11 + +#endif /* DT_BINDINGS_THERMAL_NVIDIA_TEGRA264_BPMP_H */ --=20 2.55.0 From nobody Sat Sep 26 23:02:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 655A5446C17; Fri, 28 Aug 2026 11:52:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787917941; cv=none; b=ENl2PTOepKJb7BwKMDylmrE8ituqVZ+3YuV5vSXOiKjdfA5S5VtHzLi4efKeGjxx7EydBUJoEPAcbmFFdBYniL1KmYKa0yxFxJEQBRYiBswrxzibaEWgNT6Hft9qHXEAGMAT7ltyEM89Ng6syxou3RgWeySKUCHay+dDYDIX7ac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787917941; c=relaxed/simple; bh=O1rzJtMcm6mFTSRKAvHPql4xwRZfD99a2m32PaIgH9c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=l9C3pHpHjspUw+QZfB/AgKU5FFZHAHtwKFph+eKiHanIXAKEAD0y2re2o3l3Se//NnuYILBRwAYq1TnoxUuVNwrGSgn4zbJpJ7zD1brzNi3hlbZBXQneuQQuq4D+jtdfG4FqxPAG9HghruEFarEXRV4TgFlQNhvIlXkKTFC7KQo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PMvRSGzG; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PMvRSGzG" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 372881F00A3E; Fri, 28 Aug 2026 11:52:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787917924; bh=a+5yaFkrJOw9/iYBFvWXyxER2EtDDURsdnRYrxTdIcw=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=PMvRSGzG4PhWf4yoZtgKYnnKGmny1GBSM0fH81xluucpzRYUDD5zu8fB0WowZIGqF QReN8ASuhTTqJr0VNJZPv763dDcnBS6S27Eutqv26hp/DB9ZGvdzF9MvALayfxydMD YJgTMbQXU3sMIPvfA+GBhMfR76DC50a7FvZ0v7n7zQRuBxDoxf0vBIUtcO7TNOgown SsxKk+81rUQRXpaJT/UVsBc8WrtmnvfeTn3uc57hyQ5Q27hjYm1KUegg3dnmYzCUn5 EJaU9+fFF4i5qp6OmOzEWTw8Yny9hUXoRK56D4soc4ABKQ+qUwhaIyzQ09Iyvu756y c+Rruo2dL0jPQ== From: Thierry Reding Date: Fri, 28 Aug 2026 13:51:39 +0200 Subject: [PATCH v2 3/3] arm64: tegra: Add cooling device on Jetson AGX Thor DevKit Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260828-tegra264-fan-v2-3-a460389d8ef5@nvidia.com> References: <20260828-tegra264-fan-v2-0-a460389d8ef5@nvidia.com> In-Reply-To: <20260828-tegra264-fan-v2-0-a460389d8ef5@nvidia.com> To: Thierry Reding Cc: Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2745; i=treding@nvidia.com; h=from:subject:message-id; bh=ffBQB+0ihS+VzjDCPSRBlHFSrJqDD1qnX5rd3sZ0miQ=; b=owEBbQKS/ZANAwAKAd0jrNd/PrOhAcsmYgBqkXZZ4QnqtN3MtgsOz+koisIFUDxJSir9NNrVk +ZD+3RoX2eJAjMEAAEKAB0WIQSI6sMIAUnM98CNyJ/dI6zXfz6zoQUCapF2WQAKCRDdI6zXfz6z odYaD/9MUVW9RqJVAomHU71wXNF3em9Mq6Wc0qO7AXnluaGqX9sPXmk/sD7lf1Jz/X5RfEf1cby iNDjCn9vSoGVzRDJDkYynSbz7f9gepuU3XmG/pyux35kYB6tqoYGyuyVTxJNRdKqnIb7l334TCa aSNS3LEHYF1l8kTJ8cCaMketb2zbHdiDTp+ksd6fLDlgu+DMTi97k8wwzmFku41gg6f2tQwgIeb 0ny4NxKCRrVfIlBeg+ka+4yCWBNy9UleJfSrIaZrCgEWHaqUeOB9xOsxFKJlV072JDhmxk51QLx g0RqZLP5fiQ263D2qFqLMfPHTvgl4w9SEDPOmIj0JID+uZrvcTVkGnka3uaxWtQ9C3n7fjv0+Sb u3A3RJNyYV5k2+uBT5SqrI5K1yTo+fJ1/+u7R6RFI0H/iB2rvel0ivPkas2AkPNZwiaMrm0vSfU 5ybFToIhWd1GRbkt0FLSkGltJ6UcFBTabDQ6QQcDJcKNfb+xik0NOGbHULSBCLLzpAjyyjql0CN CO+SU4kL8MOEhQ4pwWujsONULBfum18GLtkqYzvLhxbu5SAlrmv1/koa5CaPxGNaSXvjJxGJdj+ Qua8BfRbV/SPZ/weUdkS809dGl7B5Y9AgyBdo9E2YpD2rPkHV2lPWIwfShS9XR3l9RVEuAziZ1I rK1vNyVlAc0z10g== X-Developer-Key: i=treding@nvidia.com; a=openpgp; fpr=88EAC3080149CCF7C08DC89FDD23ACD77F3EB3A1 From: Thierry Reding Monitor the TJ thermal zone and use the main PWM fan of the Jetson AGX Thor Developer Kit to actively cool the device if needed. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi | 32 +++++++++++++ .../boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi | 52 ++++++++++++++++++= ++++ 2 files changed, 84 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi b/arch/arm64/bo= ot/dts/nvidia/tegra264-p3834.dtsi index 58cd81bc33d7..d4c9f45e03c1 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi @@ -39,4 +39,36 @@ cmdqv@6200000 { status =3D "okay"; }; }; + + thermal-zones { + cpu-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + + gpu-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + + soc012-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + + soc345-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + + tj-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi b/ar= ch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi index 4550e843f513..dd042e57839a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi @@ -22,4 +22,56 @@ fan: pwm-fan { pwms =3D <&pwm4 0 40000>; #cooling-cells =3D <2>; }; + + thermal-zones { + tj-thermal { + trips { + tj_trip_active0: active-0 { + temperature =3D <80000>; + hysteresis =3D <0>; + type =3D "active"; + }; + + tj_trip_active1: active-1 { + temperature =3D <86000>; + hysteresis =3D <0>; + type =3D "active"; + }; + + tj_trip_active2: active-2 { + temperature =3D <91000>; + hysteresis =3D <0>; + type =3D "active"; + }; + + tj_trip_active3: active-3 { + temperature =3D <100000>; + hysteresis =3D <0>; + type =3D "active"; + }; + }; + + cooling-maps { + map-active-0 { + cooling-device =3D <&fan 0 1>; + trip =3D <&tj_trip_active0>; + }; + + map-active-1 { + cooling-device =3D <&fan 1 2>; + trip =3D <&tj_trip_active1>; + }; + + map-active-2 { + cooling-device =3D <&fan 2 3>; + trip =3D <&tj_trip_active2>; + }; + + map-active-3 { + cooling-device =3D <&fan 3 4>; + trip =3D <&tj_trip_active3>; + }; + }; + }; + }; }; --=20 2.55.0