From nobody Sun Sep 27 00:36:54 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BAFBC483BD0; Thu, 27 Aug 2026 15:08:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787843293; cv=none; b=A1VSF9sHtRqVc+zerTZwFMXsOABLMk7iH0XGjMr1sPdhb2as0ea5dtzI68bWVt2APMOx8clo4P1SVmpBvaBp/bUzLPKSCJNFBSRt7ffbjM+HUa0jwsvkPFldXyxXYd1cqiR0NtTOX4e+Ug1eASAjszwWF9772jE6CVUuLqvzENE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787843293; c=relaxed/simple; bh=dVYvzEppO2pPUKYstsQdYN2jleJ3lqvLPQR5wwcusqA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sGGFJfYc8synHJtBbV+MvoGwGiauhitCpeZNBh0ffZeyrkPr/7XzOg9YedOh/DKNiow0VhkjCxermU3gtOtKtD+9s6vCxO5HvqdRm0lvjoX5ch1ghe+hXaDK5Y3sSb43tIn/vrZUaxcCiC0bNyR0JZlWiDnN+eJByR5E6EneH+E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mD/xNTic; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mD/xNTic" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9C9711F00A3A; Thu, 27 Aug 2026 15:08:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787843291; bh=REUiWLZBpAm8J9plb/EvFp2cF7Tg7aKKMbRLogplyT8=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=mD/xNTicN4aze+5KV83nRJFflAicKt5gZAzIhM1gb7XATn1a0mKhQX/4WKCm5s2Bn G6+D/7JrQabFdA1BON95x9SrkVVJj++/II/VDmKBnHZINad9uwZZZCzqzvz2SDRNTZ 0/uXp+u0gMQzLjMKyXzq1JL8AkfYidbqHA+fpW2zPZ4JqCivR5DzqoP046N7FToNv/ XCAqHA2q2yfUtQg5DJZqFjj02+6l7kx9i7gh6rdLP/jqOxkDalrEnXQYKxc1ZrhSGP 46Y3UStA/uAKpVecVm5GqV9rhC2KBWIyGGDEVvDpbiwGmA/1jg3xHItdvhLoaUta1g Y7XNpS7kPA4JQ== From: Thierry Reding Date: Thu, 27 Aug 2026 17:07:50 +0200 Subject: [PATCH 1/4] arm64: tegra: Add PWM fan on Jetson AGX Orin DevKit Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260827-tegra264-fan-v1-1-3c55f0c748b1@nvidia.com> References: <20260827-tegra264-fan-v1-0-3c55f0c748b1@nvidia.com> In-Reply-To: <20260827-tegra264-fan-v1-0-3c55f0c748b1@nvidia.com> To: Thierry Reding Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Hunter , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, Thierry Reding X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1166; i=treding@nvidia.com; h=from:subject:message-id; bh=RTy/4knbQgueNxfnsO/GoXlbqXxK6yhD8UYQSoiy2Zw=; b=owEBbQKS/ZANAwAKAd0jrNd/PrOhAcsmYgBqkFLVlX+VBwRsRDsCXjT22xZDEFdBzrPBgDdWp +/LU2kG4U6JAjMEAAEKAB0WIQSI6sMIAUnM98CNyJ/dI6zXfz6zoQUCapBS1QAKCRDdI6zXfz6z oa7ED/4nDjDnM3RHQ2auCqSkjot6J2gai54r5gSTxRcrS5+vKwY6JCpojzt2NWOKG/I4X09124p HTUhvFkiDDG9vuDqN0+taOITI9fSPw+4qBPZZ2hXfcZwhyqlx4RrF+b+pDbyG0ig/Wtw8SBY6Db KA9iVTM/sA+w3xx30E8WL8GGSrVi6oVdpwsTmLEGQooK1xrDlurGqqWE6maooLUxdF1vSROqOI8 w1kzcYS8X6x0x7AMuccBANNkRNoXIbeaYgT4Xb7liriDDgDPOoVxP/owHKIbdEEwEPqAPz6L/Ja 0/JqQjbruA0uqfTgnz4ML78IQHtN7zNNMBnfNmu0ASZDAsNKNWT2KDCEE6kDOkQEQDMP4WYqWBV CjdSiXL5+o5YTQqCA4M5sELqXRdJWZeOvr5MVUXacx+Eth94yCgdzlioMA5UGOShdsPyxNMR/ss j+nVOYmn73gKh16dNhcIxlgMkSyQj1vrgVLdX8NG1ukWTEPsHKq+hGB8pPO64R3EGFSttsSHhC4 R/Jg3R3YVojPt6JVeGFFolFGUFTjfN13poFVIlmLmtBX83tLLFEdNSrBDxiLq0t9rdFJt3YWfox a8TknXZ5XAcTsVs+O0qQtt2hV3HT68MafuvAWxdK4NT+MN2uzPSldqdQCR/VovRp7pjFIwVTVUQ r2vNyxzIrQNtgCw== X-Developer-Key: i=treding@nvidia.com; a=openpgp; fpr=88EAC3080149CCF7C08DC89FDD23ACD77F3EB3A1 From: Thierry Reding Without a PWM fan device node to actively control the PWM, the fan will either stop or run at full speed, depending on the state of the PWM when the controller's clock gets turned off during boot. One is bad for the system's lifetime and the other is very annoying for anyone in close proximity to the device, so add the PWM fan in device tree to fix this. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi | 13 +++++++++++= ++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi b/ar= ch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi index 45f8df9bbfd6..4550e843f513 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi @@ -9,4 +9,17 @@ aliases { chosen { stdout-path =3D "serial0:115200n8"; }; + + bus@0 { + pwm@c6a0000 { + status =3D "okay"; + }; + }; + + fan: pwm-fan { + compatible =3D "pwm-fan"; + cooling-levels =3D <77 102 140 192 255>; + pwms =3D <&pwm4 0 40000>; + #cooling-cells =3D <2>; + }; }; --=20 2.55.0 From nobody Sun Sep 27 00:36:54 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44216483BF8; Thu, 27 Aug 2026 15:08:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787843295; cv=none; b=Hel1qB/TZMfzRAOadjpjbNLX+fxT58acFBv3xG9oSQfHdq37TdYH3pU320kQCchYjggojnP8Icb3wz0vu+r8KNyiJOGt8yzLXm/vUw38YYuXb33s8C0AMv5YHf3T5nEUvH2WQx9UDO+hcddNyue0AmUymIxkFA8JNwzaTA+WdG4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787843295; c=relaxed/simple; bh=N9X1o1A15qKmpLvmUi8uvf1u3nvsurMXkO4Su7evOi4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PKn+8BfXsO0kcPP8udvtFBv/43ERtRyI6qP9Hb7jPI9TL0qKf+l0REXBmfv6/cStjjEpHIP2KPblmJQVHfLc7foa4PCh86FFKjWCGRoT/PbcGjElKwDe40yclcxkQH1pmBaOjKivzMz1R6adkw5eNhUXQpjUkRdn/0QD5ha+W5o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=l2K5cNuf; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="l2K5cNuf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5D8101F000E9; Thu, 27 Aug 2026 15:08:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787843293; bh=vXVgFCHfAZjBsDcBnc2hGf2ETHKFkRwxNIyEzA/eILM=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=l2K5cNufpmuK/+q7JEMYSqUTfPV4hlNcaG27mEMJog5ymD4RDiky913Yep9SNLs+8 VewrzRpjnge4OaOTR721YPSfWg6N9At2VULKxi6iLfGynDAYHpxMnJdSDJYa64jgIz 12vgAD6GLcTGdcfVgceIIHde1A2U1PTjOaKmHnSKbL/9mZlNA1ZQLOpnzKOjGw8KoU ewa3/DgBzV3XziRTMT5blOpX8eXQRrrSOdolmjKWxAtq+HS9WKD7hp2yxfQHUTLK7U fvwLN7WQuNdBpghPH5sP72OlnbB0T5B0uJyYkPzvv8z1KbnZHJbeFjCKHOGOADgAhC CzDOSG0BGcKeQ== From: Thierry Reding Date: Thu, 27 Aug 2026 17:07:51 +0200 Subject: [PATCH 2/4] dt-bindings: thermal: Add Tegra264 header Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260827-tegra264-fan-v1-2-3c55f0c748b1@nvidia.com> References: <20260827-tegra264-fan-v1-0-3c55f0c748b1@nvidia.com> In-Reply-To: <20260827-tegra264-fan-v1-0-3c55f0c748b1@nvidia.com> To: Thierry Reding Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Hunter , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, Thierry Reding X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1415; i=treding@nvidia.com; h=from:subject:message-id; bh=7+e9ignjrKKJtjq5Bz/A0MmIUQWCvdYLvUdRDu+zfWQ=; b=owEBbQKS/ZANAwAKAd0jrNd/PrOhAcsmYgBqkFLVrGSMq/yUarkQcA5KPLvI+ca6K0zUl4A6q go4ulA+NPiJAjMEAAEKAB0WIQSI6sMIAUnM98CNyJ/dI6zXfz6zoQUCapBS1QAKCRDdI6zXfz6z ofqxD/0Xsjvfoe6LwIZXOz34aAYPtjIGAhJFiVMFl4xiCI/Cd/5j+r+bOo9EO8qjyORkeWQEKa8 4cskMm+zRS4GDe1dh6z3UzJ/l/H0duKQ4lQ5SHkuzvP2UENnS3291QQs6+Rc4SonEyhdDbn8APT 8EqhTvEvVbwmWB6tMYXB2zAiup4TKfYsHsN8qyAOE2wX8APvyPTFZq2IvFnJabGSrB7FfqxVrOv cAdwj23GuI1c2vNvONTkD6W30gZVsTw6BPTUS3efd7iqg2y4mrve8gTAwQeqz/YJPnn4SXsyn9S kJwlRj8D0SyLWyKWAizMi6i87mevegTtNM/wbd/ypqrgX/sR3WfZJNkJWASWqffdqPSoKHWf6Hq DNOBsZRTrHLWvJ0mEPBXGkPbB2VLj6uvOgnkr9i457R7Bb2rVJ6ixs8qjYzmSejPwLeaHF0qBlu EfDbZvLnlZQLIoa8bk11llNaFDme0JDVh+Gkm8HlmYC37ERQgCtjDgvNfVvPUi9JIiNhwx8jM4t CUredvVD1jNxaZxfLAEFZITnR15HYT0iFUkMU2/PFTxLLq/auJS0dHcfC7kbAMkEqT85p5Unxbz 6jtMwVqXaFfjs7xdmL12RXYqs/r0wh99dMhTAOLhKVIkBKgxS90rs+STRvoQuum4qkta0AL7d4A nazWdDadBziuMlQ== X-Developer-Key: i=treding@nvidia.com; a=openpgp; fpr=88EAC3080149CCF7C08DC89FDD23ACD77F3EB3A1 From: Thierry Reding This header file defines the set of thermal zones exposed by the BPMP on Tegra264. Signed-off-by: Thierry Reding --- include/dt-bindings/thermal/nvidia,tegra264-bpmp.h | 20 ++++++++++++++++++= ++ 1 file changed, 20 insertions(+) diff --git a/include/dt-bindings/thermal/nvidia,tegra264-bpmp.h b/include/d= t-bindings/thermal/nvidia,tegra264-bpmp.h new file mode 100644 index 000000000000..b32739691385 --- /dev/null +++ b/include/dt-bindings/thermal/nvidia,tegra264-bpmp.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AF= FILIATES. All rights reserved. */ + +#ifndef DT_BINDINGS_THERMAL_NVIDIA_TEGRA264_BPMP_H +#define DT_BINDINGS_THERMAL_NVIDIA_TEGRA264_BPMP_H + +#define TEGRA264_THERMAL_ZONE_TJ_MAX 0 +#define TEGRA264_THERMAL_ZONE_TJ_MIN 1 +#define TEGRA264_THERMAL_ZONE_GPU_AVG 2 +#define TEGRA264_THERMAL_ZONE_CPU_AVG 3 +#define TEGRA264_THERMAL_ZONE_SOC_012_AVG 4 +#define TEGRA264_THERMAL_ZONE_SOC_45_AVG 5 +#define TEGRA264_THERMAL_ZONE_SOC_3_AVG 6 +#define TEGRA264_THERMAL_ZONE_GPU_MAX 7 +#define TEGRA264_THERMAL_ZONE_CPU_MAX 8 +#define TEGRA264_THERMAL_ZONE_SOC_012_MAX 9 +#define TEGRA264_THERMAL_ZONE_SOC_345_MAX 10 +#define TEGRA264_THERMAL_ZONE_TJ_AVG 11 + +#endif /* DT_BINDINGS_THERMAL_NVIDIA_TEGAR264_BPMP_H */ --=20 2.55.0 From nobody Sun Sep 27 00:36:54 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EFC6E483BFC; Thu, 27 Aug 2026 15:08:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787843298; cv=none; b=Q6R0OQsuExaMZQLOe9RwApu652CBK+jeZxbe23G79ydEHD4TXGmrHJOE3PCcTtvvCh5jeR4dZLi6B2GIwX7CW99Bmr+uE16yWUFloNypCx1oAkGNe4h/KywAb3afGmePqLEVZmIefmTmLf6dSiqdeyb8or8usV33AYjBxr7SaAA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787843298; c=relaxed/simple; bh=j/ZJUPicfz29D277Mim8zj1iEzQ3/hwesqBtMbJDzog=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NHgDysfDvuBXGdaet4796u3mXFeIkpSnIEBzki2fmLTO0HK/M0Tu7Ilgl/1xJogfdpxSIB3CqypDMPQkNOk8GE+7o9hknCOeuXq0YqHIbj7s6Pt0QDPMdcbphooHZvq08zCNEo3P0ywcMJsJ7KG0h93+HiZwqM/WFJKr4nYUrMc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=girO07J9; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="girO07J9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1D9591F000E9; Thu, 27 Aug 2026 15:08:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787843296; bh=n54YcjdvBxFkpn7bi8XHbWvxpTuCfOCiMnGT9/rnvNo=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=girO07J9oCjPgF1iTS2zn47YrMSUfYz4UjSVT5ZDAuvQXsTm+mmt8soX6SrIUio+V fHtUO3M0SASxhx1cHxW5Vh0L2pNlj4CXhltuZiXaexJYc6IoVBDeuddg6SRGoOj98/ j03NDpHL1SCrzhnSMTNimUk2+GDCsw48qZZ2K7ohiNNWJazOr57HZEBWVaIoTYdS6i 6d0snkZFdIg9N+CXIQboxlb/SN6V9g1ij5L8udAMPDPkxgt0qer8iSzy1UnHX610aR Ur49qNf4kP5t49VChsCdrsvvt8EOYNDk4Ewt3FUvh3Ik6HCco9TpUkGxXHjYpWCV/Q El5bqiU9TJ/GA== From: Thierry Reding Date: Thu, 27 Aug 2026 17:07:52 +0200 Subject: [PATCH 3/4] arm64: tegra: Add thermal zones for Tegra264 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260827-tegra264-fan-v1-3-3c55f0c748b1@nvidia.com> References: <20260827-tegra264-fan-v1-0-3c55f0c748b1@nvidia.com> In-Reply-To: <20260827-tegra264-fan-v1-0-3c55f0c748b1@nvidia.com> To: Thierry Reding Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Hunter , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, Thierry Reding X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1658; i=treding@nvidia.com; h=from:subject:message-id; bh=x42X/LoitiSAA+x5nw8PyFMoPRI+RXmRFby0FyalBMc=; b=owEBbQKS/ZANAwAKAd0jrNd/PrOhAcsmYgBqkFLVY/QZGYUrqdoqJT9+nWAvUV7l8rJ22CH0r c3QHUjuEbiJAjMEAAEKAB0WIQSI6sMIAUnM98CNyJ/dI6zXfz6zoQUCapBS1QAKCRDdI6zXfz6z oY9ZD/9iUEb/kfa6gUgy7nJm7X7lRBEsOtaw/cytm4lYF42gkYMEDIfPXWLb4O0FXhHgHJBZaTW Vp4+p655zXqfmGVKVIQN/CWd7qe/aLi0ItY7qM3N6z87T5vgF+PYe4U9K0bhcKWEScupK+rKADw xtpoMMFES5CQfwnECl7/LO6b2uBgvwPyyQTmfk5UctH+OP4h/Fm64+te6regDQrcCaOl1uiivXA SuHLbhn0OqVIyCjpglou9672B9uGDRqZRjxJ4CVdvIEZzF3i+sA9n+KKCBMAvJPzmBZlR7Epm4n iVHh7jrAdeUqjzZy6Jo0jZlBGgrT9tqdYEt9RMXYz6hVUZeUIij488s0Qjq4MwprkF6G3kcgaVi 6+OIHnM1HC3GcwkxOa/ah0e85jxenpqJoNU8JKCIVExkXBY8QP3LYDq2++qetXeMomFwF5+NV3f 0cF21r0FfRnOxokH50kPcRB2/RybYzTXAL1IDeHFFssCYNL9vlrEJZsj1lKMb4w4dSySJzs+N5j w/9nKZD3bhlffJb97o16QF1e5cV/qjcTeZDY8v65cBrI4Phn/NRsRvfva+ZGitNKFI1A68O7uAW pbS7HERcjE508XaibQvGqA2/Xm1znbp3CXSL2jBv/WHl6A32BTfLXmqclP1q9O/xMDBJASlBiBD mx7csDhwLqsAuRA== X-Developer-Key: i=treding@nvidia.com; a=openpgp; fpr=88EAC3080149CCF7C08DC89FDD23ACD77F3EB3A1 From: Thierry Reding Add the thermal zones exposed by the BPMP on Tegra264 so that cooling devices can be attached to them in board-level DTS files. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra264.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts= /nvidia/tegra264.dtsi index 630c20523dcf..5b3082f1ef45 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include =20 / { compatible =3D "nvidia,tegra264"; @@ -4625,6 +4626,33 @@ sound { status =3D "disabled"; }; =20 + thermal-zones { + cpu-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_CPU_MAX>; + status =3D "disabled"; + }; + + gpu-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_GPU_MAX>; + status =3D "disabled"; + }; + + soc012-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_SOC_012_MAX= >; + status =3D "disabled"; + }; + + soc345-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_SOC_345_MAX= >; + status =3D "disabled"; + }; + + tj-thermal { + thermal-sensors =3D <&{/bpmp/thermal} TEGRA264_THERMAL_ZONE_TJ_MAX>; + status =3D "disabled"; + }; + }; + timer { compatible =3D "arm,armv8-timer"; interrupts =3D , --=20 2.55.0 From nobody Sun Sep 27 00:36:54 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C710448550D; Thu, 27 Aug 2026 15:08:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787843300; cv=none; b=HAeTTvlcrC7DSw59pBoylJZJBXLZf6ckiIGIURVVduu5aT0/p3fUdDzs34k8vT1pZ1cdOu65O2/qtOJkoXuYTlZ+n3MwPFxcttXrHN8jK57o3m4/GWBJ4HpvVIsGpDabZlml7bRzyGz8T2TY31MAlL0IZzqmkBc0oEDnkShreo0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787843300; c=relaxed/simple; bh=O1rzJtMcm6mFTSRKAvHPql4xwRZfD99a2m32PaIgH9c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YNAcP0tI6fhh538zRiQ7aJQTqyDHES8FDzntpzY5qF0fr70geSdWKTreexmOxRMim+BYnkQazmtQCWHef+hSrkWG2BASDxh7DjmWOawZIlB9AJUhRpgfvNxxJ55DYhFV+quKjFK2rKR9GwZqw08rmgTjJZsY9RnN6L41nnga364= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OoXKxxOy; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OoXKxxOy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D0CB91F000E9; Thu, 27 Aug 2026 15:08:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787843299; bh=a+5yaFkrJOw9/iYBFvWXyxER2EtDDURsdnRYrxTdIcw=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=OoXKxxOy7BYrHgUXWwcWcfb1rDjQfIPPO1pSO+Vw5E12USztLX8Te7L2CRgFm8nB8 EeY8/sSdXBuFq1aFmoFi3E2dVlvjpuxI4A1wT0Daks204cbpC9A9kC1mBKEZDhMn+D TvxPMMCLVgScVEvP4sGhK5Llg1+jWiPmxD1VhRgmgBgEjq7hyOtCUBNgtXXzY2SkDT XQ00aJbh9j4uM2LJcxzzXdt7lbxN2+G6kELi7XrGrJuKk4NuDv+Ehhs+x1lJ8GBLz1 RPIuk2A9l1IIDcuEdJoswV5vNQ7xSKgJSLIcELTrfyZnjnF42L2lavUJ0vVLyrlYEj N5IV8q68SyBmQ== From: Thierry Reding Date: Thu, 27 Aug 2026 17:07:53 +0200 Subject: [PATCH 4/4] arm64: tegra: Add cooling device on Jetson AGX Thor DevKit Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260827-tegra264-fan-v1-4-3c55f0c748b1@nvidia.com> References: <20260827-tegra264-fan-v1-0-3c55f0c748b1@nvidia.com> In-Reply-To: <20260827-tegra264-fan-v1-0-3c55f0c748b1@nvidia.com> To: Thierry Reding Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Hunter , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, Thierry Reding X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2745; i=treding@nvidia.com; h=from:subject:message-id; bh=ffBQB+0ihS+VzjDCPSRBlHFSrJqDD1qnX5rd3sZ0miQ=; b=owEBbQKS/ZANAwAKAd0jrNd/PrOhAcsmYgBqkFLVzhXyQ2fkxNWhTmPHQMPaaqsMCkiTBcMgW hBjrUAoR8eJAjMEAAEKAB0WIQSI6sMIAUnM98CNyJ/dI6zXfz6zoQUCapBS1QAKCRDdI6zXfz6z oTLxD/48/kgHW61xy9NZYlsgXDXFV9/gnZC9I19PNy5prxwgkCJrFbiJj4sCXn+hg6vGet070L+ zdmXym1AJflkY8SJInSpUcSjhqR2kQxooKmRgUz3gdTUFj3f2RqnmtZ3zvS+/fiTsn16sST64DY PmH2G1If3Mi7QoRXaKztGTP+ZN0hE3W87hbVB5KAzo4g31XseLmGiPzHKdGN7zawIM8RByMK9Zk xSyjaB8VMghiR6JhpUQtv+ObA9ArSq0ykgm2XEY4UCQwz99mQexBuhDXsKcyvrtgCyhjqiQScTj MLW33fJ2eabda1es8zeJCl+BpeMu3tpdmceBAYDkmhZvTEFFIEQOFVptWshc0V5o/wOR4aV6y5w d2fhLmDQX/dFkr8gHfALItNFHy8wW7VAdNlivswfBYXTeLJ/C5vY3ZrXwxDjzlqaxIz3ZrKLkkd ux4tWEm8CkwmyCiVBpi84x4VtkMMR7LA13SraDu2bjsTAuvuSma2vL5I7I+xV4K7EZ6ervV9BMo kZMWqWwoXgpJROKgjnPhTu9JdcMLEVy7Z22AQU3QzfBAWVKGr20PHnnKpTIlw0e4jxtaohltT1U sb27HZeZMOxr0CbBLkVdGvMrj3W8Al4IxnzBNWOV/bdsfGspwRFFMGXWa1OjwG+ZAqup6s75CzT 0i4zaaiBUoNufog== X-Developer-Key: i=treding@nvidia.com; a=openpgp; fpr=88EAC3080149CCF7C08DC89FDD23ACD77F3EB3A1 From: Thierry Reding Monitor the TJ thermal zone and use the main PWM fan of the Jetson AGX Thor Developer Kit to actively cool the device if needed. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi | 32 +++++++++++++ .../boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi | 52 ++++++++++++++++++= ++++ 2 files changed, 84 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi b/arch/arm64/bo= ot/dts/nvidia/tegra264-p3834.dtsi index 58cd81bc33d7..d4c9f45e03c1 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi @@ -39,4 +39,36 @@ cmdqv@6200000 { status =3D "okay"; }; }; + + thermal-zones { + cpu-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + + gpu-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + + soc012-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + + soc345-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + + tj-thermal { + polling-delay-passive =3D <40>; + polling-delay =3D <1000>; + status =3D "okay"; + }; + }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi b/ar= ch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi index 4550e843f513..dd042e57839a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi @@ -22,4 +22,56 @@ fan: pwm-fan { pwms =3D <&pwm4 0 40000>; #cooling-cells =3D <2>; }; + + thermal-zones { + tj-thermal { + trips { + tj_trip_active0: active-0 { + temperature =3D <80000>; + hysteresis =3D <0>; + type =3D "active"; + }; + + tj_trip_active1: active-1 { + temperature =3D <86000>; + hysteresis =3D <0>; + type =3D "active"; + }; + + tj_trip_active2: active-2 { + temperature =3D <91000>; + hysteresis =3D <0>; + type =3D "active"; + }; + + tj_trip_active3: active-3 { + temperature =3D <100000>; + hysteresis =3D <0>; + type =3D "active"; + }; + }; + + cooling-maps { + map-active-0 { + cooling-device =3D <&fan 0 1>; + trip =3D <&tj_trip_active0>; + }; + + map-active-1 { + cooling-device =3D <&fan 1 2>; + trip =3D <&tj_trip_active1>; + }; + + map-active-2 { + cooling-device =3D <&fan 2 3>; + trip =3D <&tj_trip_active2>; + }; + + map-active-3 { + cooling-device =3D <&fan 3 4>; + trip =3D <&tj_trip_active3>; + }; + }; + }; + }; }; --=20 2.55.0